| /optee_os/core/drivers/rtc/ |
| H A D | rtc.c | 73 tm_a = SHIFT_U64(a->tm_year, RTC_CMP_YEAR_SHIFT) + in rtc_timecmp() 74 SHIFT_U64(a->tm_mon, RTC_CMP_MONTH_SHIFT) + in rtc_timecmp() 75 SHIFT_U64(a->tm_mday, RTC_CMP_DAY_SHIFT) + in rtc_timecmp() 76 SHIFT_U64(a->tm_hour, RTC_CMP_HOUR_SHIFT) + in rtc_timecmp() 77 SHIFT_U64(a->tm_min, RTC_CMP_MINUTES_SHIFT) + in rtc_timecmp() 78 SHIFT_U64(a->tm_sec, RTC_CMP_SECONDS_SHIFT) + in rtc_timecmp() 80 tm_b = SHIFT_U64(b->tm_year, RTC_CMP_YEAR_SHIFT) + in rtc_timecmp() 81 SHIFT_U64(b->tm_mon, RTC_CMP_MONTH_SHIFT) + in rtc_timecmp() 82 SHIFT_U64(b->tm_mday, RTC_CMP_DAY_SHIFT) + in rtc_timecmp() 83 SHIFT_U64(b->tm_hour, RTC_CMP_HOUR_SHIFT) + in rtc_timecmp() [all …]
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| /optee_os/core/drivers/crypto/caam/include/ |
| H A D | caam_utils_sgt.h | 17 SHIFT_U64(GENMASK_64(BS_SGT_V2_OFFSET - 1, 0), BP_SGT_V2_OFFSET) 18 #define BV_SGT_V2_OFFSET(_x) SHIFT_U64(((uint64_t)_x), BP_SGT_V2_OFFSET) 26 SHIFT_U64(SGT_V2_AVAIL_LENGTH_MAX_VALUE, BP_SGT_V2_AVAIL_LENGTH) 28 SHIFT_U64(((uint64_t)_x), BP_SGT_V2_AVAIL_LENGTH)
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| /optee_os/core/arch/arm/include/ |
| H A D | arm64.h | 29 #define SCTLR_TCF_MASK SHIFT_U64(0x3, 40) 30 #define SCTLR_TCF_NONE SHIFT_U64(0x0, 40) 31 #define SCTLR_TCF_SYNC SHIFT_U64(0x1, 40) 32 #define SCTLR_TCF_ASYNC SHIFT_U64(0x2, 40) 33 #define SCTLR_TCF_ASYMM SHIFT_U64(0x3, 40) 35 #define SCTLR_TCF0_MASK SHIFT_U64(0x3, 38) 36 #define SCTLR_TCF0_NONE SHIFT_U64(0x0, 38) 37 #define SCTLR_TCF0_SYNC SHIFT_U64(0x1, 38) 38 #define SCTLR_TCF0_ASYNC SHIFT_U64(0x2, 38) 39 #define SCTLR_TCF0_ASYMM SHIFT_U64(0x3, 38) [all …]
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| H A D | arm.h | 263 SHIFT_U64(ID_AA64ISAR1_GPI_MASK, ID_AA64ISAR1_GPI_SHIFT) | in feat_pauth_is_implemented() 264 SHIFT_U64(ID_AA64ISAR1_GPA_MASK, ID_AA64ISAR1_GPA_SHIFT) | in feat_pauth_is_implemented() 265 SHIFT_U64(ID_AA64ISAR1_API_MASK, ID_AA64ISAR1_API_SHIFT) | in feat_pauth_is_implemented() 266 SHIFT_U64(ID_AA64ISAR1_APA_MASK, ID_AA64ISAR1_APA_SHIFT); in feat_pauth_is_implemented()
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| /optee_os/core/arch/arm/include/kernel/ |
| H A D | tlb_helpers.h | 33 tlbi_vale1is((va >> TLBI_VA_SHIFT) | SHIFT_U64(a, TLBI_ASID_SHIFT)); in tlbi_va_asid_nosync() 35 SHIFT_U64(a | 1, TLBI_ASID_SHIFT)); in tlbi_va_asid_nosync()
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| /optee_os/core/arch/riscv/plat-spike/drivers/ |
| H A D | htif.c | 45 io_write64(base, SHIFT_U64(dev, 56) | SHIFT_U64(cmd, 48) | data); in tohost_cmd()
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| /optee_os/lib/libutils/ext/include/ |
| H A D | fault_mitigation.h | 173 (SHIFT_U64(__FTMN_FUNC_BYTE((f), (o), (l)), 0) | \ 174 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 1, (l)), 8) | \ 175 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 2, (l)), 16) | \ 176 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 3, (l)), 24) | \ 177 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 4, (l)), 32) | \ 178 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 5, (l)), 40) | \ 179 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 6, (l)), 48) | \ 180 SHIFT_U64(__FTMN_FUNC_BYTE((f), (o) + 7, (l)), 56))
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| H A D | memtag.h | 127 va &= ~SHIFT_U64(MEMTAG_TAG_MASK, MEMTAG_TAG_SHIFT); in memtag_strip_tag_vaddr() 168 va |= SHIFT_U64(tag, MEMTAG_TAG_SHIFT); in memtag_insert_tag_vaddr()
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| H A D | util.h | 193 #define SHIFT_U64(v, shift) ((v) << (shift)) 198 #define SHIFT_U64(v, shift) ((uint64_t)(v) << (shift)) macro
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| /optee_os/core/drivers/ |
| H A D | imx_ocotp.c | 133 uid = SHIFT_U64(uid, 16) | (val & GENMASK_32(15, 0)); in ocotp_get_die_id_mx7ulp() 138 uid = SHIFT_U64(uid, 16) | (val & GENMASK_32(15, 0)); in ocotp_get_die_id_mx7ulp() 143 uid = SHIFT_U64(uid, 16) | (val & GENMASK_32(15, 0)); in ocotp_get_die_id_mx7ulp() 166 uid = SHIFT_U64(uid, 32) | val; in ocotp_get_die_id_mx()
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| H A D | zynqmp_csudma.c | 132 dcache_inv_range(addr, SHIFT_U64(len, CSUDMA_SIZE_SHIFT)); in zynqmp_csudma_transfer() 134 dcache_clean_range(addr, SHIFT_U64(len, CSUDMA_SIZE_SHIFT)); in zynqmp_csudma_transfer()
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| H A D | gic.c | 506 mpidr |= SHIFT_U64((tv >> GICR_TYPER_AFF3_SHIFT) & in probe_redist_base_addrs() 781 uint64_t mask = SHIFT_U64(mask_id, 24); in gic_it_raise_sgi() 796 mask |= SHIFT_U64(mask_aff1, GICC_SGI_AFF1_SHIFT); in gic_it_raise_sgi() 797 mask |= SHIFT_U64(mask_aff2, GICC_SGI_AFF2_SHIFT); in gic_it_raise_sgi() 798 mask |= SHIFT_U64(mask_aff3, GICC_SGI_AFF3_SHIFT); in gic_it_raise_sgi()
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| H A D | openedges_omc.c | 132 return SHIFT_U64(omc_read32(filter, REGION0_START_OFF), 8); in omc_read_start_address()
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| /optee_os/core/arch/riscv/mm/ |
| H A D | core_mmu_arch.c | 147 return SHIFT_U64(ppn, PTE_PPN_SHIFT) | pte_bits; in core_mmu_pte_create() 168 return SHIFT_U64(core_mmu_pte_ppn(pte), RISCV_PGSHIFT); in pte_to_pa() 179 satp |= SHIFT_U64(asid, RISCV_SATP_ASID_SHIFT); in core_mmu_pgt_to_satp() 180 satp |= SHIFT_U64(RISCV_SATP_MODE, RISCV_SATP_MODE_SHIFT); in core_mmu_pgt_to_satp() 271 vaddr_t va_base = SHIFT_U64(idx, CORE_MMU_SHIFT_OF_LEVEL(level)); in core_mmu_pgt_get_va_base() 954 satp &= ~SHIFT_U64(RISCV_SATP_ASID_MASK, RISCV_SATP_ASID_SHIFT); in core_mmu_set_user_map() 960 satp |= SHIFT_U64(map->asid, RISCV_SATP_ASID_SHIFT); in core_mmu_set_user_map() 982 *base = SHIFT_U64(user_va_idx, CORE_MMU_VPN2_SHIFT); in core_mmu_get_user_va_range() 987 *base = SHIFT_U64(user_va_idx, CORE_MMU_VPN1_SHIFT); in core_mmu_get_user_va_range()
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| /optee_os/lib/libutee/include/ |
| H A D | riscv_user_sysreg.h | 29 time = SHIFT_U64(hi, 32) | lo; in read_time()
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| /optee_os/core/drivers/crypto/caam/ |
| H A D | caam_desc.c | 91 return SHIFT_U64(get_be32(&a32[0]), 32) | get_be32(&a32[1]); in caam_desc_pop() 93 return SHIFT_U64(a32[1], 32) | a32[0]; in caam_desc_pop()
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| /optee_os/core/arch/riscv/kernel/ |
| H A D | tee_time_rdtime.c | 28 time = SHIFT_U64(hi, 32) | lo; in read_time()
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| /optee_os/core/drivers/crypto/hisilicon/ |
| H A D | hisi_qm.c | 146 doorbell = qn | SHIFT_U64(cmd, QM_DB_CMD_SHIFT) | in qm_db() 147 SHIFT_U64(QM_DB_RAND_DATA, QM_DB_RAND_DATA_SHIFT) | in qm_db() 148 SHIFT_U64(index, QM_DB_INDEX_SHIFT) | in qm_db() 149 SHIFT_U64(priority, QM_DB_PRIORITY_SHIFT); in qm_db() 270 data = SHIFT_U64(base, QM_SQC_VFT_START_SQN_SHIFT) | in qm_cfg_vft_data() 272 SHIFT_U64((number - 1), QM_SQC_VFT_SQ_NUM_SHIFT); in qm_cfg_vft_data()
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| H A D | sec_hash.c | 22 sqe->type2.mac_key_alg |= SHIFT_U64(DIV_ROUND_UP(ctx->key_len, in sec_digest_set_hmac_key() 149 sqe->auth_mac_key |= SHIFT_U64(DIV_ROUND_UP(ctx->key_len, in sec_digest_set_hmac_bd3_key() 209 sqe->auth_mac_key |= SHIFT_U64(ctx->mac_len / SEC_ENCODE_BYTES, in sec_digest_fill_bd3_sqe()
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| /optee_os/lib/libutils/ext/ftrace/ |
| H A D | ftrace.c | 79 *elem = SHIFT_U64(level, 56) | val; in add_elem()
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| /optee_os/core/arch/riscv/include/ |
| H A D | riscv.h | 50 #define CSR_MODE_BITS SHIFT_U64(CSR_MODE_OFFSET, 8)
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| /optee_os/core/arch/arm/mm/ |
| H A D | mobj_ffa.c | 261 m->cookie |= SHIFT_U64(virt_get_current_guest_id(), in mobj_ffa_sel1_spmc_new() 384 mask |= SHIFT_U64(FFA_MEMORY_HANDLE_PRTN_MASK, in mobj_ffa_sel1_spmc_delete()
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| /optee_os/core/drivers/clk/sam/ |
| H A D | clk-sam9x60-pll.c | 35 #define PLL_ICPR_MASK(id) SHIFT_U64(0xffff, PLL_ICPR_SHIFT(id))
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| /optee_os/core/arch/arm/kernel/ |
| H A D | virtualization.c | 677 SHIFT_U64(FFA_MEMORY_HANDLE_PRTN_MASK, in reclaim_cookie()
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| /optee_os/core/drivers/crypto/stm32/ |
| H A D | stm32_pka.c | 851 tmp |= SHIFT_U64(data[data_index], (INT8_LEN * i)); in write_eo_data()
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