| #
1cf7e98d |
| 14-Mar-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: replace REGISTER_TIME_SOURCE()
Remove REGISTER_TIME_SOURCE() and implement tee_time_get_sys_time() and tee_time_get_sys_time_protection_level() directly in the file where REGISTER_TIME_SOURCE(
core: replace REGISTER_TIME_SOURCE()
Remove REGISTER_TIME_SOURCE() and implement tee_time_get_sys_time() and tee_time_get_sys_time_protection_level() directly in the file where REGISTER_TIME_SOURCE() was used previously.
By avoiding indirect calls the linker can optimize the dependency tree properly and we can remove the DECLARE_KEEP_PAGER() directive needed for arm_cntpct_time_source.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
994c8602 |
| 20-Jun-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Implement timer related functions for ftrace support
Implement barrier_read_counter_timer() to read the timer value after a barrier. Implement read_cntfrq() to get the frequency of mach
core: riscv: Implement timer related functions for ftrace support
Implement barrier_read_counter_timer() to read the timer value after a barrier. Implement read_cntfrq() to get the frequency of machine timer counter. The read_time() is moved from header to C source file to reduce the code size.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| #
6454758b |
| 01-Dec-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: riscv: add time source based on time registers
Implement a TEE time source based on CSR_TIME and CSR_HTIME for S-Mode and CLINT MTIME register for M-Mode. CFG_RISCV_TIME_SOURCE_RDTIME flag to
core: riscv: add time source based on time registers
Implement a TEE time source based on CSR_TIME and CSR_HTIME for S-Mode and CLINT MTIME register for M-Mode. CFG_RISCV_TIME_SOURCE_RDTIME flag to enable or not building the time source. CFG_RISCV_MTIME_RATE defines the timer rate, default to 10MHz.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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