Searched refs:zq0cr1 (Results 1 – 9 of 9) sorted by relevance
35 .zq0cr1 = 0x0001005Dul,86 .zq0cr1 = 0x0001005Dul,
34 .zq0cr1 = 0x0001005Dul,
39 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
46 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
34 unsigned int zq0cr1; member
40 debug_ddr_cfg("zq0cr1 0x%08X\n", ptr->zq0cr1); in dump_phy_config()362 spd_cb->phy_cfg.zq0cr1 = 0x0000005D; in init_ddr3param()
59 __raw_writel(phy_cfg->zq0cr1, base + KS2_DDRPHY_ZQ0CR1_OFFSET); in ddr3_init_ddrphy()
211 u32 zq0cr1; /* 0x184 zq 0 control register 1 */ member
158 writel(CONFIG_DRAM_ZQ, &mctl_phy->zq0cr1); in mctl_channel_init()