Searched refs:txdes0 (Results 1 – 8 of 8) sorted by relevance
408 txdes[PKTBUFSTX - 1].txdes0 = FTGMAC100_TXDES0_EDOTR; in ftgmac100_init()515 if (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) { in ftgmac100_send()528 curr_des->txdes0 &= FTGMAC100_TXDES0_EDOTR; in ftgmac100_send()529 curr_des->txdes0 |= FTGMAC100_TXDES0_FTS | in ftgmac100_send()
188 if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { in _ftmac100_send()206 curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN; in _ftmac100_send()215 while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { in _ftmac100_send()
100 unsigned int txdes0; member
182 unsigned int txdes0; member
646 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_tx_complete_packet()654 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_tx_complete_packet()795 txdes->txdes0 = cpu_to_le32(ctl_stat); in ftgmac100_hard_start_xmit()807 first->txdes0 = cpu_to_le32(f_ctl_stat); in ftgmac100_hard_start_xmit()836 first->txdes0 = cpu_to_le32(f_ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()842 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_hard_start_xmit()844 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()885 le32_to_cpu(txdes->txdes0)); in ftgmac100_free_buffers()977 txdes->txdes0 = 0; in ftgmac100_init_rings()979 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask); in ftgmac100_init_rings()
462 txdes->txdes0 = 0; in ftmac100_txdes_reset()470 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN); in ftmac100_txdes_owned_by_dma()480 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN); in ftmac100_txdes_set_dma_own()485 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL); in ftmac100_txdes_excessive_collision()490 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL); in ftmac100_txdes_late_collision()
125 unsigned int txdes0; member
207 __le32 txdes0; /* Control & status bits */ member