Searched refs:training_result (Results 1 – 8 of 8) sorted by relevance
172 return training_result[stage]; in ddr3_tip_get_result_ptr()362 (training_result[INIT_CONTROLLER] in ddr3_tip_print_log()369 (training_result[SET_LOW_FREQ] in ddr3_tip_print_log()376 (training_result[LOAD_PATTERN] in ddr3_tip_print_log()383 (training_result[SET_MEDIUM_FREQ] in ddr3_tip_print_log()390 (training_result[WRITE_LEVELING] in ddr3_tip_print_log()397 (training_result[LOAD_PATTERN_2] in ddr3_tip_print_log()404 (training_result[READ_LEVELING] in ddr3_tip_print_log()411 (training_result[WRITE_LEVELING_SUPP] in ddr3_tip_print_log()418 (training_result[PBS_RX] in ddr3_tip_print_log()[all …]
99 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_read_leveling()108 training_result[training_stage][if_id] = in ddr3_tip_dynamic_read_leveling()141 training_result[training_stage][if_id] = in ddr3_tip_dynamic_read_leveling()159 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_read_leveling()356 training_result[training_stage][if_id] = in ddr3_tip_dynamic_read_leveling()431 if (training_result[training_stage][if_id] == TEST_FAILED) in ddr3_tip_dynamic_read_leveling()560 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_per_bit_read_leveling()865 training_result[training_stage][if_id] = TEST_FAILED; in ddr3_tip_dynamic_per_bit_read_leveling()910 if (training_result[training_stage][if_id] == TEST_FAILED) in ddr3_tip_dynamic_per_bit_read_leveling()977 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_dynamic_write_leveling()[all …]
201 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];264 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];269 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];284 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];
60 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; in ddr3_tip_centralization() local134 PARAM_NOT_CARE, training_result); in ddr3_tip_centralization()499 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; in ddr3_tip_special_rx() local545 PARAM_NOT_CARE, training_result); in ddr3_tip_special_rx()
723 training_result[training_stage][if_id] in ddr3_tip_pbs()730 training_result[ in ddr3_tip_pbs()732 (training_result[training_stage] in ddr3_tip_pbs()
49 enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]; variable974 training_result[training_stage][interface_num] = in ddr3_tip_if_polling()1232 enum hws_result *flow_result = training_result[training_stage]; in ddr3_tip_freq_set()1257 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_freq_set()2387 training_result[stage][if_id] = NO_TEST_DONE; in ddr3_tip_ddr3_auto_tune()2411 if (training_result[stage][if_id] == TEST_FAILED) in ddr3_tip_ddr3_auto_tune()
745 training_result[training_stage][if_id] = TEST_SUCCESS; in ddr3_tip_load_all_pattern_to_mem()
47 enum link_training_result training_result);2254 enum link_training_result training_result) in decide_fallback_link_setting() argument2259 switch (training_result) { in decide_fallback_link_setting()2274 if (training_result == LINK_TRAINING_CR_FAIL_LANE0) in decide_fallback_link_setting()2276 else if (training_result == LINK_TRAINING_CR_FAIL_LANE1) in decide_fallback_link_setting()2279 else if (training_result == in decide_fallback_link_setting()