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Searched refs:RK3288_DSP_CTRL0 (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_vop_reg.c104 .dsp_interlace = VOP_REG(RK3288_DSP_CTRL0, 0x1, 10),
120 .dclk_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 7, 3, 0, 1),
121 .pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0xf, 4, 3, 0, 1),
142 .dsp_data_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1f, 12),
143 .dsp_bg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 12),
144 .dsp_rb_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 13),
145 .dsp_rg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 14),
146 .dsp_delta_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 15),
147 .dsp_dummy_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 16),
148 .dsp_ccir656_avg = VOP_REG(RK3288_DSP_CTRL0, 0x1, 20),
[all …]
H A Drockchip_vop_reg.h15 #define RK3288_DSP_CTRL0 0x0010 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c271 .dsp_interlace = VOP_REG(RK3288_DSP_CTRL0, 0x1, 10),
279 .dclk_ddr = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 8, 3, 1, -1),
288 .dclk_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 7, 3, 0, 1),
289 .pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0x7, 4, 3, 0, 1),
313 .dsp_data_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1f, 12),
314 .dsp_bg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 12),
315 .dsp_rb_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 13),
316 .dsp_rg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 14),
317 .dsp_delta_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 15),
318 .dsp_dummy_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 16),
[all …]
H A Drockchip_vop_reg.h15 #define RK3288_DSP_CTRL0 0x0010 macro