Searched refs:MUSB_CSR0_P_DATAEND (Results 1 – 6 of 6) sorted by relevance
490 csr |= MUSB_CSR0_P_DATAEND; in ep0_rxstate()546 csr |= MUSB_CSR0_P_DATAEND; in ep0_txstate()656 if (csr & MUSB_CSR0_P_DATAEND) { in musb_g_ep0_irq()815 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()831 | MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()965 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
89 #define MUSB_CSR0_P_DATAEND 0x0008 macro
495 csr |= MUSB_CSR0_P_DATAEND; in ep0_rxstate()551 csr |= MUSB_CSR0_P_DATAEND; in ep0_txstate()663 if (csr & MUSB_CSR0_P_DATAEND) { in musb_g_ep0_irq()822 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()838 | MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()972 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
84 #define MUSB_CSR0_P_DATAEND 0x0008 macro
187 #define MUSB_CSR0_P_DATAEND 0x0008 macro
242 csr0 |= (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND); in musb_ep0_tx_ready_and_last()251 csr0 |= MUSB_CSR0_P_DATAEND; in musb_peri_ep0_last()