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Searched refs:MI_WR_CTRL2 (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/isp/
H A Dbridge.c168 rkisp_set_bits(dev->ispdev, MI_WR_CTRL2, in init_buf()
H A Dregs_v2x.h431 #define MI_WR_CTRL2 (MI_BASE + 0x00400) macro
2618 void __iomem *addr = base + MI_WR_CTRL2; in mi_wr_ctrl2()
H A Drkisp.c690 rkisp_update_regs(dev, MI_MP_WR_Y_BASE, MI_WR_CTRL2 - 4); in rkisp_trigger_read_back()
697 val = rkisp_read(dev, MI_WR_CTRL2, false); in rkisp_trigger_read_back()
698 rkisp_set_bits(dev, MI_WR_CTRL2, 0, val, true); in rkisp_trigger_read_back()
H A Dbridge_v20.c524 rkisp_set_bits(dev->ispdev, MI_WR_CTRL2, in config_gain()
H A Disp_params_v21.c3308 rkisp_set_bits(params_vdev->dev, MI_WR_CTRL2, in isp_bay3d_enable()
H A Disp_params_v3x.c3544 isp3_param_set_bits(params_vdev, MI_WR_CTRL2, value, id); in isp_bay3d_enable()
H A Disp_params_v32.c3628 isp3_param_set_bits(params_vdev, MI_WR_CTRL2, value); in isp_bay3d_enable()