Searched refs:FSL_DDR_CACHE_LINE_INTERLEAVING (Results 1 – 6 of 6) sorted by relevance
220 case FSL_DDR_CACHE_LINE_INTERLEAVING: in step_assign_addresses()
334 case FSL_DDR_CACHE_LINE_INTERLEAVING: in __step_assign_addresses()713 case FSL_DDR_CACHE_LINE_INTERLEAVING: in __fsl_ddr_sdram()
284 case FSL_DDR_CACHE_LINE_INTERLEAVING: in print_ddr_info()
1115 0 : FSL_DDR_CACHE_LINE_INTERLEAVING; in populate_memctl_options()1359 case FSL_DDR_CACHE_LINE_INTERLEAVING: in check_interleaving_options()
178 case FSL_DDR_CACHE_LINE_INTERLEAVING: in set_csn_config()
89 #define FSL_DDR_CACHE_LINE_INTERLEAVING 0x0 macro