Searched refs:EVERGREEN_CRTC1_REGISTER_OFFSET (Results 1 – 9 of 9) sorted by relevance
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/ |
| H A D | evergreen_reg.h | 225 #define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0) macro
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| H A D | radeon_display.c | 1509 EVERGREEN_CRTC1_REGISTER_OFFSET, in radeon_afmt_init() 1841 EVERGREEN_CRTC1_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos() 1843 EVERGREEN_CRTC1_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos()
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| H A D | radeon_dp_mst.c | 18 EVERGREEN_CRTC1_REGISTER_OFFSET, in radeon_atom_set_enc_offset()
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| H A D | cik.c | 6893 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); in cik_disable_interrupt_state() 6905 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); in cik_disable_interrupt_state() 7245 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2); in cik_irq_set() 7258 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, in cik_irq_set() 7311 EVERGREEN_CRTC1_REGISTER_OFFSET); in cik_irq_ack() 7329 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, in cik_irq_ack() 7336 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack() 7338 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); in cik_irq_ack()
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| H A D | radeon_device.c | 676 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); in radeon_card_posted()
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| H A D | evergreen_cs.c | 1030 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC1_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline() 1038 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline()
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| H A D | atombios_crtc.c | 2249 radeon_crtc->crtc_offset = EVERGREEN_CRTC1_REGISTER_OFFSET; in radeon_atombios_init_crtc()
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| H A D | evergreen.c | 118 EVERGREEN_CRTC1_REGISTER_OFFSET,
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| H A D | si.c | 149 EVERGREEN_CRTC1_REGISTER_OFFSET,
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