Searched refs:E1000_IMS (Results 1 – 8 of 8) sorted by relevance
35 #define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ macro
24 #define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ macro
1361 wr32(E1000_IMS, E1000_IMS_TS); in igb_ptp_reset()
508 regs_buff[21] = rd32(E1000_IMS); in igb_get_regs()1505 wr32(E1000_IMS, mask); in igb_intr_test()
1526 wr32(E1000_IMS, ims); in igb_irq_enable()1528 wr32(E1000_IMS, IMS_ENABLE_MASK | in igb_irq_enable()
705 #define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ macro866 #define E1000_82542_IMS E1000_IMS
805 #define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ macro1051 #define E1000_82542_IMS E1000_IMS
525 E1000_WRITE_REG(hw, E1000_IMS, intr->mask); in igb_intr_enable()