Searched refs:CLK_SPI0_PLL_SEL_SHIFT (Results 1 – 6 of 6) sorted by relevance
250 CLK_SPI0_PLL_SEL_SHIFT = 15, enumerator253 CLK_SPI0_PLL_SEL_MASK = 1 << CLK_SPI0_PLL_SEL_SHIFT,
541 CLK_SPI0_PLL_SEL_SHIFT = 14, enumerator542 CLK_SPI0_PLL_SEL_MASK = 0x3 << CLK_SPI0_PLL_SEL_SHIFT,
425 CLK_SPI0_PLL_SEL_SHIFT = 7, enumerator
273 CLK_SPI0_PLL_SEL_SHIFT = 7, enumerator683 .sel_shift = CLK_SPI0_PLL_SEL_SHIFT, },
789 CLK_SPI_PLL_SEL_MASK << CLK_SPI0_PLL_SEL_SHIFT, in px30_spi_set_clk()791 CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT); in px30_spi_set_clk()
449 CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT); in rk1808_spi_set_clk()