Searched refs:CLK_I2C_PLL_SEL_GPLL (Results 1 – 7 of 7) sorted by relevance
153 CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT); in rk1808_i2c_set_clk()159 CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT); in rk1808_i2c_set_clk()165 CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT); in rk1808_i2c_set_clk()171 CLK_I2C_PLL_SEL_GPLL << CLK_I2C4_PLL_SEL_SHIFT); in rk1808_i2c_set_clk()177 CLK_I2C_PLL_SEL_GPLL << CLK_I2C5_PLL_SEL_SHIFT); in rk1808_i2c_set_clk()
212 CLK_I2C_PLL_SEL_GPLL << CLK_I2C0_PLL_SEL_SHIFT); in rk3328_i2c_set_clk()219 CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT); in rk3328_i2c_set_clk()226 CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT); in rk3328_i2c_set_clk()233 CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT); in rk3328_i2c_set_clk()
341 CLK_I2C_PLL_SEL_GPLL << CLK_I2C0_PLL_SEL_SHIFT); in px30_i2c_set_clk()348 CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT); in px30_i2c_set_clk()355 CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT); in px30_i2c_set_clk()362 CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT); in px30_i2c_set_clk()
285 CLK_I2C_PLL_SEL_GPLL = 1, enumerator569 CLK_I2C_PLL_SEL_GPLL << \
197 CLK_I2C_PLL_SEL_GPLL, enumerator
236 CLK_I2C_PLL_SEL_GPLL = 0, enumerator
393 CLK_I2C_PLL_SEL_GPLL = 0, enumerator