Searched hist:d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a55.h | d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 Wed Nov 09 16:29:02 UTC 2016 David Wang <david.wang@arm.com> Add support for Cortex-A75 and Cortex-A55 CPUs
Both Cortex-A75 and Cortex-A55 CPUs use the ARM DynamIQ Shared Unit
(DSU). The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are considerably
simpler.
Change-Id: I68b30e6e1ebe7c041d5e67f39c59f08575fc7ecc
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| H A D | cortex_a75.h | d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 Wed Nov 09 16:29:02 UTC 2016 David Wang <david.wang@arm.com> Add support for Cortex-A75 and Cortex-A55 CPUs
Both Cortex-A75 and Cortex-A55 CPUs use the ARM DynamIQ Shared Unit
(DSU). The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are considerably
simpler.
Change-Id: I68b30e6e1ebe7c041d5e67f39c59f08575fc7ecc
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a55.S | d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 Wed Nov 09 16:29:02 UTC 2016 David Wang <david.wang@arm.com> Add support for Cortex-A75 and Cortex-A55 CPUs
Both Cortex-A75 and Cortex-A55 CPUs use the ARM DynamIQ Shared Unit
(DSU). The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are considerably
simpler.
Change-Id: I68b30e6e1ebe7c041d5e67f39c59f08575fc7ecc
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| H A D | cortex_a75.S | d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 Wed Nov 09 16:29:02 UTC 2016 David Wang <david.wang@arm.com> Add support for Cortex-A75 and Cortex-A55 CPUs
Both Cortex-A75 and Cortex-A55 CPUs use the ARM DynamIQ Shared Unit
(DSU). The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are considerably
simpler.
Change-Id: I68b30e6e1ebe7c041d5e67f39c59f08575fc7ecc
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | platform.mk | d40ab484d2d8cdcd400acae96d0f88c00e1c2bd2 Wed Nov 09 16:29:02 UTC 2016 David Wang <david.wang@arm.com> Add support for Cortex-A75 and Cortex-A55 CPUs
Both Cortex-A75 and Cortex-A55 CPUs use the ARM DynamIQ Shared Unit
(DSU). The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are considerably
simpler.
Change-Id: I68b30e6e1ebe7c041d5e67f39c59f08575fc7ecc
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|