Searched hist:"0 d8511953e19a5da80ac1a0ed9ec8e76b57a33a8" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_ras.c | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|
| H A D | plat_sip_calls.c | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/mce/ |
| H A D | mce.c | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|
| H A D | nvg.c | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/include/ |
| H A D | mce_private.h | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/ |
| H A D | tegra_private.h | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 Thu Mar 21 15:23:05 UTC 2019 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
|