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/OK3568_Linux_fs/u-boot/drivers/crypto/fsl/
H A Djr.c2 * Copyright 2008-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
19 #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1))
35 (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
41 ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); in start_jr0() local
42 u32 ctpr_ms = sec_in32(&sec->ctpr_ms); in start_jr0()
43 u32 scfgr = sec_in32(&sec->scfgr); in start_jr0()
51 sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); in start_jr0()
55 sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); in start_jr0()
61 ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); in jr_reset_liodn() local
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/OK3568_Linux_fs/kernel/drivers/watchdog/
H A Ddw_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
7 * in the many subsystems. The watchdog has 16 different timeout periods
52 /* There are sixteen TOPs (timeout periods) that can be set in the watchdog. */
79 unsigned int sec; member
94 u32 timeout; member
105 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) & in dw_wdt_is_enabled()
113 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode()
118 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode()
120 dw_wdt->rmod = rmod; in dw_wdt_update_mode()
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H A Duniphier_wdt.c1 // SPDX-License-Identifier: GPL-2.0
35 #define SEC_TO_WDTTIMSET_PRD(sec) \ argument
36 (ilog2(sec) + WDTTIMSET_PERIOD_1_SEC)
44 static unsigned int timeout = 0; variable
62 ret = regmap_write_bits(wdev->regmap, WDTCTRL, in uniphier_watchdog_ping()
69 ret = regmap_read_poll_timeout(wdev->regmap, WDTCTRL, val, in uniphier_watchdog_ping()
76 static int __uniphier_watchdog_start(struct regmap *regmap, unsigned int sec) in __uniphier_watchdog_start() argument
89 SEC_TO_WDTTIMSET_PRD(sec)); in __uniphier_watchdog_start()
113 static int __uniphier_watchdog_restart(struct regmap *regmap, unsigned int sec) in __uniphier_watchdog_restart() argument
121 return __uniphier_watchdog_start(regmap, sec); in __uniphier_watchdog_restart()
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H A Dwatchdog_core.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (c) Copyright 2008-2011 Alan Cox <alan@lxorguk.ukuu.org.uk>,
8 * (c) Copyright 2008-2011 Wim Van Sebroeck <wim@iguana.be>.
22 * This material is provided "AS-IS" and at no charge.
29 #include <linux/errno.h> /* For the -ENODEV/... values */
42 static int stop_on_reboot = -1;
65 list_add_tail(&wdd->deferred, in watchdog_deferred_registration_add()
78 list_del(&wdd_tmp->deferred); in watchdog_deferred_registration_del()
87 * Check that we have valid min and max timeout values, if in watchdog_check_min_max_timeout()
90 if (!wdd->max_hw_heartbeat_ms && wdd->min_timeout > wdd->max_timeout) { in watchdog_check_min_max_timeout()
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/OK3568_Linux_fs/kernel/Documentation/watchdog/
H A Dmlx-wdt.rst16 Actual HW timeout can be defined as a power of 2 msec.
17 e.g. timeout 20 sec will be rounded up to 32768 msec.
18 The maximum timeout period is 32 sec (32768 msec.),
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
24 Maximum timeout is 255 sec.
25 Get time-left is supported.
28 Same as Type 2 with extended maximum timeout period.
29 Maximum timeout is 65535 sec.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/watchdog/
H A Datmel-wdt.txt3 ** at91sam9-wdt
6 - compatible: must be "atmel,at91sam9260-wdt".
7 - reg: physical base address of the controller and length of memory mapped
9 - clocks: phandle to input clock.
12 - timeout-sec: contains the watchdog timeout in seconds.
13 - interrupts : Should contain WDT interrupt.
14 - atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
17 - atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
18 seconds. This value must be smaller than the max-heartbeat-sec value.
20 - atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
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H A Dcadence-wdt.txt2 -------------------------------------------
5 - compatible : Should be "cdns,wdt-r1p2".
6 - clocks : This is pclk (APB clock).
7 - interrupts : This is wd_irq - watchdog timeout interrupt.
10 - reset-on-timeout : If this property exists, then a reset is done
12 - timeout-sec : Watchdog timeout value (in seconds).
16 compatible = "cdns,wdt-r1p2";
18 interrupt-parent = <&intc>;
21 reset-on-timeout;
22 timeout-sec = <10>;
H A Dstericsson-coh901327.txt1 ST-Ericsson COH 901 327 Watchdog timer
4 - compatible: must be "stericsson,coh901327".
5 - reg: physical base address of the controller and length of memory mapped
7 - interrupts: the interrupt used for the watchdog timeout warning.
10 - timeout-sec: contains the watchdog timeout in seconds.
18 timeout-sec = <60>;
H A Dqcom,pm8916-wdt.txt3 This pm8916 watchdog timer controller must be under pm8916-pon node.
6 - compatible: should be "qcom,pm8916-wdt"
9 - interrupts : Watchdog pre-timeout (bark) interrupt.
10 - timeout-sec : Watchdog timeout value in seconds.
15 compatible = "qcom,pm8916", "qcom,spmi-pmic";
19 compatible = "qcom,pm8916-pon";
23 compatible = "qcom,pm8916-wdt";
25 timeout-sec = <10>;
H A Dbrcm,bcm2835-pm-wdog.txt5 - compatible : should be "brcm,bcm2835-pm-wdt"
6 - reg : Specifies base physical address and size of the registers.
10 - timeout-sec : Contains the watchdog timeout in seconds
15 compatible = "brcm,bcm2835-pm-wdt";
17 timeout-sec = <10>;
H A Dpnx4008-wdt.txt4 - compatible: must be "nxp,pnx4008-wdt"
5 - reg: physical base address of the controller and length of memory mapped
9 - timeout-sec: contains the watchdog timeout in seconds.
14 compatible = "nxp,pnx4008-wdt";
16 timeout-sec = <10>;
H A Dsbsa-gwdt.txt4 after two stages of timeout have elapsed. A detailed definition of the
5 watchdog timer can be found in the ARM document: ARM-DEN-0029 - Server
9 - compatible: Should at least contain "arm,sbsa-gwdt".
11 - reg: Each entry specifies the base physical address of a register frame
17 - interrupts: Should contain the Watchdog Signal 0 (WS0) SPI (Shared
21 - timeout-sec: Watchdog timeout values (in seconds).
26 compatible = "arm,sbsa-gwdt";
30 timeout-sec = <30>;
H A Dsirfsoc_wdt.txt4 - compatible: "sirf,prima2-tick"
5 - reg: Address range of tick timer/WDT register set
6 - interrupts: interrupt number to the cpu
9 - timeout-sec : Contains the watchdog timeout in seconds
14 compatible = "sirf,prima2-tick";
17 timeout-sec = <30>;
H A Dsigma,smp8642-wdt.txt4 - compatible: Should be "sigma,smp8642-wdt"
5 - reg: Specifies the physical address region
6 - clocks: Should be a phandle to the clock
9 - timeout-sec: watchdog timeout in seconds
14 compatible = "sigma,smp8642-wdt";
17 timeout-sec = <30>;
H A Dalphascale-asm9260.txt5 - compatible : should be "alphascale,asm9260-wdt".
6 - reg : Specifies base physical address and size of the registers.
7 - clocks : the clocks feeding the watchdog timer. See clock-bindings.txt
8 - clock-names : should be set to
9 "mod" - source for tick counter.
10 "ahb" - ahb gate.
11 - resets : phandle pointing to the system reset controller with
13 - reset-names : should be set to "wdt_rst".
16 - timeout-sec : shall contain the default watchdog timeout in seconds,
17 if unset, the default timeout is 30 seconds.
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H A Dziirave-wdt.txt4 - compatible: must be "zii,rave-wdt"
5 - reg: i2c slave address of device, usually 0x38
8 - timeout-sec: Watchdog timeout value in seconds.
9 - reset-duration-ms: Duration of the pulse generated when the watchdog times
15 compatible = "zii,rave-wdt";
17 timeout-sec = <30>;
18 reset-duration-ms = <30>;
H A Dmeson-wdt.txt5 - compatible : depending on the SoC this should be one of:
6 "amlogic,meson6-wdt" on Meson6 SoCs
7 "amlogic,meson8-wdt" and "amlogic,meson6-wdt" on Meson8 SoCs
8 "amlogic,meson8b-wdt" on Meson8b SoCs
9 "amlogic,meson8m2-wdt" and "amlogic,meson8b-wdt" on Meson8m2 SoCs
10 - reg : Specifies base physical address and size of the registers.
13 - timeout-sec: contains the watchdog timeout in seconds.
18 compatible = "amlogic,meson6-wdt";
20 timeout-sec = <10>;
H A Dts4800-wdt.txt4 - compatible: must be "technologic,ts4800-wdt"
5 - syscon: phandle / integer array that points to the syscon node which
7 - phandle to FPGA's syscon
8 - offset to the watchdog register
11 - timeout-sec: contains the watchdog timeout in seconds.
16 compatible = "syscon", "simple-mfd";
18 reg-io-width = <2>;
21 compatible = "technologic,ts4800-wdt";
23 timeout-sec = <10>;
H A Dsprd-wdt.txt4 - compatible : Should be "sprd,sp9860-wdt".
5 - reg : Specifies base physical address and size of the registers.
6 - interrupts : Exactly one interrupt specifier.
7 - timeout-sec : Contain the default watchdog timeout in seconds.
8 - clock-names : Contain the input clock names.
9 - clocks : Phandles to input clocks.
13 compatible = "sprd,sp9860-wdt";
16 timeout-sec = <12>;
17 clock-names = "enable", "rtc_enable";
H A Ddigicolor-wdt.txt10 - compatible : Should be "cnxt,cx92755-wdt"
11 - reg : Specifies base physical address and size of the registers
12 - clocks : phandle; specifies the clock that drives the timer
16 - timeout-sec : Contains the watchdog timeout in seconds
21 compatible = "cnxt,cx92755-wdt";
24 timeout-sec = <15>;
H A Ddavinci-wdt.txt4 - compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt"
5 - reg : Should contain WDT registers location and length
8 - timeout-sec : Contains the watchdog timeout in seconds
9 - clocks : the clock feeding the watchdog timer.
11 See clock-bindings.txt
14 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
15 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
20 compatible = "ti,davinci-wdt";
22 timeout-sec = <30>;
H A Dmtk-wdt.txt5 - compatible should contain:
6 "mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
7 "mediatek,mt2712-wdt", "mediatek,mt6589-wdt": for MT2712
8 "mediatek,mt6589-wdt": for MT6589
9 "mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
10 "mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
11 "mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
12 "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
13 "mediatek,mt8183-wdt", "mediatek,mt6589-wdt": for MT8183
14 "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
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/OK3568_Linux_fs/kernel/tools/testing/selftests/bpf/
H A Dtest_tc_edt.sh2 # SPDX-License-Identifier: GPL-2.0
8 if [[ $EUID -ne 0 ]]; then
14 # check that nc, dd, and timeout are present
15 command -v nc >/dev/null 2>&1 || \
17 command -v dd >/dev/null 2>&1 || \
19 command -v timeout >/dev/null 2>&1 || \
20 { echo >&2 "timeout is not available"; exit 1; }
22 readonly NS_SRC="ns-src-$(mktemp -u XXXXXX)"
23 readonly NS_DST="ns-dst-$(mktemp -u XXXXXX)"
36 set -e # exit on error
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H A Dtest_tc_redirect.sh2 # SPDX-License-Identifier: GPL-2.0
4 # This test sets up 3 netns (src <-> fwd <-> dst). There is no direct veth link
12 if [[ $EUID -ne 0 ]]; then
19 command -v nc >/dev/null 2>&1 || \
21 command -v dd >/dev/null 2>&1 || \
23 command -v timeout >/dev/null 2>&1 || \
24 { echo >&2 "timeout is not available"; exit 1; }
25 command -v ping >/dev/null 2>&1 || \
27 if command -v ping6 >/dev/null 2>&1; then PING6=ping6; else PING6=ping; fi
28 command -v perl >/dev/null 2>&1 || \
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/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dsr_vendor.c1 // SPDX-License-Identifier: GPL-2.0
2 /* -*-linux-c-*-
4 * vendor-specific code for SCSI CD-ROM's goes here.
7 * the like) are too new to be included into the SCSI-II standard (to
10 * Aug 1997: Ha! Got a SCSI-3 cdrom spec across my fingers. SCSI-3 does
13 * Rearranged stuff here: SCSI-3 is included allways, support
16 * Gerd Knorr <kraxel@cs.tu-berlin.de>
18 * --------------------------------------------------------------------------
20 * support for XA/multisession-CD's
22 * - NEC: Detection and support of multisession CD's.
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