1*4882a593Smuzhiyun* Atmel Watchdog Timers 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun** at91sam9-wdt 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun- compatible: must be "atmel,at91sam9260-wdt". 7*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 8*4882a593Smuzhiyun region. 9*4882a593Smuzhiyun- clocks: phandle to input clock. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOptional properties: 12*4882a593Smuzhiyun- timeout-sec: contains the watchdog timeout in seconds. 13*4882a593Smuzhiyun- interrupts : Should contain WDT interrupt. 14*4882a593Smuzhiyun- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in 15*4882a593Smuzhiyun seconds. This value should be less or equal to 16. It is used to 16*4882a593Smuzhiyun compute the WDV field. 17*4882a593Smuzhiyun- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in 18*4882a593Smuzhiyun seconds. This value must be smaller than the max-heartbeat-sec value. 19*4882a593Smuzhiyun It is used to compute the WDD field. 20*4882a593Smuzhiyun- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog 21*4882a593Smuzhiyun use the at91 watchdog reset. Software watchdog use the watchdog 22*4882a593Smuzhiyun interrupt to trigger a software reset. 23*4882a593Smuzhiyun- atmel,reset-type : Should be "proc" or "all". 24*4882a593Smuzhiyun "all" : assert peripherals and processor reset signals 25*4882a593Smuzhiyun "proc" : assert the processor reset signal 26*4882a593Smuzhiyun This is valid only when using "hardware" watchdog. 27*4882a593Smuzhiyun- atmel,disable : Should be present if you want to disable the watchdog. 28*4882a593Smuzhiyun- atmel,idle-halt : Should be present if you want to stop the watchdog when 29*4882a593Smuzhiyun entering idle state. 30*4882a593Smuzhiyun CAUTION: This property should be used with care, it actually makes the 31*4882a593Smuzhiyun watchdog not counting when the CPU is in idle state, therefore the 32*4882a593Smuzhiyun watchdog reset time depends on mean CPU usage and will not reset at all 33*4882a593Smuzhiyun if the CPU stop working while it is in idle state, which is probably 34*4882a593Smuzhiyun not what you want. 35*4882a593Smuzhiyun- atmel,dbg-halt : Should be present if you want to stop the watchdog when 36*4882a593Smuzhiyun entering debug state. 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunExample: 39*4882a593Smuzhiyun watchdog@fffffd40 { 40*4882a593Smuzhiyun compatible = "atmel,at91sam9260-wdt"; 41*4882a593Smuzhiyun reg = <0xfffffd40 0x10>; 42*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 43*4882a593Smuzhiyun clocks = <&clk32k>; 44*4882a593Smuzhiyun timeout-sec = <15>; 45*4882a593Smuzhiyun atmel,watchdog-type = "hardware"; 46*4882a593Smuzhiyun atmel,reset-type = "all"; 47*4882a593Smuzhiyun atmel,dbg-halt; 48*4882a593Smuzhiyun atmel,idle-halt; 49*4882a593Smuzhiyun atmel,max-heartbeat-sec = <16>; 50*4882a593Smuzhiyun atmel,min-heartbeat-sec = <0>; 51*4882a593Smuzhiyun }; 52