1*4882a593SmuzhiyunAlphascale asm9260 Watchdog timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible : should be "alphascale,asm9260-wdt". 6*4882a593Smuzhiyun- reg : Specifies base physical address and size of the registers. 7*4882a593Smuzhiyun- clocks : the clocks feeding the watchdog timer. See clock-bindings.txt 8*4882a593Smuzhiyun- clock-names : should be set to 9*4882a593Smuzhiyun "mod" - source for tick counter. 10*4882a593Smuzhiyun "ahb" - ahb gate. 11*4882a593Smuzhiyun- resets : phandle pointing to the system reset controller with 12*4882a593Smuzhiyun line index for the watchdog. 13*4882a593Smuzhiyun- reset-names : should be set to "wdt_rst". 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun- timeout-sec : shall contain the default watchdog timeout in seconds, 17*4882a593Smuzhiyun if unset, the default timeout is 30 seconds. 18*4882a593Smuzhiyun- alphascale,mode : three modes are supported 19*4882a593Smuzhiyun "hw" - hw reset (default). 20*4882a593Smuzhiyun "sw" - sw reset. 21*4882a593Smuzhiyun "debug" - no action is taken. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunExample: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunwatchdog0: watchdog@80048000 { 26*4882a593Smuzhiyun compatible = "alphascale,asm9260-wdt"; 27*4882a593Smuzhiyun reg = <0x80048000 0x10>; 28*4882a593Smuzhiyun clocks = <&acc CLKID_SYS_WDT>, <&acc CLKID_AHB_WDT>; 29*4882a593Smuzhiyun clock-names = "mod", "ahb"; 30*4882a593Smuzhiyun interrupts = <55>; 31*4882a593Smuzhiyun resets = <&rst WDT_RESET>; 32*4882a593Smuzhiyun reset-names = "wdt_rst"; 33*4882a593Smuzhiyun timeout-sec = <30>; 34*4882a593Smuzhiyun alphascale,mode = "hw"; 35*4882a593Smuzhiyun}; 36