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/rk3399_rockchip-uboot/arch/arc/
H A DKconfig1 menu "ARC architecture"
2 depends on ARC
5 default "arc"
12 prompt "ARC Instruction Set"
18 The original ARC ISA of ARC600/700 cores
21 bool "ARC ISA v2"
23 ISA for the Next Generation ARC-HS cores
33 bool "ARC 750D"
40 bool "ARC 770D"
47 bool "ARC EM6"
[all …]
H A DMakefile5 libs-y += arch/arc/cpu/$(CPU)/
6 libs-y += arch/arc/lib/
H A Dconfig.mk14 ARC_CROSS_COMPILE := arc-linux-
/rk3399_rockchip-uboot/doc/
H A DREADME.ARC1 Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs
5 More information on ARC cores avaialble here:
9 technology to tailor each ARC processor instance to meet specific performance,
12 The DesignWare ARC processors are also extendable, allowing designers to add
15 Synopsys' ARC processors have been used by over 170 customers worldwide who
16 collectively ship more than 1 billion ARC-based chips annually.
18 All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
24 The ARC GNU toolchain with support for all ARC Processors can be downloaded
27 https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
H A Dgit-mailrc57 alias arch arc, arm, bfin, m68k, microblaze, mips, nds32, nios2, powerpc, sandbox, superh…
60 alias arc uboot, abrodkin
/rk3399_rockchip-uboot/doc/device-tree-bindings/timer/
H A Darc_timer.txt1 ARC Timer
5 - compatible : should be "snps,arc-timer".
12 compatible = "snps,arc-timer";
18 compatible = "snps,arc-timer";
/rk3399_rockchip-uboot/drivers/timer/
H A Darc_timer.c19 * ARC timer control registers are mapped to auxiliary address space.
20 * There are special ARC asm command to access that addresses.
64 * In ARC core there're special registers (Auxiliary or AUX) in its in arc_timer_probe()
101 { .compatible = "snps,arc-timer" },
H A DKconfig94 bool "ARC timer support"
95 depends on TIMER && ARC && CLK
97 Select this to enable built-in ARC timers.
98 ARC cores may have up to 2 built-in timers: timer0 and timer1,
/rk3399_rockchip-uboot/arch/
H A DKconfig11 config ARC config in Architecture select
12 bool "ARC architecture"
191 source "arch/arc/Kconfig"
/rk3399_rockchip-uboot/arch/arc/cpu/
H A Du-boot.lds10 OUTPUT_ARCH(arc)
18 arch/arc/lib/start.o (.text*)
/rk3399_rockchip-uboot/
H A D.travis.yml40 - echo -e "arc = /tmp/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
69 - if [[ "${TOOLCHAIN}" == arc ]]; then
70 …wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2016.…
123 - BUILDMAN="arc"
124 TOOLCHAIN="arc"
H A DKconfig459 depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
471 depends on ARC || ARCH_SUNXI
H A DMAINTAINERS56 ARC
59 T: git git://git.denx.de/u-boot-arc.git
60 F: arch/arc/
/rk3399_rockchip-uboot/arch/arc/lib/
H A Drelocate.c36 * Base functionality is taken from x86 version with added ARC-specifics
67 * 16-bit aligned on ARC so we may need to read in do_elf_reloc_fixups()
H A Dcpu.c32 /* This is a dummy function on arc */
H A Dlibgcc2.h10 #define UNITS_PER_WORD 4 /* for ARC */
11 #define BITS_PER_UNIT 8 /* for ARC */
H A Dbootm.c95 /* No need for those on ARC */ in do_bootm_linux()
/rk3399_rockchip-uboot/arch/arc/include/asm/
H A Du-boot.h11 #include <asm/u-boot-arc.h>
H A Dcache.h16 * that may exist in either L1 or L2 (AKA SLC) caches on ARC.
H A Darcregs.h13 * ARC architecture has additional address space - auxiliary registers.
/rk3399_rockchip-uboot/arch/arc/dts/
H A Dnsim.dts25 compatible = "snps,arc-uart";
H A Dskeleton.dtsi20 compatible = "snps,arc-timer";
/rk3399_rockchip-uboot/include/zfs/
H A Dzfs.h90 POOL_STATE_L2CACHE, /* Level 2 ARC device */
/rk3399_rockchip-uboot/drivers/serial/
H A Dserial_arc.c108 { .compatible = "snps,arc-uart" },
/rk3399_rockchip-uboot/board/Arcturus/ucp1020/
H A Dcmd_arc.c228 U_BOOT_CMD(arc, 6, 1, do_arc_cmd,

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