Merge git://git.denx.de/u-boot-arc

arc: Add support for HS Development Kit board

ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core AR

arc: Add support for HS Development Kit board

ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
* 4Gb of DDR (we use only lowest 1Gb out of it now)
* Lots of DesigWare peripherals
* Different connectivity modules:
- Synopsys HAPS HT3
- Arduino-compatible connector
- MikroBUS

This initial commit supports the following peripherals:
* UART (DW 8250)
* Ethernet (DW GMAC)
* SD/MMC (DW Mobile Storage)
* USB 1.1 & 2.0

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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arc: dts: separate single axs10x.dts file

We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't be

arc: dts: separate single axs10x.dts file

We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge git://git.denx.de/u-boot-arc

This replaces legacy arch/arc/lib/timer.c implementation and allows us
to describe ARC Timers in Device Tree. Among other things that way we
may properly inherit T

Merge git://git.denx.de/u-boot-arc

This replaces legacy arch/arc/lib/timer.c implementation and allows us
to describe ARC Timers in Device Tree. Among other things that way we
may properly inherit Timer's clock from CPU's clock s they really run
synchronously.

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arc: dts: separate single axs10x.dts file

We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't be

arc: dts: separate single axs10x.dts file

We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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arc: Rename AXS101 board to more generic AXS10x

As of now we have 2 flavors of ARC SDP boards:
1) AXS101 - with ARC770 in ASIC
2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the sam

arc: Rename AXS101 board to more generic AXS10x

As of now we have 2 flavors of ARC SDP boards:
1) AXS101 - with ARC770 in ASIC
2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.

While at it:
* Recreated defconfigs with savedefconfig
* In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

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arc: Rename ARCangel4 board to nSIM

ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation

arc: Rename ARCangel4 board to nSIM

ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.

Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

And while at it:
* Finally switch hex numerical values in nsim.h to defines from
include/linux/sizes.h
* Add defconfigs with ARC HS38 cores
* Recreated all defconfigs with savedefconfig

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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arc: cache - accommodate different L1 cache line lengths

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:

arc: cache - accommodate different L1 cache line lengths

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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arc: make AXS101 default platform

This fixes building in automated flow that doesn't use defconfigs.

See discussion on that topic here:
http://patchwork.ozlabs.org/patch/502558/

See similar patch

arc: make AXS101 default platform

This fixes building in automated flow that doesn't use defconfigs.

See discussion on that topic here:
http://patchwork.ozlabs.org/patch/502558/

See similar patches for other architectures/platforms here:
[1] http://git.denx.de/?p=u-boot.git;a=commit;h=ff560a13056a565a4e9ce1761bd04276a3cace88
[2] http://git.denx.de/?p=u-boot.git;a=commit;h=589907e2c187ec69b351c38ccda36730d25ab5d6

And while at it add missing shell prompt to axs103.

Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Move default y configs out of arch/board Kconfig

Some archs/boards specify their own default by pre-defining the config
which causes the Kconfig system to mix up the order of the configs in
the defc

Move default y configs out of arch/board Kconfig

Some archs/boards specify their own default by pre-defining the config
which causes the Kconfig system to mix up the order of the configs in
the defconfigs... This will cause merge pain if allowed to proliferate.

Remove the configs that behave this way from the archs.

A few configs still remain, but that is because they only exist as
defaults and do not have a proper Kconfig entry. Those appear to be:

SPIFLASH
DISPLAY_BOARDINFO

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates,
drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM]
Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arc

arc: remove dummy target

TARGET_DUMMY was introduced to resolve the same problem as commit
"arch: Make board selection choices optional"
http://git.denx.de/?p=u-boot.git;a=commit;h=a26cd04920dc069f

arc: remove dummy target

TARGET_DUMMY was introduced to resolve the same problem as commit
"arch: Make board selection choices optional"
http://git.denx.de/?p=u-boot.git;a=commit;h=a26cd04920dc069fd6e91abb785426cf6c29f45f

Latter implementation is much cleaner and appropriate.

And anyways TARGET_DUMMY is no longer required.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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arch: Make board selection choices optional

By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top

arch: Make board selection choices optional

By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>

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Merge branch 'u-boot/master'

Merge git://git.denx.de/u-boot-arc

arc: minor fixes in Kconfig

[1] Fix misspeling in ARC_CACHE_LINE_SHIFT dependency, now cache-line
lenth selection is correctly enabled if either I$ or D$ are enabled.

[2] Add dummy entry to targe

arc: minor fixes in Kconfig

[1] Fix misspeling in ARC_CACHE_LINE_SHIFT dependency, now cache-line
lenth selection is correctly enabled if either I$ or D$ are enabled.

[2] Add dummy entry to target list to make sure target type is always
mentioned in defconfig. Otherwise defconfig for the first target in the
list will not have target name and later on with addition of the new
target on top of the list in Kconfig will lead to corrupted
configuration expanded from defconfig.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'

Merge git://git.denx.de/u-boot-arc

Merge branch 'master' of git://git.denx.de/u-boot

arc: introduce U-Boot port for ARCv2 ISA

ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
incompatible with ISAv1 (AKA ARCompact).

Significant difference between ISAv2 and v1 is i

arc: introduce U-Boot port for ARCv2 ISA

ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
incompatible with ISAv1 (AKA ARCompact).

Significant difference between ISAv2 and v1 is implementation of
interrupt vector table.

In v1 it is implemented in the same way as on many other architectures -
as a special location where user may put whether code executed in place
(if machine word of space is enough) or jump to a full-scale interrupt
handler.

In v2 interrupt table is just an array of adresses of real interrupt
handlers. That requires a separate section for IVT that is not encoded
as code by assembler.

This change adds support for following cores:
* ARC EM6 (simple 32-bit microcontroller without MMU)
* ARC HS36 (advanced 32-bit microcontroller without MMU)
* ARC HS38 (advanced 32-bit microcontroller with MMU)

As a part of ARC HS38 new version of MMU (v4) was introduced.

Also this change adds AXS131 board which is the same DW ARC SDP base board but
with ARC HS38 CPU tile.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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Merge git://git.denx.de/u-boot-arc

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain beca

arc: build libgcc in U-Boot

This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

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