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/OK3568_Linux_fs/kernel/include/linux/mfd/
H A Dmotorola-cpcap.h31 #define CPCAP_REG_INT3 0x0008 /* Interrupt 3 */
35 #define CPCAP_REG_INTM3 0x0018 /* Interrupt Mask 3 */
39 #define CPCAP_REG_INTS3 0x0028 /* Interrupt Sense 3 */
43 #define CPCAP_REG_ASSIGN3 0x0038 /* Resource Assignment 3 */
63 #define CPCAP_REG_MT3 0x0234 /* Memory Transfer 3 */
86 #define CPCAP_REG_S3C 0x061c /* Switcher 3 Control */
129 #define CPCAP_REG_MIPIS3 0x0840 /* MIPI Slimbus 3. */
148 #define CPCAP_REG_ADCD3 0x0c14 /* A/D Converter Data 3 */
158 #define CPCAP_REG_USBC3 0x0e08 /* USB Control 3 */
165 #define CPCAP_REG_UFC3 0x0e24 /* ULPI Function Control 3 */
[all …]
/OK3568_Linux_fs/external/xserver/xkb/
H A Dxkmread.c279 xkmKeyTypeDesc wire; in ReadXkmKeyTypes() local
311 if ((int) fread(&wire, SIZEOF(xkmKeyTypeDesc), 1, file) < 1) { in ReadXkmKeyTypes()
316 if (((i == XkbOneLevelIndex) && (wire.numLevels != 1)) || in ReadXkmKeyTypes()
318 ((i) == XkbKeypadIndex)) && (wire.numLevels != 2))) { in ReadXkmKeyTypes()
322 tmp = wire.nMapEntries; in ReadXkmKeyTypes()
324 if ((wire.nMapEntries > 0) && (type->map == NULL)) { in ReadXkmKeyTypes()
325 _XkbLibError(_XkbErrBadValue, "ReadXkmKeyTypes", wire.nMapEntries); in ReadXkmKeyTypes()
328 for (n = 0, entry = type->map; n < wire.nMapEntries; n++, entry++) { in ReadXkmKeyTypes()
355 if (wire.preserve) { in ReadXkmKeyTypes()
365 for (n = 0, pre = type->preserve; n < wire.nMapEntries; n++, pre++) { in ReadXkmKeyTypes()
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H A Dxkb.c1023 xkbKeyTypeWireDesc *wire; in XkbWriteKeyTypes() local
1029 wire = (xkbKeyTypeWireDesc *) buf; in XkbWriteKeyTypes()
1030 wire->mask = type->mods.mask; in XkbWriteKeyTypes()
1031 wire->realMods = type->mods.real_mods; in XkbWriteKeyTypes()
1032 wire->virtualMods = type->mods.vmods; in XkbWriteKeyTypes()
1033 wire->numLevels = type->num_levels; in XkbWriteKeyTypes()
1034 wire->nMapEntries = type->map_count; in XkbWriteKeyTypes()
1035 wire->preserve = (type->preserve != NULL); in XkbWriteKeyTypes()
1037 swaps(&wire->virtualMods); in XkbWriteKeyTypes()
1040 buf = (char *) &wire[1]; in XkbWriteKeyTypes()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/
H A Dtpo,tpg110.yaml17 and other properties, and has a control interface over 3WIRE
39 protocol is not I2C but 3WIRE SPI.
60 spi-3wire: true
71 - spi-3wire
86 spi-3wire;
87 /* 320 ns min period ~= 3 MHz */
/OK3568_Linux_fs/kernel/sound/ppc/
H A Dsnd_ps3_reg.h39 * three wire serial
40 * n:0..3
84 #define PS3_AUDIO_INTR_0_CHAN3 PS3_AUDIO_INTR_0_CHAN(3)
130 /* 3 Wire Audio Serial Output Channel Mutes (0..3) */
131 #define PS3_AUDIO_AX_MCTRL_ASOMT(n) (1 << (3 - (n))) /* RWIVF */
135 #define PS3_AUDIO_AX_MCTRL_ASO0MT (1 << 3) /* RWIVF */
142 /* All 3 Wire Serial Outputs Mute */
180 3 Wire Audio Serial Outputs Buffer Read/Write
191 3 Wire Audio Serial Output Channel Buffer Read Numbers
193 Controller of 3 Wire Audio Serial Output Channels
[all …]
/OK3568_Linux_fs/kernel/sound/soc/fsl/
H A Dphycore-ac97.c53 IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */ in imx_phycore_init()
54 IMX_AUDMUX_V1_PCR_TFCSEL(3) | in imx_phycore_init()
56 IMX_AUDMUX_V1_PCR_RXDSEL(3)); in imx_phycore_init()
57 imx_audmux_v1_configure_port(3, in imx_phycore_init()
58 IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */ in imx_phycore_init()
63 imx_audmux_v2_configure_port(3, in imx_phycore_init()
64 IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */ in imx_phycore_init()
69 IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */ in imx_phycore_init()
70 IMX_AUDMUX_V2_PTCR_TCSEL(3) | in imx_phycore_init()
72 IMX_AUDMUX_V2_PDCR_RXDSEL(3)); in imx_phycore_init()
/OK3568_Linux_fs/kernel/drivers/iio/common/st_sensors/
H A Dst_sensors_spi.c34 * st_sensors_is_spi_3_wire() - check if SPI 3-wire mode has been selected
37 * Return: true if SPI 3-wire mode is selected, false otherwise.
44 if (device_property_read_bool(dev, "spi-3wire")) in st_sensors_is_spi_3_wire()
55 * st_sensors_configure_spi_3_wire() - configure SPI 3-wire if needed
/OK3568_Linux_fs/kernel/arch/sh/include/mach-common/mach/
H A Dhighlander.h17 #define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
66 #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
86 #define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */
114 #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
115 #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
116 #define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */
[all …]
/OK3568_Linux_fs/kernel/include/linux/platform_data/
H A Dusb-omap1.h36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
40 u8 pins[3];
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dicpdas-lp8841-spi-rtc.txt28 - spi-3wire: The master itself has only 3 wire. It cannor work in
50 spi-3wire;
/OK3568_Linux_fs/kernel/drivers/w1/masters/
H A Dds2482.c7 * It is a I2C to 1-wire bridge.
8 * There are two variations: -100 and -800, which have 1 or 8 1-wire ports.
28 * a 1-Wire line from low to high. When APU = 0, active pullup is disabled
30 * only a single slave on the 1-Wire line.
40 MODULE_PARM_DESC(extra_config, "Extra Configuration settings 1=APU,2=PPM,3=SPU,8=1WS");
43 * The DS2482 registers - there are 3 registers that are addressed by a read
70 #define DS2482_REG_CFG_1WS 0x08 /* 1-wire speed */
115 /* 1-wire interface(s) */
202 * 1-Wire interface code
208 * Waits until the 1-wire interface is idle (not busy)
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/OK3568_Linux_fs/kernel/drivers/w1/
H A DKconfig3 tristate "Dallas's 1-wire support"
6 Dallas' 1-wire bus is useful to connect slow 1-pin devices
12 will be called wire.
27 3. Replies to userspace commands.
/OK3568_Linux_fs/kernel/include/linux/sunrpc/
H A Dauth_gss.h29 RPC_GSS_PROC_DESTROY = 3
35 RPC_GSS_SVC_PRIVACY = 3
38 /* on-the-wire gss cred: */
47 /* on-the-wire gss verifier: */
66 * the wire when communicating with a server. */
/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Dlm85.rst92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
93 specification. Using an analog to digital converter it measures three (3)
96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM
132 speed of a two wire fan, but the input conditioning circuitry is different
133 for 3-wire and 2-wire mode. For this reason, the 2-wire fan modes are not
155 all 3 PWM outputs to a 22.5 kHz frequency. Conversely, setting any PWM
156 frequency below 11.3 kHz will switch all 3 PWM outputs to a frequency
185 The LM85 can be jumpered for 3 different SMBus addresses. There are
213 sensors and therefore three zones (# 1, 2 and 3). Each zone has the following
262 3 Controlled by Zone 3
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halrf/
H A Dhalrf_txgapcal.c71 odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); in odm_tx_gain_gap_psd_8197f()
136 u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; in odm_tx_gain_gap_calibration_8197f()
148 odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
150 odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
156 rf0_idx_current = 3 * (rf0_idx - 1) + 1; in odm_tx_gain_gap_calibration_8197f()
162 rf0_idx_next = 3 * rf0_idx + 1; in odm_tx_gain_gap_calibration_8197f()
238 odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
240 odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
246 …/*odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire in odm_tx_gain_gap_calibration_8197f()
/OK3568_Linux_fs/kernel/drivers/bluetooth/
H A DKconfig171 bool "Three-wire UART (H5) protocol support"
175 The HCI Three-wire UART Transport Layer makes it possible to
177 Three-wire UART Transport Layer assumes that the UART
181 Say Y here to compile support for Three-wire UART protocol.
218 The Realtek protocol support enables Bluetooth HCI over 3-Wire
316 3Com BT3C interface:
317 3Com Bluetooth Card (3CRWB6096)
/OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/
H A Dsama5d4.h24 #define ATMEL_ID_PIT 3 /* Periodic Interval Timer */
49 #define ATMEL_ID_USART3 30 /* USART 3 */
51 #define ATMEL_ID_TWI0 32 /* Two-Wire Interface 0 */
52 #define ATMEL_ID_TWI1 33 /* Two-Wire Interface 1 */
53 #define ATMEL_ID_TWI2 34 /* Two-Wire Interface 2 */
60 #define ATMEL_ID_TC1 41 /* Timer Counter 1 (ch. 3, 4, 5) */
79 #define ATMEL_ID_TWI3 62 /* Two-Wire Interface 3 */
184 #define H64MX_SLAVE_DDRC_PORT0 3 /* DDR2 Port0-AESOTF */
199 #define H32MX_SLAVE_EBI 3 /* External Bus Interface */
200 #define H32MX_SLAVE_NFC_CMD 3 /* NFC command Register */
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt56 - spi-3wire - (optional) Empty property indicating device requires
57 3-wire mode.
69 Dual/Quad mode is not allowed when 3-wire mode is used.
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/
H A Dwm9712.c76 static int delay = 3;
81 * Set five_wire = 1 to use a 5 wire touchscreen.
83 * NOTE: Five wire mode does not allow for readback of pressure.
87 MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
100 * 3 = Edge triggered, edge on pin starts conversion after delay param
141 * The delay is 3 AC97 link frames + the touchpanel settling delay
145 udelay(3 * AC97_LINK_FRAME + delay_table[d]); in poll_delay()
164 /* WM9712 five wire */ in wm9712_phy_init()
167 dev_dbg(wm->dev, "setting 5-wire touchscreen mode.\n"); in wm9712_phy_init()
171 "supported in 5-wire mode\n"); in wm9712_phy_init()
[all …]
H A Dwm9713.c81 * Set five_wire = 1 to use a 5 wire touchscreen.
83 * NOTE: Five wire mode does not allow for readback of pressure.
87 MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
100 * 3 = Edge triggered, edge on pin starts conversion after delay param
141 * The delay is 3 AC97 link frames + the touchpanel settling delay
145 udelay(3 * AC97_LINK_FRAME + delay_table[d]); in poll_delay()
167 /* Five wire panel? */ in wm9713_phy_init()
170 dev_info(wm->dev, "setting 5-wire touchscreen mode."); in wm9713_phy_init()
175 "wire mode, disabling\n"); in wm9713_phy_init()
278 /* wait 3 AC97 time slots + delay for conversion */ in wm9713_poll_sample()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml73 # DMARD09: 3-axis Accelerometer
75 # DMARD10: 3-axis Accelerometer
77 # MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
79 # MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
87 # G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
95 # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
123 # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
129 # 3-Channel Remote Temperature Sensor
131 # mCube 3-axis 8-bit digital accelerometer
309 # MiraMEMS DA280 3-axis 14-bit digital accelerometer
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/halrf/
H A Dhalrf_txgapcal.c91 odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); in odm_tx_gain_gap_psd_8197f()
149 u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; in odm_tx_gain_gap_calibration_8197f()
160 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
162 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
167 rf0_idx_current = 3 * (rf0_idx - 1) + 1; in odm_tx_gain_gap_calibration_8197f()
173 rf0_idx_next = 3 * rf0_idx + 1; in odm_tx_gain_gap_calibration_8197f()
252 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
254 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
260 /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/halrf/
H A Dhalrf_txgapcal.c91 odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); in odm_tx_gain_gap_psd_8197f()
149 u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; in odm_tx_gain_gap_calibration_8197f()
160 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
162 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
167 rf0_idx_current = 3 * (rf0_idx - 1) + 1; in odm_tx_gain_gap_calibration_8197f()
173 rf0_idx_next = 3 * rf0_idx + 1; in odm_tx_gain_gap_calibration_8197f()
252 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
254 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
260 /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/phydm/halrf/
H A Dhalrf_txgapcal.c91 odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); in odm_tx_gain_gap_psd_8197f()
149 u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; in odm_tx_gain_gap_calibration_8197f()
160 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
162 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
167 rf0_idx_current = 3 * (rf0_idx - 1) + 1; in odm_tx_gain_gap_calibration_8197f()
173 rf0_idx_next = 3 * rf0_idx + 1; in odm_tx_gain_gap_calibration_8197f()
252 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
254 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
260 /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/halrf/
H A Dhalrf_txgapcal.c92 odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); in odm_tx_gain_gap_psd_8197f()
150 u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; in odm_tx_gain_gap_calibration_8197f()
161 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
163 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
168 rf0_idx_current = 3 * (rf0_idx - 1) + 1; in odm_tx_gain_gap_calibration_8197f()
174 rf0_idx_next = 3 * rf0_idx + 1; in odm_tx_gain_gap_calibration_8197f()
253 odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
255 odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()
261 /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ in odm_tx_gain_gap_calibration_8197f()

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