| /rk3399_ARM-atf/plat/mediatek/drivers/rtc/ |
| H A D | rtc_mt6359p.c | 13 uint16_t mask, uint16_t shift) in RTC_Config_Interface()
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| /rk3399_ARM-atf/plat/mediatek/drivers/pmic_wrap/ |
| H A D | pmic_wrap_init_v3.c | 178 int32_t pwrap_read_field(uint32_t reg, uint32_t *val, uint32_t mask, uint32_t shift) in pwrap_read_field()
192 int32_t pwrap_write_field(uint32_t reg, uint32_t val, uint32_t mask, uint32_t shift) in pwrap_write_field()
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cpuamu.c | 15 unsigned int mask; member
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| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stpmic2.c | 199 uint8_t register_id, uint8_t value, uint8_t mask) in stpmic2_register_update()
265 uint8_t mask; in stpmic2_regulator_get_voltage() local
309 uint8_t mask; in stpmic2_regulator_set_voltage() local
329 uint8_t value, uint8_t mask) in stpmic2_update_en_crs()
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| H A D | stpmic1.c | 686 uint8_t mask; in stpmic1_regulator_voltage_set() local
819 uint8_t mask; in stpmic1_regulator_voltage_get() local
889 int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask) in stpmic1_register_update()
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| /rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt8189/ |
| H A D | pmic_lowpower_init.c | 42 uint8_t mask, uint8_t val) in pmic_spmi_update_bits()
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/ |
| H A D | pm_api_ioctl.c | 208 uint32_t mask, val; in pm_ioctl_sd_dll_reset() local
265 uint32_t val, mask; in pm_ioctl_sd_set_tapdelay() local
541 uint32_t mask; in pm_ioctl_afi() local
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| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | arch_features.h | 15 #define ISOLATE_FIELD(reg, feat, mask) \ argument
31 #define CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \ argument
39 #define CREATE_FEATURE_FUNCS(name, idreg, idfield, mask, idval, guard) \ argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/dp/ |
| H A D | mt_dp.c | 16 uint32_t value, uint32_t mask) in dp_write_sec_reg()
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 275 uint32_t val, mask; in tegra_reset_all_dma_masters() local
563 uint32_t mask = CPU_CORE_RESET_MASK << cpu; in tegra_soc_pwr_domain_on() local
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| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp_context.c | 124 uint64_t mask; in modify_el1_ctx_regs() local
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/ |
| H A D | mt_spm_cond.c | 77 #define IDLE_CG(mask, addr, bitflip, clkmux) \ argument
154 #define IS_MT_SPM_PWR_OFF(mask) \ argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/ |
| H A D | mt_spm_internal.c | 515 static int32_t __spm_check_ack(uint32_t reg, uint32_t mask, uint32_t check_en) in __spm_check_ack()
580 uint32_t val, mask, isr; in __spm_set_wakeup_event() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/spmi/ |
| H A D | spmi_common.c | 97 uint8_t *buf, uint16_t mask, uint16_t shift) in spmi_ext_register_readl_field()
111 uint8_t data, uint16_t mask, uint16_t shift) in spmi_ext_register_writel_field()
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| /rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/ |
| H A D | mt_spm_cond.c | 74 #define IDLE_CG(mask, addr, bitflip, clkmux) \ argument
147 #define IS_MT_SPM_PWR_OFF(mask) \ argument
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| /rk3399_ARM-atf/services/std_svc/trng/ |
| H A D | trng_entropy_pool.c | 217 const uint64_t mask = UINT64_MAX >> in trng_pack_entropy() local
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| /rk3399_ARM-atf/plat/rockchip/rk3368/drivers/soc/ |
| H A D | soc.c | 111 uint32_t mask, uint32_t shift) in regs_updata_bits()
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| /rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/ |
| H A D | ncore_ccu.c | 401 uint32_t mask; in init_ncore_ccu() local
657 static int poll_idle_status(uint32_t addr, uint32_t mask, uint32_t match, uint32_t delay_ms) in poll_idle_status()
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mq/ |
| H A D | gpc.c | 144 uint32_t mask, idx; in imx_gpc_set_wake() local
156 static void imx_gpc_mask_irq0(uint32_t core_id, uint32_t mask) in imx_gpc_mask_irq0()
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| /rk3399_ARM-atf/drivers/arm/dcc/ |
| H A D | dcc_console.c | 77 static int32_t dcc_status_timeout(uint32_t mask) in dcc_status_timeout()
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| /rk3399_ARM-atf/lib/zlib/ |
| H A D | inftrees.c | 47 unsigned mask; /* mask for low root bits */ in inflate_table() local
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| /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_cond.c | 86 #define IDLE_CG(mask, addr, bitflip, clkmux) \ argument
170 #define IS_MT_SPM_PWR_OFF(mask) \ argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/apusys/mt8196/ |
| H A D | apusys_rv_pwr_ctrl.c | 19 static int wait_for_state_ready(uint32_t reg, uint32_t mask, uint32_t expect, in wait_for_state_ready()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_bl1_setup.c | 111 unsigned int data, mask; in hikey960_ufs_reset() local
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| /rk3399_ARM-atf/plat/rockchip/rk3288/drivers/soc/ |
| H A D | soc.c | 91 uint32_t mask, uint32_t shift) in regs_update_bits()
|