Searched refs:SEAL_TZPC_NONPM_MIU (Results 1 – 4 of 4) sorted by relevance
121 #define SEAL_TZPC_NONPM_MIU (0x22F00) macro237 #define REG_TZPC_MIU0_CTL (SEAL_TZPC_NONPM_MIU+0x44)238 #define REG_TZPC_MIU1_CTL (SEAL_TZPC_NONPM_MIU+0x64)240 #define REG_TZPC_MIU0_ID0 (SEAL_TZPC_NONPM_MIU+0x58)241 #define REG_TZPC_MIU1_ID0 (SEAL_TZPC_NONPM_MIU+0x78)243 #define REG_TZPC_MIU0_BASE_ADDR_LOW (SEAL_TZPC_NONPM_MIU+0x4E)244 #define REG_TZPC_MIU0_BASE_ADDR_HIGH (SEAL_TZPC_NONPM_MIU+0x50)245 #define REG_TZPC_MIU1_BASE_ADDR_LOW (SEAL_TZPC_NONPM_MIU+0x6E)246 #define REG_TZPC_MIU1_BASE_ADDR_HIGH (SEAL_TZPC_NONPM_MIU+0x70)
121 #define SEAL_TZPC_NONPM_MIU (0x22700) macro186 #define REG_TZPC_MIU0_CTL (SEAL_TZPC_NONPM_MIU+0x24)189 #define REG_TZPC_MIU0_ID0 (SEAL_TZPC_NONPM_MIU+0x38)192 #define REG_TZPC_MIU0_BASE_ADDR_LOW (SEAL_TZPC_NONPM_MIU+0x2E)193 #define REG_TZPC_MIU0_BASE_ADDR_HIGH (SEAL_TZPC_NONPM_MIU+0x30)
120 #define SEAL_TZPC_NONPM_MIU (0x22F00) macro198 #define REG_TZPC_MIU0_CTL (SEAL_TZPC_NONPM_MIU+0x44)200 #define REG_TZPC_MIU0_ID0 (SEAL_TZPC_NONPM_MIU+0x58)202 #define REG_TZPC_MIU0_BASE_ADDR_LOW (SEAL_TZPC_NONPM_MIU+0x4E)203 #define REG_TZPC_MIU0_BASE_ADDR_HIGH (SEAL_TZPC_NONPM_MIU+0x50)