| /utopia/UTPA2-700.0.x/modules/seal/hal/mainz/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
125 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
126 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
127 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
129 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
130 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
131 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
133 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
134 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
135 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/macan/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
123 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
124 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
125 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
127 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
128 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
129 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
131 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
132 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
133 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/messi/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
123 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
124 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
125 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
127 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
128 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
129 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
131 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
132 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
133 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/curry/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
125 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
126 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08)
127 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0E)
129 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10)
130 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18)
131 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1E)
133 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20)
134 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28)
135 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2E)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/maldives/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
123 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
124 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08)
125 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0E)
127 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10)
128 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18)
129 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1E)
131 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20)
132 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28)
133 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2E)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/M7821/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
127 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
128 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
129 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
131 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
132 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
133 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
135 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
136 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
137 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/maserati/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
127 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
128 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
129 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
131 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
132 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
133 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
135 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
136 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
137 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/kano/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
126 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
127 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08)
128 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0E)
130 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10)
131 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18)
132 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1E)
134 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20)
135 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28)
136 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2E)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/manhattan/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
124 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
125 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x08UL)
126 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x0EUL)
128 #define REG_SECURE0_RANGE1_START_ADDR (SEAL_SECURE0_RANGE0+0x10UL)
129 #define REG_SECURE0_RANGE1_END_ADDR (SEAL_SECURE0_RANGE0+0x18UL)
130 #define REG_SECURE0_RANGE1_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x1EUL)
132 #define REG_SECURE0_RANGE2_START_ADDR (SEAL_SECURE0_RANGE0+0x20UL)
133 #define REG_SECURE0_RANGE2_END_ADDR (SEAL_SECURE0_RANGE0+0x28UL)
134 #define REG_SECURE0_RANGE2_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x2EUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/mooney/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
126 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
127 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04UL)
128 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06UL)
130 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xECUL)
142 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0UL)
144 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2UL)
146 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEEUL)
159 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFEUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/maxim/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
126 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
127 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04UL)
128 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06UL)
130 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xECUL)
142 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0UL)
144 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2UL)
146 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEEUL)
159 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFEUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/mustang/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
123 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
124 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04)
125 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06)
127 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xEC)
139 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0)
141 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2)
143 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEE)
156 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFE)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/M7621/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x00023700UL) macro
125 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00UL)
126 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04UL)
127 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06UL)
129 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xECUL)
141 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0UL)
143 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2UL)
145 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEEUL)
158 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFEUL)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/k6lite/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
127 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
128 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04)
129 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06)
131 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xEC)
143 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0)
145 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2)
147 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEE)
159 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFE)
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| /utopia/UTPA2-700.0.x/modules/seal/hal/k6/seal/ |
| H A D | regSEAL.h | 117 #define SEAL_SECURE0_RANGE0 (0x23700) macro
127 #define REG_SECURE0_RANGE0_START_ADDR (SEAL_SECURE0_RANGE0+0x00)
128 #define REG_SECURE0_RANGE0_END_ADDR (SEAL_SECURE0_RANGE0+0x04)
129 #define REG_SECURE0_RANGE0_ATTRIBUTE (SEAL_SECURE0_RANGE0+0x06)
131 #define REG_SECURE0_DETECT_ENABLE (SEAL_SECURE0_RANGE0+0xEC)
143 #define REG_SECURE0_HITTED_STATUS (SEAL_SECURE0_RANGE0+0xE0)
145 #define REG_SECURE0_HITTED_ADDR (SEAL_SECURE0_RANGE0+0xE2)
147 #define REG_SECURE0_HITTED_RANGE_ID (SEAL_SECURE0_RANGE0+0xEE)
159 #define REG_SECURE0_LOCK (SEAL_SECURE0_RANGE0+0xFE)
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