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Searched refs:SC_CLK_ODCLK (Results 1 – 25 of 28) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c762 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
766 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
770 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c825 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
829 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
833 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c843 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
847 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
851 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c904 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
908 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
912 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c904 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
908 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
912 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c904 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
908 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
912 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c904 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
908 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
912 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c892 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
896 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
900 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c902 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
906 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_CAPTURE, SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
910 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_CAPTURE , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_mux.h220 SC_CLK_ODCLK = 4, ///< Scaler VOP output enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_mux.h223 SC_CLK_ODCLK = 4, ///< Scaler VOP output enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_mux.h248 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_mux.h248 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_mux.h248 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_mux.h248 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_mux.h242 SC_CLK_ODCLK = 7, ///< ODLCK enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_mux.c701 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC1_MAINWIN_IPMUX_OP1 , SC_CLK_ODCLK); in Hal_SC_mux_dispatch()

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