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Searched refs:RIU_WRITE_2BYTE (Results 1 – 25 of 78) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dxc_hwreg_utility2.h131 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _XC_RIU_BASE + (addr), val) } macro
357 RIU_WRITE_2BYTE(u32Reg<<1, (RIU_READ_2BYTE(u32Reg<<1) & ~(u16Mask)) | (u16Val & u16Mask)) \
369 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
378 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
382 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
392 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
397 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
398 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
418 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF)) << 1 , u16Val ) ; \
422 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (_XC_Device_Offset[u32Id] << 8) ) << 1 ,…
[all …]
/utopia/UTPA2-700.0.x/modules/xc/drv/ace/include/
H A Dace_hwreg_utility2.h129 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _ACE_RIU_BASE + (addr), val) } macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
166 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
170 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
180 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
185 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
186 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
197 RIU_WRITE_2BYTE(u32Reg<<1, (RIU_READ_2BYTE(u32Reg<<1) & ~(u16Mask)) | (u16Val & u16Mask)) \
205 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) …
211 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) …
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/drv/cec/include/
H A Dcec_hwreg_utility2.h119 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( CEC_RIU_BASE + (addr), val) } macro
153 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
162 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
166 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
176 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
181 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
182 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
198 ( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) << 1 , u16Val ) ; } )
204 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) <<1, (MS_U16)((u32Val) & 0x0000FFFF)…
205 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + 2 ) << 1, (MS_U16)(((u32Val) >> 16) & 0x…
[all …]
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_hwreg_utility2.h120 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _VE_RIU_BASE + (addr), val) } macro
166 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
179 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
183 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
197 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
202 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
203 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
222 RIU_WRITE_2BYTE(u32Reg<<1, (RIU_READ_2BYTE(u32Reg<<1) & ~(u16Mask)) | (u16Val & u16Mask)) \
240 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ((u32Reg) >> 8) & 0x00FF ) ; \
241 RIU_WRITE_2BYTE( (REG_SCALER_BASE +((u32Reg) & 0xFF) ) << 1 , u16Val ) ; } )
[all …]
/utopia/UTPA2-700.0.x/modules/wble/drv/wble/include/
H A Dwble_hwreg_utility2.h119 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( WBLE_RIU_BASE + (addr), val) } macro
153 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
162 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
166 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
176 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
181 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
182 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
197 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ((u32Reg) >> 8) & 0x00FF ) ; \
198 RIU_WRITE_2BYTE( (REG_SCALER_BASE +((u32Reg) & 0xFF) ) << 1 , u16Val ) ; } )
201 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ( (u32Reg) >> 8) & 0x00FF ) ; \
[all …]
/utopia/UTPA2-700.0.x/modules/ddc2bi/drv/ddc2bi/include/
H A Dddc2bi_hwreg_utility2.h119 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( DDC2BI_RIU_BASE + (addr), val) } macro
153 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
162 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
166 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
176 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
181 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
182 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
197 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ((u32Reg) >> 8) & 0x00FF ) ; \
198 RIU_WRITE_2BYTE( (REG_SCALER_BASE +((u32Reg) & 0xFF) ) << 1 , u16Val ) ; } )
201 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ( (u32Reg) >> 8) & 0x00FF ) ; \
[all …]
/utopia/UTPA2-700.0.x/modules/pq/drv/pq/include/
H A Dhwreg_utility2.h149 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( PQ_RIU_BASE + (addr), val) }
183 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
192 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
196 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
206 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
211 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
212 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
227 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ((u32Reg) >> 8) & 0x00FF ) ; \
228 RIU_WRITE_2BYTE( (REG_SCALER_BASE +((u32Reg) & 0xFF) ) << 1 , u16Val ) ; } )
231 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ( (u32Reg) >> 8) & 0x00FF ) ; \
[all …]
/utopia/UTPA2-700.0.x/modules/dlc/drv/dlc/include/
H A Ddlc_hwreg_utility2.h123 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _DLC_RIU_BASE + (addr), val) } macro
157 … RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
166 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \
170 …RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
180 … RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \
185 …RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); …
186 …RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); …
202 ( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) << 1 , u16Val ) ; } )
208 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) <<1, (MS_U16)((u32Val) & 0x0000FFFF)…
209 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + 2 ) << 1, (MS_U16)(((u32Val) >> 16) & 0x…
[all …]
/utopia/UTPA2-700.0.x/modules/xc/drv/pnl/include/
H A Dpnl_hwreg_utility2.h2249 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( g_ptr_PMRiuBaseAddr + (addr), val) } macro
2274 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF)) << 1 , u16Val ) ; \
2278 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32PNL_XCDeviceBankOffset[u8Id] << 8) )…
2289 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) <<1, (MS_U16)((u32Val) & 0x0000FFFF) ) ;…
2290 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + 2 ) << 1, (MS_U16)(((u32Val) >> 16) & 0x…
2294 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32PNL_XCDeviceBankOffset[u8Id] << 8) )…
2295 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32PNL_XCDeviceBankOffset[u8Id] << 8) +…
2311 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) ) << 1, (RIU_READ_2BYTE( (REG_SCALER_BASE …
2315 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32PNL_XCDeviceBankOffset[u8Id] << 8) )…
2322 RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ((u32Reg) >> 8) & 0x00FF ) ; \
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/drv/mhl/
H A Dmhl_hwreg_utility2.h116 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( MHL_XC_RIU_BASE + (addr), val) } macro
126 #define W2BYTE( u32Reg, u16Val) RIU_WRITE_2BYTE( (u32Reg) << 1 , u16Val )
132 ( { RIU_WRITE_2BYTE( (u32Reg) << 1, ((u32Val) & 0x0000FFFF) ); \
133 RIU_WRITE_2BYTE( ( (u32Reg) + 2) << 1 , (((u32Val) >> 16) & 0x0000FFFF)) ; } )
142 …( { RIU_WRITE_2BYTE( (u32Reg)<< 1 , (RIU_READ_2BYTE((u32Reg) << 1) & ~(u16Mask)) | ((u16Val) & (u1…
145 ( { RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/mustang/sys/
H A DhalDMD_VD_MBX.c111 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
141 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/maldives/sys/
H A DhalDMD_VD_MBX.c111 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
141 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/M7821/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
157 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/manhattan/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
156 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/maserati/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
157 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/mooney/sys/
H A DhalDMD_VD_MBX.c111 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
141 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/M7621/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
157 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/macan/sys/
H A DhalDMD_VD_MBX.c126 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
156 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/maxim/sys/
H A DhalDMD_VD_MBX.c127 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), … macro
157 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/k7u/sys/
H A DhalDMD_VD_MBX.c128 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/k6/sys/
H A DhalDMD_VD_MBX.c128 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/mainz/sys/
H A DhalDMD_VD_MBX.c112 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
142 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/k6lite/sys/
H A DhalDMD_VD_MBX.c128 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/curry/sys/
H A DhalDMD_VD_MBX.c128 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
/utopia/UTPA2-700.0.x/modules/sys/hal/kano/sys/
H A DhalDMD_VD_MBX.c128 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), va… macro
158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \

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