xref: /utopia/UTPA2-700.0.x/modules/hdmi/drv/mhl/mhl_hwreg_utility2.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi #ifndef _HWREG_UTILITY_H_
95*53ee8cc1Swenshuai.xi #define _HWREG_UTILITY_H_
96*53ee8cc1Swenshuai.xi 
97*53ee8cc1Swenshuai.xi 
98*53ee8cc1Swenshuai.xi #include "MsCommon.h"
99*53ee8cc1Swenshuai.xi 
100*53ee8cc1Swenshuai.xi //!! Do not include this header in driver or api level
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
103*53ee8cc1Swenshuai.xi //  Driver Compiler Options
104*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
105*53ee8cc1Swenshuai.xi 
106*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
107*53ee8cc1Swenshuai.xi //  Macro and Define
108*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
109*53ee8cc1Swenshuai.xi extern MS_VIRT MHL_XC_RIU_BASE;     // This should be inited before XC library starting.
110*53ee8cc1Swenshuai.xi extern MS_VIRT MHL_PM_RIU_BASE;     // This should be inited before XC library starting.
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi // Address bus of RIU is 16 bits.
113*53ee8cc1Swenshuai.xi #define RIU_READ_BYTE(addr)         ( READ_BYTE( MHL_XC_RIU_BASE + (addr) ) )
114*53ee8cc1Swenshuai.xi #define RIU_READ_2BYTE(addr)        ( READ_WORD( MHL_XC_RIU_BASE + (addr) ) )
115*53ee8cc1Swenshuai.xi #define RIU_WRITE_BYTE(addr, val)   { WRITE_BYTE( MHL_XC_RIU_BASE + (addr), val) }
116*53ee8cc1Swenshuai.xi #define RIU_WRITE_2BYTE(addr, val)  { WRITE_WORD( MHL_XC_RIU_BASE + (addr), val) }
117*53ee8cc1Swenshuai.xi 
118*53ee8cc1Swenshuai.xi // Address bus of RIU is 16 bits for PM //alex_tung
119*53ee8cc1Swenshuai.xi #define PM_RIU_READ_BYTEM(addr)        ( READ_BYTE( MHL_PM_RIU_BASE + (addr) ) )
120*53ee8cc1Swenshuai.xi #define PM_RIU_READ_2BYTE(addr)        ( READ_WORD( MHL_PM_RIU_BASE + (addr) ) )
121*53ee8cc1Swenshuai.xi #define PM_RIU_WRITE_BYTE(addr, val)   { WRITE_BYTE( MHL_PM_RIU_BASE + (addr), val) }
122*53ee8cc1Swenshuai.xi #define PM_RIU_WRITE_2BYTE(addr, val)  { WRITE_WORD( MHL_PM_RIU_BASE + (addr), val) }
123*53ee8cc1Swenshuai.xi 
124*53ee8cc1Swenshuai.xi //=============================================================
125*53ee8cc1Swenshuai.xi //General ( Make sure u32Reg is not ODD
126*53ee8cc1Swenshuai.xi #define W2BYTE( u32Reg, u16Val) RIU_WRITE_2BYTE( (u32Reg) << 1 , u16Val )
127*53ee8cc1Swenshuai.xi 
128*53ee8cc1Swenshuai.xi 
129*53ee8cc1Swenshuai.xi #define R2BYTE( u32Reg ) RIU_READ_2BYTE( (u32Reg) << 1)
130*53ee8cc1Swenshuai.xi 
131*53ee8cc1Swenshuai.xi #define W4BYTE( u32Reg, u32Val)\
132*53ee8cc1Swenshuai.xi             ( { RIU_WRITE_2BYTE( (u32Reg) << 1, ((u32Val) & 0x0000FFFF) ); \
133*53ee8cc1Swenshuai.xi                 RIU_WRITE_2BYTE( ( (u32Reg) + 2) << 1 , (((u32Val) >> 16) & 0x0000FFFF)) ; } )
134*53ee8cc1Swenshuai.xi 
135*53ee8cc1Swenshuai.xi #define R4BYTE( u32Reg )\
136*53ee8cc1Swenshuai.xi             ( { ((RIU_READ_2BYTE( (u32Reg) << 1)) | ((MS_U32)(RIU_READ_2BYTE( ( (u32Reg) + 2 ) << 1) ) << 16)) ; } )
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi #define R2BYTEMSK( u32Reg, u16mask)\
139*53ee8cc1Swenshuai.xi             ( { RIU_READ_2BYTE( (u32Reg)<< 1) & (u16mask) ; } )
140*53ee8cc1Swenshuai.xi 
141*53ee8cc1Swenshuai.xi #define W2BYTEMSK( u32Reg, u16Val, u16Mask)\
142*53ee8cc1Swenshuai.xi             ( { RIU_WRITE_2BYTE( (u32Reg)<< 1 , (RIU_READ_2BYTE((u32Reg) << 1) & ~(u16Mask)) | ((u16Val) & (u16Mask)) ) ; } )
143*53ee8cc1Swenshuai.xi 
144*53ee8cc1Swenshuai.xi #define W3BYTE( u32Reg, u32Val)\
145*53ee8cc1Swenshuai.xi             ( { RIU_WRITE_2BYTE( (u32Reg) << 1,  u32Val); \
146*53ee8cc1Swenshuai.xi                 RIU_WRITE_BYTE( (u32Reg + 2) << 1 ,  ((u32Val) >> 16)); } )
147*53ee8cc1Swenshuai.xi 
148*53ee8cc1Swenshuai.xi #endif
149*53ee8cc1Swenshuai.xi 
150