xref: /utopia/UTPA2-700.0.x/modules/sys/hal/k7u/sys/halDMD_VD_MBX.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi //<MStar Software>
2*53ee8cc1Swenshuai.xi //******************************************************************************
3*53ee8cc1Swenshuai.xi // MStar Software
4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are
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77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
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80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81*53ee8cc1Swenshuai.xi // All rights reserved.
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92*53ee8cc1Swenshuai.xi //
93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi 
96*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
97*53ee8cc1Swenshuai.xi //  Include Files
98*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
99*53ee8cc1Swenshuai.xi #include "MsCommon.h"
100*53ee8cc1Swenshuai.xi #include "regCHIP.h"
101*53ee8cc1Swenshuai.xi #include "halCHIP.h"
102*53ee8cc1Swenshuai.xi #include "halDMD_VD_MBX.h"
103*53ee8cc1Swenshuai.xi #include "drvMMIO.h"
104*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
105*53ee8cc1Swenshuai.xi //  Driver Compiler Options
106*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
107*53ee8cc1Swenshuai.xi 
108*53ee8cc1Swenshuai.xi 
109*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
110*53ee8cc1Swenshuai.xi //  Local Defines
111*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
112*53ee8cc1Swenshuai.xi #if defined(MCU_AEON)
113*53ee8cc1Swenshuai.xi     #define BASEADDR_RIU            0xA0000000UL
114*53ee8cc1Swenshuai.xi #elif defined(__arm__) || defined(__aarch64__)
115*53ee8cc1Swenshuai.xi     #define BASEADDR_RIU            0x1F000000UL
116*53ee8cc1Swenshuai.xi #else
117*53ee8cc1Swenshuai.xi     #define BASEADDR_RIU            0xBF000000UL
118*53ee8cc1Swenshuai.xi #endif
119*53ee8cc1Swenshuai.xi 
120*53ee8cc1Swenshuai.xi #define RIU_MACRO_START             do {
121*53ee8cc1Swenshuai.xi #define RIU_MACRO_END               } while (0)
122*53ee8cc1Swenshuai.xi 
123*53ee8cc1Swenshuai.xi // Address bus of RIU is 16 bits.
124*53ee8cc1Swenshuai.xi 
125*53ee8cc1Swenshuai.xi #define RIU_READ_BYTE(addr)         (READ_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr)))
126*53ee8cc1Swenshuai.xi #define RIU_READ_2BYTE(addr)        (READ_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr)))
127*53ee8cc1Swenshuai.xi #define RIU_WRITE_BYTE(addr, val)   {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), val)}
128*53ee8cc1Swenshuai.xi #define RIU_WRITE_2BYTE(addr, val)  {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), val)}
129*53ee8cc1Swenshuai.xi 
130*53ee8cc1Swenshuai.xi // Standard Form
131*53ee8cc1Swenshuai.xi 
132*53ee8cc1Swenshuai.xi #define RIU_ReadByte( u32Reg )      RIU_READ_BYTE(((u32Reg) << 1) - ((u32Reg) & 1))
133*53ee8cc1Swenshuai.xi 
134*53ee8cc1Swenshuai.xi #define RIU_Read2Byte( u32Reg )     (RIU_READ_2BYTE((u32Reg) << 1))
135*53ee8cc1Swenshuai.xi 
136*53ee8cc1Swenshuai.xi #define RIU_ReadRegBit( u32Reg, u8Mask )    (RIU_READ_BYTE(((u32Reg) << 1) - ((u32Reg) & 1)) & (u8Mask))
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi #define RIU_WriteRegBit( u32Reg, bEnable, u8Mask )                                      \
139*53ee8cc1Swenshuai.xi     RIU_MACRO_START                                                                     \
140*53ee8cc1Swenshuai.xi     RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) - ((u32Reg) & 1))  ) | (u8Mask)) :                           \
141*53ee8cc1Swenshuai.xi                                 (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1))) & ~(u8Mask)));                            \
142*53ee8cc1Swenshuai.xi     RIU_MACRO_END
143*53ee8cc1Swenshuai.xi 
144*53ee8cc1Swenshuai.xi #define RIU_WriteByte( u32Reg, u8Val )                                                  \
145*53ee8cc1Swenshuai.xi     RIU_MACRO_START                                                                     \
146*53ee8cc1Swenshuai.xi     RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val);                           \
147*53ee8cc1Swenshuai.xi     RIU_MACRO_END
148*53ee8cc1Swenshuai.xi 
149*53ee8cc1Swenshuai.xi #define RIU_Write2Byte( u32Reg, u16Val )                                                \
150*53ee8cc1Swenshuai.xi     RIU_MACRO_START                                                                     \
151*53ee8cc1Swenshuai.xi     if ( ((u32Reg) & 0x01) )                                                                            \
152*53ee8cc1Swenshuai.xi     {                                                                                                                \
153*53ee8cc1Swenshuai.xi         RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val)));                                     \
154*53ee8cc1Swenshuai.xi         RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8));                             \
155*53ee8cc1Swenshuai.xi     }                                                                                   \
156*53ee8cc1Swenshuai.xi     else                                                                                \
157*53ee8cc1Swenshuai.xi     {                                                                                   \
158*53ee8cc1Swenshuai.xi         RIU_WRITE_2BYTE( ((u32Reg)<<1) ,  u16Val);                                     \
159*53ee8cc1Swenshuai.xi     }                                                                                   \
160*53ee8cc1Swenshuai.xi     RIU_MACRO_END
161*53ee8cc1Swenshuai.xi 
162*53ee8cc1Swenshuai.xi #define RIU_WriteByteMask( u32Reg, u8Val, u8Msk )                                       \
163*53ee8cc1Swenshuai.xi     RIU_MACRO_START                                                                     \
164*53ee8cc1Swenshuai.xi     RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1))) & ~(u8Msk)) | ((u8Val) & (u8Msk)));                   \
165*53ee8cc1Swenshuai.xi     RIU_MACRO_END
166*53ee8cc1Swenshuai.xi 
167*53ee8cc1Swenshuai.xi #define DMD_MBX_TIMEOUT 200
168*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
169*53ee8cc1Swenshuai.xi //  Local Structures
170*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
171*53ee8cc1Swenshuai.xi typedef struct
172*53ee8cc1Swenshuai.xi {
173*53ee8cc1Swenshuai.xi     MS_PHYADDR  u32DMD_VD_MBX_BaseAddr;
174*53ee8cc1Swenshuai.xi     MS_BOOL     bBaseAddrInitialized;
175*53ee8cc1Swenshuai.xi     MS_U8       u8DMD_VD_MBX_Type;
176*53ee8cc1Swenshuai.xi } hal_DMD_VD_MBX_t;
177*53ee8cc1Swenshuai.xi 
178*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
179*53ee8cc1Swenshuai.xi //  Global Variables
180*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
181*53ee8cc1Swenshuai.xi 
182*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
183*53ee8cc1Swenshuai.xi //  Local Variables
184*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
185*53ee8cc1Swenshuai.xi static hal_DMD_VD_MBX_t _hal_DMD_VD_MBX =
186*53ee8cc1Swenshuai.xi {
187*53ee8cc1Swenshuai.xi     .u32DMD_VD_MBX_BaseAddr = BASEADDR_RIU,
188*53ee8cc1Swenshuai.xi     .bBaseAddrInitialized = 0,
189*53ee8cc1Swenshuai.xi     .u8DMD_VD_MBX_Type = -1,
190*53ee8cc1Swenshuai.xi };
191*53ee8cc1Swenshuai.xi static MS_U8 MBX_SetType;
192*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
193*53ee8cc1Swenshuai.xi //  Debug Functions
194*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
195*53ee8cc1Swenshuai.xi 
196*53ee8cc1Swenshuai.xi 
197*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
198*53ee8cc1Swenshuai.xi //  Local Functions
199*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
200*53ee8cc1Swenshuai.xi 
201*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
202*53ee8cc1Swenshuai.xi //  Global Functions
203*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
HAL_SYS_DMD_VD_MBX_Init(void)204*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_Init(void)
205*53ee8cc1Swenshuai.xi {
206*53ee8cc1Swenshuai.xi     MS_VIRT u32NonPMBank;
207*53ee8cc1Swenshuai.xi     MS_PHY u32NonPMBankSize;
208*53ee8cc1Swenshuai.xi     if (!MDrv_MMIO_GetBASE( &u32NonPMBank, &u32NonPMBankSize, MS_MODULE_AVD))
209*53ee8cc1Swenshuai.xi     {
210*53ee8cc1Swenshuai.xi         printf("IOMap failure to get MAP_NONPM_BANK\n");
211*53ee8cc1Swenshuai.xi         return FALSE;
212*53ee8cc1Swenshuai.xi     }
213*53ee8cc1Swenshuai.xi 
214*53ee8cc1Swenshuai.xi     _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr=u32NonPMBank;
215*53ee8cc1Swenshuai.xi     _hal_DMD_VD_MBX.bBaseAddrInitialized = 1;
216*53ee8cc1Swenshuai.xi     _hal_DMD_VD_MBX.u8DMD_VD_MBX_Type = -1;
217*53ee8cc1Swenshuai.xi     #ifdef MS_DEBUG
218*53ee8cc1Swenshuai.xi     printf("HAL_SYS_DMD_VD_MBX_Init %lx\n",u32NonPMBank);
219*53ee8cc1Swenshuai.xi     #endif
220*53ee8cc1Swenshuai.xi     return TRUE;
221*53ee8cc1Swenshuai.xi }
222*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_GetType(void)223*53ee8cc1Swenshuai.xi MS_U8 HAL_SYS_DMD_VD_MBX_GetType(void)
224*53ee8cc1Swenshuai.xi {
225*53ee8cc1Swenshuai.xi     #ifdef MS_DEBUG
226*53ee8cc1Swenshuai.xi     printf("HAL_SYS_DMD_VD_MBX_GetType %d\n",MBX_SetType);
227*53ee8cc1Swenshuai.xi     #endif
228*53ee8cc1Swenshuai.xi     //return RIU_ReadByte(0x1E3E);
229*53ee8cc1Swenshuai.xi     return MBX_SetType;
230*53ee8cc1Swenshuai.xi }
231*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_SetType(MS_U8 u8Value)232*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_SetType(MS_U8 u8Value)
233*53ee8cc1Swenshuai.xi {
234*53ee8cc1Swenshuai.xi     MBX_SetType =  u8Value;
235*53ee8cc1Swenshuai.xi     //RIU_WriteByte(0x1E3E, u8Value);
236*53ee8cc1Swenshuai.xi }
237*53ee8cc1Swenshuai.xi 
238*53ee8cc1Swenshuai.xi #if (DMD_VD_MBX_CHIP_VERSION == DMD_VD_MBX_CHIP_T3)
239*53ee8cc1Swenshuai.xi // ATV
HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)240*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)
241*53ee8cc1Swenshuai.xi {
242*53ee8cc1Swenshuai.xi     MS_U32 u32StartTime=MsOS_GetSystemTime();
243*53ee8cc1Swenshuai.xi     while (MsOS_GetSystemTime()-u32StartTime < 10)
244*53ee8cc1Swenshuai.xi     {
245*53ee8cc1Swenshuai.xi         if (!RIU_ReadByte(DemodCmd)) return TRUE;
246*53ee8cc1Swenshuai.xi         MsOS_DelayTaskUs(500);
247*53ee8cc1Swenshuai.xi     }
248*53ee8cc1Swenshuai.xi     #ifdef MS_DEBUG
249*53ee8cc1Swenshuai.xi     printf("HAL_SYS_DMD_VD_MBX_ATV_WaitReady Fail\n");
250*53ee8cc1Swenshuai.xi     #endif
251*53ee8cc1Swenshuai.xi     return FALSE;
252*53ee8cc1Swenshuai.xi }
253*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg,MS_U8 * u8Value)254*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg, MS_U8 *u8Value)
255*53ee8cc1Swenshuai.xi {
256*53ee8cc1Swenshuai.xi     if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
257*53ee8cc1Swenshuai.xi     {
258*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodAdrL, u32Reg&0xFF);
259*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodAdrH, (u32Reg>>8)&0xFF);
260*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodCmd, DemodCmdRdReg);
261*53ee8cc1Swenshuai.xi 
262*53ee8cc1Swenshuai.xi         if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
263*53ee8cc1Swenshuai.xi         {
264*53ee8cc1Swenshuai.xi             *u8Value = RIU_ReadByte(DemodData);
265*53ee8cc1Swenshuai.xi             return TRUE;
266*53ee8cc1Swenshuai.xi         }
267*53ee8cc1Swenshuai.xi     }
268*53ee8cc1Swenshuai.xi     #ifdef MS_DEBUG
269*53ee8cc1Swenshuai.xi     printf("HAL_SYS_DMD_VD_MBX_ATV_ReadByte Fail\n");
270*53ee8cc1Swenshuai.xi     #endif
271*53ee8cc1Swenshuai.xi     *u8Value = 0;
272*53ee8cc1Swenshuai.xi     return FALSE;
273*53ee8cc1Swenshuai.xi }
274*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg,MS_U8 u8Val)275*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg, MS_U8 u8Val)
276*53ee8cc1Swenshuai.xi {
277*53ee8cc1Swenshuai.xi     if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
278*53ee8cc1Swenshuai.xi     {
279*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodAdrL, u32Reg&0xFF);
280*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodAdrH, (u32Reg>>8)&0xFF);
281*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodData, u8Val);
282*53ee8cc1Swenshuai.xi         RIU_WriteByte(DemodCmd, DemodCmdWrReg);
283*53ee8cc1Swenshuai.xi         return TRUE;
284*53ee8cc1Swenshuai.xi     }
285*53ee8cc1Swenshuai.xi     return FALSE;
286*53ee8cc1Swenshuai.xi }
287*53ee8cc1Swenshuai.xi #else
HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)288*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)
289*53ee8cc1Swenshuai.xi {
290*53ee8cc1Swenshuai.xi     return FALSE;
291*53ee8cc1Swenshuai.xi }
292*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg,MS_U8 * u8Value)293*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg, MS_U8 *u8Value)
294*53ee8cc1Swenshuai.xi {
295*53ee8cc1Swenshuai.xi     return FALSE;
296*53ee8cc1Swenshuai.xi }
297*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg,MS_U8 u8Val)298*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg, MS_U8 u8Val)
299*53ee8cc1Swenshuai.xi {
300*53ee8cc1Swenshuai.xi     return FALSE;
301*53ee8cc1Swenshuai.xi }
302*53ee8cc1Swenshuai.xi #endif
303*53ee8cc1Swenshuai.xi 
304*53ee8cc1Swenshuai.xi // DVBT & DVBC
HAL_SYS_DMD_VD_MBX_DVB_WaitReady(void)305*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WaitReady(void)
306*53ee8cc1Swenshuai.xi {
307*53ee8cc1Swenshuai.xi     MS_U32 u32StartTime=MsOS_GetSystemTime();
308*53ee8cc1Swenshuai.xi     while (RIU_ReadByte(MBRegBase + 0x00)) // wait VDMCU ready
309*53ee8cc1Swenshuai.xi     {
310*53ee8cc1Swenshuai.xi         if (MsOS_Timer_DiffTimeFromNow(u32StartTime)>DMD_MBX_TIMEOUT)
311*53ee8cc1Swenshuai.xi         {
312*53ee8cc1Swenshuai.xi             printf("HAL_SYS_DMD_VD_MBX_DVB_WaitReady Timeout\n");
313*53ee8cc1Swenshuai.xi             return FALSE;
314*53ee8cc1Swenshuai.xi         }
315*53ee8cc1Swenshuai.xi     }
316*53ee8cc1Swenshuai.xi     return TRUE;
317*53ee8cc1Swenshuai.xi }
318*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake(void)319*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake(void)
320*53ee8cc1Swenshuai.xi {
321*53ee8cc1Swenshuai.xi     MS_U32 u32StartTime=MsOS_GetSystemTime();
322*53ee8cc1Swenshuai.xi     while(RIU_ReadByte(MBRegBase + 0x00) != 0xFF)           // wait MB_CNTL set done
323*53ee8cc1Swenshuai.xi     {
324*53ee8cc1Swenshuai.xi         if (MsOS_Timer_DiffTimeFromNow(u32StartTime)>DMD_MBX_TIMEOUT)
325*53ee8cc1Swenshuai.xi         {
326*53ee8cc1Swenshuai.xi             printf("HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake Timeout\n");
327*53ee8cc1Swenshuai.xi             break;
328*53ee8cc1Swenshuai.xi         }
329*53ee8cc1Swenshuai.xi     }
330*53ee8cc1Swenshuai.xi }
331*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_ReadByte(MS_U16 u16Addr,MS_U8 * u8Value)332*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadByte(MS_U16 u16Addr, MS_U8 *u8Value)
333*53ee8cc1Swenshuai.xi {
334*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
335*53ee8cc1Swenshuai.xi 
336*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));   // ADDR_H
337*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);          // ADDR_L
338*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x01);                 // MB_CNTL set read mode
339*53ee8cc1Swenshuai.xi 
340*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                         // assert interrupt to VD MCU51
341*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                         // de-assert interrupt to VD MCU51
342*53ee8cc1Swenshuai.xi 
343*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
344*53ee8cc1Swenshuai.xi 
345*53ee8cc1Swenshuai.xi     *u8Value = RIU_ReadByte(MBRegBase + 0x03);             // REG_DATA get
346*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                 // MB_CNTL clear
347*53ee8cc1Swenshuai.xi 
348*53ee8cc1Swenshuai.xi     return TRUE;
349*53ee8cc1Swenshuai.xi }
350*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_WriteByte(MS_U32 u16Addr,MS_U8 u8Data)351*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteByte(MS_U32 u16Addr, MS_U8 u8Data)
352*53ee8cc1Swenshuai.xi {
353*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
354*53ee8cc1Swenshuai.xi 
355*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));   // ADDR_H
356*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);          // ADDR_L
357*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x03, u8Data);               // REG_DATA
358*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x02);                 // MB_CNTL set write mode
359*53ee8cc1Swenshuai.xi 
360*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                         // assert interrupt to VD MCU51
361*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                         // de-assert interrupt to VD MCU51
362*53ee8cc1Swenshuai.xi 
363*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
364*53ee8cc1Swenshuai.xi 
365*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                 // MB_CNTL clear
366*53ee8cc1Swenshuai.xi     return TRUE;
367*53ee8cc1Swenshuai.xi }
368*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg(MS_U32 u16Addr,MS_U8 * u8Value)369*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg(MS_U32 u16Addr, MS_U8 *u8Value)
370*53ee8cc1Swenshuai.xi {
371*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
372*53ee8cc1Swenshuai.xi 
373*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));    // ADDR_H
374*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);           // ADDR_L
375*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x03);                  // MB_CNTL set read mode
376*53ee8cc1Swenshuai.xi 
377*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                 // assert interrupt to DMD MCU51 //mick
378*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                 // de-assert interrupt to DMD MCU51
379*53ee8cc1Swenshuai.xi 
380*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
381*53ee8cc1Swenshuai.xi 
382*53ee8cc1Swenshuai.xi     *u8Value = RIU_ReadByte(MBRegBase + 0x03);              // REG_DATA get
383*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                  // MB_CNTL clear
384*53ee8cc1Swenshuai.xi 
385*53ee8cc1Swenshuai.xi     return TRUE;
386*53ee8cc1Swenshuai.xi }
387*53ee8cc1Swenshuai.xi 
388*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg(MS_U32 u16Addr,MS_U8 u8Value)389*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg(MS_U32 u16Addr, MS_U8 u8Value)
390*53ee8cc1Swenshuai.xi {
391*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
392*53ee8cc1Swenshuai.xi 
393*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));        // ADDR_H
394*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);               // ADDR_L
395*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x03, u8Value);                    // REG_DATA
396*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x04);                      // MB_CNTL set write mode
397*53ee8cc1Swenshuai.xi 
398*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                     // assert interrupt to VD MCU51 //mick
399*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                     // de-assert interrupt to VD MCU51
400*53ee8cc1Swenshuai.xi 
401*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
402*53ee8cc1Swenshuai.xi 
403*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                      // MB_CNTL clear
404*53ee8cc1Swenshuai.xi 
405*53ee8cc1Swenshuai.xi     return TRUE;
406*53ee8cc1Swenshuai.xi }
407*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg(MS_U16 u16Addr,MS_U8 * u8Value)408*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg(MS_U16 u16Addr, MS_U8 *u8Value)
409*53ee8cc1Swenshuai.xi {
410*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
411*53ee8cc1Swenshuai.xi 
412*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));   // ADDR_H
413*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);          // ADDR_L
414*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x05);                 // MB_CNTL set read mode
415*53ee8cc1Swenshuai.xi 
416*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                // assert interrupt to DMD MCU51 //mick
417*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                // de-assert interrupt to DMD MCU51
418*53ee8cc1Swenshuai.xi 
419*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
420*53ee8cc1Swenshuai.xi 
421*53ee8cc1Swenshuai.xi     *u8Value = RIU_ReadByte(MBRegBase + 0x03);             // REG_DATA get
422*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                 // MB_CNTL clear
423*53ee8cc1Swenshuai.xi 
424*53ee8cc1Swenshuai.xi     return TRUE;
425*53ee8cc1Swenshuai.xi }
426*53ee8cc1Swenshuai.xi 
427*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------
HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg(MS_U32 u16Addr,MS_U8 u8Data)428*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg(MS_U32 u16Addr, MS_U8 u8Data)
429*53ee8cc1Swenshuai.xi {
430*53ee8cc1Swenshuai.xi     if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
431*53ee8cc1Swenshuai.xi 
432*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8));   // ADDR_H
433*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr);          // ADDR_L
434*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x03, u8Data);               // REG_DATA
435*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x06);                 // MB_CNTL set write mode
436*53ee8cc1Swenshuai.xi 
437*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                // assert interrupt to VD MCU51 //mick
438*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                // de-assert interrupt to VD MCU51
439*53ee8cc1Swenshuai.xi 
440*53ee8cc1Swenshuai.xi     HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
441*53ee8cc1Swenshuai.xi 
442*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, 0x00);                 // MB_CNTL clear
443*53ee8cc1Swenshuai.xi 
444*53ee8cc1Swenshuai.xi     return TRUE;
445*53ee8cc1Swenshuai.xi }
446*53ee8cc1Swenshuai.xi 
447*53ee8cc1Swenshuai.xi // ATSC
HAL_SYS_DMD_VD_MBX_ATSC_WriteByte(MS_U16 u16Addr,MS_U8 u8Data)448*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_ATSC_WriteByte(MS_U16 u16Addr, MS_U8 u8Data)
449*53ee8cc1Swenshuai.xi {
450*53ee8cc1Swenshuai.xi     MS_U8 u8CheckCount;
451*53ee8cc1Swenshuai.xi     MS_U8 u8CheckFlag;
452*53ee8cc1Swenshuai.xi 
453*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
454*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
455*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x10, u8Data);
456*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x1E, 0x01);
457*53ee8cc1Swenshuai.xi 
458*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                     // assert interrupt to VD MCU51 //mick
459*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                     // de-assert interrupt to VD MCU51
460*53ee8cc1Swenshuai.xi 
461*53ee8cc1Swenshuai.xi     for ( u8CheckCount=0; u8CheckCount < 10 ; u8CheckCount++ )
462*53ee8cc1Swenshuai.xi     {
463*53ee8cc1Swenshuai.xi         u8CheckFlag = RIU_ReadByte(MBRegBase + 0x1E);
464*53ee8cc1Swenshuai.xi         if ((u8CheckFlag&0x01)==0)
465*53ee8cc1Swenshuai.xi              break;
466*53ee8cc1Swenshuai.xi         MsOS_DelayTask(1);
467*53ee8cc1Swenshuai.xi     }
468*53ee8cc1Swenshuai.xi }
469*53ee8cc1Swenshuai.xi 
HAL_SYS_DMD_VD_MBX_ATSC_ReadByte(MS_U16 u16Addr)470*53ee8cc1Swenshuai.xi MS_U8 HAL_SYS_DMD_VD_MBX_ATSC_ReadByte(MS_U16 u16Addr)
471*53ee8cc1Swenshuai.xi {
472*53ee8cc1Swenshuai.xi     MS_U8 u8CheckCount;
473*53ee8cc1Swenshuai.xi     MS_U8 u8CheckFlag;
474*53ee8cc1Swenshuai.xi     MS_U8 u8Value;
475*53ee8cc1Swenshuai.xi 
476*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
477*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
478*53ee8cc1Swenshuai.xi     RIU_WriteByte(MBRegBase + 0x1E, 0x02);
479*53ee8cc1Swenshuai.xi 
480*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x02);                     // assert interrupt to VD MCU51 //mick
481*53ee8cc1Swenshuai.xi     RIU_WriteByte(DMDMcuBase + 0x03, 0x00);                     // de-assert interrupt to VD MCU51
482*53ee8cc1Swenshuai.xi 
483*53ee8cc1Swenshuai.xi     for ( u8CheckCount=0; u8CheckCount < 10 ; u8CheckCount++ )
484*53ee8cc1Swenshuai.xi     {
485*53ee8cc1Swenshuai.xi         u8CheckFlag = RIU_ReadByte(MBRegBase + 0x1E);
486*53ee8cc1Swenshuai.xi         if ((u8CheckFlag&0x02)==0)
487*53ee8cc1Swenshuai.xi         {
488*53ee8cc1Swenshuai.xi             u8Value = RIU_ReadByte(MBRegBase + 0x10);
489*53ee8cc1Swenshuai.xi             return u8Value;
490*53ee8cc1Swenshuai.xi         }
491*53ee8cc1Swenshuai.xi         MsOS_DelayTask(1);
492*53ee8cc1Swenshuai.xi     }
493*53ee8cc1Swenshuai.xi 
494*53ee8cc1Swenshuai.xi     return 0;
495*53ee8cc1Swenshuai.xi }
496