Home
last modified time | relevance | path

Searched refs:REG_TZPC_MIU_ID_ENABLE (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/seal/hal/k6/seal/
H A DhalSEAL.c1420 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1425 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1431 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1436 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1455 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1460 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1466 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1471 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
2130 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2135 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
[all …]
H A DregSEAL.h191 #define REG_TZPC_MIU_ID_ENABLE BIT12 macro
/utopia/UTPA2-700.0.x/modules/seal/hal/kano/seal/
H A DhalSEAL.c1376 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1381 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1387 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1392 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1416 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1421 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1427 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1432 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
2277 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2282 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
[all …]
H A DregSEAL.h242 #define REG_TZPC_MIU_ID_ENABLE BIT12 macro
/utopia/UTPA2-700.0.x/modules/seal/hal/k6lite/seal/
H A DhalSEAL.c1420 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1425 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1431 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1436 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1455 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1460 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1466 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1471 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
2130 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2135 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
[all …]
H A DregSEAL.h191 #define REG_TZPC_MIU_ID_ENABLE BIT12 macro
/utopia/UTPA2-700.0.x/modules/seal/hal/curry/seal/
H A DhalSEAL.c1376 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1383 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1407 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
1414 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_SEAL_ResetSram()
2202 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2209 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2235 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2242 u16Val &= ~REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterSet()
2284 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterQuery()
2290 u16Val |= REG_TZPC_MIU_ID_ENABLE; in HAL_Seal_SecureMasterQuery()
[all …]
H A DregSEAL.h201 #define REG_TZPC_MIU_ID_ENABLE BIT12 macro