Searched refs:REG_TSP5_TSOIN1_MUX_SHIFT (Results 1 – 8 of 8) sorted by relevance
240 #define REG_TSP5_TSOIN1_MUX_SHIFT 4 macro464 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()603 u16RegMask = REG_TSP5_TSOIN_MUX_MASK << REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()604 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
255 #define REG_TSP5_TSOIN1_MUX_SHIFT 4UL macro549 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()682 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
300 #define REG_TSP5_TSOIN1_MUX_SHIFT 4UL macro613 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()800 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
308 #define REG_TSP5_TSOIN1_MUX_SHIFT 4UL macro622 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()821 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
302 #define REG_TSP5_TSOIN1_MUX_SHIFT 4UL macro545 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()
310 #define REG_TSP5_TSOIN1_MUX_SHIFT 4UL macro573 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()