Searched refs:REG_TSP5_TSOIN0_MUX_SHIFT (Results 1 – 8 of 8) sorted by relevance
239 #define REG_TSP5_TSOIN0_MUX_SHIFT 0 macro461 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()598 u16RegMask = REG_TSP5_TSOIN_MUX_MASK << REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()599 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
254 #define REG_TSP5_TSOIN0_MUX_SHIFT 0UL macro544 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()677 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
299 #define REG_TSP5_TSOIN0_MUX_SHIFT 0UL macro608 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()795 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
307 #define REG_TSP5_TSOIN0_MUX_SHIFT 0UL macro617 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()816 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
301 #define REG_TSP5_TSOIN0_MUX_SHIFT 0UL macro542 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()
309 #define REG_TSP5_TSOIN0_MUX_SHIFT 0UL macro570 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()