Searched refs:REG_MIU_ARB_RQX_MASK (Results 1 – 14 of 14) sorted by relevance
134 #define REG_MIU_ARB_RQX_MASK(x) (0x0+0x20*x) macro
1367 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_MaskReq()1419 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_UnMaskReq()
1361 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_MaskReq()1413 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_UnMaskReq()
123 #define REG_MIU_ARB_RQX_MASK(x) (0x06+0x20*x) //MIU Arb, Group 4~7 macro
1478 u32Reg = REG_MIU_ARB_RQX_MASK (u32Group); in HAL_MIU_MaskReq()1552 u32Reg = REG_MIU_ARB_RQX_MASK (u32Group); in HAL_MIU_UnMaskReq()
1437 u32Reg = REG_MIU_ARB_RQX_MASK (u32Group); in HAL_MIU_MaskReq()1511 u32Reg = REG_MIU_ARB_RQX_MASK (u32Group); in HAL_MIU_UnMaskReq()
150 #define REG_MIU_ARB_RQX_MASK(x) (0x0+0x20*x) macro
1614 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_MaskReq()1666 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_UnMaskReq()
1608 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_MaskReq()1660 u32Reg = REG_MIU_ARB_RQX_MASK (u32Grp); in HAL_MIU_UnMaskReq()