| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_mhl.h | 110 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_mhl.h | 110 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/ |
| H A D | hwregMHL.h | 133 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| H A D | halMHL.c | 183 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
3189 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/ |
| H A D | hwregMHL.h | 133 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| H A D | halMHL.c | 183 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
3186 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/ |
| H A D | halMHL.c | 205 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
3635 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/ |
| H A D | halMHL.c | 205 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
3635 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| H A D | halMHL.c | 189 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
4104 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| H A D | halMHL.c | 189 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
4080 return (R2BYTE(REG_MHL_CBUS_21)>>8); in mhal_mhl_GetDDCErrorCode()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/ |
| H A D | hwregMHL.h | 149 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_pm_sleep.h | 560 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_pm_sleep.h | 558 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_pm_sleep.h | 559 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_pm_sleep.h | 560 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_pm_sleep.h | 560 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_pm_sleep.h | 561 #define REG_MHL_CBUS_21 (REG_MHL_CBUS_BANK + 0x42) macro
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