Searched refs:REG_HST0_FIQ_MASK_63_48 (Results 1 – 10 of 10) sorted by relevance
462 #define REG_HST0_FIQ_MASK_63_48 (REG_IRQCTRL_BASE + (0x7UL * 4)) macro
1537 MS_U16 u16MaskTmp = REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48); in HAL_CIPHER_IntEnable()1539 REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48) = u16MaskTmp; in HAL_CIPHER_IntEnable()
463 #define REG_HST0_FIQ_MASK_63_48 (REG_IRQCTRL_BASE + (0x7UL * 4)) macro
1578 MS_U16 u16MaskTmp = REG16_R(_u32RegBase + REG_HST0_FIQ_MASK_63_48); in HAL_CIPHER_IntEnable()1580 REG16_W(_u32RegBase + REG_HST0_FIQ_MASK_63_48, u16MaskTmp); in HAL_CIPHER_IntEnable()
1534 MS_U16 u16MaskTmp = REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48); in HAL_CIPHER_IntEnable()1536 REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48) = u16MaskTmp; in HAL_CIPHER_IntEnable()
519 #define REG_HST0_FIQ_MASK_63_48 (REG_IRQCTRL_BASE + (0x7UL * 4)) macro
1618 MS_U16 u16MaskTmp = REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48); in HAL_CIPHER_IntEnable()1620 REG16(_u32RegBase + REG_HST0_FIQ_MASK_63_48) = u16MaskTmp; in HAL_CIPHER_IntEnable()