| /utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
365 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 331 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
424 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
445 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
365 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 325 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
418 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
439 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 329 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
422 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
443 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 325 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
418 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
439 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 329 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
422 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
443 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/ |
| H A D | regIRQ.h | 199 #define REG_FIQ_FINAL_STATUS REG_FRC_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
245 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
271 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
295 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
318 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
342 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 329 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
422 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
443 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/ |
| H A D | regIRQ.h | 153 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
170 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
188 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
204 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/ |
| H A D | regIRQ.h | 153 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
170 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
188 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
204 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
220 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/ |
| H A D | regIRQ.h | 144 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/ |
| H A D | regIRQ.h | 144 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/ |
| H A D | regIRQ.h | 144 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
160 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/ |
| H A D | regIRQ.h | 157 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 326 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
418 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/ |
| H A D | regIRQ.h | 157 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/ |
| H A D | regIRQ.h | 157 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 326 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
418 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/ |
| H A D | regIRQ.h | 157 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/ |
| H A D | regIRQ.h | 157 #define REG_FIQ_FINAL_STATUS REG_AEON_FIQ_FINAL_STATUS macro
179 #define REG_FIQ_FINAL_STATUS REG_MIPS_FIQ_FINAL_STATUS macro
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| H A D | halIRQ.c | 326 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd_ARM()
418 status = _IRQ_Read4Byte(REG_FIQ_FINAL_STATUS); in _HAL_IRQ_FIQHnd()
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