| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/ |
| H A D | regFQ.h | 120 } REG16_FQ; typedef 124 REG16_FQ Reg_fiq_config0; //0x00 150 REG16_FQ Reg_fiq_config1; //0x0b 178 REG16_FQ Reg_fig_config2; //0x0e 189 REG16_FQ Reg_fig_config3; //0x0f 194 REG16_FQ Reg_fiq_int; //0x10 204 REG16_FQ Fiq_status; //0x15 209 REG16_FQ REG_FIQ_1A; //0x1A 216 REG16_FQ REG1B_1D_RESERVED[0x1E - 0x1B]; //0x1B~0x1D 218 REG16_FQ REG_FIQ_1E; [all …]
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| H A D | halFQ.c | 120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() 192 REG16_FQ *Reg = NULL; in HAL_FQ_BurstLen() 365 REG16_FQ *Reg = &_REGFIQ[u32FQEng].Fiq_Src_Filter[u32SrcFltId >> 1]; in HAL_FQ_SrcFlt_SetSyncByte() 393 REG16_FQ *Reg = &_REGFIQ[u32FQEng].Fiq_Filter[u32FltId]; in HAL_FQ_Flt_SetPid() 407 REG16_FQ *Reg = &_REGFIQ[u32FQEng].Fiq_Filter_SyncByte[u32FltId >> 1]; in HAL_FQ_Flt_SetSyncByte() 423 REG16_FQ *Reg = &_REGFIQ[u32FQEng].Fiq_Filter[u32FltId]; in HAL_FQ_Flt_Enable() 437 REG16_FQ *Reg = &_REGFIQ[u32FQMuxEng + FQ_MUX_START_ID].Reg_fiq_config1; in HAL_FQ_MUX_Src() 451 REG16_FQ *Reg = &_REGFIQ[u32FQMuxEng + FQ_MUX_START_ID].Reg_fig_config3; in HAL_FQ_MUX_RushModeEnable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 146 REG16_FQ Reg_fiq_config11; //0x0b 174 REG16_FQ REG_FIQ0_CFG2; //0x0e 178 REG16_FQ REG_FIQ0_CFG3; //0x0f 180 REG16_FQ Reg_fiq_config16; //0x10 190 REG16_FQ Fiq_status; //0x15
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| H A D | halFQ.c | 126 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 146 REG16_FQ Reg_fiq_config11; //0x0b 174 REG16_FQ REG_FIQ0_CFG2; //0x0e 178 REG16_FQ REG_FIQ0_CFG3; //0x0f 180 REG16_FQ Reg_fiq_config16; //0x10 190 REG16_FQ Fiq_status; //0x15
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| H A D | halFQ.c | 121 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 146 REG16_FQ Reg_fiq_config11; //0x0b 174 REG16_FQ REG_FIQ0_CFG2; //0x0e 186 REG16_FQ REG_FIQ0_CFG3; //0x0f 188 REG16_FQ Reg_fiq_config16; //0x10 198 REG16_FQ Fiq_status; //0x15
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| H A D | halFQ.c | 120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 147 REG16_FQ Reg_fiq_config11; //0x0b 176 REG16_FQ REG_FIQ0_CFG2; //0x0e 188 REG16_FQ REG_FIQ0_CFG3; //0x0f 190 REG16_FQ Reg_fiq_config16; //0x10 200 REG16_FQ Fiq_status; //0x15
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| H A D | halFQ.c | 120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x40 148 REG16_FQ Reg_fiq_config11; //0x4b 180 REG16_FQ REG_FIQ0_CFG2; //0x4e 181 REG16_FQ REG_FIQ0_CFG3; //0x4f 183 REG16_FQ Reg_fiq_config16; //0x50 193 REG16_FQ Fiq_status; //0x55
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| H A D | halFQ.c | 133 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x40 148 REG16_FQ Reg_fiq_config11; //0x4b 180 REG16_FQ REG_FIQ0_CFG2; //0x4e 181 REG16_FQ REG_FIQ0_CFG3; //0x4f 183 REG16_FQ Reg_fiq_config16; //0x50 193 REG16_FQ Fiq_status; //0x55
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| H A D | halFQ.c | 132 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x40 148 REG16_FQ Reg_fiq_config11; //0x4b 180 REG16_FQ REG_FIQ0_CFG2; //0x4e 181 REG16_FQ REG_FIQ0_CFG3; //0x4f 183 REG16_FQ Reg_fiq_config16; //0x50 193 REG16_FQ Fiq_status; //0x55
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| H A D | halFQ.c | 133 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x40 148 REG16_FQ Reg_fiq_config11; //0x4b 180 REG16_FQ REG_FIQ0_CFG2; //0x4e 181 REG16_FQ REG_FIQ0_CFG3; //0x4f 183 REG16_FQ Reg_fiq_config16; //0x50 193 REG16_FQ Fiq_status; //0x55
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| H A D | halFQ.c | 132 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 146 REG16_FQ Reg_fiq_config11; //0x0b 165 REG16_FQ REG_FIQ0_CFG2; //0x0e 169 REG16_FQ REG_FIQ0_CFG3; //0x0f 171 REG16_FQ Reg_fiq_config16; //0x10
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| H A D | halFQ.c | 122 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/ |
| H A D | regFQ.h | 117 } REG16_FQ; typedef 121 REG16_FQ Reg_fiq_config0; //0x00 146 REG16_FQ Reg_fiq_config11; //0x0b 165 REG16_FQ REG_FIQ0_CFG2; //0x0e 169 REG16_FQ REG_FIQ0_CFG3; //0x0f 171 REG16_FQ Reg_fiq_config16; //0x10
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| H A D | halFQ.c | 122 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R()
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