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Searched refs:MIU_PROTECT_DDR_1024MB (Results 1 – 25 of 32) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/miu/hal/messi/miu/
H A DhalMIU.c846 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
873 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
900 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
927 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
987 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h134 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/mainz/miu/
H A DhalMIU.c846 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
873 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
900 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
927 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
987 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h134 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/mooney/miu/
H A DhalMIU.c845 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
872 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
899 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
926 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
H A DregMIU.h134 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DhalMIU.c939 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
975 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
1011 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
1080 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h162 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DhalMIU.c945 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
981 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
1017 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
1086 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h162 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7621/miu/
H A DhalMIU.c842 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
869 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
926 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h145 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maxim/miu/
H A DhalMIU.c836 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
863 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
920 case MIU_PROTECT_DDR_1024MB: in HAL_MIU_Dram_ReadSize()
H A DregMIU.h145 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DhalMIU.c938 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
965 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
992 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
H A DregMIU.h157 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DhalMIU.c807 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
834 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
861 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
/utopia/UTPA2-700.0.x/modules/miu/hal/mustang/miu/
H A DregMIU.h141 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k6lite/miu/
H A DregMIU.h144 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k6/miu/
H A DregMIU.h144 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k7u/miu/
H A DregMIU.h144 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DregMIU.h152 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
H A DhalMIU.c843 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
873 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB); in HAL_MIU_Dram_Size()
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DregMIU.h153 #define MIU_PROTECT_DDR_1024MB (0xA0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DregMIU.h153 #define MIU_PROTECT_DDR_1024MB (0xA0) macro

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