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Searched refs:HAL_MVD_RegWriteBit (Results 1 – 25 of 66) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/mainz/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/messi/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/mvd/
H A DhalMVD.c331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/mvd_ex/
H A DhalMVD_EX.c787 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
953 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
954 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
958 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
959 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
989 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
990 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
992 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
993 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
1001 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/mvd_ex/
H A DhalMVD_EX.c787 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
953 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
954 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
958 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
959 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
989 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
990 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
992 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
993 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
1001 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/mvd_ex/
H A DhalMVD_EX.c753 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
919 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
920 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
924 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
925 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
955 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
956 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
958 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
959 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
967 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/mvd_lite/
H A DhalMVD_EX.c924 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1068 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1069 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1070 HAL_MVD_RegWriteBit(MIU1_RQ4_MASK_H, bEnMask, BIT1); //RTO in HAL_MVD_SetReqMask()
1074 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1075 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1076 HAL_MVD_RegWriteBit(MIU0_RQ4_MASK_H, bEnMask, BIT1); //RTO in HAL_MVD_SetReqMask()
1104 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1105 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1107 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/mvd_v3/
H A DhalMVD_EX.c924 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1068 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1069 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1073 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1074 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1110 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1111 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1113 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
1114 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
1122 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/mvd_v3/
H A DhalMVD_EX.c925 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1069 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1070 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1074 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1075 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1111 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1112 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1114 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
1115 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
1123 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/mvd_v3/
H A DhalMVD_EX.c923 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1067 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1068 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1072 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W in HAL_MVD_SetReqMask()
1073 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W in HAL_MVD_SetReqMask()
1109 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1110 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1112 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
1113 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset in HAL_MVD_RstHW()
1121 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset in HAL_MVD_RstHW()
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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/mvd_v3/
H A DhalMVD_EX.c926 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1070 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1071 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1075 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1076 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1080 HAL_MVD_RegWriteBit(MIU2_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1081 HAL_MVD_RegWriteBit(MIU2_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1109 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1110 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1112 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/mvd_v3/
H A DhalMVD_EX.c926 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1070 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1071 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1075 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1076 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1080 HAL_MVD_RegWriteBit(MIU2_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1081 HAL_MVD_RegWriteBit(MIU2_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1109 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1110 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1112 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/mvd_v3/
H A DhalMVD_EX.c903 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask) in HAL_MVD_RegWriteBit() function
1047 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1048 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1049 HAL_MVD_RegWriteBit(MIU1_RQ4_MASK_L, bEnMask, BIT6); //MVD TLB Mheg Codec in HAL_MVD_SetReqMask()
1053 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W in HAL_MVD_SetReqMask()
1054 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W in HAL_MVD_SetReqMask()
1055 HAL_MVD_RegWriteBit(MIU0_RQ4_MASK_L, bEnMask, BIT6); //MVD TLB Mheg Codec in HAL_MVD_SetReqMask()
1083 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU in HAL_MVD_RstHW()
1084 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset in HAL_MVD_RstHW()
1086 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD in HAL_MVD_RstHW()
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