1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 // Common Definition
100 #ifdef MSOS_TYPE_LINUX_KERNEL
101 #include <linux/string.h>
102 #else
103 #include <string.h>
104 #endif
105
106 #include "MsCommon.h"
107 #include "drvMVD_EX.h"
108 #include "drvBDMA.h"
109
110 // Internal Definition
111 #include "regMVD_EX.h"
112 #include "halMVD_EX.h"
113 #include "halVPU_EX.h"
114 #include "osalMVD_EX.h"
115 #include "mvd4_interface.h" //firmware header
116 #include "asmCPU.h"
117 #include "controller.h"
118 #include "MVD_EX_Common.h"
119 #include "halCHIP.h"
120 //#include "drvCMAPool.h"
121 #include "drvCMAPool_v2.h"
122 #if defined(MSOS_TYPE_LINUX)
123 #include "msos/linux/mdrv_cma_pool_st.h"
124 #endif
125
126 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE)
127
128
129 #ifndef VPRINTF
130 #ifdef MSOS_TYPE_LINUX_KERNEL
131 #define VPRINTF printk
132 #elif defined( MSOS_TYPE_ECOS)
133 #define VPRINTF diag_printf
134 #else
135 #ifndef ANDROID
136 #define VPRINTF printf
137 #else
138 #include <sys/mman.h>
139 #include <cutils/ashmem.h>
140 #include <cutils/log.h>
141 #define VPRINTF ALOGD
142 #endif
143 #endif
144 #endif
145 //-------------------------------------------------------------------------------------------------
146 // Driver Compiler Options
147 //-------------------------------------------------------------------------------------------------
148 #define SLQ_NEW_PUSH 1
149 #define VIRTUAL_CMD_TIMEOUT 50
150 #ifdef VDEC3
151 #define v3_temp 1
152 #define v3_thinplayer 0
153 #else
154 #define v3_temp 0
155 #define v3_thinplayer 0
156 #endif
157
158 //-------------------------------------------------------------------------------------------------
159 // Local Defines
160 //-------------------------------------------------------------------------------------------------
161 #define MIU1_BASEADDR pMVDHalContext->stMiuCfg.u32Miu1BaseAddr
162 #define _PA2Offset(x) (((x)>=MIU1_BASEADDR)?(x-MIU1_BASEADDR):(x))
163
164 #ifdef MSOS_TYPE_LINUX_KERNEL
165 #include <asm/div64.h>
166 #define _90K_TO_MS_U64(x) ((x!=MVD_U64_MAX)?(do_div(x,90)):(x)) //90k counter ==> ms
167 #else
168 #define _90K_TO_MS_U64(x) ((x!=MVD_U64_MAX)?(x/=90):(x)) //90k counter ==> ms
169 #endif
170
171 #ifndef MS_ASSERT
172 #ifdef MS_DEBUG
173 #define MS_ASSERT(expr) do { \
174 if(!(expr)) \
175 MVD_PRINT("MVD assert fail %s %d!\n", __FILE__, __LINE__); \
176 } while(0)
177 #else
178 #define MS_ASSERT(expr)
179 #endif
180 #endif
181
182 #ifndef UNUSED
183 #define UNUSED(x) (void)(x)
184 #endif
185 //constant
186 #define MVD_PollingTimes 0x40000UL
187
188 #define MVD_DEBUGVERBAL(x) if (_u8HalDbgLevel>3) { (x); }
189 #define MVD_DEBUG_FWCMD(x) if (_u8HalDbgLevel>2) { (x); }
190 #define MVD_DEBUGINFO(x) if (_u8HalDbgLevel>1) { (x); }
191 #define MVD_DEBUGERROR(x) if (_u8HalDbgLevel>0) { (x); }
192 #define MVD_ERROR(x) x
193
194 #define RIU ((unsigned short volatile *) (u32RiuBaseAdd))
195 #define RIU8 ((unsigned char volatile *) (u32RiuBaseAdd))
196
197 #define MVDCPU_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL0_H) & BIT0) == BIT0)
198 #define MVDHW_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL2_L) & BIT6) == BIT6)
199
200 // MVD5
201 #define SLQ_TBL_ENTRY_LEN 0x7FFFFFFF //31-bit
202
203 #define MVD_WIDTH_ALIGN_BYTE 16
204 #define MVD_WIDTH_ALIGN_MASK (MVD_WIDTH_ALIGN_BYTE - 1)
205 #define MVD_WIDTH_ALIGN_BITS 4
206
207 #define MVD_FBNUM_DEFAULT 4
208 #define MVD_FBNUM_MAX 5
209 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
210
211 #define MVD_DHD_FBSIZE 0x5FA000 //Framebuffer size minimum for Dual HD: (1920*2)*1088*1.5
212 #define MVD_HD_FBSIZE 0x2FD000 //Framebuffer size minimum for High Definition
213 #define MVD4_VC1_FBSIZE_HDMIN 0xEF1000 //5 * 1920 * 1088 * 1.5 = 14.95MB
214 #define MVD4_VC1_FBSIZE_HDMIN1 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
215 #define MVD4_VC1_FBSIZE_SDMIN 0x2F7600 //5 * 720 * 576 * 1.5 = 2.97MB
216 #define MVD4_MPEG_FBSIZE_HDMIN 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
217 #define MVD4_MPEG_FBSIZE_SDMIN 0x25F800 //4 * 720 * 576 * 1.5 = 2.38MB
218
219 #define _IS_VC1(x) ((x==E_MVD_CODEC_VC1_ADV) || (x==E_MVD_CODEC_VC1_MAIN))
220
221 #define SLQ_ENTRY_LEN 8 //8-byte per entry
222
223 #define MVD_U32_MAX 0xffffffffUL
224 #define MVD_U64_MAX 0xffffffffffffffffULL
225 #define MVD_GENERAL_MAX ((size_t)(-1))
226
227 #define MAX_ADD_28BIT 0x0fffffffUL
228
229 #define SLQ_ADDR_LEN SLQ_TBL_ENTRY_LEN //Slq address length is the same as SlqTbl
230
231 //Initial value for PTS table
232 #define _INIT_ADDR MVD_U32_MAX
233 #define _INIT_LEN 0
234 #define _INIT_TIMESTAMP MVD_U32_MAX
235 #define _INIT_ID MVD_U32_MAX
236
237 #define _MS_TO_90K(x) (x*90) //ms ==> 90k counter
238 #define _90K_TO_MS(x) ((x!=MVD_U32_MAX)?(x/90):(x)) //90k counter ==> ms
239
240 #define MVD_DBG_STS(x) {}
241 #define _SLQTBL_DUMP_PTS FALSE//TRUE
242 #define _SLQTBL_DUMP_PUSHQ FALSE//TRUE
243 #define _SLQTBL_DUMP_PKT FALSE//TRUE
244 #define MVD_TURBO_INIT FALSE//TRUE
245
246 #define SLQ_ENTRY_MAX 1024
247 #define SLQ_ENTRY_LEN 8 //8-byte per entry
248 #define SLQ_TBL_SIZE (SLQ_ENTRY_MAX * SLQ_ENTRY_LEN)
249 #define ES_TBL_SIZE (SLQ_ENTRY_MAX * 8) //8-byte per entry
250
251 #define MVD_FW_SLQTBL_PTS_LEN 32
252
253 #define SLQ_TBL_SAFERANGE (40*SLQ_ENTRY_LEN)
254 //this should be smaller than FW's lookup range (current it's 16 entries)
255
256 #define SLQTBL_CHECKVACANCY_WATERLEVEL (44*SLQ_ENTRY_LEN)
257
258
259 #define DIVX_PATTERN 0x63643030
260 #define FLV_PATTERN 0xffff0000
261 #define MPEG_PATTERN_0 0xC6010000 //this SC just for mpeg2/4
262 #if SLQ_NEW_PUSH
263 #define SLQ_PIC_START_FLAG 0x40000000
264 #define VC1_PATTERN 0x0D010000
265 #define RCV_PATTERN 0xFF00A55A
266 #endif
267 #define VC1_PATTERN_0 0xff010000
268 #define VC1_PATTERN_1 0x0000ffff
269 #define VC1_PATTERN_2 0xffffff01
270 #define VC1_PATTERN_3 0x0000ffee
271
272 #define RCV_PATTERN_0 0x00000000
273 #define RCV_PATTERN_1 0xffffffff
274 #define RCV_PATTERN_2 0x00000000
275 #define RCV_PATTERN_3 0xeeeeeeee
276
277 #define DUMMY_PATTERN 0xBE010000
278 #define DUMMY_SIZE 0x2000 //8K
279
280 #define END_PATTERN_0 0xFF010000
281 #define END_PATTERN_1 0xDDCCBBAA
282 #define END_PATTERN_2 0xBBAAFFEE
283 #define END_PATTERN_3 0xFFEEDDCC
284 #define END_PATTERN_SIZE 256
285
286 #define SKIP_PATTERN_0 0xc5010000
287 #define SKIP_PATTERN_1 0x270608ab
288 #define SKIP_PATTERN_SIZE 8
289
290 #define CMD_TIMEOUT_MS 500
291 #define SKIP_DATA_TIMEOUT_MS 15
292
293 //Length of internal buffers
294 #define MVD_FW_IAP_BUF_LEN (0x4000UL) // 16k
295 #define MVD_FW_DP_BUF_LEN (0x80000UL) //512k
296 #define MVD_FW_MV_BUF_LEN (0x48000UL) //288K
297 //Alignment of HW buffers start address
298 #define MVD_FW_IAP_BUF_ALIGN (0x4000UL) // 16k
299 #define MVD_FW_DP_BUF_ALIGN (0x8000UL) // 32k
300 #define MVD_FW_MV_BUF_ALIGN (0x8000UL) // 32k
301
302 //Three HW buffers are allocated after framebuffer, so we need to
303 //consider these buffers when checking the available framebuffer size/number.
304 #define MVD_HW_BUF_TOTAL_LEN (MVD_FW_IAP_BUF_LEN + MVD_FW_DP_BUF_LEN + MVD_FW_MV_BUF_LEN) //u32HWBuffTotalSize
305
306 #define MVD_FW_CODE_LEN (OFFSET_BASE)//refer to the define in mvd4_interface.h
307 #define MVD_FW_CODE_LEN_V00 (0x70000UL) //length for old layout
308 #define MVD_FW_MPOOL_START_OFFSET (0x90000UL) //576K
309 #define MVD_FW_TASK_OFFSET (0x100000UL) //1M
310
311 #define MVD3_FW_VOL_INFO_BUF_LEN (0x1000UL) // 4K
312 #define MVD3_FW_FRAME_INFO_BUF_LEN (0x1000UL) // 4K
313 #define MVD3_FW_DIVX_INFO_BUF_LEN (0x1000UL) // 4K
314 #define MVD3_FW_USER_DATA_BUF_LEN (0x4000UL) // 16K
315 #define MVD3_FW_USER_DATA_BUF_BACKUP_LEN MVD3_FW_USER_DATA_BUF_LEN // 16K
316 #define MVD3_FW_SLQ_TAB_TMPBUF_LEN (0x200UL)
317 #define MVD_FW_SLQTBL_PTS_BUF_LEN (SLQ_ENTRY_MAX*MVD_FW_SLQTBL_PTS_LEN)
318 #define MVD_FW_DYN_SCALE_BUF_LEN (0x2000UL) // 8K
319 #define MVD_FW_SCALER_INFO_BUF_LEN (0x100UL) // 256bytes reserved
320 #define MVD_FW_DECFRM_INFO_BUF_LEN (0x100UL) // 256bytes reserved
321 #define MVD_FW_VBBU_TABLE_LEN (0x2000UL) // 8K
322
323 #define MVD_FW_USER_DATA_HDR_LEN (6)
324 #define MVD_FW_USER_DATA_PKT_LEN (256)
325 #define MVD_FW_USER_DATA_EXT_HDR_LEN (16)
326 #define FW_BUFF_ALIGN (0x1000) //4k align
327
328 #define SLQ_ENTRY_MAX 1024
329 #define MVD_FW_SLQTBL_PTS_LEN 32
330 #define MVD_NULLPKT_PTS MVD_U32_MAX
331
332 #define MVD_HW_MAX_PIXEL (1920*1088*61000ULL) // FHD@60p
333
334 //Get the start address, and the next start address.
335 #define GET_FW_BUFFADD(cur, size, start) \
336 do { \
337 start = cur; \
338 cur += size; \
339 } while(0)
340
341 //Get the aligned start address, and the next start address.
342 #define GET_FW_BUFFADD_ALIGN(cur, align, size, alignStart) \
343 do { \
344 cur = (MemAlign(cur, align)); \
345 GET_FW_BUFFADD(cur, size, alignStart); \
346 } while(0)
347
348 //Init command arguments
349 #define SETUP_CMDARG(x) \
350 do { \
351 x.Arg0 = 0; \
352 x.Arg1 = 0; \
353 x.Arg2 = 0; \
354 x.Arg3 = 0; \
355 x.Arg4 = 0; \
356 x.Arg5 = 0; \
357 } while(0)
358
359 //Set command arguments
360 #define SET_CMDARG(cmd, u32val, u8Num) \
361 do { \
362 cmd.Arg0 = L_WORD(u32val); \
363 cmd.Arg1 = H_WORD(u32val); \
364 cmd.Arg2 = L_DWORD(u32val); \
365 cmd.Arg3 = H_DWORD(u32val); \
366 cmd.Arg4 = 0; \
367 cmd.Arg5 = u8Num; \
368 } while(0)
369
370 #define SET_CMD_RET_FALSE(_cmdVal, _pStcmdArg) \
371 do { \
372 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
373 { \
374 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal)); \
375 return FALSE; \
376 } \
377 } while(0)
378
379 #define SET_CMD_RET_VOID(_cmdVal, _pStcmdArg) \
380 do { \
381 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
382 { \
383 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal)); \
384 return; \
385 } \
386 } while(0)
387
388 #define HAL_MVD_InvalidBuffRetFalse(x) \
389 do { \
390 if ((x)==0) \
391 { \
392 MVD_DEBUGERROR(MVD_PRINT("%s(%d) error: NULL buffer address.\n", __FUNCTION__, __LINE__)); \
393 return FALSE; \
394 } \
395 } while(0)
396
397 #define _MVD_Memset(pDstAddr, u32value, u32Size) \
398 do { \
399 MS_U32 x = 0; \
400 for (x = 0; x < (u32Size/4); x=x+4) \
401 { \
402 HAL_MVD_Memset4Byte(pDstAddr+x,u32value); \
403 } \
404 HAL_MVD_CPU_Sync(); \
405 HAL_MVD_ReadMemory(); \
406 } while (0)
407
408 #define _MVD_MemResetBit(pDstAddr, mask_num) \
409 do{ \
410 *pDstAddr = (*pDstAddr) & (~(0x1<<mask_num)); \
411 }while(0) \
412
413
414 typedef enum
415 {
416 MVD_HKSLQ_GET_READPTR = 0,
417 MVD_HKSLQ_GET_WRITEPTR = 1,
418 MVD_HKSLQ_NONE = 2,
419 } MVD_HKSLQ_CMD;
420
421 #if SLQ_NEW_PUSH
422 typedef struct _MVD_SLQ_STATUS
423 {
424 MS_BOOL bSlqPicStart;
425 MS_BOOL bSlqPicCollect;
426 MS_BOOL bSlqPicWaitNextStart;
427 MS_BOOL bSlqFireRdy;
428 MS_BOOL bSlqCtrlBit;
429 MS_BOOL bSlqEnLastFrameShow;
430 MS_VIRT u32SlqPatternAddr;
431 MS_U32 u32SlqPushLength;
432 MS_VIRT u32VaildWptrAddr;
433 } MVD_SLQ_STATUS;
434 #endif
435
436 typedef struct _MVD_SLQ_TBL_ST
437 {
438 MS_VIRT u32StAdd;
439 MS_VIRT u32EndAdd;
440 MS_U32 u32EntryCntMax;
441
442 MS_VIRT u32RdPtr;
443 MS_VIRT u32WrPtr;
444 MS_VIRT u32Empty;
445 MS_VIRT* pu32LastEntry;
446 } MVD_SLQ_TBL_ST;
447
448 typedef struct _MVD_ALIVEInfo
449 {
450 MS_U32 u32decode_count;
451 MS_U32 u32searchbuf_count;
452 MS_U32 u32searchcode_count;
453 MS_U32 u32prebuf_count;
454 MS_U32 u32vfifobuf_count;
455 MS_U32 u32searchheader_count;
456 MS_U32 u32flashpattern_count;
457 MS_U32 u32IdleCount;
458 } MVD_ALIVEInfo;
459
460
461 typedef struct _MVD_SLQ_ES_ST
462 {
463 MS_VIRT u32StAdd;
464 MS_VIRT u32EndAdd;
465
466 MS_VIRT u32RdPtr;
467 MS_VIRT u32WrPtr;
468 } MVD_SLQ_ES_ST;
469
470 typedef struct _MVD_FWBuff
471 {
472 MS_VIRT pu8MVDGetVolBufStart;
473 MS_VIRT u32VolAdd;
474 MS_VIRT pu8MVDGetFrameInfoBufStart;
475 MS_VIRT pu8MVDSetHeaderBufStart;
476 MS_VIRT u32UserDataBuf;
477 MS_VIRT u32MVDFWSLQTABTmpbufAdr;
478 MS_VIRT u32MVDFWPtsTblAddr;
479 MS_VIRT u32DynScalingAdd;
480 MS_VIRT u32ScalerInfoAdd;
481 MS_VIRT u32DecFrmInfoAdd;
482 MS_VIRT u32VBBUTableAdd;
483 } MVD_FWBuff;
484
485 typedef enum _FW_BUFF_TYPE
486 {
487 FW_BUFF_VOLINFO,
488 FW_BUFF_FRMINFO,
489 FW_BUFF_HDR,
490 FW_BUFF_USRDATA,
491 FW_BUFF_SLQTBL,
492 FW_BUFF_FWSLQTAB,
493 FW_BUFF_PTSTBL,
494 FW_BUFF_DS,
495 FW_BUFF_XCINFO,
496 FW_BUFF_DECFRMINFO,
497 } FW_BUFF_TYPE;
498
499 typedef struct _MVD_SLQTBLInfo
500 {
501 MS_U32 u32LastPts; ///< record the last PTS to handle the repeat case
502 MS_U32 u32DummyPktCnt; ///< accumulated dummy packet counter
503 MS_U32 u32SlqByteCnt; ///< accumulated byte counter
504 MS_VIRT u32ESBuffEnd; ///< miu offset of ES buffer end, used for report TS read/write ptr.
505 MS_VIRT u32FileEndPtr; ///< write ptr of file-end
506 MS_VIRT u32PreEsRd; ///< previous ES read ptr
507 MS_VIRT u32PreEsWr; ///< previous ES write ptr
508 MS_BOOL bRdyToFireCmd; ///< TRUE after FW is ready to update write pointer
509 MS_BOOL bSlqTblHasValidData; ///< TRUE if the write ptr is not updated
510 MS_BOOL bEnSlqTblHkCtrl;
511 BDMA_CpyType bdmaCpyType;
512 MVD_SLQ_STATUS* pSlqStatus;
513 MVD_SLQ_TBL_ST* pDrvSlqTbl;
514 MVD_SLQ_ES_ST* pDrvEsTbl;
515 MVD_SLQ_ES_ST* pDrvDivxTbl;
516 } MVD_SLQTBLInfo;
517
518 //Only keep one record of MIU setting since there should be only one,
519 //even for multiple decoders.
520 typedef struct _MVDMiuCfg
521 {
522 MS_PHY u32Miu1BaseAddr;
523 MS_PHY u32Miu2BaseAddr;
524 MS_PHY u32Miu3BaseAddr;
525 MS_U8 u8FWMiuSel;
526 MS_U8 u8HWMiuSel;
527 } MVDMiuCfg;
528
529 typedef struct
530 {
531 MS_U64 u64PTS;
532 MS_U32 u32POC;
533 MS_U8 u8FrameType;
534 } MVD_PVR_Seamless_Info;
535
536 typedef enum
537 {
538 E_MVD_DEC_0 = 0,
539 E_MVD_DEC_1,
540 E_MVD_DEC_MAX
541 } MVD_DecNum;
542 #ifdef VDEC3
543 #define MAX_DEC_NUM 16
544 #else
545 #define MAX_DEC_NUM E_MVD_DEC_MAX
546 #endif
547
548 //-------------------------------------------------------------------------------------------------
549 // Local Structures
550 //-------------------------------------------------------------------------------------------------
551
552
553 //-------------------------------------------------------------------------------------------------
554 // Global Variables
555 //-------------------------------------------------------------------------------------------------
556 static MS_VIRT u32RiuBaseAdd = 0;
557 MS_U8 _u8HalDbgLevel = 0;
558 #ifdef VDEC3//#ifdef VDEC3
559 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX};
560 #else
561 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX};
562 #endif
563 static MS_U8 u8SHMMiuSel=0;
564 #if 0
565 static MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
566 static MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
567 static MVD_FWCfg stFwCfg[MAX_DEC_NUM];
568
569 // For SLQ table link
570 static MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
571 static MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
572 static MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
573 static MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
574 static MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
575 static FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
576
577 MS_BOOL bSlqTblHKCtrl = FALSE; //read/write pointer can be accessed by HK directly
578 static MS_BOOL bStopped = TRUE;
579
580 static HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM] = {
581 {E_HAL_MVD_MAIN_STREAM0, FALSE},
582 {E_HAL_MVD_SUB_STREAM0, FALSE},
583 //{E_HAL_MVD_SUB_STREAM1, FALSE},
584 };
585 static MVD_FWBuff stFWBuff[MAX_DEC_NUM];
586 #endif
587
588 #define FRM_RATE_CODE_NUM 9
589
590 typedef struct
591 {
592 MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
593 MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
594 MVD_FWCfg stFwCfg[MAX_DEC_NUM];
595
596 // For SLQ table link
597 MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
598 MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
599 MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
600 MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
601 MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
602 FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
603
604 MS_BOOL bSlqTblHKCtrl[MAX_DEC_NUM]; //read/write pointer can be accessed by HK directly
605 MS_BOOL bStopped[MAX_DEC_NUM];
606
607 HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM];
608
609 MVD_FWBuff stFWBuff[MAX_DEC_NUM];
610
611 #if _SLQTBL_DUMP_PKT
612 MS_U32 u32SendTimes[MAX_DEC_NUM];//HAL_MVD_SLQTblSendPacket
613 #endif
614
615 MS_U32 u32pqTimes[MAX_DEC_NUM];//HAL_MVD_PushQueue
616 MS_BOOL bSetSkip[MAX_DEC_NUM];//MVD_FlushTSQueue
617
618 MS_U32 u32PreVdCnt[MAX_DEC_NUM];//HAL_MVD_DbgDump
619 MS_U32 u32PreErrCnt[MAX_DEC_NUM];
620 MS_BOOL b1stDump[MAX_DEC_NUM];
621 //pre_set
622 HAL_MVD_Pre_Ctrl gMVDPreCtrl[MAX_DEC_NUM];
623 MS_BOOL bAutoInsertDummyPattern[MAX_DEC_NUM];
624 MVDMiuCfg stMiuCfg;
625 MS_BOOL bDropOnePTS[MAX_DEC_NUM];
626 MVD_ALIVEInfo aliveInfo[MAX_DEC_NUM];
627
628 MS_U32 u32DmxFrameRate[MAX_DEC_NUM];
629 MS_U32 u32DmxFrameRateBase[MAX_DEC_NUM];
630 MS_BOOL bCMAUsed;
631
632 struct CMA_Pool_Init_Param cmaInitParam; // support two MIU
633 struct CMA_Pool_Free_Param cmaFreeParam[MAX_DEC_NUM];
634 MS_BOOL bCMATwoMIU[MAX_DEC_NUM];
635 MS_U32 u32LastAliveTime[MAX_DEC_NUM];
636 MS_BOOL bTrickPlay2xAVSync[MAX_DEC_NUM];
637 } MVD_Hal_CTX;
638
639 //global variables
640 MVD_Hal_CTX* pMVDHalContext = NULL;
641 MVD_Hal_CTX gMVDHalContext;
642 const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
643 {
644 NULL,23976,24000,25000,29976,30000,50000,59947,60000
645 };
646
647
648 #define GET_VOL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetVolBufStart
649 #define GET_VOL_BUFFADD_NONCACHE(idx) pMVDHalContext->stFWBuff[(idx)].u32VolAdd
650 #define GET_FRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetFrameInfoBufStart
651 #define GET_HDR_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDSetHeaderBufStart
652 #define GET_USRDATA_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32UserDataBuf
653 #define GET_SLQ_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWSLQTABTmpbufAdr
654 #define GET_PTSTBL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWPtsTblAddr
655 #define GET_DS_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DynScalingAdd
656 #define GET_XCINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32ScalerInfoAdd
657 #define GET_DECFRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DecFrmInfoAdd
658 #define GET_VBBUTABLEADD(idx) pMVDHalContext->stFWBuff[(idx)].u32VBBUTableAdd
659
660
661
662 //-------------------------------------------------------------------------------------------------
663 // Local Variables
664 //-------------------------------------------------------------------------------------------------
665
666
667 //-------------------------------------------------------------------------------------------------
668 // Debug Functions
669 //-------------------------------------------------------------------------------------------------
670
671
672 //-------------------------------------------------------------------------------------------------
673 // Local Functions
674 //-------------------------------------------------------------------------------------------------
675
HAL_MVD_Context_Init(void)676 static void HAL_MVD_Context_Init(void)
677 {
678 #ifdef VDEC3
679 MS_U8 i;
680
681 for (i = 0; i < MAX_DEC_NUM; i++)
682 {
683 pMVDHalContext->bStopped[i] = TRUE;
684 pMVDHalContext->b1stDump[i] = TRUE;
685 pMVDHalContext->_stMVDStream[i].eStreamId = E_HAL_MVD_N_STREAM0 + i;
686 }
687 #else
688 pMVDHalContext->bStopped[0] = TRUE;
689 pMVDHalContext->bStopped[1] = TRUE;
690 pMVDHalContext->_stMVDStream[0].eStreamId = E_HAL_MVD_MAIN_STREAM0;
691 pMVDHalContext->_stMVDStream[1].eStreamId = E_HAL_MVD_SUB_STREAM0;
692
693 pMVDHalContext->b1stDump[0] = TRUE;
694 pMVDHalContext->b1stDump[1] = TRUE;
695 #endif
696 }
697
698
699
HAL_MVD_SetIsUsed(MS_U8 u8Idx,MS_BOOL bUsed)700 static void HAL_MVD_SetIsUsed(MS_U8 u8Idx, MS_BOOL bUsed)
701 {
702 pMVDHalContext->_stMVDStream[u8Idx].bUsed = bUsed;
703 }
704
705 //Given the start address & the available size for the FW buffers,
706 //return the address of each buffers.
707 //Now only support u8Size==1, 2, 4
MVD_GetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size)708 static MS_U32 MVD_GetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size)
709 {
710 MS_U32 u32Val = 0;
711 MS_VIRT u32BufStart = NULL;
712 switch (eBuffType)
713 {
714 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
715 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
716 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
717 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
718 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
719 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
720 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
721 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
722 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
723 default:
724 break;
725 }
726 if (NULL == u32BufStart)
727 {
728 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
729 __FUNCTION__, u8Idx, eBuffType, u16Offset, u8Size);
730 return 0;
731 }
732
733 if (u8Size == sizeof(MS_U8))
734 {
735 u32Val = (MS_U32)HAL_MVD_MemReadByte(u32BufStart+u16Offset);
736 }
737 else if (u8Size == sizeof(MS_U32))
738 {
739 u32Val = HAL_MVD_MemRead4Byte(u32BufStart+u16Offset);
740 }
741 else if (u8Size == sizeof(MS_U16))
742 {
743 u32Val = HAL_MVD_MemRead2Byte(u32BufStart+u16Offset);
744 }
745
746 MVD_DEBUGVERBAL(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
747 __FUNCTION__, u32Val, u8Idx, eBuffType, u16Offset, u8Size));
748 return u32Val;
749 }
750
751 #ifdef VDEC3
MVD_SetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size,MS_U32 u32Value)752 static void MVD_SetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size, MS_U32 u32Value)
753 {
754 MS_VIRT u32BufStart = NULL;
755
756 switch (eBuffType)
757 {
758 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
759 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
760 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
761 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
762 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
763 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
764 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
765 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
766 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
767 default:
768 break;
769 }
770
771 if (NULL == u32BufStart)
772 {
773 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
774 __FUNCTION__, (unsigned int)u8Idx,(unsigned int) eBuffType,(unsigned int) u16Offset,(unsigned int) u8Size,(unsigned int)u32Value);
775 }
776
777 if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
778 {
779 u32BufStart += HAL_MIU1_BASE;
780 }
781 /* else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
782 {
783 u32BufStart += HAL_MIU2_BASE;
784 }*/
785
786 if (u8Size == sizeof(MS_U8))
787 {
788 MS_U8* temp = (MS_U8*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
789 *temp = (MS_U8)u32Value;
790 }
791 else if (u8Size == sizeof(MS_U32))
792 {
793 MS_U32* temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
794 *temp = (MS_U32)u32Value;
795 }
796 else if (u8Size == sizeof(MS_U16))
797 {
798 MS_U16* temp = (MS_U16*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
799 *temp = (MS_U16)u32Value;
800 }
801
802 MVD_DEBUGVERBAL(MVD_PRINT("%s: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
803 __FUNCTION__, (unsigned int)u8Idx, (unsigned int)eBuffType, (unsigned int)u16Offset, (unsigned int)u8Size,(unsigned int)u32Value));
804 }
805 #endif
806
807
808 //-------------------------------------------------------------------------------------------------
809 // Global Functions
810 //-------------------------------------------------------------------------------------------------
HAL_MVD_SetDbgLevel(MS_U8 level)811 void HAL_MVD_SetDbgLevel(MS_U8 level)
812 {
813 _u8HalDbgLevel = level;
814 return;
815 }
816
817
HAL_MVD_GetCaps(void)818 MS_U8 HAL_MVD_GetCaps(void)
819 {
820 MS_U8 caps = 0;
821
822 caps |= (MVD_SUPPORT_MPEG2|MVD_SUPPORT_MPEG4|MVD_SUPPORT_VC1);
823 return caps;
824 }
825
HAL_MVD_GetMaxPixel(MS_U32 u32Id)826 MS_U64 HAL_MVD_GetMaxPixel(MS_U32 u32Id)
827 {
828 return (MS_U64)MVD_HW_MAX_PIXEL/1000;
829 }
830
HAL_MVD_GetDrvFwVer(void)831 MS_U32 HAL_MVD_GetDrvFwVer(void)
832 {
833 return MVD_FW_VERSION;
834 }
835
836 #if 0
837 MS_U32 HAL_MVD_GetMiu1BaseAdd(void)
838 {
839 return MIU1_BASEADDR;
840 }
841 #endif
842
843 //#if defined(CHIP_MUJI)
HAL_MVD_GetMiu1BaseAdd(void)844 MS_VIRT HAL_MVD_GetMiu1BaseAdd(void)
845 {
846 return MIU1_BASEADDR;
847 }
848
HAL_MVD_GetFWSelMiu1(void)849 MS_BOOL HAL_MVD_GetFWSelMiu1(void)
850 {
851 return MVDCPU_ON_MIU1;
852 }
853 //#endif
854
855
HAL_MVD_GetFWSelMiu(void)856 MS_U8 HAL_MVD_GetFWSelMiu(void)
857 {
858 return pMVDHalContext->stMiuCfg.u8FWMiuSel;
859 }
860
861
862
HAL_MVD_MemGetMap(MS_U8 u8Idx,MS_U8 u8type,MS_VIRT * pu32addr,MS_SIZE * pu32len)863 void HAL_MVD_MemGetMap(MS_U8 u8Idx, MS_U8 u8type, MS_VIRT* pu32addr, MS_SIZE* pu32len)
864 {
865 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
866 MS_VIRT u32StartOffset;
867 MS_U8 u8MiuSel;
868
869 switch (u8type)
870 {
871 case E_MVD_MMAP_ALL:
872 case E_MVD_MMAP_FW:
873 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FWCodeAddr);
874 *pu32addr = u32StartOffset;
875 *pu32len = pstMemCfg->u32FWCodeSize;
876 break;
877 case E_MVD_MMAP_BS:
878 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32BSAddr);
879 *pu32addr = u32StartOffset;
880 *pu32len = pstMemCfg->u32BSSize;
881 break;
882 case E_MVD_MMAP_FB:
883 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FBAddr);
884 *pu32addr = u32StartOffset;
885 *pu32len = pstMemCfg->u32FBSize;
886 break;
887 case E_MVD_MMAP_DRV:
888 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32DrvBufAddr);
889 *pu32addr = u32StartOffset;
890 *pu32len = pstMemCfg->u32DrvBufSize;
891 break;
892 default:
893 break;
894 }
895
896 MVD_DEBUGINFO(MVD_PRINT("HAL_MVD_MemGetMap[%d] add=0x%lx len=0x%lx\n",u8type,(unsigned long)*pu32addr,(unsigned long)*pu32len));
897 return;
898 }
899
HAL_MVD_RegSetBase(MS_VIRT u32Base)900 void HAL_MVD_RegSetBase(MS_VIRT u32Base)
901 {
902 u32RiuBaseAdd = u32Base;
903 HAL_VPU_EX_InitRegBase(u32Base);
904 }
905
HAL_MVD_RegWriteByte(MS_VIRT u32Reg,MS_U8 u8Val)906 void HAL_MVD_RegWriteByte(MS_VIRT u32Reg, MS_U8 u8Val)
907 {
908 if ( __builtin_constant_p( u32Reg ) )
909 {
910 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val;
911 }
912 else
913 {
914 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
915 }
916 }
917
HAL_MVD_RegReadByte(MS_VIRT u32Reg)918 MS_U8 HAL_MVD_RegReadByte(MS_VIRT u32Reg)
919 {
920 return (__builtin_constant_p( u32Reg ) ?
921 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) :
922 (RIU8[(u32Reg << 1) - (u32Reg & 1)]));
923 }
924
HAL_MVD_RegWriteBit(MS_VIRT u32Reg,MS_BOOL bEnable,MS_U8 u8Mask)925 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask)
926 {
927 MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
928 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) :
929 (RIU8[u32Reg8] & ~(u8Mask));
930 }
931
HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg,MS_U8 u8Val,MS_U8 u8Msk)932 void HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg, MS_U8 u8Val, MS_U8 u8Msk)
933 {
934 MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
935 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk));
936 }
937
HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg,MS_U32 u32Val)938 void HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg, MS_U32 u32Val)
939 {
940 if ( __builtin_constant_p( u32Reg ) && !((u32Reg) & 0x01) )
941 {
942 RIU[u32Reg] = (MS_U16)(u32Val);
943 RIU[(u32Reg) + 2] = (MS_U16)((u32Val) >> 16);
944 }
945 else
946 {
947 if (u32Reg & 0x01)
948 {
949 RIU8[(u32Reg << 1) - 1] = u32Val;
950 RIU[u32Reg + 1] = (u32Val >> 8);
951 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24);
952 }
953 else
954 {
955 RIU[u32Reg] = u32Val;
956 RIU[u32Reg + 2] = (u32Val >> 16);
957 }
958 }
959 }
960
961
HAL_MVD_MemRead4Byte(MS_VIRT u32Address)962 MS_U32 HAL_MVD_MemRead4Byte(MS_VIRT u32Address)
963 {
964 volatile MS_U32 u32Val;
965 MS_ASSERT(!(u32Address & 0x03UL));
966
967 HAL_MVD_CPU_Sync();
968 HAL_MVD_ReadMemory();
969
970 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
971
972 u32Val = *(volatile MS_U32*) HAL_MVD_PA2NonCacheSeg(u32Address);
973
974 //MVD_PRINT("mvd rd 0x%lx = 0x%lx\n", u32Address, u32Val);
975 return u32Val;
976 }
977
HAL_MVD_MemRead2Byte(MS_VIRT u32Address)978 MS_U16 HAL_MVD_MemRead2Byte(MS_VIRT u32Address)
979 {
980 MS_VIRT u32ReadAddr;
981 MS_U32 u32ReadValue;
982 MS_U16 u16Value;
983 MS_U8 u8Shift;
984 u32ReadAddr = (u32Address >> 2) << 2;
985 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
986 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
987
988 u16Value = (MS_U16)(u32ReadValue >> u8Shift);
989 if(u8Shift == 24)
990 {
991 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr+4);
992 u16Value = u16Value << 8 || (MS_U16)(u32ReadValue & 0xFF);
993 }
994 return u16Value;
995 }
996
HAL_MVD_MemReadByte(MS_VIRT u32Address)997 MS_U8 HAL_MVD_MemReadByte(MS_VIRT u32Address)
998 {
999 MS_VIRT u32ReadAddr;
1000 MS_U32 u32ReadValue;
1001 MS_U8 u8Value;
1002 MS_U8 u8Shift;
1003 u32ReadAddr = (u32Address >> 2) << 2;
1004 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
1005 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1006 u8Value = (MS_U8)(u32ReadValue >> u8Shift);
1007
1008 return u8Value;
1009 }
1010
HAL_MVD_MemWrite4Byte(MS_VIRT u32Address,MS_U32 u32Value)1011 MS_BOOL HAL_MVD_MemWrite4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1012 {
1013
1014 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1015
1016 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1017
1018 HAL_MVD_CPU_Sync();
1019 HAL_MVD_FlushMemory();
1020
1021 return TRUE;
1022 }
1023
HAL_MVD_MemWriteByte(MS_VIRT u32Address,MS_U8 u8Value)1024 MS_BOOL HAL_MVD_MemWriteByte(MS_VIRT u32Address, MS_U8 u8Value)
1025 {
1026 MS_VIRT u32ReadAddr;
1027 MS_U32 u32ReadValue;
1028 MS_U8 u8Shift;
1029
1030 u32ReadAddr = (u32Address >> 2) << 2;
1031 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8);
1032 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1033 u32ReadValue &= ~(0xFFUL << u8Shift);
1034 u32ReadValue |= ((MS_U32)u8Value << u8Shift);
1035 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1036 return TRUE;
1037 }
1038
HAL_MVD_MemWrite2Byte(MS_VIRT u32Address,MS_U16 u16Value)1039 MS_BOOL HAL_MVD_MemWrite2Byte(MS_VIRT u32Address, MS_U16 u16Value)
1040 {
1041 MS_VIRT u32ReadAddr;
1042 MS_U32 u32ReadValue;
1043 MS_U8 u8Shift;
1044
1045 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8) ;
1046 if(u8Shift < 24)
1047 {
1048 u32ReadAddr = (u32Address >> 2) << 2;
1049 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1050 u32ReadValue &= ~(0xFFFF << u8Shift);
1051 u32ReadValue |= ((MS_U32)u16Value << u8Shift);
1052 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1053 }
1054 else
1055 {
1056 HAL_MVD_MemWriteByte(u32Address, (MS_U8)(u16Value));
1057 HAL_MVD_MemWriteByte(u32Address+1, (MS_U8)(u16Value >> 8));
1058 }
1059 return TRUE;
1060 }
1061
1062
HAL_MVD_SetReqMask(MS_BOOL bEnMask)1063 void HAL_MVD_SetReqMask(MS_BOOL bEnMask)
1064 {
1065 HAL_VPU_EX_MIU_RW_Protect(bEnMask);
1066
1067 if (MVDHW_ON_MIU1) // miu1
1068 {
1069 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W
1070 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W
1071 }
1072 else // miu0
1073 {
1074 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W
1075 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W
1076 }
1077 HAL_MVD_Delayms(1);
1078
1079 return;
1080 }
1081
HAL_MVD_Memset4Byte(MS_VIRT u32Address,MS_U32 u32Value)1082 static MS_BOOL HAL_MVD_Memset4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1083 {
1084 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1085
1086 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1087
1088 return TRUE;
1089 }
1090
1091 //------------------------------------------------------------------------------
1092 /// Initialize MVD
1093 /// @return -result of resetting MVD hardware
1094 //------------------------------------------------------------------------------
HAL_MVD_RstHW(void)1095 MS_BOOL HAL_MVD_RstHW(void)
1096 {
1097 MS_U32 u32Time = 0;
1098
1099 #if defined(MSOS_TYPE_ECOS)
1100 if(MsOS_In_Interrupt() != TRUE)
1101 {
1102 OSAL_MVD_IntDisable();
1103 OSAL_MVD_LockHwMutex();
1104 }
1105 #else
1106 OSAL_MVD_LockHwMutex();
1107 #endif
1108
1109 HAL_MVD_SetReqMask(ENABLE);
1110
1111 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU
1112 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset
1113
1114 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD
1115 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset
1116
1117 u32Time = HAL_MVD_GetTime();
1118 while ( ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == 0)
1119 && ((HAL_MVD_GetTime() - u32Time) < 200) );
1120
1121 #if 0 //bring up
1122 MVD_PRINT("====================>>>>MVD Ctrl status1.5a : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1123 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset
1124 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_1);//release reset
1125 MVD_DEBUGINFO(MVD_PRINT("MVD Ctrl status : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS)));
1126 MVD_PRINT("====================>>>>MVD Ctrl status1.5b : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1127 #endif
1128
1129 HAL_MVD_SetReqMask(DISABLE);
1130
1131 #if defined(MSOS_TYPE_ECOS)
1132 if(MsOS_In_Interrupt() != TRUE)
1133 {
1134 OSAL_MVD_UnlockHwMutex();
1135 OSAL_MVD_IntEnable();
1136 }
1137 #else
1138 OSAL_MVD_UnlockHwMutex();
1139 #endif
1140
1141 return TRUE;
1142 }
1143
1144
1145 //------------------------------------------------------------------------------
1146 /// Release CPU
1147 /// @return -release CPU successfully or not
1148 //------------------------------------------------------------------------------
HAL_MVD_ReleaseFW(void)1149 MS_BOOL HAL_MVD_ReleaseFW(void)
1150 {
1151 //For dual decoder, we only release VPU if it is not released yet.
1152 if (TRUE == HAL_VPU_EX_IsRsted())
1153 {
1154 MVD_DEBUGINFO(MVD_PRINT("%s VPU_IsRsted\n", __FUNCTION__));
1155 return TRUE;
1156 }
1157
1158 HAL_VPU_EX_SwRstRelse();
1159 return TRUE;
1160 }
1161
HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)1162 MS_VIRT HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)
1163 {
1164 return MS_PA2KSEG1(u32PhyAddr);
1165 }
1166
HAL_MVD_GetTime(void)1167 MS_U32 HAL_MVD_GetTime(void)
1168 {
1169 return MsOS_GetSystemTime();
1170 }
1171
HAL_MVD_Delayms(MS_U32 u32msecs)1172 void HAL_MVD_Delayms(MS_U32 u32msecs)
1173 {
1174 MsOS_DelayTask(u32msecs);
1175 }
1176
HAL_MVD_CPU_Sync(void)1177 void HAL_MVD_CPU_Sync(void)
1178 {
1179 MAsm_CPU_Sync();
1180 }
1181
HAL_MVD_FlushMemory(void)1182 void HAL_MVD_FlushMemory(void)
1183 {
1184 MsOS_FlushMemory();
1185 }
1186
HAL_MVD_ReadMemory(void)1187 void HAL_MVD_ReadMemory(void)
1188 {
1189 MsOS_ReadMemory();
1190 }
1191
1192 //Record the memory layout from system configuration
HAL_MVD_SetMEMCfg(MS_U8 u8Idx,MVD_MEMCfg * pMEMCfg)1193 MS_BOOL HAL_MVD_SetMEMCfg(MS_U8 u8Idx, MVD_MEMCfg* pMEMCfg)
1194 {
1195 memcpy(&(pMVDHalContext->stMemCfg[u8Idx]), pMEMCfg, sizeof(MVD_MEMCfg));
1196 //record the MIU settings
1197 pMVDHalContext->stMiuCfg.u32Miu1BaseAddr = pMEMCfg->u32Miu1BaseAddr;
1198 pMVDHalContext->stMiuCfg.u32Miu2BaseAddr = pMEMCfg->u32Miu2BaseAddr;
1199 pMVDHalContext->stMiuCfg.u32Miu3BaseAddr = pMEMCfg->u32Miu3BaseAddr;
1200 pMVDHalContext->stMiuCfg.u8FWMiuSel = pMEMCfg->u8FWMiuSel;
1201 pMVDHalContext->stMiuCfg.u8HWMiuSel = pMEMCfg->u8HWMiuSel;
1202 return TRUE;
1203 }
1204
HAL_MVD_GetMEMCfg(MS_U8 u8Idx)1205 MVD_MEMCfg* HAL_MVD_GetMEMCfg(MS_U8 u8Idx)
1206 {
1207 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1208 MVD_MEMCfg* pInfo = NULL;
1209 pInfo = &(pMVDHalContext->stMemCfg[u8Idx]);
1210 return pInfo;
1211 }
1212
HAL_MVD_SetFWCfg(MS_U8 u8Idx,MVD_FWCfg * pFWCfg)1213 MS_BOOL HAL_MVD_SetFWCfg(MS_U8 u8Idx, MVD_FWCfg* pFWCfg)
1214 {
1215 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1216 memcpy(&(pMVDHalContext->stFwCfg[u8Idx]), pFWCfg, sizeof(MVD_FWCfg));
1217 memcpy(&(pMVDHalContext->stFwCfg[u8Idx].stFBReduction), &pFWCfg->stFBReduction,sizeof(MVD_FB_Reduction));
1218 return TRUE;
1219 }
1220
HAL_MVD_GetFWCfg(MS_U8 u8Idx)1221 MVD_FWCfg* HAL_MVD_GetFWCfg(MS_U8 u8Idx)
1222 {
1223 MVD_FWCfg* pInfo = NULL;
1224 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1225 pInfo = &(pMVDHalContext->stFwCfg[u8Idx]);
1226 return pInfo;
1227 }
1228
HAL_MVD_GetFBMode(MS_U8 u8Idx)1229 MS_U8 HAL_MVD_GetFBMode(MS_U8 u8Idx)
1230 {
1231 MS_U8 u8Mode = MVD3_SD_MODE;
1232 u8Mode = pMVDHalContext->stFwCfg[u8Idx].u8FBMode;
1233 MVD_DEBUGINFO(MVD_PRINT("FBMode=0x%x\n", u8Mode));
1234 return u8Mode;
1235 }
1236
HAL_MVD_GetCodecType(MS_U8 u8Idx)1237 MVD_CodecType HAL_MVD_GetCodecType(MS_U8 u8Idx)
1238 {
1239 MVD_CodecType eCodecType = E_MVD_CODEC_UNKNOWN;
1240 eCodecType = pMVDHalContext->stFwCfg[u8Idx].eCodecType;
1241 return eCodecType;
1242 }
1243
HAL_MVD_GetSrcMode(MS_U8 u8Idx)1244 MVD_SrcMode HAL_MVD_GetSrcMode(MS_U8 u8Idx)
1245 {
1246 MVD_SrcMode eSrcMode = E_MVD_SRC_UNKNOWN;
1247 eSrcMode = pMVDHalContext->stFwCfg[u8Idx].eSrcMode;
1248 return eSrcMode;
1249 }
1250
HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)1251 MS_BOOL HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)
1252 {
1253 if(pMVDHalContext != NULL)
1254 {
1255 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = mode;
1256 return TRUE;
1257 }
1258 else
1259 {
1260 return FALSE;
1261 }
1262 }
1263
1264
HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)1265 MVD_CtrlCfg* HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)
1266 {
1267 MVD_CtrlCfg* pInfo = NULL;
1268 pInfo = &(pMVDHalContext->stCtrlCfg[u8Idx]);
1269 return pInfo;
1270 }
1271
HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)1272 MVD_SLQTBLInfo* HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)
1273 {
1274 MVD_SLQTBLInfo* pInfo = NULL;
1275 pInfo = &(pMVDHalContext->stSlqTblInfo[u8Idx]);
1276 return pInfo;
1277 }
1278
HAL_MVD_PowerCtrl(MS_BOOL bOn)1279 void HAL_MVD_PowerCtrl(MS_BOOL bOn)
1280 {
1281 #ifdef CONFIG_MSTAR_CLKM
1282 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD, bOn);
1283 #else
1284 HAL_MVD_RegWriteBit(REG_CKG_MVD_ENABLE, bOn, CKG_MVD_ENABLE_GATED);
1285 HAL_MVD_RegWriteBit(REG_CKG_MVD_ENABLE, bOn, CKG_MVD_PAS_ENABLE_GATED);
1286
1287 HAL_MVD_RegWriteByteMask(REG_CKG_MVD, CKG_MVD_288MHZ, CKG_MVD_MASK);
1288 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_GATED);
1289 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_INVERT);
1290 #endif
1291 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_GATED);
1292 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_INVERT);
1293
1294 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_GATED);
1295 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_INVERT);
1296
1297 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_GATED);
1298 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_INVERT);
1299
1300 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_GATED);
1301 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_INVERT);
1302
1303 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_GATED);
1304 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_INVERT);
1305
1306 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_GATED);
1307 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_INVERT);
1308
1309 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_GATED);
1310 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_INVERT);
1311
1312 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_GATED);
1313 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_INVERT);
1314
1315 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_GATED);
1316 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_INVERT);
1317
1318 return;
1319 }
1320
1321 #if 0
1322 void HAL_MVD_Sleep(MS_U32 u32us)
1323 {
1324 MsOS_DelayTaskUs(u32us);
1325 }
1326 #endif
HAL_MVD_ResetHandShake(MS_U8 u8Idx,MVD_HANDSHAKE_CMD cmd)1327 void HAL_MVD_ResetHandShake(MS_U8 u8Idx, MVD_HANDSHAKE_CMD cmd)
1328 {
1329 MS_U32 u32BufAddr = GET_FRMINFO_BUFFADD(u8Idx);
1330 HAL_MVD_CPU_Sync();
1331 HAL_MVD_ReadMemory();
1332 MVD_CMD_HANDSHADE_INDEX u32CmdState;
1333 u32CmdState.value= HAL_MVD_MemRead4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX);
1334 switch (cmd)
1335 {
1336 case MVD_HANDSHAKE_PAUSE:
1337 (u32CmdState.mvdcmd_handshake_pause) = 0;
1338 break;
1339 case MVD_HANDSHAKE_SLQ_RST:
1340 (u32CmdState.mvdcmd_handshake_slq_reset) = 0;
1341 break;
1342 case MVD_HANDSHAKE_STOP:
1343 (u32CmdState.mvdcmd_handshake_stop) = 0;
1344 break;
1345 case MVD_HANDSHAKE_SKIP_DATA:
1346 (u32CmdState.mvdcmd_handshake_skip_data) = 0;
1347 break;
1348 case MVD_HANDSHAKE_SINGLE_STEP:
1349 (u32CmdState.mvdcmd_handshake_single_step) = 0;
1350 break;
1351 case MVD_HANDSHAKE_SCALER_INFO:
1352 (u32CmdState.mvdcmd_handshake_scaler_data_ready) = 0;
1353 break;
1354 case MVD_HANDSHAKE_GET_NXTDISPFRM:
1355 (u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready) = 0;
1356 break;
1357 case MVD_HANDSHAKE_PARSER_RST:
1358 (u32CmdState.mvdcmd_handshake_parser_rst) = 0;
1359 break;
1360 case MVD_HANDSHAKE_RST_CC608:
1361 (u32CmdState.mvdcmd_handshake_cc608_rst) = 0;
1362 break;
1363 case MVD_HANDSHAKE_RST_CC708:
1364 (u32CmdState.mvdcmd_handshake_cc708_rst) = 0;
1365 break;
1366 case MVD_HANDSHAKE_VIRTUAL_COMMAND:
1367 (u32CmdState.mvdcmd_handshake_virtualCommand) = 0;
1368 break;
1369 case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
1370 (u32CmdState.mvdcmd_handshake_flush) = 0;
1371 break;
1372 case MVD_HANDSHAKE_VSYNC_CONTROL:
1373 (u32CmdState.mvdcmd_handshake_vsync_control) = 0;
1374 break;
1375 default:
1376 break;
1377 }
1378 HAL_MVD_MemWrite4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX,u32CmdState.value);
1379 MsOS_FlushMemory();
1380 }
1381
1382 //------------------------------------------------------------------------------
1383 /// Wait MVD command ready or timeout
1384 /// @return -MVD command ready or timeout
1385 //------------------------------------------------------------------------------
HAL_MVD_TimeOut(MS_U8 u8Idx)1386 MS_BOOL HAL_MVD_TimeOut(MS_U8 u8Idx)
1387 {
1388 MS_U32 i;
1389 MS_U32 u32StartTime = MsOS_GetSystemTime();
1390
1391 for ( i = 0; i < MVD_PollingTimes; i++ )
1392 {
1393 ///- wait until MVD command ready or timeout
1394 if ( ( HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY ) == MVD_STATUS_READY )
1395 {
1396 return FALSE;
1397 }
1398
1399 if (/*(TRUE == pMVDHalContext->bStopped[u8Idx]) ||*/ ((MsOS_GetSystemTime()-u32StartTime)>1300))
1400 {
1401 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
1402 return TRUE;
1403 }
1404
1405 //HAL_MVD_Sleep(5);
1406 }
1407 MVD_DEBUGERROR( MVD_PRINT("MVD_TimeOut=%x\n", i) );
1408 return TRUE;
1409 }
1410
1411 //------------------------------------------------------------------------------
1412 /// Set MVD firmware command
1413 /// @param -u8cmd \b IN : MVD command
1414 /// @param -pstCmdArg \b IN : pointer to command argument
1415 //------------------------------------------------------------------------------
HAL_MVD_MVDCommand(MS_U8 u8cmd,MVD_CmdArg * pstCmdArg)1416 MS_BOOL HAL_MVD_MVDCommand ( MS_U8 u8cmd, MVD_CmdArg *pstCmdArg )
1417 {
1418 MS_BOOL bRet = TRUE;
1419 #ifdef VDEC3
1420 MS_U32 u32CmdArg;
1421 MS_U32 u32Ret = FALSE;
1422 MS_U32 u32Timeout;
1423 MS_U8 u8HalIdx = pstCmdArg->Arg5;
1424 MS_U32 u32Id = MVD_GetStreamId(u8HalIdx);
1425 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1426 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8HalIdx);
1427 CMD_QUEUE *pShm = (CMD_QUEUE *)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + VCOMMANDQ_INFO_START + u8VPUIdx*0x100000);
1428 MS_VIRT u32BufStart2 = NULL;
1429 MS_BOOL bResponse = FALSE;
1430 #endif
1431 #if defined(MSOS_TYPE_ECOS)
1432 if(MsOS_In_Interrupt() != TRUE)
1433 {
1434 OSAL_MVD_IntDisable();
1435 OSAL_MVD_LockHwMutex();
1436 }
1437 #else
1438 OSAL_MVD_LockHwMutex();
1439 #endif
1440
1441
1442 #ifdef VDEC3
1443 if(HAL_MVD_IsDisplayCommand(u8cmd) == TRUE)
1444 {
1445 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1446 {
1447 // clear handshake dram
1448 u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1449
1450 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1451
1452 MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1453
1454 *temp2 = 0;
1455
1456 MsOS_FlushMemory();
1457 }
1458
1459
1460 u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1461
1462 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1463
1464 do
1465 {
1466 u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1467
1468
1469 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1470 {
1471 bRet = FALSE;
1472 break;
1473 }
1474 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1475 {
1476 bRet = FALSE;
1477 break;
1478 }
1479 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1480
1481 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1482 {
1483 bRet = FALSE;
1484 goto _CMD_DONE;
1485 }
1486
1487
1488 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1489
1490 do
1491 {
1492 u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1493
1494 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1495 {
1496 bRet = FALSE;
1497 break;
1498 }
1499 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1500 {
1501 bRet = FALSE;
1502 break;
1503 }
1504 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1505
1506 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1507 {
1508 bRet = FALSE;
1509 goto _CMD_DONE;
1510 }
1511
1512 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1513 {
1514 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1515
1516 while(MsOS_GetSystemTime() < u32Timeout)
1517 {
1518 #if 0
1519 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1520 {
1521 bResponse = TRUE;
1522 break;
1523 }
1524 #else
1525 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1526 {
1527 bResponse = TRUE;
1528 break;
1529 }
1530 #endif
1531 }
1532
1533 if(bResponse == FALSE) // fail case
1534 {
1535 bRet = FALSE;
1536 goto _CMD_DONE;
1537 }
1538
1539 pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1540 pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1541 pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1542 pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1543 pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1544 }
1545
1546 }
1547 else if(HAL_MVD_IsNormalCommand(u8cmd) == TRUE)
1548 {
1549 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1550 {
1551 // clear handshake dram
1552 u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1553
1554 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1555
1556 MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1557
1558 *temp2 = 0;
1559
1560 MsOS_ReadMemory();
1561 MsOS_FlushMemory();
1562 }
1563
1564 u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1565
1566 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1567
1568 do
1569 {
1570 //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_ARG,u32CmdArg);
1571 u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1572
1573 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1574 {
1575 bRet = FALSE;
1576 break;
1577 }
1578 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1579 {
1580 bRet = FALSE;
1581 break;
1582 }
1583 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1584
1585
1586 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1587 {
1588 bRet = FALSE;
1589 goto _CMD_DONE;
1590 }
1591
1592
1593 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1594 do
1595 {
1596 //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_CMD,u8cmd|(pstCmdArg->Arg5<<24)|(pstCmdArg->Arg4<<16));
1597 u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1598
1599 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1600 {
1601 bRet = FALSE;
1602 break;
1603 }
1604 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1605 {
1606 bRet = FALSE;
1607 break;
1608 }
1609 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1610
1611 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1612 {
1613 bRet = FALSE;
1614 goto _CMD_DONE;
1615 }
1616
1617 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1618 {
1619 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1620
1621 while(MsOS_GetSystemTime() < u32Timeout)
1622 {
1623 #if 0
1624 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1625 {
1626 bResponse = TRUE;
1627 break;
1628 }
1629 #else
1630 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1631 {
1632 bResponse = TRUE;
1633 break;
1634 }
1635 #endif
1636 }
1637
1638 if(bResponse == FALSE) // fail case
1639 {
1640 bRet = FALSE;
1641 goto _CMD_DONE;
1642 }
1643
1644 pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1645 pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1646 pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1647 pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1648 pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1649 }
1650 }
1651 else
1652 #endif
1653 {
1654 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1655 {
1656 bRet = FALSE;
1657 goto _CMD_DONE;
1658 }
1659
1660 HAL_MVD_RegWriteByte(MVD_ARG0, pstCmdArg->Arg0);
1661 HAL_MVD_RegWriteByte(MVD_ARG1, pstCmdArg->Arg1);
1662 HAL_MVD_RegWriteByte(MVD_ARG2, pstCmdArg->Arg2);
1663 HAL_MVD_RegWriteByte(MVD_ARG3, pstCmdArg->Arg3);
1664 HAL_MVD_RegWriteByte(MVD_ARG4, pstCmdArg->Arg4);
1665 HAL_MVD_RegWriteByte(MVD_ARG5, pstCmdArg->Arg5);
1666 HAL_MVD_RegWriteByte(MVD_COMMAND, u8cmd);
1667 if ((CMD_GET_AFD != u8cmd) && (CMD_SLQ_GET_TBL_RPTR != u8cmd) &&
1668 (CMD_SLQ_UPDATE_TBL_WPTR != u8cmd) && (CMD_GET_NEXTDISPFRM != u8cmd) &&
1669 (CMD_DECODE_STATUS != u8cmd) && (CMD_RD_PTS != u8cmd) &&
1670 (CMD_GET_INT_STAT != u8cmd) && (CMD_RD_IO != u8cmd))
1671 {
1672 MVD_DEBUG_FWCMD(MVD_PRINT("MVD_CMD: %x; %x, %x, %x, %x, %x, %x\n", u8cmd, pstCmdArg->Arg0,
1673 pstCmdArg->Arg1, pstCmdArg->Arg2, pstCmdArg->Arg3, pstCmdArg->Arg4, pstCmdArg->Arg5));
1674 }
1675
1676 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1677 {
1678 bRet = FALSE;
1679 goto _CMD_DONE;
1680 }
1681
1682 pstCmdArg->Arg0 = HAL_MVD_RegReadByte(MVD_ARG0);
1683 pstCmdArg->Arg1 = HAL_MVD_RegReadByte(MVD_ARG1);
1684 pstCmdArg->Arg2 = HAL_MVD_RegReadByte(MVD_ARG2);
1685 pstCmdArg->Arg3 = HAL_MVD_RegReadByte(MVD_ARG3);
1686 pstCmdArg->Arg4 = HAL_MVD_RegReadByte(MVD_ARG4);
1687 pstCmdArg->Arg5 = HAL_MVD_RegReadByte(MVD_ARG5);
1688 }
1689
1690 _CMD_DONE:
1691 #if defined(MSOS_TYPE_ECOS)
1692 if(MsOS_In_Interrupt() != TRUE)
1693 {
1694 OSAL_MVD_UnlockHwMutex();
1695 OSAL_MVD_IntEnable();
1696 }
1697 #else
1698 OSAL_MVD_UnlockHwMutex();
1699 #endif
1700
1701
1702 if (!bRet)
1703 {
1704 MVD_DEBUG_FWCMD(MVD_PRINT("%s timeout dump pc\n", __FUNCTION__));
1705 MS_U32 x=0;
1706 for (x=0; x<30; x++)
1707 MVD_DEBUG_FWCMD(MVD_PRINT("0x%x\n", HAL_VPU_EX_GetProgCnt()));
1708 MVD_DEBUG_FWCMD(MVD_PRINT("###\n"));
1709 }
1710
1711 return bRet;
1712 }
1713
HAL_MVD_SetSyncClk(MS_BOOL bEnable)1714 void HAL_MVD_SetSyncClk(MS_BOOL bEnable)
1715 {
1716 MS_ASSERT(0==bEnable);//Notice: Euclid & T3 have no sync_mode; Bit4 must be 0.
1717
1718 #if defined(MSOS_TYPE_ECOS)
1719 if(MsOS_In_Interrupt() != TRUE)
1720 {
1721 OSAL_MVD_IntDisable();
1722 OSAL_MVD_LockHwMutex();
1723 }
1724 #else
1725 OSAL_MVD_LockHwMutex();
1726 #endif
1727 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE);
1728 #if defined(MSOS_TYPE_ECOS)
1729 if(MsOS_In_Interrupt() != TRUE)
1730 {
1731 OSAL_MVD_UnlockHwMutex();
1732 OSAL_MVD_IntEnable();
1733 }
1734 #else
1735 OSAL_MVD_UnlockHwMutex();
1736 #endif
1737
1738 return;
1739 }
1740
HAL_MVD_InitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)1741 MS_BOOL HAL_MVD_InitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)
1742 {
1743 //Set MVD Clock @ reg_CHIPTOP
1744 HAL_MVD_PowerCtrl(ENABLE);
1745 #ifdef CONFIG_MSTAR_CLKM
1746 if(eDecType == E_VPU_EX_DECODER_MVD)
1747 {
1748 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, ENABLE);
1749 }
1750 if(SourceType == E_VPU_EX_INPUT_TSP)
1751 {
1752 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, ENABLE);
1753 }
1754 #endif
1755
1756 #ifdef CONFIG_MSTAR_SRAMPD
1757 HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, ENABLE, SRAM_SD_EN_MVD);
1758 HAL_MVD_Delayms(1);
1759 #endif
1760
1761 //Set MVD Clock aync
1762 HAL_MVD_SetSyncClk(DISABLE);
1763
1764 //MVD reset
1765 if(!HAL_MVD_RstHW())
1766 {
1767 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW failed\n"));
1768 return FALSE;
1769 }
1770 else
1771 {
1772 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW success\n"));
1773 }
1774
1775 return TRUE;
1776 }
1777
1778
1779 //------------------------------------------------------------------------------
1780 /// Get MVD firmware version
1781 /// @return -firmware version
1782 //------------------------------------------------------------------------------
HAL_MVD_GetFWVer(MS_U32 u32VpuSid)1783 MS_U32 HAL_MVD_GetFWVer(MS_U32 u32VpuSid)
1784 {
1785 #if 0
1786 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_FW);
1787 #else
1788 //UNUSED(u32VpuSid);
1789 MVD_CmdArg mvdcmd;
1790
1791 SETUP_CMDARG(mvdcmd);
1792 mvdcmd.Arg5 = HAL_VPU_EX_GetTaskId(u32VpuSid);
1793 if (HAL_MVD_MVDCommand( CMD_GET_FW_VERSION, &mvdcmd ) == FALSE)
1794 {
1795 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_GET_FW_VERSION ) );
1796 return 0;
1797 }
1798 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1799 #endif
1800 }
1801
1802 //------------------------------------------------------------------------------
1803 /// Get MVD firmware interface version
1804 /// @return -firmware interface version
1805 //------------------------------------------------------------------------------
HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)1806 MS_U32 HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)
1807 {
1808 #if 0
1809 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_IF);
1810 #else
1811 UNUSED(u32VpuSid);
1812 MVD_CmdArg mvdcmd;
1813
1814 SETUP_CMDARG(mvdcmd);
1815 if (HAL_MVD_MVDCommand( CMD_INTERFACE_VERSION, &mvdcmd ) == FALSE)
1816 {
1817 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_INTERFACE_VERSION ) );
1818 return 0;
1819 }
1820 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1821 #endif
1822 }
1823
1824 //------------------------------------------------------------------------------
1825 /// Check MVD firmware status
1826 /// @return -firmware is ready or not
1827 //------------------------------------------------------------------------------
1828
1829 #ifdef VDEC3
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1830 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1831 {
1832 MS_U32 u32Id = MVD_GetStreamId(u32VpuSid);
1833 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1834 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u32VpuSid);
1835 MS_U32 u32TimeOut = MsOS_GetSystemTime() + 500;
1836 unsigned int* pVersion = (unsigned int*)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + OFFSET_BASE + u8VPUIdx*0x100000);
1837 MS_BOOL ret = FALSE;
1838
1839 while(MsOS_GetSystemTime() < u32TimeOut)
1840 {
1841 if(((*pVersion) == FW_VERSION) && ((*(pVersion+4)) == INTERFACE_VERSION))
1842 {
1843 ret = TRUE;
1844 break;
1845 }
1846 }
1847
1848 if (ret == FALSE)
1849 {
1850 MVD_ERROR(MVD_PRINT("MVD f/w header version is wrong,%x,%x,%x,%x\n",(*(pVersion+4)), INTERFACE_VERSION,(*pVersion), FW_VERSION));
1851 }
1852
1853 return ret;
1854 }
1855
1856 #else
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1857 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1858 {
1859 MS_U32 u32TimeOut = 2000;
1860
1861 //check firmware version consistent with header file
1862 while ((INTERFACE_VERSION != HAL_MVD_GetFWIfVer(u32VpuSid)) && (--u32TimeOut));
1863 if (u32TimeOut == 0)
1864 {
1865 MVD_ERROR(MVD_PRINT("MVD_FW_IF_Version=%lx inconsistent with header file(%x)!\n",
1866 HAL_MVD_GetFWIfVer(u32VpuSid), INTERFACE_VERSION));
1867 return FALSE;
1868 }
1869
1870 if (FW_VERSION != HAL_MVD_GetFWVer(u32VpuSid))
1871 {
1872 MVD_DEBUGINFO(MVD_PRINT("Warning! FWBinVer(%lx) != FWHdrVer(%x)\n", HAL_MVD_GetFWVer(u32VpuSid), FW_VERSION));
1873 }
1874 MVD_DEBUGINFO(MVD_PRINT("MVD version Interface = %x, FW = %x\n", INTERFACE_VERSION, FW_VERSION));
1875
1876 return TRUE;
1877 }
1878 #endif
_DumpCtrl(MS_U8 u8Idx)1879 MS_BOOL _DumpCtrl(MS_U8 u8Idx)
1880 {
1881 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1882
1883 //MVD_PRINT("u32VA=0x%lx, PA=0x%x\n", u32VA, pstMemCfg->u32FWCodeAddr);
1884 struct _ctl_info *ctl_ptr = (struct _ctl_info *)
1885 HAL_MVD_PA2NonCacheSeg(pstMemCfg->u32FWCodeAddr + CTL_INFO_ADDR);
1886 MS_U32 u32timeout = HAL_MVD_GetTime() + 1000;//u32HVDCmdTimeout;
1887
1888 HAL_MVD_ReadMemory();
1889
1890 MVD_DEBUGINFO(MVD_PRINT("version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1891 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1892
1893 while (CTL_TASK_CMDRDY != ctl_ptr->statue)
1894 {
1895 if (HAL_MVD_GetTime() > u32timeout)
1896 {
1897 MVD_DEBUGERROR(MVD_PRINT("CTRL timeout!!! %d\n", __LINE__));
1898 return FALSE;
1899 }
1900 }
1901
1902 MVD_DEBUGINFO(MVD_PRINT("Version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1903 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1904
1905 MS_U8 i;
1906
1907 for (i = 0; i < 4; i++)
1908 {
1909 MVD_DEBUGINFO(MVD_PRINT("%s: Task %d, status=%d\n", __FUNCTION__, i, ctl_ptr->task_statue[i]));
1910 }
1911 return TRUE;
1912 }
1913
1914
MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)1915 static VPU_EX_SourceType MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)
1916 {
1917 VPU_EX_SourceType eVpuSrcType = E_VPU_EX_INPUT_NONE;
1918 switch (eSrcMode)
1919 {
1920 case E_MVD_TS_MODE:
1921 case E_MVD_TS_FILE_MODE:
1922 eVpuSrcType = E_VPU_EX_INPUT_TSP;
1923 break;
1924
1925 case E_MVD_SLQ_TBL_MODE:
1926 case E_MVD_SLQ_MODE:
1927 case E_MVD_FILE_MODE:
1928 eVpuSrcType = E_VPU_EX_INPUT_FILE;
1929 break;
1930
1931 case E_MVD_SRC_UNKNOWN:
1932 default:
1933 break;
1934 }
1935 return eVpuSrcType;
1936 }
1937
MVD_GetTaskInfo(VPU_EX_TaskInfo * pstTaskInfo,MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1938 static void MVD_GetTaskInfo(VPU_EX_TaskInfo* pstTaskInfo, MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1939 {
1940 pstTaskInfo->u32Id = (u8Idx << 8 | eVpuId);
1941 pstTaskInfo->eDecType = E_VPU_EX_DECODER_MVD;
1942 pstTaskInfo->eVpuId = eVpuId;
1943 pstTaskInfo->eSrcType = MVD_MapVpuSrcType(HAL_MVD_GetSrcMode(u8Idx));
1944 pstTaskInfo->u32HeapSize = MVD_DRAM_SIZE;
1945 }
1946
HAL_MVD_CreateTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId,MS_BOOL bShareBBU)1947 MS_BOOL HAL_MVD_CreateTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId, MS_BOOL bShareBBU)
1948 {
1949 MS_BOOL bRet = FALSE;
1950 MS_BOOL bFWdecideFB = FALSE;
1951 MVD_FWCfg* pstCfg = HAL_MVD_GetFWCfg(u8Idx);
1952 HAL_VPU_EX_SetFWReload(!(pstCfg->bNotReload));
1953
1954 MVD_DEBUGINFO(MVD_PRINT("\n\n Create Task(%x)!!!\n", u8Idx));
1955 VPU_EX_TaskInfo stTaskInfo;
1956 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
1957
1958 VPU_EX_FWCodeCfg stVpuFWCfg;
1959 VPU_EX_NDecInitPara stVpuInitPara;
1960 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1961 stVpuInitPara.pTaskInfo = &stTaskInfo;
1962 stVpuInitPara.pVLCCfg = NULL;
1963
1964 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1965 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1966 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1967 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1968 stVpuFWCfg.u32DstSize = pMemCfg->u32FWCodeSize;
1969 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
1970
1971 #ifdef VDEC3
1972 VPU_EX_FBCfg pFBCfg;
1973 stVpuInitPara.pFBCfg = &pFBCfg;
1974
1975 if(pMVDHalContext->bCMAUsed == TRUE)
1976 {
1977 stVpuInitPara.pFBCfg->u32FrameBufAddr = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_miu_start_offset;
1978 stVpuInitPara.pFBCfg->u32FrameBufSize = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_length;
1979 bFWdecideFB = TRUE;
1980
1981 }
1982 stTaskInfo.u8HalId = u8Idx;
1983 pMVDHalContext->_stMVDStream[u8Idx].u32SLQId = HAL_VPU_EX_GetBBUId(stTaskInfo.u32Id, &stTaskInfo, bShareBBU);
1984 if(pMVDHalContext->_stMVDStream[u8Idx].u32SLQId == HAL_VPU_INVALID_BBU_ID)
1985 {
1986 MVD_DEBUGINFO(MVD_PRINT("ERROR!!!MVD GetBBU Id Fail \n"));
1987 }
1988 else
1989 {
1990 bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara, bFWdecideFB, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId);
1991 }
1992
1993 if(bRet == FALSE)
1994 {
1995 if(!HAL_VPU_EX_FreeBBUId(stTaskInfo.u32Id, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId, &stTaskInfo))
1996 {
1997 MVD_DEBUGERROR(MVD_PRINT("[%s][%d]ERROR!!! Free BBU Id Fail !!!\n",__FUNCTION__,__LINE__));
1998 }
1999 }
2000 #else
2001 bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara);
2002 #endif
2003 MVD_DEBUGINFO(MVD_PRINT(" Create Task!!! bRet=%x ###\n\n", bRet));
2004 _DumpCtrl(u8Idx);
2005
2006 return bRet;
2007 }
2008
HAL_MVD_DeleteTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)2009 MS_BOOL HAL_MVD_DeleteTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
2010 {
2011 MS_BOOL bRet = FALSE;
2012 MVD_DEBUGINFO(MVD_PRINT("\n\n Delete Task(%x)!!!\n", u8Idx));
2013
2014 VPU_EX_TaskInfo stTaskInfo;
2015 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
2016
2017 VPU_EX_FWCodeCfg stVpuFWCfg;
2018 VPU_EX_NDecInitPara stVpuInitPara;
2019 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
2020 stVpuInitPara.pTaskInfo = &stTaskInfo;
2021
2022 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2023 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
2024 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
2025 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
2026 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
2027
2028 #ifdef VDEC3
2029 if(!HAL_VPU_EX_FreeBBUId(stTaskInfo.u32Id, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId, &stTaskInfo))
2030 {
2031 MVD_DEBUGINFO(MVD_PRINT("ERROR!!! Free BBU Id Fail !!!\n"));
2032 }
2033 #endif
2034 bRet = HAL_VPU_EX_TaskDelete((MS_U32) eVpuId, &stVpuInitPara);
2035 MVD_DEBUGINFO(MVD_PRINT(" Delete Task!!! ###\n\n"));
2036 _DumpCtrl(u8Idx);
2037 return bRet;
2038 }
2039
HAL_MVD_InitFW(MS_U32 u32VpuSid)2040 MS_BOOL HAL_MVD_InitFW(MS_U32 u32VpuSid)
2041 {
2042 //to fix the timing issue of getting FWIfVer on Chakra2
2043 HAL_MVD_Delayms(1);
2044
2045 //check FW ready
2046 if ( !_MVD_Check_FW_Rdy(u32VpuSid))
2047 {
2048 MS_ASSERT(0);
2049 return FALSE;
2050 }
2051
2052 #if 0
2053 if(pMVDHalContext->_stMVDStream[0].bUsed == FALSE && pMVDHalContext->_stMVDStream[1].bUsed == FALSE) // no mvd is used
2054 {
2055 MVD_CmdArg mvdcmd;
2056 SETUP_CMDARG(mvdcmd);
2057 mvdcmd.Arg0 = 1; //reset mvd engine,if have only one mvd
2058 SET_DECNUM(mvdcmd, ((MS_U8)u32VpuSid));
2059 if (HAL_MVD_MVDCommand( CMD_SW_RESET, &mvdcmd ) == FALSE)
2060 {
2061 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SW_RESET ) );
2062 return FALSE;
2063 }
2064 }
2065 #endif
2066 return TRUE;
2067 }
2068
2069 #define _MVD_INIT_FAIL_RET() \
2070 do { \
2071 HAL_MVD_SetIsUsed(u8HalIdx, FALSE); \
2072 return FALSE; \
2073 } while (0)
2074
2075
HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType,MS_U32 u32VpuSid,MS_BOOL bShareBBU)2076 MS_BOOL HAL_MVD_Init(MS_U8 u8HalIdx, MVD_CodecType eCodecType, MS_U32 u32VpuSid, MS_BOOL bShareBBU)
2077 {
2078 //OSAL_MVD_MutexInit();
2079 MS_BOOL no_use = FALSE;
2080 MS_BOOL ret;
2081
2082 ret = MDrv_MVD_AUTH_IPCheck(eCodecType,&no_use);
2083 if(ret == FALSE)
2084 {
2085 return FALSE;
2086 }
2087
2088 if (!HAL_MVD_CreateTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid, bShareBBU))
2089 {
2090 _MVD_INIT_FAIL_RET();
2091 }
2092
2093 pMVDHalContext->bStopped[u8HalIdx] = FALSE;
2094
2095 if (!HAL_MVD_InitFW(u8HalIdx))
2096 {
2097 MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_InitFW(%x) failed\n", __FUNCTION__, u8HalIdx));
2098 if (!HAL_MVD_DeleteTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
2099 {
2100 MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_DeleteTask failed\n", __FUNCTION__));
2101 }
2102
2103 _MVD_INIT_FAIL_RET();
2104 }
2105 else
2106 {
2107 MVD_DEBUGINFO(MVD_PRINT("%s:HAL_MVD_InitFW(%x) success\n", __FUNCTION__, u8HalIdx));
2108 }
2109
2110 HAL_MVD_SetIsUsed(u8HalIdx, TRUE);
2111
2112 return TRUE;
2113 }
2114
2115 #define _MVD_CMDRDY ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == MVD_STATUS_READY)
2116 //------------------------------------------------------------------------------
2117 /// Check if MVD command is ready
2118 /// @return TRUE or FALSE
2119 /// - TRUE, Success to process the command
2120 /// - FALSE, Failed due to timeout
2121 //------------------------------------------------------------------------------
HAL_MVD_GetCmdRdy(void)2122 MS_BOOL HAL_MVD_GetCmdRdy(void)
2123 {
2124 MS_U32 timeoutTick = 2000;
2125
2126 while ((!_MVD_CMDRDY) && ((timeoutTick--)!=0));
2127
2128 if (0 == timeoutTick)
2129 return FALSE;
2130 else
2131 return TRUE;
2132 }
2133
HAL_MVD_CheckIdle(void)2134 MS_BOOL HAL_MVD_CheckIdle(void)
2135 {
2136 MS_BOOL bIsIdle = FALSE;
2137 MVD_CmdArg mvdcmd;
2138
2139 //issue CheckIdle command
2140 SETUP_CMDARG(mvdcmd);
2141 SET_CMD_RET_FALSE(CMD_MVD_IDLE, &mvdcmd);
2142
2143 bIsIdle = (mvdcmd.Arg0 == 1);
2144 if (HAL_MVD_GetCmdRdy())
2145 {
2146 return bIsIdle;
2147 }
2148 else
2149 {
2150 return FALSE;
2151 }
2152 }
2153
2154
_MVD_SoftRstHW(void)2155 static MS_BOOL _MVD_SoftRstHW(void)
2156 {
2157 return FALSE;
2158 }
2159
2160 //------------------------------------------------------------------------------
2161 /// Soft-reset MVD
2162 /// Ref AP note p.12 HK2MVD Reset Flow
2163 /// @return TRUE or FALSE
2164 /// - TRUE, Success to soft-reset MVD
2165 /// - FALSE, Failed. Need init MVD again.
2166 //------------------------------------------------------------------------------
HAL_MVD_SoftRstHW(void)2167 MS_BOOL HAL_MVD_SoftRstHW(void)
2168 {
2169 MS_U32 timetick = 2000;
2170
2171 if (HAL_MVD_GetCmdRdy())
2172 {
2173 //idle check
2174 while ((!HAL_MVD_CheckIdle()) && ((timetick--)!=0));
2175
2176 //either MVD is idle or timeout, do ENG/SLQ reset
2177 return _MVD_SoftRstHW(); //Reset HW engine
2178 }
2179 else
2180 {
2181 return FALSE; //here means "CPU hanging"
2182 }
2183 }
2184
2185 //------------------------------------------------------------------------------
2186 /// Clean the IRQ bit (in interrupt handler should call this function while the
2187 /// interrupt has been triggered.
2188 /// @param none
2189 /// @return none
2190 /// @internal
2191 //------------------------------------------------------------------------------
HAL_MVD_ClearIRQ(void)2192 void HAL_MVD_ClearIRQ(void)
2193 {
2194 //OSAL_MVD_LockHwMutex();
2195 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT);
2196 //OSAL_MVD_UnlockHwMutex();
2197 return;
2198 }
2199
2200 //------------------------------------------------------------------------------
2201 /// Set display speed.
2202 ///FW use (# of B frames) / (# of decode frames) < Ratio this formula to adjustment.
2203 ///Once if the ratio is 1, that means, whenever (#Bframes / #decoded) < 1, then
2204 ///FW would drop the B frame.
2205 ///In other words, once AP need to back to normal mode, AP have to set the arg0 to 0.
2206 //------------------------------------------------------------------------------
HAL_MVD_SetSpeed(MS_U8 u8Idx,MVD_SpeedType eSpeedType,MS_U8 u8Multiple)2207 MS_BOOL HAL_MVD_SetSpeed(MS_U8 u8Idx, MVD_SpeedType eSpeedType, MS_U8 u8Multiple)
2208 {
2209 MVD_CmdArg mvdcmd;
2210
2211 SETUP_CMDARG(mvdcmd);
2212
2213 if (E_MVD_SPEED_FAST == eSpeedType)
2214 mvdcmd.Arg0 = 1; //fast forward
2215 else if (E_MVD_SPEED_SLOW == eSpeedType)
2216 mvdcmd.Arg0 = 2; //slow motion
2217 else
2218 mvdcmd.Arg0 = 0; //normal speed
2219
2220 if (u8Multiple == 1)
2221 {
2222 mvdcmd.Arg0 = 0;
2223 //The only way to be NORMAL speed.
2224 }
2225
2226 mvdcmd.Arg1 = u8Multiple;
2227
2228 if(pMVDHalContext->bTrickPlay2xAVSync[u8Idx] == TRUE && eSpeedType == E_MVD_SPEED_FAST && u8Multiple == 2)
2229 {
2230 mvdcmd.Arg2 = 1;
2231 }
2232 else
2233 {
2234 mvdcmd.Arg2 = 0;
2235 }
2236
2237 SET_DECNUM(mvdcmd, u8Idx);
2238 SET_CMD_RET_FALSE(CMD_DISP_SPEED_CTRL, &mvdcmd);
2239 return TRUE;
2240 }
2241
2242 //------------------------------------------------------------------------------
2243 /// Set frame buffer address to MVD
2244 /// @param -u32addr \b IN : start address
2245 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8fbMode)2246 void HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8fbMode)
2247 {
2248 MVD_CmdArg mvdcmd;
2249 if(pMVDHalContext->bCMAUsed)
2250 {
2251 u8fbMode = MVD_CMA_MODE;
2252 }
2253
2254 if ((u32addr>>3) > MAX_ADD_28BIT)// TODO: fixme, in 64bits system, address may be more than 28 bits
2255 {
2256 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameBuffAddr: only support 28bit add!\n"));
2257 return;
2258 }
2259
2260 MS_ASSERT((u32addr%8)==0);
2261 u32addr >>= 3;
2262
2263 SETUP_CMDARG(mvdcmd);
2264 mvdcmd.Arg0 = L_WORD(u32addr);
2265 mvdcmd.Arg1 = H_WORD(u32addr);
2266 mvdcmd.Arg2 = L_DWORD(u32addr);
2267
2268 //Frame Buffer Mode Setting
2269 mvdcmd.Arg3 = u8fbMode | ((u32addr>>24)&0x0f);
2270 mvdcmd.Arg4 = u8fbMode & 0xff;
2271 MVD_DEBUGINFO(MVD_PRINT("FramebufferAdd 0x%lx, FB Mode 0x%x, arg3=0x%x\n", (unsigned long)u32addr, u8fbMode, mvdcmd.Arg3));
2272 SET_DECNUM(mvdcmd, u8Idx);
2273 if (HAL_MVD_MVDCommand( CMD_FB_BASE, &mvdcmd ) == FALSE)
2274 {
2275 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_BASE ) );
2276 return;
2277 }
2278
2279 return;
2280 }
2281
2282 //------------------------------------------------------------------------------
2283 /// Set header buffer address to MVD
2284 /// @param -u32addr \b IN : start address
2285 //------------------------------------------------------------------------------
HAL_MVD_SetHeaderBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2286 void HAL_MVD_SetHeaderBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2287 {
2288 MVD_CmdArg mvdcmd;
2289
2290 MS_ASSERT((u32addr%8)==0);
2291 u32addr >>= 3;
2292
2293 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2294 if (HAL_MVD_MVDCommand( CMD_HEADER_INFO_BUF, &mvdcmd ) == FALSE)
2295 {
2296 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_HEADER_INFO_BUF ) );
2297 }
2298 return;
2299 }
2300
2301 //------------------------------------------------------------------------------
2302 /// Set vol info buffer address to MVD
2303 /// @param -u32addr \b IN : start address
2304 //------------------------------------------------------------------------------
HAL_MVD_SetVolInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2305 void HAL_MVD_SetVolInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2306 {
2307 MVD_CmdArg mvdcmd;
2308
2309 MS_ASSERT((u32addr%8)==0);
2310 u32addr >>= 3;
2311
2312 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2313 if (HAL_MVD_MVDCommand( CMD_VOL_INFO_BUF, &mvdcmd ) == FALSE)
2314 {
2315 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VOL_INFO_BUF ) );
2316 }
2317 return;
2318 }
2319
2320 //------------------------------------------------------------------------------
2321 /// Set frame info buffer address to MVD
2322 /// @param -u32addr \b IN : start address
2323 //------------------------------------------------------------------------------
HAL_MVD_SetFrameInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2324 void HAL_MVD_SetFrameInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2325 {
2326 MVD_CmdArg mvdcmd;
2327
2328 MS_ASSERT((u32addr%8)==0);
2329 u32addr >>= 3;
2330
2331 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2332 if (HAL_MVD_MVDCommand( CMD_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
2333 {
2334 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRAME_INFO_BUF ) );
2335 }
2336 return;
2337 }
2338
2339 //------------------------------------------------------------------------------
2340 /// Set IAP buffer address to MVD
2341 /// @param -u32addr \b IN : start address
2342 //------------------------------------------------------------------------------
HAL_MVD_SetIAPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2343 void HAL_MVD_SetIAPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2344 {
2345 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2346 MVD_CmdArg mvdcmd;
2347 MS_ASSERT((u32addr%8192)==0);
2348 u32addr >>= 13;
2349
2350 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2351 mvdcmd.Arg4 = pstMemCfg->u8FBMiuSel;
2352 if (HAL_MVD_MVDCommand( CMD_IAP_BUF_START, &mvdcmd ) == FALSE)
2353 {
2354 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IAP_BUF_START ) );
2355 }
2356 return;
2357 }
2358
2359 //------------------------------------------------------------------------------
2360 /// Set Data Partition buffer address to MVD
2361 /// @param -u32addr \b IN : start address
2362 //------------------------------------------------------------------------------
HAL_MVD_SetDPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2363 void HAL_MVD_SetDPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2364 {
2365 MVD_CmdArg mvdcmd;
2366 MS_ASSERT((u32addr%8)==0);
2367 u32addr >>= 3;
2368
2369 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2370 if (HAL_MVD_MVDCommand( CMD_DP_BUF_START, &mvdcmd ) == FALSE)
2371 {
2372 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DP_BUF_START ) );
2373 }
2374 return;
2375 }
2376
2377 //------------------------------------------------------------------------------
2378 /// Set Motion Vector buffer address to MVD
2379 /// @param -u32addr \b IN : start address
2380 //------------------------------------------------------------------------------
HAL_MVD_SetMVBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2381 void HAL_MVD_SetMVBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2382 {
2383 MVD_CmdArg mvdcmd;
2384 MS_ASSERT((u32addr%2048)==0);
2385 u32addr >>= 3;
2386
2387 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2388 if (HAL_MVD_MVDCommand( CMD_MV_BUF_START, &mvdcmd ) == FALSE)
2389 {
2390 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_MV_BUF_START ) );
2391 }
2392 return;
2393 }
2394
_MVD_SetUserDataBufStart(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8arg3)2395 static void _MVD_SetUserDataBufStart(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8arg3)
2396 {
2397 MVD_CmdArg mvdcmd;
2398
2399 MS_ASSERT((u32addr%8)==0);
2400 u32addr >>= 3;
2401 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, (unsigned long)u32addr, u8arg3));
2402
2403 SETUP_CMDARG(mvdcmd);
2404 mvdcmd.Arg0 = L_WORD(u32addr);
2405 mvdcmd.Arg1 = H_WORD(u32addr);
2406 mvdcmd.Arg2 = L_DWORD(u32addr);
2407 mvdcmd.Arg4 = H_DWORD(u32addr);
2408 mvdcmd.Arg3 = u8arg3;
2409 SET_DECNUM(mvdcmd, u8Idx);
2410 if (HAL_MVD_MVDCommand( CMD_USER_BUF_START, &mvdcmd ) == FALSE)
2411 {
2412 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_START ) );
2413 return;
2414 }
2415 return;
2416 }
2417
_MVD_SetUserDataBufSize(MS_U8 u8Idx,MS_U32 u32size,MS_U8 u8arg3)2418 static void _MVD_SetUserDataBufSize(MS_U8 u8Idx, MS_U32 u32size, MS_U8 u8arg3)
2419 {
2420 MVD_CmdArg mvdcmd;
2421
2422 MS_ASSERT((u32size%8)==0);
2423 u32size >>= 3;
2424 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%x arg3=0x%x\n", __FUNCTION__, u32size, u8arg3));
2425
2426 SETUP_CMDARG(mvdcmd);
2427 mvdcmd.Arg0 = L_WORD(u32size);
2428 mvdcmd.Arg1 = H_WORD(u32size);
2429 mvdcmd.Arg2 = L_DWORD(u32size);
2430 mvdcmd.Arg4 = H_DWORD(u32size);
2431 mvdcmd.Arg3 = u8arg3;
2432 if(mvdcmd.Arg3 <= 1) //mean 608 and 708 in MM RVU
2433 {
2434 mvdcmd.Arg2 = 7;//ntsc1+ntsc2+atsc
2435 mvdcmd.Arg4 = 0;
2436 }
2437 SET_DECNUM(mvdcmd, u8Idx);
2438 if (HAL_MVD_MVDCommand( CMD_USER_BUF_SIZE, &mvdcmd ) == FALSE)
2439 {
2440 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_SIZE ) );
2441 return;
2442 }
2443 return;
2444 }
2445
2446 //------------------------------------------------------------------------------
2447 /// Set user data buffer address to MVD
2448 /// @param -u32addr \b IN : start address
2449 //------------------------------------------------------------------------------
HAL_MVD_SetUserDataBuf(MS_U8 u8Idx,MS_VIRT u32addr,MS_U32 u32size)2450 void HAL_MVD_SetUserDataBuf(MS_U8 u8Idx, MS_VIRT u32addr, MS_U32 u32size)
2451 {
2452 MS_U8 u8ccType = 0;
2453
2454 MS_ASSERT((u32addr%8)==0);
2455 MS_ASSERT((u32size%8)==0);
2456 #ifdef REDLION_LINUX_KERNEL_ENVI
2457 u8ccType = 2;
2458 #elif defined(MVD_SUPPORT_X4_CC)
2459 u8ccType = 4; //display order
2460 #else
2461 u8ccType = 2;// 2 for testing 0;
2462 #endif
2463
2464 #if defined(MVD_SUPPORT_X4_CC)
2465 //set decoding buffer address
2466 _MVD_SetUserDataBufStart(u8Idx, u32addr+u32size, 3);
2467 #endif
2468
2469 //set CC output buffer address
2470 _MVD_SetUserDataBufStart(u8Idx, u32addr, u8ccType);
2471
2472 #if defined(MVD_SUPPORT_X4_CC)
2473 //set decoding buffer size
2474 _MVD_SetUserDataBufSize(u8Idx, u32size, 3);
2475 #endif
2476
2477 //set CC output buffer size
2478 _MVD_SetUserDataBufSize(u8Idx, u32size, u8ccType);
2479
2480 return;
2481 }
2482
HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)2483 void HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
2484 {
2485 MVD_CmdArg mvdcmd;
2486 MS_U32 u32val = u32end>>3;
2487 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2488
2489 SET_CMDARG(mvdcmd, u32val, u8Idx);
2490 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_END, &mvdcmd ) == FALSE)
2491 {
2492 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_END ) );
2493 return;
2494 }
2495
2496 u32val = (u32start)>>3;
2497 SET_CMDARG(mvdcmd, u32val, u8Idx);
2498 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_START, &mvdcmd ) == FALSE)
2499 {
2500 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_START ) );
2501 return;
2502 }
2503
2504 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx OK!!!\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2505 return;
2506 }
2507
2508 //------------------------------------------------------------------------------
2509 /// Issue StepDisplay command.
2510 /// @return -TRUE for success; FALSE for failure.
2511 //------------------------------------------------------------------------------
HAL_MVD_StepDisp(MS_U8 u8Idx)2512 MS_BOOL HAL_MVD_StepDisp(MS_U8 u8Idx)
2513 {
2514 MVD_CmdArg mvdcmd;
2515
2516 MVD_SetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8), 0);
2517
2518 SETUP_CMDARG(mvdcmd);
2519 SET_DECNUM(mvdcmd, u8Idx);
2520 SET_CMD_RET_FALSE(CMD_STEP_DISP_DECODE_ONE, &mvdcmd);
2521 if (HAL_MVD_Resume(u8Idx) == FALSE)
2522 {
2523 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2524 return FALSE;
2525 }
2526
2527 return TRUE;
2528 }
2529
2530 //------------------------------------------------------------------------------
2531 /// Get ES read address for TS file mode.
2532 /// @return ES read address
2533 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)2534 MS_VIRT HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)
2535 {
2536 MS_VIRT u32Add = 0;
2537 MVD_CmdArg mvdcmd;
2538
2539 SETUP_CMDARG(mvdcmd);
2540 mvdcmd.Arg0 = 2; //ES diff
2541 SET_DECNUM(mvdcmd, u8Idx);
2542 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2543 {
2544 //in order to latch the newest parser status
2545 //u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2546 // (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2547 }
2548 else
2549 {
2550 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2551 }
2552
2553 SETUP_CMDARG(mvdcmd);
2554 mvdcmd.Arg0 = 1;
2555 SET_DECNUM(mvdcmd, u8Idx);
2556 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2557 {
2558 u32Add = (((MS_U32)mvdcmd.Arg3) <<24) |
2559 (((MS_U32)mvdcmd.Arg2) <<16) |
2560 (((MS_U32)mvdcmd.Arg1) << 8) |
2561 (((MS_U32)mvdcmd.Arg0));
2562 }
2563 else
2564 {
2565 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2566 }
2567
2568 return (u32Add*8);
2569 }
2570
2571 //------------------------------------------------------------------------------
2572 /// Get ES write address for TS file mode.
2573 /// @return ES write address
2574 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)2575 MS_VIRT HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)
2576 {
2577 MS_VIRT u32Diff = 0;
2578 MS_VIRT u32WrPtr = 0;
2579 MVD_CmdArg mvdcmd;
2580 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2581 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2582
2583 SETUP_CMDARG(mvdcmd);
2584 mvdcmd.Arg0 = 2; //ES diff
2585 SET_DECNUM(mvdcmd, u8Idx);
2586 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2587 {
2588 u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2589 (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2590 }
2591 else
2592 {
2593 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2594 }
2595
2596 u32WrPtr = u32Diff*8 + HAL_MVD_GetTsFileESReadPtr(u8Idx);
2597 if (u32WrPtr > pstSlqTblInfo->u32ESBuffEnd)
2598 {
2599 MVD_DEBUGINFO(MVD_PRINT("ES wrapping Wr=0x%lx ==> ", (unsigned long)u32WrPtr));
2600 u32WrPtr -= pstMemCfg->u32BSSize;
2601 MVD_DEBUGINFO(MVD_PRINT("0x%lx\n", (unsigned long)u32WrPtr));
2602 }
2603 return u32WrPtr;
2604 }
2605
2606 //------------------------------------------------------------------------------
2607 /// Enable/Disable firmware to show the last frame.
2608 /// @return -TRUE for success; FALSE for failure.
2609 //------------------------------------------------------------------------------
HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx,MS_BOOL bEnable)2610 MS_BOOL HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx, MS_BOOL bEnable)
2611 {
2612 MVD_CmdArg mvdcmd;
2613 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
2614 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2615 MS_VIRT* pu32FileEndPtr = &pstSlqTblInfo->u32FileEndPtr;
2616
2617 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
2618 {
2619 #if SLQ_NEW_PUSH
2620 if (pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
2621 {
2622 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr + SLQ_ENTRY_LEN;
2623 }
2624 #endif //
2625 //save current writePtr
2626 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
2627 {
2628 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
2629 }
2630 else
2631 {
2632 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
2633 }
2634 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx, wr=%lx\n", (unsigned long)*pu32FileEndPtr,
2635 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr));
2636 }
2637
2638 SETUP_CMDARG(mvdcmd);
2639 mvdcmd.Arg0 = bEnable;
2640 SET_DECNUM(mvdcmd, u8Idx);
2641 SET_CMD_RET_FALSE(CMD_ENABLE_LAST_FRAME_SHOW, &mvdcmd);
2642 return TRUE;
2643 }
2644
2645
HAL_MVD_SlqTblRst(MS_U8 u8Idx)2646 MS_BOOL HAL_MVD_SlqTblRst(MS_U8 u8Idx)
2647 {
2648 MVD_CmdArg mvdcmd;
2649 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2650
2651 SETUP_CMDARG(mvdcmd);
2652 SET_DECNUM(mvdcmd, u8Idx);
2653 SET_CMD_RET_FALSE(CMD_VC1_HW_SLQ_RESET, &mvdcmd);
2654 pstSlqTblInfo->bEnSlqTblHkCtrl = FALSE;
2655 return TRUE;
2656 }
2657
HAL_MVD_SeekToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2658 MS_BOOL HAL_MVD_SeekToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2659 {
2660 MVD_CmdArg mvdcmd;
2661
2662 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2663 SET_CMD_RET_FALSE(CMD_STEP_TO_PTS, &mvdcmd);
2664
2665 if (HAL_MVD_Resume(u8Idx) == FALSE)
2666 {
2667 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2668 return FALSE;
2669 }
2670 return TRUE;
2671 }
2672
HAL_MVD_SkipToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2673 MS_BOOL HAL_MVD_SkipToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2674 {
2675 MVD_CmdArg mvdcmd;
2676
2677 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2678 SET_CMD_RET_FALSE(CMD_SKIP_TO_PTS, &mvdcmd);
2679
2680 if (HAL_MVD_Resume(u8Idx) == FALSE)
2681 {
2682 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2683 return FALSE;
2684 }
2685 return TRUE;
2686 }
2687
HAL_MVD_TrickPlay(MS_U8 u8Idx,MVD_TrickDec trickDec,MS_U8 u8DispDuration)2688 MS_BOOL HAL_MVD_TrickPlay(MS_U8 u8Idx, MVD_TrickDec trickDec, MS_U8 u8DispDuration)
2689 {
2690 MVD_CmdArg mvdcmd;
2691 MS_U8 u8DecType;
2692
2693 switch (trickDec)
2694 {
2695 case E_MVD_TRICK_DEC_ALL:
2696 u8DecType = 0;
2697 break;
2698 case E_MVD_TRICK_DEC_I:
2699 u8DecType = 1;
2700 break;
2701 case E_MVD_TRICK_DEC_IP:
2702 u8DecType = 2;
2703 break;
2704 default:
2705 return FALSE;
2706 break;
2707 }
2708
2709 SETUP_CMDARG(mvdcmd);
2710 mvdcmd.Arg0 = u8DecType;
2711 mvdcmd.Arg1 = u8DispDuration;
2712 SET_DECNUM(mvdcmd, u8Idx);
2713 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
2714
2715 pMVDHalContext->stCtrlCfg[u8Idx].eTrickMode = trickDec;
2716 return TRUE;
2717 }
2718
HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)2719 MS_BOOL HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)
2720 {
2721 #define STOP_TIMEOUT 500 //ms
2722 MS_U32 u32StartTime = 0;
2723
2724 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND);
2725 MVD_CmdArg mvdcmd;
2726 SETUP_CMDARG(mvdcmd);
2727 SET_DECNUM(mvdcmd, u8Idx);
2728 SET_CMD_RET_FALSE(CMD_FLUSH_DISP_QUEUE, &mvdcmd);
2729
2730 u32StartTime = HAL_MVD_GetTime();
2731
2732 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND))
2733 {
2734 if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
2735 {
2736 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_FLUSH_DISP_QUEUE ) );
2737 break;
2738 }
2739 }
2740
2741 return TRUE;
2742 }
2743
2744
HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx,MVD_TIMESTAMP_TYPE eSyncMode)2745 MS_BOOL HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx, MVD_TIMESTAMP_TYPE eSyncMode)
2746 {
2747 MVD_CmdArg mvdcmd;
2748 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2749
2750 pstCtrlCfg->eFileSyncMode = eSyncMode;
2751 MVD_DEBUGINFO(MVD_PRINT("%s eSyncMode=%d\n", __FUNCTION__, eSyncMode));
2752 SETUP_CMDARG(mvdcmd);
2753 switch (eSyncMode)
2754 {
2755 case E_MVD_TIMESTAMP_PTS:
2756 case E_MVD_TIMESTAMP_PTS_RVU:
2757 mvdcmd.Arg0 = FILE_PTS_MODE;
2758 break;
2759
2760 case E_MVD_TIMESTAMP_DTS:
2761 case E_MVD_TIMESTAMP_DTS_RVU:
2762 mvdcmd.Arg0 = FILE_DTS_MODE;
2763 break;
2764 case E_MVD_TIMESTAMP_NEW_STS:
2765 mvdcmd.Arg0 = FILE_STS_MODE;
2766 break;
2767 case E_MVD_TIMESTAMP_FREERUN:
2768 default:
2769 mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
2770 break;
2771 }
2772 SET_DECNUM(mvdcmd, u8Idx);
2773 SET_CMD_RET_FALSE(CMD_ENABLE_FILE_SYNC, &mvdcmd);
2774
2775 SETUP_CMDARG(mvdcmd);
2776 switch (eSyncMode) //for set RVU mode
2777 {
2778 case E_MVD_TIMESTAMP_PTS_RVU:
2779 mvdcmd.Arg0 = FILE_PTS_MODE;
2780 break;
2781 case E_MVD_TIMESTAMP_DTS_RVU:
2782 mvdcmd.Arg0 = FILE_DTS_MODE;
2783 break;
2784 case E_MVD_TIMESTAMP_FREERUN:
2785 default:
2786 mvdcmd.Arg0 = 0xFF;
2787 break;
2788 }
2789 SET_DECNUM(mvdcmd, u8Idx);
2790 SET_CMD_RET_FALSE(CMD_RVU_EN, &mvdcmd);
2791 return TRUE;
2792 }
2793
2794
2795
2796
2797 //------------------------------------------------------------------------------
2798 /// Set the start address of PTS table used for SLQ table link mode.
2799 /// @return -TRUE for success; FALSE for failure.
2800 //------------------------------------------------------------------------------
HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx,MS_VIRT u32addr)2801 MS_BOOL HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx, MS_VIRT u32addr)
2802 {
2803 MVD_CmdArg mvdcmd;
2804
2805 MS_ASSERT((u32addr%8)==0);
2806 u32addr >>= 3;
2807
2808 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2809 SET_CMD_RET_FALSE(CMD_PTS_TBL_START, &mvdcmd);
2810 return TRUE;
2811 }
2812
HAL_MVD_SkipToIFrame(MS_U8 u8Idx)2813 MS_BOOL HAL_MVD_SkipToIFrame(MS_U8 u8Idx)
2814 {
2815 MVD_CmdArg mvdcmd;
2816 SETUP_CMDARG(mvdcmd);
2817 SET_DECNUM(mvdcmd, u8Idx);
2818 SET_CMD_RET_FALSE(CMD_START_DEC_STRICT, &mvdcmd);
2819 return TRUE;
2820 }
2821
2822 //Map driver FRC (Frame rate conversion) mode to firmware's.
HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)2823 MS_U8 HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)
2824 {
2825 MS_U8 frcMode = 0xf;
2826 switch (eFrcMode)
2827 {
2828 case E_MVD_FRC_NORMAL:
2829 frcMode = FrcNormal;
2830 break;
2831 case E_MVD_FRC_DISP_TWICE:
2832 frcMode = FrcDisplayTwice;
2833 break;
2834 case E_MVD_FRC_3_2_PULLDOWN: //film 24 -> 50i
2835 frcMode = Frc32Pulldown;
2836 break;
2837 case E_MVD_FRC_PAL_TO_NTSC:
2838 frcMode = FrcPALtoNTSC;
2839 break;
2840 case E_MVD_FRC_NTSC_TO_PAL:
2841 frcMode = FrcNTSCtoPAL;
2842 break;
2843 case E_MVD_FRC_DISP_ONEFIELD:
2844 frcMode = FrcShowOneFiled;
2845 break;
2846 default:
2847 break;
2848 }
2849 return frcMode;
2850 }
2851
HAL_MVD_DispCtrl(MS_U8 u8Idx,MS_BOOL bDecOrder,MS_BOOL bDropErr,MS_BOOL bDropDisp,MVD_FrcMode eFrcMode)2852 MS_BOOL HAL_MVD_DispCtrl(MS_U8 u8Idx, MS_BOOL bDecOrder, MS_BOOL bDropErr, MS_BOOL bDropDisp, MVD_FrcMode eFrcMode)
2853 {
2854 MVD_CmdArg mvdcmd;
2855 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2856 MS_BOOL* pbDropErrFrm = &pstCtrlCfg->bDropErrFrm;
2857
2858 SETUP_CMDARG(mvdcmd);
2859 mvdcmd.Arg0 = (MS_U8)bDecOrder;
2860 mvdcmd.Arg1 = (MS_U8)bDropErr;
2861 mvdcmd.Arg2 = (MS_U8)bDropDisp;
2862 mvdcmd.Arg3 = HAL_MVD_MapFrcMode(eFrcMode);
2863 SET_DECNUM(mvdcmd, u8Idx);
2864 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
2865
2866 pstCtrlCfg->eFrcMode = eFrcMode;
2867
2868 if (*pbDropErrFrm != bDropErr)
2869 {
2870 MVD_DEBUGINFO( MVD_PRINT("bDropErrFrm(%d) != bDropErr(%d)\n", *pbDropErrFrm, bDropErr));
2871 *pbDropErrFrm = bDropErr;
2872 }
2873 pstCtrlCfg->bDropDispfrm = bDropDisp;
2874
2875 return TRUE;
2876 }
2877
2878
HAL_MVD_SkipData(MS_U8 u8Idx)2879 MS_BOOL HAL_MVD_SkipData(MS_U8 u8Idx)
2880 {
2881 MS_U32 u32TimeCnt = 0;
2882 MVD_CmdArg mvdcmd;
2883
2884 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
2885 SETUP_CMDARG(mvdcmd);
2886 SET_DECNUM(mvdcmd, u8Idx);
2887 SET_CMD_RET_FALSE(CMD_SKIP_DATA, &mvdcmd);
2888
2889 u32TimeCnt = HAL_MVD_GetTime();
2890 while ((HAL_MVD_GetTime() - u32TimeCnt) < SKIP_DATA_TIMEOUT_MS)
2891 {
2892 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2893 {
2894 MVD_DEBUGINFO(MVD_PRINT("\nSkip data finished!\n"));
2895 break;
2896 }
2897 }
2898 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
2899 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
2900 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2901 {
2902 MVD_DEBUGINFO(MVD_PRINT("\n***** TS flush timeout *****\n\n"));
2903 return FALSE;
2904 }
2905
2906 return TRUE;
2907 }
2908
HAL_MVD_DispRepeatField(MS_U8 u8Idx,MS_BOOL bEnable)2909 MS_BOOL HAL_MVD_DispRepeatField(MS_U8 u8Idx, MS_BOOL bEnable)
2910 {
2911 MVD_CmdArg mvdcmd;
2912 SETUP_CMDARG(mvdcmd);
2913 mvdcmd.Arg0 = bEnable;
2914 SET_DECNUM(mvdcmd, u8Idx);
2915 SET_CMD_RET_FALSE(CMD_REPEAT_MODE, &mvdcmd);
2916 return TRUE;
2917 }
2918
2919 //------------------------------------------------------------------------------
2920 /// Pause display.
2921 /// @return -TRUE for success; FALSE for failure
2922 //------------------------------------------------------------------------------
HAL_MVD_PauseDisp(MS_U8 u8Idx)2923 MS_BOOL HAL_MVD_PauseDisp(MS_U8 u8Idx)
2924 {
2925 MS_BOOL bRst = TRUE;
2926 MVD_CmdArg mvdcmd;
2927
2928 SETUP_CMDARG(mvdcmd);
2929 mvdcmd.Arg0 = DISPLAY_PAUSE_ON;
2930 SET_DECNUM(mvdcmd, u8Idx);
2931 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2932 {
2933 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x(ON) fail!!\r\n", CMD_DISPLAY_PAUSE) );
2934 bRst = FALSE;
2935 }
2936 return bRst;
2937 }
2938
2939 //------------------------------------------------------------------------------
2940 /// Issue Pause command.
2941 /// @return -TRUE for success; FALSE for failure
2942 //------------------------------------------------------------------------------
HAL_MVD_Resume(MS_U8 u8Idx)2943 MS_BOOL HAL_MVD_Resume(MS_U8 u8Idx)
2944 {
2945 MS_BOOL bRst = TRUE;
2946 MVD_CmdArg mvdcmd;
2947
2948 SETUP_CMDARG(mvdcmd);
2949 mvdcmd.Arg0 = DISPLAY_PAUSE_OFF;
2950 SET_DECNUM(mvdcmd, u8Idx);
2951 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2952 {
2953 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DISPLAY_PAUSE) );
2954 bRst = FALSE;
2955 }
2956 return bRst;
2957 }
2958
HAL_MVD_Play(MS_U8 u8Idx)2959 MS_BOOL HAL_MVD_Play(MS_U8 u8Idx)
2960 {
2961 MVD_CmdArg mvdcmd;
2962 SETUP_CMDARG(mvdcmd);
2963 mvdcmd.Arg0 = 1;
2964 SET_DECNUM(mvdcmd, u8Idx);
2965 SET_CMD_RET_FALSE(CMD_DIU_WIDTH_ALIGN, &mvdcmd);
2966
2967 SETUP_CMDARG(mvdcmd);
2968 SET_DECNUM(mvdcmd, u8Idx);
2969 SET_CMD_RET_FALSE(CMD_PLAY, &mvdcmd);
2970
2971 if (HAL_MVD_Resume(u8Idx) == FALSE)
2972 {
2973 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2974 return FALSE;
2975 }
2976
2977 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2978 pCtrlCfg->bDecodeIFrame = FALSE;
2979
2980 return TRUE;
2981 }
2982
2983 //------------------------------------------------------------------------------
2984 /// Set base address for ScalerInfo structure to f/w
2985 /// @param -u32addr \b IN : start address (units in byte)
2986 //------------------------------------------------------------------------------
HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8Arg4)2987 MS_BOOL HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr,MS_U8 u8Arg4)
2988 {
2989 MVD_CmdArg mvdcmd;
2990
2991 MS_ASSERT((u32addr%8)==0);
2992 u32addr >>= 3;
2993
2994 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2995 mvdcmd.Arg4 = u8Arg4;
2996 SET_CMD_RET_FALSE(CMD_SCALER_INFO_BASE, &mvdcmd);
2997 return TRUE;
2998 }
2999
3000 //------------------------------------------------------------------------------
3001 /// Set the dynamic scale base address
3002 /// @return -TRUE for success; FALSE for failure.
3003 //------------------------------------------------------------------------------
HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx,MS_VIRT u32addr)3004 MS_BOOL HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx, MS_VIRT u32addr)
3005 {
3006 MVD_CmdArg mvdcmd;
3007
3008 MS_ASSERT((u32addr%8)==0);
3009 u32addr >>= 3;
3010
3011 SET_CMDARG(mvdcmd, u32addr, u8Idx);
3012 SET_CMD_RET_FALSE(CMD_DYNAMIC_SCALE_BASE, &mvdcmd);
3013 return TRUE;
3014 }
3015
3016 //------------------------------------------------------------------------------
3017 /// Set virtual box width/height to F/W.
3018 /// F/W will use the same w/h as scaler to calculate scaling factor.
3019 /// @return -TRUE for success; FALSE for failure.
3020 //------------------------------------------------------------------------------
HAL_MVD_SetVirtualBox(MS_U8 u8Idx,MS_U16 u16Width,MS_U16 u16Height)3021 MS_BOOL HAL_MVD_SetVirtualBox(MS_U8 u8Idx, MS_U16 u16Width, MS_U16 u16Height)
3022 {
3023 MVD_CmdArg mvdcmd;
3024
3025 SETUP_CMDARG(mvdcmd);
3026 mvdcmd.Arg0 = L_WORD(u16Width);
3027 mvdcmd.Arg1 = H_WORD(u16Width);
3028 mvdcmd.Arg2 = L_WORD(u16Height);
3029 mvdcmd.Arg3 = H_WORD(u16Height);
3030 SET_DECNUM(mvdcmd, u8Idx);
3031 SET_CMD_RET_FALSE(CMD_DS_VIRTUAL_BOX, &mvdcmd);
3032 return TRUE;
3033 }
3034
3035 //------------------------------------------------------------------------------
3036 /// Enable VC1 dynamic scaling
3037 /// @return -TRUE for success; FALSE for failure.
3038 //------------------------------------------------------------------------------
HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)3039 MS_BOOL HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)
3040 {
3041 MVD_CmdArg mvdcmd;
3042
3043 SETUP_CMDARG(mvdcmd);
3044 mvdcmd.Arg0 = TRUE;
3045 mvdcmd.Arg1 = u8NewDS;
3046 SET_DECNUM(mvdcmd, u8Idx);
3047 SET_CMD_RET_FALSE(CMD_ENABLE_DYNAMIC_SCALE, &mvdcmd);
3048 return TRUE;
3049 }
3050
3051
3052 //------------------------------------------------------------------------------
3053 /// Set blue screen
3054 /// @return -TRUE for success; FALSE for failure.
3055 //------------------------------------------------------------------------------
HAL_MVD_SetBlueScreen(MS_U8 u8Idx,MS_BOOL bEn)3056 MS_BOOL HAL_MVD_SetBlueScreen(MS_U8 u8Idx, MS_BOOL bEn)
3057 {
3058 MVD_CmdArg mvdcmd;
3059
3060 SETUP_CMDARG(mvdcmd);
3061 mvdcmd.Arg0 = bEn; //1 -> show MVOP frame color. 0 -> normal case.
3062 SET_DECNUM(mvdcmd, u8Idx);
3063 SET_CMD_RET_FALSE(CMD_FORCE_BLUE_SCREEN, &mvdcmd);
3064 return TRUE;
3065 }
3066
3067
HAL_MVD_SetFreezeDisp(MS_U8 u8Idx,MS_BOOL bEn)3068 MS_BOOL HAL_MVD_SetFreezeDisp(MS_U8 u8Idx, MS_BOOL bEn)
3069 {
3070 MVD_CmdArg mvdcmd;
3071
3072 SETUP_CMDARG(mvdcmd);
3073 mvdcmd.Arg0 = bEn;
3074 SET_DECNUM(mvdcmd, u8Idx);
3075 SET_CMD_RET_FALSE(CMD_FREEZE_DISP, &mvdcmd);
3076 return TRUE;
3077 }
3078
3079
3080 //------------------------------------------------------------------------------
3081 /// Set base address for DecFrameInfo structure to f/w
3082 /// @param -u32addr \b IN : start address (units in byte)
3083 //------------------------------------------------------------------------------
HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr)3084 void HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr)
3085 {
3086 MVD_CmdArg mvdcmd;
3087
3088 MS_ASSERT((u32addr%8)==0);
3089 u32addr >>= 3;
3090
3091 SET_CMDARG(mvdcmd, u32addr, u8Idx);
3092 if (HAL_MVD_MVDCommand( CMD_DEC_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
3093 {
3094 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DEC_FRAME_INFO_BUF ) );
3095 }
3096 return;
3097 }
3098
3099 //Check if the task has interrupt
HAL_MVD_GetHasInt(MS_U8 u8Idx)3100 MS_BOOL HAL_MVD_GetHasInt(MS_U8 u8Idx)
3101 {
3102 MS_BOOL bHasInt = FALSE;
3103 MS_U32 u32IntCnt = 0;
3104 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3105
3106 u32IntCnt = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_CNT, sizeof(MS_U32));
3107 if (u32IntCnt != pCtrlCfg->u32IntCnt)
3108 {
3109 MVD_DEBUGINFO(MVD_PRINT("%s %d--> %d\n", __FUNCTION__, pCtrlCfg->u32IntCnt, u32IntCnt));
3110 bHasInt = TRUE;
3111 pCtrlCfg->u32IntCnt = u32IntCnt;
3112 }
3113 return bHasInt;
3114 }
3115
3116 #ifdef VDEC3
HAL_MVD_GetIntState(MS_U8 u8Idx)3117 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3118 {
3119 MS_U32 u32IntStat;
3120
3121 u32IntStat = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_STAT, sizeof(MS_U32));
3122
3123 MVD_SetFWBuffData(u8Idx,FW_BUFF_FRMINFO,OFFSET_INT_STAT,sizeof(MS_U32),0);
3124
3125 return u32IntStat;
3126 }
3127 #else
HAL_MVD_GetIntState(MS_U8 u8Idx)3128 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3129 {
3130 MS_U32 u32IntStat = 0;
3131 MVD_CmdArg mvdcmd;
3132
3133 SETUP_CMDARG(mvdcmd);
3134 SET_DECNUM(mvdcmd, u8Idx);
3135 if (HAL_MVD_MVDCommand( CMD_GET_INT_STAT, &mvdcmd ) == TRUE)
3136 {
3137 u32IntStat = (((MS_U32)mvdcmd.Arg4) << 16) |
3138 (((MS_U32)mvdcmd.Arg3) << 8) |
3139 (((MS_U32)mvdcmd.Arg2));
3140 }
3141 else
3142 {
3143 if (FALSE == pMVDHalContext->bStopped[u8Idx])
3144 {
3145 MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\n", CMD_GET_INT_STAT));
3146 }
3147 else
3148 {
3149 MVD_DEBUGINFO(MVD_PRINT("Cmd 0x%x normal timeout.\n", CMD_GET_INT_STAT));
3150 }
3151 }
3152
3153 return u32IntStat;
3154 }
3155
3156 #endif
3157
3158 ///// functions to check interrupt status /////
MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)3159 MS_BOOL MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)
3160 {
3161 return (((u32IntStat&INT_USER_DATA_DISP)==INT_USER_DATA_DISP) ? TRUE : FALSE);
3162 }
3163
MVD_IntHasUsrData(MS_U32 u32IntStat)3164 MS_BOOL MVD_IntHasUsrData(MS_U32 u32IntStat)
3165 {
3166 return (((u32IntStat&INT_USER_DATA)==INT_USER_DATA) ? TRUE : FALSE);
3167 }
3168
MVD_IntIsDispRdy(MS_U32 u32IntStat)3169 MS_BOOL MVD_IntIsDispRdy(MS_U32 u32IntStat)
3170 {
3171 return (((u32IntStat&INT_DISP_RDY)==INT_DISP_RDY) ? TRUE : FALSE);
3172 }
3173
MVD_IntHasSeqHdr(MS_U32 u32IntStat)3174 MS_BOOL MVD_IntHasSeqHdr(MS_U32 u32IntStat)
3175 {
3176 return (((u32IntStat&INT_SEQ_FOUND)==INT_SEQ_FOUND) ? TRUE : FALSE);
3177 }
3178
MVD_IntHasESDataInvalid(MS_U32 u32IntStat)3179 MS_BOOL MVD_IntHasESDataInvalid(MS_U32 u32IntStat)
3180 {
3181 return (((u32IntStat&INT_VES_VALID)==INT_VES_VALID) ? TRUE : FALSE);
3182 }
3183
MVD_IntHasDecodeErr(MS_U32 u32IntStat)3184 MS_BOOL MVD_IntHasDecodeErr(MS_U32 u32IntStat)
3185 {
3186 return (((u32IntStat&INT_DEC_ERR)==INT_DEC_ERR) ? TRUE : FALSE);
3187 }
3188 //INT_FIRST_FRAME means "1st frame be push to display queue & ready for display"
3189 //So, (1) in IPB or IP stream, that's I-frame
3190 // (2) in PB only stream, that's first P-frame
MVD_IntHas1stFrame(MS_U32 u32IntStat)3191 MS_BOOL MVD_IntHas1stFrame(MS_U32 u32IntStat)
3192 {
3193 return (((u32IntStat&INT_FIRST_FRAME)==INT_FIRST_FRAME) ? TRUE : FALSE);
3194 }
3195
3196 //INT_XC_LOW_DELAY
MVD_IntHasXcLowDelay(MS_U32 u32IntStat)3197 MS_BOOL MVD_IntHasXcLowDelay(MS_U32 u32IntStat)
3198 {
3199 //MVD_PRINT("MVD_IntHasXcLowDelay=%x \n ", u32IntStat);
3200 return (((u32IntStat&INT_XC_LOW_DELAY)==INT_XC_LOW_DELAY) ? TRUE : FALSE);
3201 }
3202
MVD_IntHasDecodeIframe(MS_U32 u32IntStat)3203 MS_BOOL MVD_IntHasDecodeIframe(MS_U32 u32IntStat)
3204 {
3205 return (((u32IntStat&INT_DEC_I)==INT_DEC_I) ? TRUE : FALSE);
3206 }
3207
3208
MVD_IntVSyncInt(MS_U32 u32IntStat)3209 MS_BOOL MVD_IntVSyncInt(MS_U32 u32IntStat)
3210 {
3211 return (((u32IntStat&INT_DISP_VSYNC)==INT_DISP_VSYNC) ? TRUE : FALSE);
3212 }
3213
MVD_IntDecOneFrmInt(MS_U32 u32IntStat)3214 MS_BOOL MVD_IntDecOneFrmInt(MS_U32 u32IntStat)
3215 {
3216 return (((u32IntStat&INT_DEC_DONE)==INT_DEC_DONE) ? TRUE : FALSE);
3217 }
3218
3219
MVD_GetSyncStat(MS_U8 u8Idx,MS_U8 u8ArgIdx)3220 static MS_U8 MVD_GetSyncStat(MS_U8 u8Idx, MS_U8 u8ArgIdx)
3221 {
3222 MS_U8 u8Val = 0xFF;
3223 MVD_CmdArg mvdcmd;
3224 SETUP_CMDARG(mvdcmd);
3225 SET_DECNUM(mvdcmd, u8Idx);
3226 if (HAL_MVD_MVDCommand( CMD_GET_SYNC_STAT, &mvdcmd ) == FALSE)
3227 {
3228 MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\r\n", CMD_GET_SYNC_STAT));
3229 return 0xFF;
3230 }
3231 MVD_DEBUGINFO(MVD_PRINT("Sync On/Off %x, Done %x, Stat %x, diff=%d\n",
3232 mvdcmd.Arg0, mvdcmd.Arg1, mvdcmd.Arg2, (int)HAL_MVD_GetPtsStcDiff(u8Idx)));
3233
3234 if (0==u8ArgIdx)
3235 {
3236 u8Val = mvdcmd.Arg0; //On/Off
3237 }
3238 else if (1==u8ArgIdx)
3239 {
3240 u8Val = mvdcmd.Arg1; //Done
3241 }
3242 else if (2==u8ArgIdx)
3243 {
3244 u8Val = mvdcmd.Arg2; //Stat
3245 }
3246 return u8Val;
3247 }
3248
3249 //------------------------------------------------------------------------------
3250 /// Report avsync status
3251 /// avsync_status=avsync_done|(avsync_skip_picture<<1)|(avsync_repeat_picture<<2),
3252 /// 0 for free run
3253 //------------------------------------------------------------------------------
HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)3254 MS_U8 HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)
3255 {
3256 return MVD_GetSyncStat(u8Idx, 2);
3257 }
3258
HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx,MS_VIRT u32WrPtr)3259 void HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx, MS_VIRT u32WrPtr)
3260 {
3261 #if 1
3262 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
3263 MVD_CmdArg mvdcmd;
3264 MS_U16 u16Val = 0;
3265
3266 if (FALSE == pstSlqTblInfo->bEnSlqTblHkCtrl)
3267 {
3268 SETUP_CMDARG(mvdcmd);
3269 mvdcmd.Arg0 = 0x10;
3270 mvdcmd.Arg1 = 0x01;
3271 SET_DECNUM(mvdcmd, u8Idx);
3272 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
3273 {
3274 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
3275 return;
3276 }
3277 u16Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8);
3278
3279 SETUP_CMDARG(mvdcmd);
3280 mvdcmd.Arg0 = 0x10;
3281 mvdcmd.Arg1 = 0x01;
3282 mvdcmd.Arg2 = u16Val & 0xff;
3283 mvdcmd.Arg3 = ((u16Val>>8 ) & 0xff) | 0x80;
3284 SET_DECNUM(mvdcmd, u8Idx);
3285 if (HAL_MVD_MVDCommand(CMD_WR_IO, &mvdcmd) == FALSE)
3286 {
3287 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_WR_IO ) );
3288 return;
3289 }
3290
3291 pstSlqTblInfo->bEnSlqTblHkCtrl = TRUE;
3292 //MVD_PRINT("@@@ OPEN HK.SLQ.CTRL!\n");
3293 }
3294 #endif
3295 #if defined(MSOS_TYPE_ECOS)
3296 if(MsOS_In_Interrupt() != TRUE)
3297 {
3298 OSAL_MVD_IntDisable();
3299 OSAL_MVD_LockHwMutex();
3300 }
3301 #else
3302 OSAL_MVD_LockHwMutex();
3303 #endif
3304
3305 HAL_MVD_RegWriteByte(MVD_SLQ_WADR0, (u32WrPtr & 0xff));
3306 HAL_MVD_RegWriteByte(MVD_SLQ_WADR1, ((u32WrPtr>>8 ) & 0xff));
3307 HAL_MVD_RegWriteByte(MVD_SLQ_WADR2, ((u32WrPtr>>16) & 0xff));
3308 HAL_MVD_RegWriteByte(MVD_SLQ_WADR3, ((u32WrPtr>>24) & 0x01));
3309 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_RELOAD);
3310 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_RELOAD);
3311
3312 #if defined(MSOS_TYPE_ECOS)
3313 if(MsOS_In_Interrupt() != TRUE)
3314 {
3315 OSAL_MVD_UnlockHwMutex();
3316 OSAL_MVD_IntEnable();
3317 }
3318 #else
3319 OSAL_MVD_UnlockHwMutex();
3320 #endif
3321 }
3322
HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)3323 static MS_VIRT HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)
3324 {
3325 MS_VIRT u32Cadr = 0;
3326 #if defined(MSOS_TYPE_ECOS)
3327 if(MsOS_In_Interrupt() != TRUE)
3328 {
3329 OSAL_MVD_IntDisable();
3330 OSAL_MVD_LockHwMutex();
3331 }
3332 #else
3333 OSAL_MVD_LockHwMutex();
3334 #endif
3335
3336 switch (eCmd)
3337 {
3338 case MVD_HKSLQ_GET_READPTR:
3339 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_RADR_PROBE);
3340 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_RADR_PROBE);
3341 break;
3342 case MVD_HKSLQ_GET_WRITEPTR:
3343 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_PROBE);
3344 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_PROBE);
3345 break;
3346 default:
3347 break;
3348 }
3349 u32Cadr = HAL_MVD_RegReadByte(MVD_SLQ_CADR0) |
3350 (HAL_MVD_RegReadByte(MVD_SLQ_CADR1) << 8) |
3351 (HAL_MVD_RegReadByte(MVD_SLQ_CADR2) <<16) |
3352 ((HAL_MVD_RegReadByte(MVD_SLQ_CADR3) & 0x01) <<24);
3353
3354 #if defined(MSOS_TYPE_ECOS)
3355 if(MsOS_In_Interrupt() != TRUE)
3356 {
3357 OSAL_MVD_UnlockHwMutex();
3358 OSAL_MVD_IntEnable();
3359 }
3360 #else
3361 OSAL_MVD_UnlockHwMutex();
3362 #endif
3363 return u32Cadr;
3364 }
3365
HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)3366 MS_VIRT HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)
3367 {
3368 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_WRITEPTR);
3369 }
3370
HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)3371 MS_VIRT HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)
3372 {
3373 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_READPTR);
3374 }
3375
3376 //------------------------------------------------------------------------------
3377 /// Set firmware as MStreamer mode
3378 /// @return -TRUE for success; FALSE for failure.
3379 //------------------------------------------------------------------------------
HAL_MVD_SetMStreamerMode(MS_U8 u8Idx,MS_U8 u8Mode)3380 MS_BOOL HAL_MVD_SetMStreamerMode(MS_U8 u8Idx, MS_U8 u8Mode)
3381 {
3382 MVD_CmdArg mvdcmd;
3383 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3384
3385 SETUP_CMDARG(mvdcmd);
3386 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MStreamer mode.
3387 SET_DECNUM(mvdcmd, u8Idx);
3388 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3389
3390 pstCtrlCfg->u8MstMode = u8Mode;
3391 return TRUE;
3392 }
3393
3394 //------------------------------------------------------------------------------
3395 /// Set firmware as MStreamer mode (IP clip mode)
3396 /// @return -TRUE for success; FALSE for failure.
3397 //------------------------------------------------------------------------------
HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx,MS_U8 u8Mode)3398 MS_BOOL HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx, MS_U8 u8Mode)
3399 {
3400 MVD_CmdArg mvdcmd;
3401 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3402
3403 SETUP_CMDARG(mvdcmd);
3404 mvdcmd.Arg0 = pstCtrlCfg->u8MstMode;
3405 mvdcmd.Arg1 = u8Mode;//a u8Mode; //1: clip mode, 0:normal mode.
3406 SET_DECNUM(mvdcmd, u8Idx);
3407 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3408 return TRUE;
3409
3410 }
3411
HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)3412 MS_BOOL HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)
3413 {
3414 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3415 return (MST_MODE_TRUE == pstCtrlCfg->u8MstMode);
3416 }
3417
HAL_MVD_FrameOpt(MS_U8 u8Idx,MS_U8 u8FrmIdx,MVD_FrmOpt eOpt)3418 MS_BOOL HAL_MVD_FrameOpt(MS_U8 u8Idx, MS_U8 u8FrmIdx, MVD_FrmOpt eOpt)
3419 {
3420 MVD_CmdArg mvdcmd;
3421
3422 SETUP_CMDARG(mvdcmd);
3423 mvdcmd.Arg0 = u8FrmIdx;
3424 mvdcmd.Arg1 = eOpt; // 0 = Flip, 1 = Release.
3425 MVD_DEBUGINFO(MVD_PRINT("FLIP_RELEASE_FRAME: idx=0x%x, opt=0x%x\n", u8FrmIdx, eOpt));
3426 SET_DECNUM(mvdcmd, u8Idx);
3427 SET_CMD_RET_FALSE(CMD_FLIP_RELEASE_FRAME, &mvdcmd);
3428
3429 return TRUE;
3430 }
3431
3432 //------------------------------------------------------------------------------
3433 /// Set firmware dynamic allocate FrameBuffer, now support MCU mode only
3434 /// @return -TRUE for success; FALSE for failure.
3435 //------------------------------------------------------------------------------
_MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)3436 MS_BOOL _MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)
3437 {
3438 MVD_CmdArg mvdcmd;
3439
3440 SETUP_CMDARG(mvdcmd);
3441 mvdcmd.Arg0 = 1-bEnable; //Arg0 : 0(enable) , 1(disable)
3442 SET_DECNUM(mvdcmd, u8Idx);
3443 if (HAL_MVD_MVDCommand( CMD_FIXED_FRAME_BUFFER, &mvdcmd ) == FALSE)
3444 {
3445 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FIXED_FRAME_BUFFER ) );
3446 return FALSE;
3447 }
3448
3449 return TRUE;
3450 }
3451
3452 //------------------------------------------------------------------------------
3453 /// Set firmware as MCU mode
3454 /// @return -TRUE for success; FALSE for failure.
3455 //------------------------------------------------------------------------------
HAL_MVD_SetMcuMode(MS_U8 u8Idx,MS_U8 u8Mode)3456 MS_BOOL HAL_MVD_SetMcuMode(MS_U8 u8Idx, MS_U8 u8Mode)
3457 {
3458 MVD_CmdArg mvdcmd;
3459 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3460
3461 SETUP_CMDARG(mvdcmd);
3462 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MCU
3463 SET_DECNUM(mvdcmd, u8Idx);
3464 SET_CMD_RET_FALSE(CMD_SET_MCU_MODE, &mvdcmd);
3465
3466 pstCtrlCfg->u8McuMode = u8Mode;
3467
3468 return TRUE;
3469 }
3470
HAL_MVD_IsMcuMode(MS_U8 u8Idx)3471 MS_BOOL HAL_MVD_IsMcuMode(MS_U8 u8Idx)
3472 {
3473 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3474 return (TRUE == pstCtrlCfg->u8McuMode);
3475 }
3476
3477 //------------------------------------------------------------------------------
3478 /// Set firmware as ForceInterlace mode
3479 /// @return -TRUE for success; FALSE for failure.
3480 //------------------------------------------------------------------------------
HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx,MS_U8 u8Mode)3481 MS_BOOL HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx, MS_U8 u8Mode)
3482 {
3483 MVD_CmdArg mvdcmd;
3484
3485 SETUP_CMDARG(mvdcmd);
3486 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable
3487 mvdcmd.Arg1 = 0;
3488 SET_DECNUM(mvdcmd, u8Idx);
3489 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
3490
3491 return TRUE;
3492 }
3493
3494 //------------------------------------------------------------------------------
3495 /// Set firmware as Progressive mode
3496 /// @return -TRUE for success; FALSE for failure.
3497 //------------------------------------------------------------------------------
HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx,MS_U8 u8Mode)3498 MS_BOOL HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx, MS_U8 u8Mode)
3499 {
3500 MVD_CmdArg mvdcmd;
3501
3502 SETUP_CMDARG(mvdcmd);
3503 mvdcmd.Arg0 = 0;
3504 mvdcmd.Arg1 = u8Mode; //1: enable, 0:disable
3505 SET_DECNUM(mvdcmd, u8Idx);
3506 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
3507
3508 return TRUE;
3509 }
3510
3511 //------------------------------------------------------------------------------
3512 /// Inform firwmare that PTS is updated.
3513 /// @return -TRUE for success; FALSE for failure.
3514 //------------------------------------------------------------------------------
HAL_MVD_UpdatePts(MS_U8 u8Idx)3515 MS_BOOL HAL_MVD_UpdatePts(MS_U8 u8Idx)
3516 {
3517 MVD_CmdArg mvdcmd;
3518
3519 SETUP_CMDARG(mvdcmd);
3520 SET_DECNUM(mvdcmd, u8Idx);
3521 SET_CMD_RET_FALSE(CMD_SEND_UNI_PTS, &mvdcmd);
3522
3523 return TRUE;
3524 }
3525
3526
HAL_MVD_FrameCapture(MS_U8 u8Idx,MS_U8 u8FrmIdx,MS_BOOL bEnable)3527 MS_BOOL HAL_MVD_FrameCapture(MS_U8 u8Idx, MS_U8 u8FrmIdx, MS_BOOL bEnable)
3528 {
3529 MVD_CmdArg mvdcmd;
3530
3531 SETUP_CMDARG(mvdcmd);
3532 mvdcmd.Arg0 = bEnable; //0 or 1 to enable/disable the freeze function
3533 mvdcmd.Arg2 = u8FrmIdx; //specify the freezed frame index
3534 MVD_DEBUGINFO(MVD_PRINT("CAPTURE_FRAME: idx=0x%x, enable=0x%x\n", u8FrmIdx, bEnable));
3535 SET_DECNUM(mvdcmd, u8Idx);
3536 SET_CMD_RET_FALSE(CMD_ENABLE_FREEZE_PIC, &mvdcmd);
3537
3538 return TRUE;
3539 }
3540
3541 //------------------------------------------------------------------------------
3542 /// Set HW buffers' start address to MVD FW
3543 /// Return (the end address - 1)
3544 /// @param -u32Addr \b IN : start address (MIU offset)
3545 //------------------------------------------------------------------------------
HAL_MVD_SetHWBuffer(MS_U8 u8Idx,MS_VIRT u32Add)3546 MS_VIRT HAL_MVD_SetHWBuffer(MS_U8 u8Idx, MS_VIRT u32Add)
3547 {
3548 MS_VIRT tmpAdr;
3549
3550 MVD_DEBUGINFO(MVD_PRINT("====> %s u32Add = 0x%lx\n", __FUNCTION__, (unsigned long)u32Add));
3551 tmpAdr = (MemAlign(u32Add, MVD_FW_IAP_BUF_ALIGN));
3552 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_IAP_BUF_ADR =%lx\n",(unsigned long)tmpAdr));
3553 HAL_MVD_SetIAPBufferAddr(u8Idx, tmpAdr);
3554 tmpAdr += MVD_FW_IAP_BUF_LEN;
3555
3556 tmpAdr = (MemAlign(tmpAdr, MVD_FW_DP_BUF_ALIGN));
3557 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_DP_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3558 HAL_MVD_SetDPBufferAddr(u8Idx, tmpAdr);
3559 tmpAdr += MVD_FW_DP_BUF_LEN;
3560
3561 tmpAdr = (MemAlign(tmpAdr, MVD_FW_MV_BUF_ALIGN));
3562 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_MV_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3563 HAL_MVD_SetMVBufferAddr(u8Idx, tmpAdr);
3564 tmpAdr += MVD_FW_MV_BUF_LEN;
3565 MVD_DEBUGINFO(MVD_PRINT("====> %s End of HW buffers = 0x%lx\n", __FUNCTION__, (unsigned long)tmpAdr));
3566
3567 return tmpAdr;
3568 }
3569
3570 //------------------------------------------------------------------------------
3571 /// Set the number of framebuffer
3572 /// @param -u8FrmNum \b IN : the number of framebuffer
3573 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx,MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)3574 void HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx, MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)
3575 {
3576 #define MVD_FBNUM_DEFAULT 4
3577 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
3578
3579 MVD_CmdArg mvdcmd;
3580
3581 MVD_DEBUGINFO(MVD_PRINT("%s u8FrmNum = %d\n", __FUNCTION__, u8FrmNum));
3582 if (u8FrmNum < MVD_FBNUM_MIN)
3583 {
3584 MVD_DEBUGINFO(MVD_PRINT("%s set u8FrmNum as %d instead of %d!\n",
3585 __FUNCTION__, MVD_FBNUM_MIN, u8FrmNum));
3586 u8FrmNum = MVD_FBNUM_MIN;
3587 }
3588 SETUP_CMDARG(mvdcmd);
3589 mvdcmd.Arg0 = u8FrmNum;
3590 mvdcmd.Arg1 = u32FBUsedSize&0xff;
3591 mvdcmd.Arg2 = (u32FBUsedSize>>8)&0xff;
3592 mvdcmd.Arg3 = (u32FBUsedSize>>16)&0xff;
3593 mvdcmd.Arg4 = (u32FBUsedSize>>24)&0xff;
3594 SET_DECNUM(mvdcmd, u8Idx);
3595 if (HAL_MVD_MVDCommand( CMD_FB_NUM, &mvdcmd ) == FALSE)
3596 {
3597 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_NUM ) );
3598 return;
3599 }
3600 return;
3601 }
3602
MVD_WriteFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size,MS_U32 u32Val)3603 static MS_BOOL MVD_WriteFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size, MS_U32 u32Val)
3604 {
3605 MS_BOOL bRet = FALSE;
3606 MS_VIRT u32BufStart = NULL;
3607 switch (eBuffType)
3608 {
3609 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
3610 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
3611 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
3612 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
3613 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
3614 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
3615 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
3616 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
3617 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
3618 default:
3619 break;
3620 }
3621 if (NULL == u32BufStart)
3622 {
3623 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3624 __FUNCTION__, u8Idx, eBuffType, u16Offset, u8Size);
3625 return bRet;
3626 }
3627
3628 if (u8Size == sizeof(MS_U8))
3629 {
3630 bRet = HAL_MVD_MemWriteByte(u32BufStart+u16Offset, (MS_U8)u32Val);
3631 }
3632 else if (u8Size == sizeof(MS_U32))
3633 {
3634 bRet = HAL_MVD_MemWrite4Byte(u32BufStart+u16Offset, u32Val);
3635 }
3636
3637 MVD_DEBUGINFO(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3638 __FUNCTION__, u32Val, u8Idx, eBuffType, u16Offset, u8Size));
3639 return bRet;
3640 }
3641
3642 //================== Vol Info ==================//
HAL_MVD_GetBitsRate(MS_U8 u8Idx)3643 MS_U32 HAL_MVD_GetBitsRate(MS_U8 u8Idx)
3644 {
3645 //Ref 13818-2, this flag is unit of 400 bits/sec
3646 return MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_BIT_RATE, sizeof(MS_U32))*400;
3647 }
3648
HAL_MVD_GetVideoRange(MS_U8 u8Idx)3649 MS_U8 HAL_MVD_GetVideoRange(MS_U8 u8Idx)
3650 {
3651 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_VIDEO_RANGE, sizeof(MS_U8));
3652 }
3653
HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)3654 MS_BOOL HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)
3655 {
3656 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_LOW_DELAY, sizeof(MS_U8));
3657 }
3658
HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)3659 MS_BOOL HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)
3660 {
3661 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_MPEG_FRC_MODE, sizeof(MS_U8));
3662 }
3663
HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)3664 MS_BOOL HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)
3665 {
3666 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_DS_ENABLE, sizeof(MS_U8));
3667 }
3668
HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)3669 MS_BOOL HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)
3670 {
3671 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_FIRST_DISPLAY, sizeof(MS_U8));
3672 }
3673
3674
3675 //================== FrameInfo ==================//
HAL_MVD_GetPicCounter(MS_U8 u8Idx)3676 MS_U32 HAL_MVD_GetPicCounter(MS_U8 u8Idx)
3677 {
3678 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FRAME_COUNT, sizeof(MS_U32));
3679 }
3680
HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)3681 MS_U32 HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)
3682 {
3683 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SKIP_FRAME_COUNT, sizeof(MS_U32));
3684 }
3685
HAL_MVD_GetPicType(MS_U8 u8Idx)3686 MVD_PicType HAL_MVD_GetPicType(MS_U8 u8Idx)
3687 {
3688 MS_U32 picType = 0xff;
3689 MVD_PicType ret = E_MVD_PIC_UNKNOWN;
3690
3691 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3692 {
3693 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3694 return E_MVD_PIC_UNKNOWN;
3695 }
3696 picType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PICTURE_TYPE, sizeof(MS_U32));
3697 switch (picType)
3698 {
3699 case 0:
3700 ret = E_MVD_PIC_I;
3701 break;
3702 case 1:
3703 ret = E_MVD_PIC_P;
3704 break;
3705 case 2:
3706 ret = E_MVD_PIC_B;
3707 break;
3708 default:
3709 break;
3710 }
3711 return ret;
3712 }
3713
HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)3714 MS_S32 HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)
3715 {
3716 return (MS_S32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PTS_STC, sizeof(MS_S32));
3717 }
3718
HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)3719 MS_U8 HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)
3720 {
3721 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FB_INDEX, sizeof(MS_U8));
3722 }
3723
HAL_MVD_GetVldErrCount(MS_U8 u8Idx)3724 MS_U32 HAL_MVD_GetVldErrCount(MS_U8 u8Idx)
3725 {
3726 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VLD_ERR_COUNT, sizeof(MS_U32));
3727 }
3728
HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)3729 MS_BOOL HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)
3730 {
3731 return !(MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INVALIDSTREAM, sizeof(MS_U8));
3732 }
3733
HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)3734 MS_U8 HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)
3735 {
3736 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FIRST_I_FOUND, sizeof(MS_U8));
3737 }
3738
3739 //------------------------------------------------------------------------------
3740 /// Set PTS base to MVD F/W
3741 /// @param -u32pts \b IN : pts unit in 90k counter
3742 //------------------------------------------------------------------------------
HAL_MVD_SetPTSBase(MS_U8 u8Idx,MS_U32 u32pts)3743 void HAL_MVD_SetPTSBase(MS_U8 u8Idx, MS_U32 u32pts)
3744 {
3745 MVD_CmdArg mvdcmd;
3746
3747 SET_CMDARG(mvdcmd, u32pts, u8Idx);
3748 if (HAL_MVD_MVDCommand( CMD_PTS_BASE, &mvdcmd ) == FALSE)
3749 {
3750 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_BASE ) );
3751 }
3752 return;
3753 }
3754
HAL_MVD_GetPTS(MS_U8 u8Idx)3755 MS_U32 HAL_MVD_GetPTS(MS_U8 u8Idx)
3756 {
3757 MS_U32 u32PTS = 0;
3758
3759 u32PTS = (MS_U32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3760 u32PTS = _90K_TO_MS(u32PTS);
3761 return u32PTS;
3762 }
3763
HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)3764 MS_U64 HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)
3765 {
3766 MS_U64 u64PTS = 0;
3767 MS_U64 u32_high32_PTS = 0;
3768 MS_U64 u32_low32_PTS = 0;
3769
3770 if(eType==E_MVD_PTS_DISP)
3771 {
3772 u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3773 u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS_MSB, sizeof(MS_U32));
3774 }
3775 else if(eType==E_MVD_PTS_PRE_PAS)
3776 {
3777 u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_LOW, sizeof(MS_U32));
3778 u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_HIGH, sizeof(MS_U32));
3779 }
3780
3781 u64PTS = (u32_high32_PTS<<32)|u32_low32_PTS;
3782 _90K_TO_MS_U64(u64PTS);
3783 return u64PTS;
3784 }
3785
HAL_MVD_GetNextPTS(MS_U8 u8Idx)3786 MS_U32 HAL_MVD_GetNextPTS(MS_U8 u8Idx)
3787 {
3788 return (MS_U32)_90K_TO_MS(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_NEXT_PTS, sizeof(MS_U32)));
3789 }
3790
HAL_MVD_GetChromaFormat(MS_U8 u8Idx)3791 MS_U32 HAL_MVD_GetChromaFormat(MS_U8 u8Idx)
3792 {
3793 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CHROMA_FORMAT, sizeof(MS_U8));
3794 }
3795
HAL_MVD_GetGOPCount(MS_U8 u8Idx)3796 MS_U32 HAL_MVD_GetGOPCount(MS_U8 u8Idx)
3797 {
3798 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_I_FCNT, sizeof(MS_U32))
3799 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_P_FCNT, sizeof(MS_U32))
3800 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_B_FCNT, sizeof(MS_U32));
3801 }
3802
HAL_MVD_GetColorFormat(MS_U8 u8Idx)3803 MS_U8 HAL_MVD_GetColorFormat(MS_U8 u8Idx)
3804 {
3805 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3806 {
3807 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3808 return 0xff;
3809 }
3810
3811 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VIDEO_FORMAT, sizeof(MS_U8));
3812 }
3813
HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)3814 MS_U8 HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)
3815 {
3816 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3817 {
3818 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3819 return 0xff;
3820 }
3821
3822 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MATRIX_COEF, sizeof(MS_U8));
3823 }
3824
HAL_MVD_StepDecode(MS_U8 u8Idx)3825 MS_BOOL HAL_MVD_StepDecode(MS_U8 u8Idx)
3826 {
3827 MVD_CmdArg mvdcmd;
3828 SETUP_CMDARG(mvdcmd);
3829 SET_DECNUM(mvdcmd, u8Idx);
3830 SET_CMD_RET_FALSE(CMD_SINGLE_STEP, &mvdcmd);
3831
3832 if (HAL_MVD_Resume(u8Idx) == FALSE)
3833 {
3834 MVD_DEBUGERROR(MVD_PRINT("Command: HAL_MVD_Resume fail!!\r\n"));
3835 return FALSE;
3836 }
3837
3838 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3839 if (pCtrlCfg)
3840 {
3841 pCtrlCfg->bStepDecode = TRUE;
3842 }
3843
3844 return TRUE;
3845 }
3846
HAL_MVD_IsStepDispDone(MS_U8 u8Idx)3847 MS_BOOL HAL_MVD_IsStepDispDone(MS_U8 u8Idx)
3848 {
3849 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8));
3850 }
3851
HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)3852 MS_BOOL HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)
3853 {
3854 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_TO_PTS_DONE, sizeof(MS_U8));
3855 }
3856
3857 //Only for RCV.
HAL_MVD_GetPayloadLen(MS_U8 u8Idx)3858 MS_U32 HAL_MVD_GetPayloadLen(MS_U8 u8Idx)
3859 {
3860 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_RCV_PAYLOAD_LENGTH, sizeof(MS_U32));
3861 }
3862
3863 //Only for RCV.
HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)3864 MS_BOOL HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)
3865 {
3866 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MEET_FILE_END_SC, sizeof(MS_U8));
3867 }
3868
HAL_MVD_IsCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3869 MS_BOOL HAL_MVD_IsCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3870 {
3871 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3872 MS_BOOL bCmdRdy = FALSE;
3873
3874 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3875
3876 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3877 MVD_DEBUGINFO(MVD_PRINT("u32CmdState.value = 0x%x\n", u32CmdState.value));
3878 switch (eCmd)
3879 {
3880 case MVD_HANDSHAKE_PAUSE:
3881 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_pause);
3882 break;
3883 case MVD_HANDSHAKE_SLQ_RST:
3884 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_slq_reset);
3885 break;
3886 case MVD_HANDSHAKE_STOP:
3887 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_stop);
3888 break;
3889 case MVD_HANDSHAKE_SKIP_DATA:
3890 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_skip_data);
3891 break;
3892 case MVD_HANDSHAKE_SINGLE_STEP:
3893 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_single_step);
3894 break;
3895 case MVD_HANDSHAKE_SCALER_INFO:
3896 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_scaler_data_ready);
3897 break;
3898 case MVD_HANDSHAKE_GET_NXTDISPFRM:
3899 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready);
3900 break;
3901 case MVD_HANDSHAKE_PARSER_RST:
3902 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_parser_rst);
3903 break;
3904 case MVD_HANDSHAKE_RST_CC608:
3905 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc608_rst);
3906 break;
3907 case MVD_HANDSHAKE_RST_CC708:
3908 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc708_rst);
3909 break;
3910 case MVD_HANDSHAKE_VIRTUAL_COMMAND:
3911 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_virtualCommand);
3912 break;
3913 case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
3914 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_flush);
3915 break;
3916 case MVD_HANDSHAKE_VSYNC_CONTROL:
3917 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_vsync_control);
3918 break;
3919 default:
3920 bCmdRdy = FALSE;
3921 break;
3922 }
3923 return bCmdRdy;
3924 }
3925
HAL_MVD_ClearCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3926 MS_BOOL HAL_MVD_ClearCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3927 {
3928 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3929
3930 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3931
3932 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3933 MVD_DEBUGINFO(MVD_PRINT("before CLR u32CmdState.value = 0x%x\n", u32CmdState.value));
3934 switch (eCmd)
3935 {
3936 case MVD_HANDSHAKE_SCALER_INFO:
3937 u32CmdState.mvdcmd_handshake_scaler_data_ready = 0;
3938 break;
3939 default:
3940 break;
3941 }
3942
3943 //write the value back: may it overwrite the value that f/w is supposed to write?
3944 MVD_WriteFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32), u32CmdState.value);
3945 MVD_DEBUGINFO(MVD_PRINT("after CLR u32CmdState.value = 0x%x\n",
3946 MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32))));
3947 return TRUE;
3948 }
3949
3950
HAL_MVD_GetTimeCode(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_TimeCode * pInfo)3951 MS_BOOL HAL_MVD_GetTimeCode(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_TimeCode* pInfo)
3952 {
3953 MS_BOOL bRet = FALSE;
3954 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3955 if (NULL == pInfo)
3956 {
3957 return FALSE;
3958 }
3959
3960 HAL_MVD_InvalidBuffRetFalse(pu8MVDGetFrameInfoBufStart);
3961
3962 if (E_MVD_FRMINFO_DECODE == eType)
3963 {
3964 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS);
3965 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES);
3966 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS);
3967 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES);
3968 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG);
3969 }
3970 else if (E_MVD_FRMINFO_DISPLAY == eType)
3971 {
3972 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS_DISP);
3973 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES_DISP);
3974 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS_DISP);
3975 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES_DISP);
3976 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG_DISP);
3977 }
3978 else
3979 {
3980 bRet = FALSE;
3981 }
3982
3983 return bRet;
3984 }
3985
HAL_MVD_GetDispCnt(MS_U8 u8Idx)3986 MS_U32 HAL_MVD_GetDispCnt(MS_U8 u8Idx)
3987 {
3988 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPLAYED_CNT, sizeof(MS_U32));
3989 }
3990
HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)3991 MS_U32 HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)
3992 {
3993 #ifdef OFFSET_CUR_MIN_TSP_DATA_SIZE
3994 return MVD_GetFWBuffData(u8HalIdx, FW_BUFF_FRMINFO, OFFSET_CUR_MIN_TSP_DATA_SIZE, sizeof(MS_U32));
3995 #else
3996 return 0x400;
3997 #endif
3998 }
3999
HAL_MVD_GetDropCnt(MS_U8 u8Idx)4000 MS_U32 HAL_MVD_GetDropCnt(MS_U8 u8Idx)
4001 {
4002 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DROP_FRAME_COUNT, sizeof(MS_U32));
4003 }
4004
HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)4005 MS_U32 HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)
4006 {
4007 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
4008
4009 if(pu8MVDGetFrameInfoBufStart==0)
4010 {
4011 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState error: pu8MVDGetFrameInfoBufStart=NULL\n"));
4012 return 0;
4013 }
4014
4015 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState()=%x,%x,%x,%x,%x\n",
4016 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT)),
4017 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE)),
4018 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_DIFF_FIELD_NO)),
4019 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT_LATCH)),
4020 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_FRAME_COUNT))));
4021
4022 return HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE);
4023 }
4024
4025 //Get ErrStatus when ErrCode==ErrShape
MVD_GetErrShapeStat(MS_U32 u32errStat)4026 static MVD_ErrStatus MVD_GetErrShapeStat(MS_U32 u32errStat)
4027 {
4028 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
4029 switch (u32errStat)
4030 {
4031 case 0:
4032 st = E_MVD_ERR_SHAPE_RECTANGULAR;
4033 break;
4034 case 1:
4035 st = E_MVD_ERR_SHAPE_BINARY;
4036 break;
4037 case 2:
4038 st = E_MVD_ERR_SHAPE_BINARY_ONLY;
4039 break;
4040 case 3:
4041 st = E_MVD_ERR_SHAPE_GRAYSCALE;
4042 break;
4043 default:
4044 break;
4045 }
4046 return st;
4047 }
4048
4049 //Get ErrStatus when ErrCode==ErrSprite
MVD_GetErrSpriteStat(MS_U32 u32errStat)4050 static MVD_ErrStatus MVD_GetErrSpriteStat(MS_U32 u32errStat)
4051 {
4052 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
4053 switch (u32errStat)
4054 {
4055 case 0:
4056 st = E_MVD_ERR_USED_SPRITE_UNUSED;
4057 break;
4058 case 1:
4059 st = E_MVD_ERR_USED_SPRITE_STATIC;
4060 break;
4061 case 2:
4062 st = E_MVD_ERR_USED_SPRITE_GMC;
4063 break;
4064 case 3:
4065 st = E_MVD_ERR_USED_SPRITE_RESERVED;
4066 break;
4067 default:
4068 break;
4069 }
4070 return st;
4071 }
4072
HAL_MVD_GetErrInfo(MS_U8 u8Idx,MVD_ErrCode * errCode,MVD_ErrStatus * errStatus)4073 void HAL_MVD_GetErrInfo(MS_U8 u8Idx, MVD_ErrCode *errCode, MVD_ErrStatus *errStatus)
4074 {
4075 MS_U32 errorCode = E_MVD_ERR_UNKNOWN;
4076 MS_U32 errorStatus = E_MVD_ERR_STATUS_UNKOWN;
4077 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
4078
4079 if(pu8MVDGetFrameInfoBufStart==0)
4080 {
4081 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetErrInfo error!\n"));
4082 return;
4083 }
4084
4085 errorCode = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_CODE);
4086 errorStatus = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_STATUS);
4087
4088 switch (errorCode)
4089 {
4090 case VOL_SHAPE:
4091 *errCode = E_MVD_ERR_SHAPE;
4092 *errStatus = MVD_GetErrShapeStat(errorStatus);
4093 break;
4094 case VOL_USED_SPRITE:
4095 *errCode = E_MVD_ERR_USED_SPRITE;
4096 *errStatus = MVD_GetErrSpriteStat(errorStatus);
4097 break;
4098 case VOL_NOT_8_BIT:
4099 *errCode = E_MVD_ERR_NOT_8_BIT;
4100 *errStatus = E_MVD_ERR_STATUS_NONE;
4101 break;
4102 case VOL_NERPRED_ENABLE:
4103 *errCode = E_MVD_ERR_NERPRED_ENABLE;
4104 *errStatus = E_MVD_ERR_STATUS_NONE;
4105 break;
4106 case VOL_REDUCED_RES_ENABLE:
4107 *errCode = E_MVD_ERR_REDUCED_RES_ENABLE;
4108 *errStatus = E_MVD_ERR_STATUS_NONE;
4109 break;
4110 case VOL_SCALABILITY:
4111 *errCode = E_MVD_ERR_SCALABILITY;
4112 *errStatus = E_MVD_ERR_STATUS_NONE;
4113 break;
4114 case VOL_H263_ERROR:
4115 *errCode = E_MVD_ERR_H263_ERROR;
4116 *errStatus = E_MVD_ERR_STATUS_NONE;
4117 break;
4118 case VOL_RES_NOT_SUPPORT:
4119 *errCode = E_MVD_ERR_RES_NOT_SUPPORT;
4120 *errStatus = E_MVD_ERR_STATUS_NONE;
4121 break;
4122 case VOL_MPEG4_NOT_SUPPORT:
4123 *errCode = E_MVD_ERR_MPEG4_NOT_SUPPORT;
4124 *errStatus = E_MVD_ERR_STATUS_NONE;
4125 break;
4126 case VOL_PROFILE_NOT_SUPPORT:
4127 *errCode = E_MVD_ERR_PROFILE_NOT_SUPPORT;
4128 *errStatus = E_MVD_ERR_STATUS_NONE;
4129 break;
4130 case VOL_RCV_ERROR_OCCUR:
4131 *errCode = E_MVD_ERR_RCV_ERROR_OCCUR;
4132 *errStatus = E_MVD_ERR_STATUS_NONE;
4133 break;
4134 case VOL_OTHER:
4135 *errCode = E_MVD_ERR_OTHER;
4136 *errStatus = E_MVD_ERR_STATUS_NONE;
4137 break;
4138 default:
4139 *errCode = E_MVD_ERR_UNKNOWN;
4140 *errStatus = E_MVD_ERR_STATUS_UNKOWN;
4141 break;
4142 }
4143
4144 return;
4145 }
4146
4147 //take care MIU1 address
HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)4148 MS_PHY HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)
4149 {
4150 if (u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu2BaseAddr)
4151 {
4152 return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu2BaseAddr);
4153 }
4154 else if(u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu1BaseAddr)
4155 {
4156 return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu1BaseAddr);
4157 }
4158 else
4159 {
4160 return u32PhyAdd;
4161 }
4162 }
4163
4164
HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx,MVD_PacketInfo * pstVideoPKT)4165 MS_BOOL HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx, MVD_PacketInfo *pstVideoPKT)
4166 {
4167 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
4168 MS_VIRT u32EsLast;
4169 MS_VIRT* u32LastEntry = &pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
4170 MS_VIRT* pu32EsNew = &pstSlqTblInfo->pDrvEsTbl->u32WrPtr;
4171 MS_U32 u32EntryWord = 0;
4172 MS_U32 u32Index = 0;
4173 MS_U32 u32Pts;
4174 MS_VIRT u32MVDFWPtsTblAddr = NULL;
4175 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4176
4177 MS_U32 u32ESStart=0;
4178 MS_U32 u32ESEnd=0;
4179 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4180
4181
4182 #if _SLQTBL_DUMP_PKT
4183 // static MS_U32 u32SendTimes[MAX_DEC_NUM]= {0, 0};
4184
4185 MVD_PRINT("Pkt[%x] st=0x%x len=0x%x pts=0x%x id_l=0x%x id_h=0x%x\n", u32SendTimes[u8Idx]++,
4186 pstVideoPKT->u32StAddr, pstVideoPKT->u32Length, pstVideoPKT->u32TimeStamp,
4187 pstVideoPKT->u32ID_L, pstVideoPKT->u32ID_H);
4188 #endif
4189
4190 #ifdef VDEC3
4191 if(pstCtrlCfg->u8McuMode == FALSE)
4192 #endif
4193 {
4194 u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
4195 MS_ASSERT(u32MVDFWPtsTblAddr != NULL);
4196 if (u32MVDFWPtsTblAddr)
4197 {
4198 MS_VIRT u32PtsTblEntryAddr = 0;
4199 //so far, this is the only place that driver will write f/w 1M area after init.
4200 u32Index = (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/8;
4201 if(HAL_MVD_IsMcuMode(u8Idx) == FALSE)
4202 {
4203 if (pstVideoPKT->u32TimeStamp != MVD_NULLPKT_PTS)
4204 {
4205 u32Pts = _MS_TO_90K(pstVideoPKT->u32TimeStamp);
4206 }
4207 else
4208 {
4209 u32Pts = MVD_NULLPKT_PTS;
4210 }
4211 }
4212 else
4213 {
4214 u32Pts = pstVideoPKT->u32TimeStamp;
4215 }
4216 u32PtsTblEntryAddr = u32MVDFWPtsTblAddr+u32Index*MVD_FW_SLQTBL_PTS_LEN;
4217 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+4, pstSlqTblInfo->u32DummyPktCnt); //dummyPktCnt
4218 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+8, pstVideoPKT->u32ID_L); //idLow
4219 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+12, pstVideoPKT->u32ID_H); //idHigh
4220 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+16, u32Pts); //PTS
4221 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr, (pstSlqTblInfo->u32SlqByteCnt)&0xffffff); //byteCnt
4222 //MVD_PRINT("PTS=0x%x(%x), idx=0x%x add=0x%x\n", pstVideoPKT->u32TimeStamp,
4223 // HAL_MVD_MemRead4Byte(u32PtsTblEntryAddr+16),
4224 // u32Index, u32PtsTblEntryAddr+16);
4225
4226 if ((HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
4227 && (pstCtrlCfg->eFileSyncMode == E_MVD_TIMESTAMP_STS))
4228 {
4229 if(pMVDHalContext->bDropOnePTS[u8Idx] == FALSE)
4230 {
4231 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12, pstVideoPKT->u32ID_H); //idHigh
4232 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16, pstVideoPKT->u32TimeStamp); //PTS
4233
4234 MVD_DBG_STS(MVD_PRINT(">>> drvMVD pts,idH = %lu, %lu\n", HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16),
4235 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12)));
4236 if (((MVD_NULLPKT_PTS == pstVideoPKT->u32ID_H) && (MVD_NULLPKT_PTS == pstVideoPKT->u32TimeStamp)) == FALSE)
4237 { //Only update PTS to firmware when pts field is valid.
4238 //Plz refer to MDrv_MVD_PushQueue if (u8MstMode == MST_MODE_TRUE) {}
4239 HAL_MVD_UpdatePts(u8Idx); //for uniplayer or MCU mode
4240 }
4241 }
4242
4243 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
4244 }
4245 }
4246 #if _SLQTBL_DUMP_PTS
4247 if (u32Index == 0x177)
4248 {
4249 _SLQTbl_DumpPtsTbl(u8Idx, 0, 0x179);
4250 }
4251 #endif
4252 }
4253 pstSlqTblInfo->u32SlqByteCnt += pstVideoPKT->u32Length;
4254
4255 //update SLQ tbl entry
4256 //u32EsLast = (pstVideoPKT->u32StAddr)+pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4257 u32EsLast = (pstVideoPKT->u32StAddr)+HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
4258 HAL_MVD_MemWrite4Byte(*pu32EsNew, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4259 u32ESStart = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4260
4261 u32EsLast += pstVideoPKT->u32Length; //update ES write pointer
4262 //Notice: This is for MVD HW, so no need to minus one.
4263 HAL_MVD_MemWrite4Byte((*pu32EsNew)+4, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4264 u32ESEnd = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4265
4266 *pu32EsNew += 8;
4267 if (*pu32EsNew >= pstSlqTblInfo->pDrvEsTbl->u32EndAdd)
4268 { //wrap to the beginning of the table
4269 MVD_DEBUGINFO(MVD_PRINT("...ES wrapping to the beginning!\n"));
4270 *pu32EsNew = pstSlqTblInfo->pDrvEsTbl->u32StAdd;
4271 }
4272
4273 //MVD_PRINT("===>[%x] u32ESStart=0x%x u32ESEnd=0x%x u32EsLast=0x%x\n",
4274 // pMVDHalContext->u32SendTimes[u8Idx]++, u32ESStart, u32ESEnd, u32EsLast);
4275
4276 u32EntryWord = u32ESEnd;
4277 HAL_MVD_MemWrite4Byte(*u32LastEntry, u32EntryWord);
4278 //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry));
4279 //MVD_PRINT("===> u32EntryWord0=0x%x\n", u32EntryWord);
4280
4281 u32EntryWord = u32ESStart;
4282 HAL_MVD_MemWrite4Byte((*u32LastEntry)+4, u32EntryWord);
4283 //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry)+4);
4284 //MVD_PRINT("===> u32EntryWord1=0x%x\n", u32EntryWord);
4285
4286 *u32LastEntry += 8;
4287 if (*u32LastEntry >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
4288 { //wrap to the beginning of the table
4289 MVD_DEBUGINFO(MVD_PRINT("...wrapping to the beginning!\n"));
4290 *u32LastEntry = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4291 //also wrap DivX311 pattern table
4292 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
4293 }
4294
4295 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty)
4296 {
4297 pstSlqTblInfo->pDrvSlqTbl->u32Empty -= SLQ_ENTRY_LEN;
4298 }
4299
4300 return TRUE;
4301 }
4302
4303 //Table of frame rate code for MPEG-2
4304 #if 0
4305 #define FRM_RATE_CODE_NUM 9
4306 static const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
4307 {
4308 NULL,23976,24000,25000,29976,30000,50000,59947,60000
4309 };
4310 #endif
MVD_GCD(MS_U32 u32A,MS_U32 u32B)4311 static MS_U32 MVD_GCD(MS_U32 u32A, MS_U32 u32B)
4312 {
4313 MS_S32 i;
4314 MS_U32 x[4]; /* need x[0], x[1], x[i-1] */
4315
4316 if (u32A > u32B)
4317 {
4318 x[0] = u32A; x[1] = u32B;
4319 }
4320 else
4321 {
4322 x[0] = u32B; x[1] = u32A;
4323 }
4324
4325 i = 1;
4326
4327 #define w(x) (((x)<4)?(x):(2+((x)&1)))
4328
4329 while( x[w(i)] != 0 )
4330 {
4331 x[w(i+1)] = x[w(i-1)] % x[w(i)];
4332 i++;
4333 }
4334
4335 return x[w(i-1)];
4336
4337 #undef w
4338 }
HAL_MVD_GetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)4339 void HAL_MVD_GetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo)
4340 {
4341 FW_VOL_INFO gvolInfo;
4342 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
4343 MS_VIRT temp = 0;
4344 MS_U32 u32DAR_Width=0,u32DAR_Height=0,u32PAR_Width=0,u32PAR_Height=0,u32GCD=0;
4345 MS_U32 u32Vertical_Size=0, u32Horizontal_Size=0;
4346 //13818-2 page 38 Table 6-3
4347 MS_U8 u8DARTable[5][2] = { {1,1}, {1,1}, {4,3}, {16,9}, {221,100} };
4348 MS_U32 pu8MVDGetVolBufStart = NULL;
4349 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4350
4351 pu8MVDGetVolBufStart = GET_VOL_BUFFADD(u8Idx);
4352 if (pu8MVDGetVolBufStart == NULL)
4353 {
4354 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetFrameInfo error: pu8MVDGetVolBufStart=NULL\n"));
4355 return;
4356 }
4357
4358 HAL_MVD_CPU_Sync();
4359 HAL_MVD_ReadMemory();
4360
4361 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8Idx),temp);
4362
4363 gvolInfo = (*(volatile FW_VOL_INFO*)(HAL_MVD_PA2NonCacheSeg(temp)));
4364
4365 pinfo->u16HorSize = (MS_U16) gvolInfo.width;
4366 pinfo->u16VerSize = (MS_U16) gvolInfo.height;
4367 pinfo->u16par_width = (MS_U16) gvolInfo.par_width;
4368 pinfo->u16par_height = (MS_U16) gvolInfo.par_height;
4369 pinfo->u8AspectRate = gvolInfo.aspect_ratio;
4370
4371 pinfo->u16CropBottom = gvolInfo.CropBottom;
4372 pinfo->u16CropTop = 0;
4373 pinfo->u16CropLeft = 0;
4374
4375 if (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK)
4376 {
4377 //Notice: Firmware and driver have to be consistent for this part,
4378 // otherwise the pitch will not match and video is noisy.
4379 pinfo->u16CropRight = MVD_WIDTH_ALIGN_BYTE - (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK);
4380 pinfo->u16HorSize = ((pinfo->u16HorSize >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4381 }
4382 else
4383 {
4384 pinfo->u16CropRight = 0;
4385 }
4386
4387 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
4388 if ((curCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER) ||
4389 (curCodecType == E_MVD_CODEC_DIVX311) || (curCodecType == E_MVD_CODEC_FLV))
4390 {
4391 pinfo->u8Interlace= FALSE; //divx311/flv/svh just has progressive mode
4392 MS_ASSERT(gvolInfo.progressive_sequence == 1); //FW will init it as 1
4393 }
4394 else
4395 {
4396 if (gvolInfo.progressive_sequence == 0)
4397 {
4398 pinfo->u8Interlace=1;
4399 }
4400 else
4401 {
4402 pinfo->u8Interlace=0;
4403 }
4404 }
4405
4406 ///Calculate PAR info
4407 if (pinfo->u16par_width == 0 || pinfo->u16par_height == 0)
4408 {
4409 if ((pinfo->u8AspectRate > 0) && (pinfo->u8AspectRate < 5 ))
4410 {
4411 if (pinfo->u8AspectRate == 1)
4412 { //SAR=1.0 square sample
4413 u32DAR_Width = (MS_U32)pinfo->u16HorSize;
4414 u32DAR_Height = (MS_U32)pinfo->u16VerSize;
4415 pinfo->u16par_width = 1;
4416 pinfo->u16par_height = 1;
4417 }
4418 else
4419 {
4420 u32DAR_Width = (MS_U32)u8DARTable[pinfo->u8AspectRate][0];
4421 u32DAR_Height = (MS_U32)u8DARTable[pinfo->u8AspectRate][1];
4422 u32Vertical_Size = (MS_U32)pinfo->u16VerSize;
4423 u32Horizontal_Size = (MS_U32)(pinfo->u16HorSize - pinfo->u16CropRight);
4424 u32PAR_Width = u32DAR_Width * u32Vertical_Size;
4425 u32PAR_Height = u32DAR_Height * u32Horizontal_Size;
4426 u32GCD = MVD_GCD(u32PAR_Width, u32PAR_Height);
4427 if (0 == u32GCD)
4428 {
4429 pinfo->u16HorSize = 0xFFFF;
4430 pinfo->u16VerSize = 0xFFFF;
4431
4432 return;
4433 }
4434 else
4435 {
4436 pinfo->u16par_width = (MS_U16) (u32PAR_Width / u32GCD);
4437 pinfo->u16par_height = (MS_U16) (u32PAR_Height / u32GCD);
4438 MVD_DEBUGVERBAL(MVD_PRINT("u32PAR_Width:%d,u32PAR_Height:%d,GCD:%d\n",u32PAR_Width,u32PAR_Height,u32GCD));
4439 }
4440 }
4441 }
4442 else
4443 {
4444 //set to 0 to indicate it's abnormal
4445 u32DAR_Width = 0;
4446 u32DAR_Height = 0;
4447 pinfo->u16par_width = 0;
4448 pinfo->u16par_height = 0;
4449 }
4450 MVD_DEBUGVERBAL(MVD_PRINT("u32DAR_Width:%d,u32DAR_Height%d\n",u32DAR_Width,u32DAR_Height));
4451 }
4452 MVD_DEBUGVERBAL(MVD_PRINT("pinfo->u16par_width:%d, pinfo->u16par_height:%d\n",pinfo->u16par_width, pinfo->u16par_height));
4453
4454 if (curCodecType == E_MVD_CODEC_MPEG2)
4455 {
4456 if (gvolInfo.frame_rate < FRM_RATE_CODE_NUM)
4457 {
4458 pinfo->u32FrameRate = stFrameRateCode[gvolInfo.frame_rate];
4459 }
4460 else
4461 {
4462 pinfo->u32FrameRate = 0;
4463 }
4464 }
4465 else if ((curCodecType == E_MVD_CODEC_VC1_ADV) || (curCodecType == E_MVD_CODEC_VC1_MAIN))
4466 {
4467 if ((gvolInfo.vc1_frame_rate != 0) && (gvolInfo.vc1_frame_rate != MVD_U32_MAX))
4468 {
4469 pinfo->u32FrameRate = gvolInfo.vc1_frame_rate;
4470 }
4471 else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
4472 {
4473 pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx] * 1000) / pMVDHalContext->u32DmxFrameRateBase[u8Idx];
4474 }
4475 else
4476 {
4477 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4478 }
4479
4480 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vc1_frameRate=%d\n", pinfo->u32FrameRate));
4481 }
4482 else if (curCodecType == E_MVD_CODEC_MPEG4)
4483 {
4484 if (pDivxInfo->frame_rate != 0)
4485 {
4486 pinfo->u32FrameRate = pDivxInfo->frame_rate;
4487 //report framerate specified in MDrv_MVD_SetFrameInfo(), which is usually obtained from container
4488 }
4489 else if (gvolInfo.frame_rate != 0)
4490 {
4491 pinfo->u32FrameRate = gvolInfo.frame_rate; //report framerate from f/w
4492 }
4493 else if ((gvolInfo.fixed_vop_time_incr != 0) && (gvolInfo.vol_time_incr_res != 0))
4494 {
4495 pinfo->u32FrameRate = (gvolInfo.vol_time_incr_res * 1000) / gvolInfo.fixed_vop_time_incr;
4496 //calculate framerate according to vol header
4497 }
4498 else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
4499 {
4500 pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx] * 1000) / pMVDHalContext->u32DmxFrameRateBase[u8Idx];
4501 }
4502 else
4503 {
4504 pinfo->u32FrameRate = 60000; //set default frame rate according to chip capability
4505 }
4506 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vol_time_incr_res=%d, fixed_vop_time_incr=%d\n", gvolInfo.vol_time_incr_res, gvolInfo.fixed_vop_time_incr));
4507 }
4508 else
4509 {
4510 if (gvolInfo.frame_rate != 0)
4511 {
4512 pinfo->u32FrameRate = gvolInfo.frame_rate;
4513 }
4514 else
4515 {
4516 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4517 }
4518 }
4519 MVD_DEBUGVERBAL(MVD_PRINT("===> MVD: frameRate=%d curCodecType=0x%x\n", pinfo->u32FrameRate, curCodecType));
4520
4521 //for MM
4522 pinfo->u8MPEG1=gvolInfo.mpeg1;
4523 pinfo->u16PTSInterval=gvolInfo.pts_incr;
4524 pinfo->u8PlayMode=gvolInfo.play_mode;
4525 pinfo->u8FrcMode=gvolInfo.mpeg_frc_mode;
4526
4527 //for dynamic scaling
4528 pinfo->bEnableMIUSel = (MS_BOOL)pMVDHalContext->stMiuCfg.u8FWMiuSel;
4529
4530 if(pMVDHalContext->stMiuCfg.u8FWMiuSel >= E_CHIP_MIU_2)
4531 {
4532 MVD_DEBUGERROR(MVD_PRINT("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",pMVDHalContext->stMiuCfg.u8FWMiuSel));
4533 }
4534
4535 if (pstMemCfg->bEnableDynScale)
4536 {
4537 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_DS_BUFFADD(u8Idx),pinfo->u32DynScalingAddr);
4538
4539 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4540 pinfo->u8DynScalingDepth= pCtrlCfg->u8DynScalingDepth;
4541 pinfo->u32DynScalingBufSize= gvolInfo.DSbufsize;
4542 }
4543 else
4544 {
4545 pinfo->u32DynScalingAddr= NULL;
4546 pinfo->u8DynScalingDepth= 0;
4547 pinfo->u32DynScalingBufSize= 0;
4548 }
4549
4550 return;
4551 }
4552
MVD_RstFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType)4553 E_MVD_Result MVD_RstFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType)
4554 {
4555 E_MVD_Result eRet = E_MVD_RET_OK;
4556 MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4557 if (NULL == u32DecFrmInfoAdd)
4558 {
4559 return E_MVD_RET_FAIL;
4560 }
4561
4562 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4563 if (E_MVD_FRMINFO_DECODE == eType)
4564 {
4565 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR), _INIT_ADDR);
4566 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR), _INIT_ADDR);
4567 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP), _INIT_TIMESTAMP);
4568 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L), _INIT_ID);
4569 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H), _INIT_ID);
4570 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH), _INIT_LEN);
4571 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH), _INIT_LEN);
4572 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT), _INIT_LEN);
4573 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE), 0xff);
4574 }
4575 else if (E_MVD_FRMINFO_DISPLAY == eType)
4576 {
4577 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR), _INIT_ADDR);
4578 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR), _INIT_ADDR);
4579 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP), _INIT_TIMESTAMP);
4580 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L), _INIT_ID);
4581 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H), _INIT_ID);
4582 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH), _INIT_LEN);
4583 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH), _INIT_LEN);
4584 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT), _INIT_LEN);
4585 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE), 0xff);
4586 }
4587 else
4588 {
4589 eRet = E_MVD_RET_INVALID_PARAM;
4590 }
4591
4592 return eRet;
4593 }
4594
4595 //Given the start address & the available size for the FW buffers,
4596 //Calculate the start address of each buffers.
MVD_GetFWBuffAdd(MS_VIRT u32Start,MS_U32 u32AvailLen,MVD_FWBuff * pBuff)4597 static MS_BOOL MVD_GetFWBuffAdd(MS_VIRT u32Start, MS_U32 u32AvailLen, MVD_FWBuff* pBuff)
4598 {
4599 MS_VIRT tmpAdr = u32Start;
4600
4601 if(pBuff == NULL)
4602 {
4603 MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4604 return FALSE;
4605 }
4606 tmpAdr += MVD_FW_CODE_LEN;
4607 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_VOL_INFO_BUF_LEN, pBuff->pu8MVDGetVolBufStart);
4608 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_FRAME_INFO_BUF_LEN, pBuff->pu8MVDGetFrameInfoBufStart);
4609 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_DIVX_INFO_BUF_LEN, pBuff->pu8MVDSetHeaderBufStart);
4610 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN,
4611 (MVD3_FW_USER_DATA_BUF_LEN+MVD3_FW_USER_DATA_BUF_BACKUP_LEN), pBuff->u32UserDataBuf);
4612 //MVD3_FW_USER_DATA_BUF_BACKUP_LEN is used as CC decoding buffer for MVD_SUPPORT_X4_CC
4613
4614 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_SLQ_TAB_TMPBUF_LEN, pBuff->u32MVDFWSLQTABTmpbufAdr);
4615 GET_FW_BUFFADD(tmpAdr, MVD_FW_SLQTBL_PTS_BUF_LEN, pBuff->u32MVDFWPtsTblAddr);
4616 GET_FW_BUFFADD(tmpAdr, MVD_FW_DYN_SCALE_BUF_LEN, pBuff->u32DynScalingAdd);
4617 GET_FW_BUFFADD(tmpAdr, MVD_FW_SCALER_INFO_BUF_LEN, pBuff->u32ScalerInfoAdd);
4618 GET_FW_BUFFADD(tmpAdr, MVD_FW_DECFRM_INFO_BUF_LEN, pBuff->u32DecFrmInfoAdd);
4619 GET_FW_BUFFADD(tmpAdr, MVD_FW_VBBU_TABLE_LEN, pBuff->u32VBBUTableAdd);
4620
4621
4622 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetVolBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetVolBufStart));
4623 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetFrameInfoBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetFrameInfoBufStart));
4624 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDSetHeaderBufStart=%lx\n", (unsigned long)pBuff->pu8MVDSetHeaderBufStart));
4625 MVD_DEBUGINFO(MVD_PRINT("u32UserDataBuf start=%lx\n", (unsigned long)pBuff->u32UserDataBuf));
4626 MVD_DEBUGINFO(MVD_PRINT("u32MVDFWSLQTABTmpbufAdr start=%lx\n", (unsigned long)pBuff->u32MVDFWSLQTABTmpbufAdr));
4627 MVD_DEBUGINFO(MVD_PRINT("PtsTblAddr start=%lx\n", (unsigned long)pBuff->u32MVDFWPtsTblAddr));
4628 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAdd start=%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4629 MVD_DEBUGINFO(MVD_PRINT("ScalerInfo start=%lx end=%lx\n",
4630 (unsigned long)pBuff->u32ScalerInfoAdd, (pBuff->u32ScalerInfoAdd+MVD_FW_SCALER_INFO_BUF_LEN)));
4631 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx end=%lx\n",
4632 (unsigned long)pBuff->u32DecFrmInfoAdd, (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN)));
4633
4634 MS_U32 u32ShMemBoundary = (MVD_FW_CODE_LEN==MVD_FW_CODE_LEN_V00) ? MVD_FW_MPOOL_START_OFFSET : MVD_FW_TASK_OFFSET;
4635 #if v3_temp
4636
4637 if ((pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start) > u32ShMemBoundary)
4638 {
4639 //shared memory should not overlap with FW memory pool.
4640 MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%lx out of memory boundary!\n", __FUNCTION__,
4641 (pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start)));
4642 return FALSE;
4643 }
4644 #else
4645 if ((pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start) > u32ShMemBoundary)
4646 {
4647 //shared memory should not overlap with FW memory pool.
4648 MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%x out of memory boundary!\n", __FUNCTION__,
4649 (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start)));
4650 return FALSE;
4651 }
4652 #endif
4653
4654 return TRUE;
4655 }
4656
4657 //Set buffer address to f/w
4658 //Init the memory erea if necessary
MVD_SetFWBuffAdd(MS_U8 u8Idx,MVD_FWBuff * pBuff)4659 static MS_BOOL MVD_SetFWBuffAdd(MS_U8 u8Idx, MVD_FWBuff* pBuff)
4660 {
4661 MS_U32 i;
4662 MVD_SrcMode curSrcMode = E_MVD_SRC_UNKNOWN;
4663 MVD_MEMCfg* pstMemCfg = NULL;
4664 MVD_CtrlCfg* pCtrlCfg = NULL;
4665
4666 if(pBuff == NULL)
4667 {
4668 MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4669 return FALSE;
4670 }
4671
4672 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4673
4674 MVD_DEBUGINFO(MVD_PRINT("\nMIU is (shm,hw,fw)=(%x,%x,%x)\n",u8SHMMiuSel,pstMemCfg->u8HWMiuSel,pstMemCfg->u8FWMiuSel));
4675
4676 curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
4677
4678 HAL_MVD_SetVolInfoBufferAddr(u8Idx, pBuff->pu8MVDGetVolBufStart);
4679 _MVD_Memset(pBuff->pu8MVDGetVolBufStart, 0, MVD3_FW_VOL_INFO_BUF_LEN);
4680
4681 pBuff->u32VolAdd = pBuff->pu8MVDGetVolBufStart;
4682
4683 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pBuff->u32VolAdd,pBuff->u32VolAdd);
4684
4685 pBuff->u32VolAdd = HAL_MVD_PA2NonCacheSeg(pBuff->u32VolAdd);
4686 MVD_DEBUGINFO(MVD_PRINT("gvolInfo = 0x%lx, volBuf=0x%lx\n", (unsigned long)pBuff->u32VolAdd, (unsigned long)pBuff->pu8MVDGetVolBufStart));
4687
4688 HAL_MVD_SetFrameInfoBufferAddr(u8Idx, pBuff->pu8MVDGetFrameInfoBufStart);
4689 _MVD_Memset(pBuff->pu8MVDGetFrameInfoBufStart, 0, MVD3_FW_FRAME_INFO_BUF_LEN);
4690
4691 HAL_MVD_SetHeaderBufferAddr(u8Idx, pBuff->pu8MVDSetHeaderBufStart);
4692 HAL_MVD_SetUserDataBuf(u8Idx, pBuff->u32UserDataBuf, MVD3_FW_USER_DATA_BUF_LEN);
4693 pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4694 pCtrlCfg->u32UsrDataRd = pBuff->u32UserDataBuf;
4695
4696
4697 if((curSrcMode != E_MVD_TS_FILE_MODE)
4698 && (curSrcMode != E_MVD_TS_MODE))
4699 {
4700 _MVD_Memset(pBuff->u32MVDFWSLQTABTmpbufAdr, 0, MVD3_FW_SLQ_TAB_TMPBUF_LEN);
4701 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr, 0xBE010000UL);
4702 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr+4, 0x000000FAUL);
4703
4704 HAL_MVD_SetPtsTblAddr(u8Idx, pBuff->u32MVDFWPtsTblAddr);
4705 for (i=0; i<MVD_FW_SLQTBL_PTS_BUF_LEN; i+=MVD_FW_SLQTBL_PTS_LEN)
4706 {
4707 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i, 0); //byteCnt
4708 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+4, 0); //dummyPktCnt
4709 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+8, 0); //idLow
4710 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+12, 0); //idHigh
4711
4712 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+16, MVD_NULLPKT_PTS); //PTS
4713 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+20, 0); //reserved0
4714 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+24, 0); //reserved1
4715 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+28, 0); //reserved2
4716 }
4717 //MS_ASSERT((u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)<=(u32start+u32len));
4718 MVD_DEBUGINFO(MVD_PRINT("PTS tbl start=%lx end=%lx\n",
4719 (unsigned long)pBuff->u32MVDFWPtsTblAddr, (unsigned long)(pBuff->u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)));
4720
4721 pBuff->u32VBBUTableAdd = VBBU_TABLE_START+u8Idx*0x100000;
4722 }
4723
4724 if (pstMemCfg->bEnableDynScale)
4725 {
4726 HAL_MVD_SetDynamicScaleAddr(u8Idx, pBuff->u32DynScalingAdd);
4727 HAL_MVD_EnableDynamicScale(u8Idx,0); //default old DS style
4728 pCtrlCfg->u8DynScalingDepth = 32; //HAL_MVD_GetDynamicScaleDepth
4729 MVD_DEBUGINFO(MVD_PRINT("u8EnableMIUSel = 0x%x\n", pMVDHalContext->stMiuCfg.u8FWMiuSel));
4730 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAddr= 0x%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4731 MVD_DEBUGINFO(MVD_PRINT("u8DynScalingDepth= 0x%x\n", pCtrlCfg->u8DynScalingDepth));
4732 }
4733 MVD_DEBUGINFO(MVD_PRINT("DynScaling start=%lx end=%lx\n",
4734 (unsigned long)pBuff->u32DynScalingAdd, (unsigned long)(pBuff->u32DynScalingAdd+MVD_FW_DYN_SCALE_BUF_LEN)));
4735
4736 HAL_MVD_SetDecFrmInfoAddr(u8Idx, pBuff->u32DecFrmInfoAdd);
4737
4738 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
4739 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY);
4740 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx\n", (unsigned long)pBuff->u32DecFrmInfoAdd));
4741
4742 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
4743 {
4744 HAL_MVD_SLQTblInit(u8Idx);
4745 }
4746
4747 return TRUE;
4748 }
4749
4750 #ifdef VDEC3
4751 #else
MVD_IsNextDispFrmRdy(MS_U8 u8Idx)4752 static MS_BOOL MVD_IsNextDispFrmRdy(MS_U8 u8Idx)
4753 {
4754 #define NXT_DISP_TIMEOUT 20000//0x20
4755 MS_U32 u32TimeOut = 0;
4756 MVD_CmdArg mvdcmd;
4757
4758 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM);
4759 SETUP_CMDARG(mvdcmd);
4760 SET_DECNUM(mvdcmd, u8Idx);
4761 SET_CMD_RET_FALSE(CMD_GET_NEXTDISPFRM, &mvdcmd);
4762
4763 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM) && (u32TimeOut < NXT_DISP_TIMEOUT))
4764 {
4765 u32TimeOut++;
4766 }
4767 if(u32TimeOut >= NXT_DISP_TIMEOUT)
4768 {
4769 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_NEXTDISPFRM ) );
4770 return FALSE;
4771 }
4772 return TRUE;
4773 }
4774 #endif
4775
HAL_MVD_GetExtDispInfo(MS_U8 u8Idx,MVD_ExtDispInfo * pInfo)4776 void HAL_MVD_GetExtDispInfo(MS_U8 u8Idx, MVD_ExtDispInfo* pInfo)
4777 {
4778 pInfo->u16VSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_V_SIZE, sizeof(MS_U16));
4779 pInfo->u16HSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_H_SIZE, sizeof(MS_U16));
4780 pInfo->u16VOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_V_OFFSET, sizeof(MS_U16));
4781 pInfo->u16HOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_H_OFFSET, sizeof(MS_U16));
4782 }
4783
HAL_MVD_GetFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_FrmInfo * pInfo)4784 E_MVD_Result HAL_MVD_GetFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_FrmInfo* pInfo)
4785 {
4786 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
4787 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
4788 E_MVD_Result eRet = E_MVD_RET_OK;
4789 MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4790 #if v3_temp
4791 MVD_MEMCfg* pstMemCfg = NULL;
4792 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4793 #endif
4794 if (NULL == pInfo)
4795 {
4796 MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL pInfo!\n"));
4797 return E_MVD_RET_INVALID_PARAM;
4798 }
4799 if (NULL == u32DecFrmInfoAdd)
4800 {
4801 MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL u32DecFrmInfoAdd!\n"));
4802 return E_MVD_RET_FAIL;
4803 }
4804 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4805
4806 if (E_MVD_FRMINFO_DECODE == eType)
4807 {
4808 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR);
4809 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR);
4810 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP));
4811 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L);
4812 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H);
4813 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH);
4814 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH);
4815 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT);
4816 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE);
4817 }
4818 else if (E_MVD_FRMINFO_DISPLAY == eType)
4819 {
4820 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR);
4821 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR);
4822 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP));
4823 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L);
4824 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H);
4825 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH);
4826 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH);
4827 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT);
4828 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE);
4829 }
4830
4831 else if (E_MVD_FRMINFO_NEXT_DISPLAY == eType)
4832 {
4833 #if v3_temp
4834 DISPQ_IN_DRAM* pTemp = (DISPQ_IN_DRAM*)(MS_PA2KSEG1(pstMemCfg->u32FWCodeAddr+DISP_QUEUE_START+ u8VPUIdx*0x100000));
4835 if (pTemp->dispQ_rd == pTemp->dispQ_wr)
4836 {
4837 MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4838 return E_MVD_RET_FAIL;
4839 }
4840 pInfo->u16FrmIdx = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispFrameIdx;
4841
4842 pInfo->u32LumaAddr = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispLumaAddr;
4843
4844 pInfo->u32ChromaAddr= pTemp->disp_info[pTemp->dispQ_rd].u32NextDispChromaAddr;
4845 // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4846 pInfo->u32TimeStamp = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispTimeStamp;
4847
4848 pInfo->u32ID_H = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispID_H;
4849
4850 pInfo->u16Width = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispWidth;
4851
4852 if(HAL_MVD_IsMcuMode(u8Idx))
4853 {
4854 //bit[19-20] Picture format,
4855 //bit[18-17] Disp times, 1~3
4856 //bit[16] Top field first , 0-> bottom first, 1-> top first
4857 //bit[15:8] Range reduction of luma data
4858 //bit[7:0] Range reduction of chroma data
4859 pInfo->u32ID_L = (MS_U32)pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_UV
4860 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_Y << 8)
4861 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u16ExtData << 16)
4862 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8Progressive << 19);
4863
4864 if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4865 {
4866 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4867 }
4868 }
4869 else
4870 {
4871 pInfo->u32ID_L = pTemp->disp_info[pTemp->dispQ_rd].u32DispID_L;
4872 }
4873 pInfo->u16Pitch = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispPitch;
4874 pInfo->u16Height= pTemp->disp_info[pTemp->dispQ_rd].u16NextDispHeight;
4875 pInfo->eFrmType = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispeFrameType;
4876
4877 pTemp->bUsedByOutside[pInfo->u16FrmIdx]++;
4878
4879 pTemp->dispQ_rd = (pTemp->dispQ_rd+1)%DISPQ_SIZE;
4880 MsOS_FlushMemory();
4881 #else
4882 if (!MVD_IsNextDispFrmRdy(u8Idx))
4883 {
4884 MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4885 return E_MVD_RET_FAIL;
4886 }
4887 pInfo->u16FrmIdx= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX);
4888 if (pInfo->u16FrmIdx == 0xFFFF)
4889 {
4890 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo no available frame!\n"));
4891 return E_MVD_RET_FAIL;
4892 }
4893 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR);
4894 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR);
4895 // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4896 pInfo->u32TimeStamp = (HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP));
4897 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_H);
4898 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH);
4899 if(HAL_MVD_IsMcuMode(u8Idx))
4900 {
4901 //bit[18-17] Disp times, 1~3
4902 //bit[16] Top field first , 0-> bottom first, 1-> top first
4903 //bit[15:8] Range reduction of luma data
4904 //bit[7:0] Range reduction of chroma data
4905 pInfo->u32ID_L = (MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV)
4906 | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y) << 8)
4907 | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA) << 16);
4908 if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4909 {
4910 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4911 }
4912 }
4913 else
4914 {
4915 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_L);
4916 }
4917 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_PITCH);
4918 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT);
4919 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE);
4920 #endif
4921 #if 0
4922 MVD_PRINT("NxtFrm:: Idx=0x%x, ", pInfo->u16FrmIdx);
4923 MVD_PRINT("Type=0x%x, ", pInfo->eFrmType );
4924 MVD_PRINT("Luma=0x%x, ", pInfo->u32LumaAddr );
4925 MVD_PRINT("Chroma=0x%x, ", pInfo->u32ChromaAddr);
4926 MVD_PRINT("Pts=%lu, ", pInfo->u32TimeStamp );
4927 MVD_PRINT("ID_H=%lu, ", pInfo->u32ID_H );
4928 MVD_PRINT("ID_L=0x%x\n", pInfo->u32ID_L );
4929 #endif
4930 MVD_DBG_STS(MVD_PRINT("<<< drvMVD pts,idH = %lu, %lu\n", pInfo->u32TimeStamp, pInfo->u32ID_H));
4931 }
4932 else
4933 {
4934 eRet = E_MVD_RET_INVALID_PARAM;
4935 }
4936
4937 if ((pInfo->u32LumaAddr == _INIT_ADDR) || (pInfo->u32ChromaAddr== _INIT_ADDR) ||
4938 (pInfo->u16Pitch == _INIT_LEN) || (pInfo->u16Width == _INIT_LEN) ||
4939 (pInfo->u16Height== _INIT_LEN))
4940 {
4941 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo not ready!\n"));
4942 return E_MVD_RET_FAIL;
4943 }
4944
4945 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,(pInfo->u32LumaAddr * 8),pInfo->u32LumaAddr);
4946 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,(pInfo->u32ChromaAddr * 8),pInfo->u32ChromaAddr);
4947
4948 //MVD_PRINT("===> Luma=0x%x, Chroma=0x%x\n", pInfo->u32LumaAddr, pInfo->u32ChromaAddr);
4949 return eRet;
4950 }
4951
4952
4953
HAL_MVD_SetDynScalingParam(MS_U8 u8Idx,MS_PHY u32StAddr,MS_SIZE u32Size)4954 E_MVD_Result HAL_MVD_SetDynScalingParam(MS_U8 u8Idx, MS_PHY u32StAddr, MS_SIZE u32Size)
4955 {
4956 #define SCALER_INFO_TIMEOUT 0x1000
4957 MS_U32 u32TimeOut = 0;
4958 MS_VIRT u32SrcAdd = NULL;
4959 MS_U32 i;
4960 MS_VIRT u32ScalerInfoAdd = GET_XCINFO_BUFFADD(u8Idx);
4961 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4962
4963 if ((u32StAddr==NULL) || (u32Size==0) || (u32Size>MVD_FW_SCALER_INFO_BUF_LEN))
4964 {
4965 MVD_DEBUGERROR(MVD_PRINT("%s invalid para u32StAddr=0x%lx, u32Size=0x%lx\n",
4966 __FUNCTION__, (unsigned long)u32StAddr, (unsigned long)u32Size));
4967 return E_MVD_RET_INVALID_PARAM;
4968 }
4969 if (TRUE != pstMemCfg->bEnableDynScale)
4970 {
4971 MVD_DEBUGERROR(MVD_PRINT("%s !bEnableDynScale\n", __FUNCTION__));
4972 return E_MVD_RET_FAIL;
4973 }
4974
4975 //copy data
4976 u32SrcAdd = HAL_MVD_PA2NonCacheSeg(u32StAddr);
4977 u32Size = ((u32Size+3)>>2)<<2;
4978 MVD_DEBUGINFO(MVD_PRINT("u32Size= 0x%lx, u32SrcAdd= 0x%lx\n", (unsigned long)u32Size, (unsigned long)u32SrcAdd));
4979 for (i=0; i<u32Size; i=i+4)
4980 {
4981 HAL_MVD_MemWrite4Byte(u32ScalerInfoAdd+i, *(volatile MS_U32*)(u32SrcAdd+i));
4982 MVD_DEBUGINFO(MVD_PRINT("0x%lx = 0x%x\n", (unsigned long)(u32ScalerInfoAdd+i), HAL_MVD_MemRead4Byte(u32ScalerInfoAdd+i)));
4983 }
4984
4985 //notify f/w
4986 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4987 if (TRUE!=HAL_MVD_SetScalerInfoAddr(u8Idx, u32ScalerInfoAdd,((MS_U8*)u32SrcAdd)[0])) //Set the buffer address (MIU offset) to f/w
4988 {
4989 MVD_DEBUGERROR(MVD_PRINT("%s fail to set ScalerInfoAdd\n", __FUNCTION__));
4990 return E_MVD_RET_FAIL;
4991 }
4992
4993 //check f/w already handle the data
4994 while((TRUE!=HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO)) && (u32TimeOut < SCALER_INFO_TIMEOUT))
4995 {
4996 u32TimeOut++;
4997 }
4998 if(u32TimeOut >= SCALER_INFO_TIMEOUT)
4999 {
5000 MVD_DEBUGERROR(MVD_PRINT("%s timeout!!!\n", __FUNCTION__));
5001 return E_MVD_RET_FAIL;
5002 }
5003
5004 //clear ack bit
5005 HAL_MVD_ClearCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
5006
5007 MVD_DEBUGINFO(MVD_PRINT("=====> %s u32TimeOut = 0x%x\n", __FUNCTION__, u32TimeOut));
5008 return E_MVD_RET_OK;
5009 }
5010
5011 //Map driver CodecType to firmware CodecType
MVD_MapCodecType(MVD_CodecType type)5012 static MS_U8 MVD_MapCodecType(MVD_CodecType type)
5013 {
5014 MS_U8 u8type = 0xff;
5015 switch (type)
5016 {
5017 case E_MVD_CODEC_MPEG2:
5018 u8type = CODEC_MPEG2;
5019 break;
5020 case E_MVD_CODEC_MPEG4:
5021 u8type = CODEC_MPEG4;
5022 break;
5023 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
5024 u8type = CODEC_MPEG4_SHORT_VIDEO_HEADER;
5025 break;
5026 case E_MVD_CODEC_DIVX311:
5027 u8type = CODEC_DIVX311;
5028 break;
5029
5030 case E_MVD_CODEC_FLV:
5031 u8type = 0x03;
5032 break;
5033
5034 case E_MVD_CODEC_VC1_MAIN: //RCV
5035 u8type = 0x05;
5036 break;
5037
5038 case E_MVD_CODEC_VC1_ADV: //VC1
5039 u8type = 0x04;
5040 break;
5041
5042 default:
5043 break;
5044 }
5045
5046 return u8type;
5047 }
5048
5049 //Map driver SrcType to firmware SrcType
MVD_MapSrcMode(MVD_SrcMode mode)5050 static MS_U8 MVD_MapSrcMode(MVD_SrcMode mode)
5051 {
5052 MS_U8 u8mode = 0xff;
5053 switch (mode)
5054 {
5055 case E_MVD_TS_MODE:
5056 u8mode = STREAM_MODE;
5057 break;
5058 case E_MVD_FILE_MODE:
5059 u8mode = FILE_MODE;
5060 break;
5061 case E_MVD_SLQ_MODE:
5062 u8mode = SLQ_MODE;
5063 break;
5064 case E_MVD_SLQ_TBL_MODE:
5065 u8mode = SLQ_TBL_MODE;
5066 break;
5067 case E_MVD_TS_FILE_MODE:
5068 u8mode = TS_FILE_MODE;
5069 break;
5070
5071 default:
5072 break;
5073 }
5074
5075 return u8mode;
5076 }
5077
5078
MVD_CheckFrmBuffSizeMin(MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)5079 static MS_BOOL MVD_CheckFrmBuffSizeMin(MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
5080 {
5081 MS_BOOL ret = TRUE;
5082
5083 if (_IS_VC1(fwCfg->eCodecType))
5084 {
5085 MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)!\n",
5086 (unsigned long)memCfg->u32FBSize, (MVD_HD_FBSIZE*MVD_FBNUM_MIN), MVD_HW_BUF_TOTAL_LEN));
5087 ret = FALSE;
5088 }
5089 else if (memCfg->u32FBSize < (MVD4_MPEG_FBSIZE_SDMIN+MVD_HW_BUF_TOTAL_LEN))
5090 {
5091 MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)\n",
5092 (unsigned long)memCfg->u32FBSize, MVD4_MPEG_FBSIZE_SDMIN, MVD_HW_BUF_TOTAL_LEN));
5093 ret = FALSE;
5094 }
5095 return ret;
5096 }
5097
MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode,MS_U8 u8FBNum)5098 MS_U32 MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode, MS_U8 u8FBNum)
5099 {
5100 MS_U32 u32Size = 0;
5101 if (MVD3_DHD_MODE == u8FBMode)
5102 {
5103 u32Size = MVD_DHD_FBSIZE;
5104 if (MVD_FBNUM_MAX == u8FBNum)
5105 {
5106 u32Size *= MVD_FBNUM_MAX;
5107 }
5108 else if (MVD_FBNUM_MIN == u8FBNum)
5109 {
5110 u32Size *= MVD_FBNUM_MIN;
5111 }
5112 }
5113 else if (MVD3_HD_MODE == u8FBMode)
5114 {
5115 u32Size = MVD_HD_FBSIZE;
5116 if (MVD_FBNUM_MAX == u8FBNum)
5117 {
5118 u32Size *= MVD_FBNUM_MAX;
5119 }
5120 else if (MVD_FBNUM_MIN == u8FBNum)
5121 {
5122 u32Size *= MVD_FBNUM_MIN;
5123 }
5124 }
5125 else if (MVD3_SD_MODE == u8FBMode)
5126 {
5127 u32Size = MVD4_MPEG_FBSIZE_SDMIN;
5128 }
5129 return u32Size;
5130 }
5131
5132 //------------------------------------------------------------------------------
5133 /// Determine u8FBMode & u8FBNum according to the assigned FBSize
5134 //------------------------------------------------------------------------------
HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx,MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)5135 MS_BOOL HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx, MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
5136 {
5137 MS_BOOL ret = TRUE;
5138 MS_U8* pu8FBMode = &(fwCfg->u8FBMode);
5139 MS_U8* pu8FBNum = &(fwCfg->u8FBNum);
5140 MS_U32 u32AvailFrmBuffSize = memCfg->u32FBSize - MVD_HW_BUF_TOTAL_LEN;
5141
5142 ret = MDrv_MVD_AUTH_IPCheck(fwCfg->eCodecType,&(memCfg->bSupportSDModeOnly));
5143 if(ret == FALSE)
5144 {
5145 return FALSE;
5146 }
5147
5148 *pu8FBMode = 0xff;
5149
5150 #if defined(MVD_SUPPORT_SD_ONLY)
5151 *pu8FBMode = MVD3_SD_MODE;
5152 #else
5153 if(memCfg->bSupportSDModeOnly)
5154 {
5155 *pu8FBMode = MVD3_SD_MODE;
5156 }
5157 #endif //MVD_SUPPORT_SD_ONLY
5158
5159 //For SD only cases: defined(MVD_SUPPORT_SD_ONLY) and bSupportSDModeOnly
5160 if (MVD3_SD_MODE == *pu8FBMode)
5161 {
5162 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5163
5164 //set frmBuffNum as 4
5165 *pu8FBNum = MVD_FBNUM_MIN;
5166 MVD_DEBUGINFO(MVD_PRINT("[MVD_SD_MODE] u8FBNum=%d, FBSize=0x%lx\n", *pu8FBNum, (unsigned long)memCfg->u32FBSize));
5167 goto _GET_USED_SIZE;
5168 }
5169
5170 if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MAX))
5171 {
5172 MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*5\n", __FUNCTION__, __LINE__));
5173 //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5174 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5175 {
5176 *pu8FBMode = MVD3_DHD_MODE;
5177 }
5178 else
5179 {
5180 *pu8FBMode = MVD3_DHD_MODE_MIN;
5181 }
5182 *pu8FBNum = MVD_FBNUM_MAX;
5183 }
5184 else if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MIN))
5185 {
5186 MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*4\n", __FUNCTION__, __LINE__));
5187 //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5188 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5189 {
5190 *pu8FBMode = MVD3_DHD_MODE;
5191 }
5192 else
5193 {
5194 *pu8FBMode = MVD3_DHD_MODE_MIN;
5195 }
5196 *pu8FBNum = MVD_FBNUM_MIN;
5197 }
5198 else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MAX))
5199 {
5200 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*5\n", __FUNCTION__, __LINE__));
5201 *pu8FBMode = MVD3_HD_MODE;
5202 *pu8FBNum = MVD_FBNUM_MAX;
5203 }
5204 else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MIN))
5205 {
5206 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*4\n", __FUNCTION__, __LINE__));
5207 *pu8FBMode = MVD3_HD_MODE;
5208 *pu8FBNum = MVD_FBNUM_MIN;
5209 }
5210 else
5211 {
5212 MVD_DEBUGINFO(MVD_PRINT("%s(%d) SD\n", __FUNCTION__, __LINE__));
5213 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5214 if (TRUE == ret)
5215 {
5216 *pu8FBMode = MVD3_SD_MODE;
5217 *pu8FBNum = MVD_FBNUM_MIN;
5218 MVD_DEBUGINFO(MVD_PRINT("Framebuffer [SD] mode\n"));
5219 }
5220 }
5221
5222
5223 //Keep FBNum=4 for mpeg2/4, not-mstreamer/uniplayer/mcu mode.
5224 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5225 {
5226 if (*pu8FBNum != MVD_FBNUM_DEFAULT)
5227 {
5228 *pu8FBNum = MVD_FBNUM_DEFAULT;
5229 }
5230 }
5231
5232 _GET_USED_SIZE:
5233 fwCfg->u32FBUsedSize = u32AvailFrmBuffSize;
5234
5235 MVD_DEBUGINFO(MVD_PRINT("%s u8FBMode=0x%x, u8FBNum=%d, FBSize=0x%lx, used=0x%lx\n",
5236 __FUNCTION__, fwCfg->u8FBMode, fwCfg->u8FBNum, (unsigned long)memCfg->u32FBSize, (unsigned long)fwCfg->u32FBUsedSize));
5237 return ret;
5238 }
5239
HAL_MVD_SetCodecInfo(MS_U8 u8Idx,MVD_CodecType eCodecType,MVD_SrcMode eSrcMode,MS_U8 bDisablePESParsing)5240 MS_BOOL HAL_MVD_SetCodecInfo(MS_U8 u8Idx, MVD_CodecType eCodecType, MVD_SrcMode eSrcMode, MS_U8 bDisablePESParsing)
5241 {
5242 MVD_CmdArg stCmdArg;
5243 //MVD_PRINT("u8CodecType=0x%x\n", u8CodecType);
5244 //MVD_PRINT("eSrcMode=0x%x\n", eSrcMode);
5245 SETUP_CMDARG(stCmdArg);
5246 stCmdArg.Arg0 = MVD_MapCodecType(eCodecType);
5247 stCmdArg.Arg1 = MVD_MapSrcMode(eSrcMode);
5248 stCmdArg.Arg2 = bDisablePESParsing;
5249 //arg2 is only valid for STREAM_MODE and TS_FILE_MODE
5250 //set as 0 to enable MVD parser and parser interrupt
5251 stCmdArg.Arg3 = 0;
5252 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_SetCodecInfo: Cmd: %x, Arg0: %x, Arg1: %x. Arg2: %x\n",
5253 CMD_CODEC_INFO, stCmdArg.Arg0, stCmdArg.Arg1, stCmdArg.Arg2));
5254 SET_DECNUM(stCmdArg, u8Idx);
5255 SET_CMD_RET_FALSE(CMD_CODEC_INFO, &stCmdArg);
5256
5257 HAL_MVD_SetSrcMode(u8Idx,eSrcMode);
5258
5259 //set code offset to MVD
5260 MS_VIRT u32Addr, u32Len;
5261 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FW, &u32Addr, &u32Len);
5262
5263 if (u32Len==0) MVD_PRINT("%s err: u32Len=0!\n", __FUNCTION__);
5264 MS_U32 i=0;
5265 i = u32Addr >> 3;
5266 SET_CMDARG(stCmdArg, i, u8Idx);
5267 SET_CMD_RET_FALSE(CMD_CODE_OFFSET, &stCmdArg);
5268
5269 #define _mvdAssert(x) if(!x) MVD_PRINT("%s(%d) inconsistent cfg!\n", __FUNCTION__, __LINE__);
5270 MVD_FWCfg* pCurFwCfg = HAL_MVD_GetFWCfg(u8Idx);
5271 _mvdAssert(pCurFwCfg->eCodecType == eCodecType);
5272 _mvdAssert(pCurFwCfg->eSrcMode == eSrcMode);
5273 _mvdAssert(pCurFwCfg->bDisablePESParsing == bDisablePESParsing);
5274
5275 //Refer to msAPI_VDPlayer_DecodeMPEG4.c (core\kernel\api\videoplayer)
5276 if (eSrcMode == E_MVD_SLQ_TBL_MODE)
5277 {
5278 if ((eCodecType == E_MVD_CODEC_MPEG4) ||
5279 (eCodecType == E_MVD_CODEC_DIVX311) ||
5280 (eCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER))
5281 {
5282 // Enable PackMode
5283 SETUP_CMDARG(stCmdArg);
5284 stCmdArg.Arg0 = 3;
5285 SET_DECNUM(stCmdArg, u8Idx);
5286 if (HAL_MVD_MVDCommand( CMD_PARSE_M4V_PACKMD, &stCmdArg ) == FALSE)
5287 {
5288 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PARSE_M4V_PACKMD ) );
5289 return FALSE;
5290 }
5291
5292 // Set DIU width of rounding mode (align to 8byte)
5293 SETUP_CMDARG(stCmdArg);
5294 stCmdArg.Arg0 = 1;
5295 SET_DECNUM(stCmdArg, u8Idx);
5296 if (HAL_MVD_MVDCommand(CMD_DIU_WIDTH_ALIGN, &stCmdArg) == FALSE)
5297 {
5298 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIU_WIDTH_ALIGN ) );
5299 return FALSE;
5300 }
5301 }
5302 }
5303
5304 //set internal buffers after setting codecinfo for V3
5305 if (!HAL_MVD_SetInternalBuffAddr(u8Idx, u32Addr, u32Len))
5306 {
5307 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr failed\n"));
5308 return FALSE;
5309 }
5310 else
5311 {
5312 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr success\n"));
5313 }
5314
5315 return TRUE;
5316 }
5317
MVD_GetBDMAType(void)5318 BDMA_CpyType MVD_GetBDMAType(void)
5319 {
5320 BDMA_CpyType bdmaCpyType = E_BDMA_CPYTYPE_MAX;
5321
5322 if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_0)
5323 {
5324 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5325 {
5326 bdmaCpyType = E_BDMA_SDRAM2SDRAM;
5327 }
5328 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5329 {
5330 bdmaCpyType = E_BDMA_SDRAM2SDRAM1;
5331 }
5332 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5333 {
5334 bdmaCpyType = E_BDMA_SDRAM2SDRAM2;
5335 }
5336 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5337 {
5338 bdmaCpyType = E_BDMA_SDRAM2SDRAM3;
5339 }
5340 else
5341 {
5342 MS_ASSERT(0);
5343 }
5344 }
5345 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
5346 {
5347 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5348 {
5349 bdmaCpyType = E_BDMA_SDRAM12SDRAM;
5350 }
5351 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5352 {
5353 bdmaCpyType = E_BDMA_SDRAM12SDRAM1;
5354 }
5355 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5356 {
5357 bdmaCpyType = E_BDMA_SDRAM12SDRAM2;
5358 }
5359 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5360 {
5361 bdmaCpyType = E_BDMA_SDRAM12SDRAM3;
5362 }
5363 else
5364 {
5365 MS_ASSERT(0);
5366 }
5367 }
5368 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
5369 {
5370 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5371 {
5372 bdmaCpyType = E_BDMA_SDRAM22SDRAM;
5373 }
5374 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5375 {
5376 bdmaCpyType = E_BDMA_SDRAM22SDRAM1;
5377 }
5378 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5379 {
5380 bdmaCpyType = E_BDMA_SDRAM22SDRAM2;
5381 }
5382 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5383 {
5384 bdmaCpyType = E_BDMA_SDRAM22SDRAM3;
5385 }
5386 else
5387 {
5388 MS_ASSERT(0);
5389 }
5390 }
5391 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_3)
5392 {
5393 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5394 {
5395 bdmaCpyType = E_BDMA_SDRAM32SDRAM;
5396 }
5397 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5398 {
5399 bdmaCpyType = E_BDMA_SDRAM32SDRAM1;
5400 }
5401 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5402 {
5403 bdmaCpyType = E_BDMA_SDRAM32SDRAM2;
5404 }
5405 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5406 {
5407 bdmaCpyType = E_BDMA_SDRAM32SDRAM3;
5408 }
5409 else
5410 {
5411 MS_ASSERT(0);
5412 }
5413 }
5414 else
5415 {
5416 MS_ASSERT(0);
5417 }
5418
5419 return bdmaCpyType;
5420 }
5421
5422 //Init static variables.
5423 //Exception: stMemCfg & stMiuCfg since they are set before calling this function.
HAL_MVD_InitVar(MS_U8 u8Idx)5424 void HAL_MVD_InitVar(MS_U8 u8Idx)
5425 {
5426 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5427 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5428
5429 memset(pstCtrlCfg, 0, sizeof(MVD_CtrlCfg));
5430 pstCtrlCfg->eTrickMode = E_MVD_TRICK_DEC_ALL;
5431 pstCtrlCfg->eFrcMode = E_MVD_FRC_NORMAL;
5432 pstCtrlCfg->ePreSpeedType = E_MVD_SPEED_DEFAULT;
5433 pstCtrlCfg->eFileSyncMode = E_MVD_TIMESTAMP_FREERUN;
5434
5435 //determine if we need to BDMA SLQ table from DrvProcBuff to BitstreamBuff
5436 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
5437 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5438 pstCtrlCfg->bSlqTblSync = ((pstMemCfg->u32DrvBufAddr < pstMemCfg->u32BSAddr) ||
5439 ((pstMemCfg->u32DrvBufAddr+pstMemCfg->u32DrvBufSize) > (pstMemCfg->u32BSAddr+pstMemCfg->u32BSSize)));
5440 MVD_DEBUGINFO(MVD_PRINT("bSlqTblSync = %x\n", pstCtrlCfg->bSlqTblSync));
5441 if (pstCtrlCfg->bSlqTblSync)
5442 {
5443 const BDMA_Info* pBDMA;
5444 pBDMA = MDrv_BDMA_GetInfo();
5445 if ((pBDMA == NULL) || (pBDMA->bInit != TRUE))
5446 {
5447 if (E_BDMA_OK != MDrv_BDMA_Init(pstMemCfg->u32Miu1BaseAddr))
5448 {
5449 MVD_PRINT("%s fail at MDrv_BDMA_Init!!!\n", __FUNCTION__);
5450 }
5451 }
5452 pstSlqTblInfo->bdmaCpyType = MVD_GetBDMAType();
5453 }
5454 #else
5455 pstCtrlCfg->bSlqTblSync = 0;
5456 #endif
5457 memset(pstSlqTblInfo, 0, sizeof(MVD_SLQTBLInfo));
5458 pstSlqTblInfo->u32LastPts = MVD_NULLPKT_PTS;
5459 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX;
5460 pstSlqTblInfo->u32PreEsWr = 0;
5461 pstSlqTblInfo->pSlqStatus = &(pMVDHalContext->_SlqStatus[u8Idx]);
5462 pstSlqTblInfo->pDrvSlqTbl = &(pMVDHalContext->_drvSlqTbl[u8Idx]);
5463 pstSlqTblInfo->pDrvEsTbl = &(pMVDHalContext->_drvEsTbl[u8Idx]);
5464 pstSlqTblInfo->pDrvDivxTbl = &(pMVDHalContext->_drvDivxTbl[u8Idx]);
5465 #if SLQ_NEW_PUSH
5466 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
5467 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
5468 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
5469 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
5470 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
5471 pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow =FALSE;
5472 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
5473 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit =FALSE;
5474 #endif
5475 }
5476
5477 //------------------------------------------------------------------------------
5478 /// Issue Stop command.
5479 //------------------------------------------------------------------------------
HAL_MVD_Stop(MS_U8 u8Idx)5480 MS_BOOL HAL_MVD_Stop(MS_U8 u8Idx)
5481 {
5482 MVD_CmdArg mvdcmd;
5483 MS_BOOL bRet = TRUE;
5484
5485 #define STOP_TIMEOUT 500 //ms
5486 MS_U32 u32StartTime = 0;
5487 u32StartTime = HAL_MVD_GetTime();
5488
5489 SETUP_CMDARG(mvdcmd);
5490 SET_DECNUM(mvdcmd, u8Idx);
5491 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_STOP);
5492
5493 if (HAL_MVD_MVDCommand(CMD_STOP, &mvdcmd) == FALSE)
5494 {
5495 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", CMD_STOP));
5496 HAL_MVD_Delayms(1);
5497 if ( HAL_MVD_TimeOut(u8Idx) == TRUE )
5498 {
5499 MVD_DEBUGERROR(MVD_PRINT("*** MVD ERR: STOP TIMEOUT!!! ***\n"));
5500 }
5501 }
5502
5503 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_STOP))
5504 {
5505 if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
5506 {
5507 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_STOP ) );
5508 break;
5509 }
5510 }
5511
5512 pMVDHalContext->bStopped[u8Idx] = TRUE;
5513 return bRet;
5514 }
5515
HAL_MVD_DeinitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)5516 MS_BOOL HAL_MVD_DeinitHW(VPU_EX_SourceType SourceType, VPU_EX_DecoderType eDecType)
5517 {
5518 //MVD HW reset
5519 if (!HAL_MVD_RstHW())
5520 {
5521 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW failed\n"));
5522 }
5523 else
5524 {
5525 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW success\n"));
5526 }
5527 HAL_MVD_PowerCtrl(DISABLE);
5528 #ifdef CONFIG_MSTAR_CLKM
5529 if(eDecType == E_VPU_EX_DECODER_MVD)
5530 {
5531 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, DISABLE);
5532 }
5533 if(SourceType == E_VPU_EX_INPUT_TSP)
5534 {
5535 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, DISABLE);
5536 }
5537 #endif
5538
5539 #ifdef CONFIG_MSTAR_SRAMPD
5540 HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, DISABLE, SRAM_SD_EN_MVD);
5541 HAL_MVD_Delayms(1);
5542 #endif
5543 return TRUE;
5544 }
5545
HAL_MVD_Exit(MS_U8 u8Idx)5546 MS_BOOL HAL_MVD_Exit(MS_U8 u8Idx)
5547 {
5548 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:start\n"));
5549
5550 HAL_MVD_SetIsUsed(u8Idx, FALSE);
5551 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = FALSE;
5552 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
5553 pMVDHalContext->u32DmxFrameRate[u8Idx] = 0;
5554 pMVDHalContext->u32DmxFrameRateBase[u8Idx] = 0;
5555 pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = FALSE;
5556
5557 return TRUE;
5558 }
5559
5560
5561 //------------------------------------------------------------------------------
5562 /// Set DivX311 stream info.
5563 /// @param divxInfo \b IN : DivX311 stream info.
5564 //------------------------------------------------------------------------------
MVD_WriteDivx311Data(MS_U8 u8Idx,FW_DIVX_INFO * divxInfo)5565 static void MVD_WriteDivx311Data(MS_U8 u8Idx, FW_DIVX_INFO *divxInfo)
5566 {
5567 MS_VIRT pu8MVDSetHeaderBufStart = GET_HDR_BUFFADD(u8Idx);
5568 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_VOL_HANDLE_DONE,divxInfo->vol_handle_done);
5569 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_WIDTH,divxInfo->width);
5570 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_HEIGHT,divxInfo->height);
5571 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_COUNT,divxInfo->frame_count);
5572 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_TIME,divxInfo->frame_time);
5573 HAL_MVD_MemWrite2Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PTS_INCR,divxInfo->pts_incr);
5574 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_RATE,divxInfo->frame_rate);
5575 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_ASPECT_RATIO,divxInfo->aspect_ratio);
5576 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PROGRESSIVE_SEQUENCE,divxInfo->progressive_sequence);
5577 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG1,divxInfo->mpeg1);
5578 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PLAY_MODE,divxInfo->play_mode);
5579 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG_FRC_MODE,divxInfo->mpeg_frc_mode);
5580 return;
5581 }
5582
HAL_MVD_SetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)5583 void HAL_MVD_SetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo )
5584 {
5585 if (GET_HDR_BUFFADD(u8Idx)==0)
5586 {
5587 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameInfo error: pu8MVDSetHeaderBufStart=NULL\n"));
5588 return;
5589 }
5590
5591 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
5592 pDivxInfo->width=pinfo->u16HorSize;
5593 pDivxInfo->height=pinfo->u16VerSize;
5594 pDivxInfo->aspect_ratio=pinfo->u8AspectRate;
5595 pDivxInfo->frame_rate = pinfo->u32FrameRate;
5596
5597 //for MM
5598 pDivxInfo->mpeg1=pinfo->u8MPEG1;
5599 pDivxInfo->pts_incr=pinfo->u16PTSInterval;
5600 pDivxInfo->play_mode=pinfo->u8PlayMode;
5601 pDivxInfo->mpeg_frc_mode=pinfo->u8FrcMode;
5602
5603 if(pinfo->u8Interlace==0)
5604 pDivxInfo->progressive_sequence=1;
5605 else
5606 pDivxInfo->progressive_sequence=0;
5607
5608 pDivxInfo->frame_count=0;
5609 pDivxInfo->frame_time=0;
5610 pDivxInfo->vol_handle_done=0;
5611 // pDivxInfo->invalidstream=0;
5612 MVD_DEBUGINFO(MVD_PRINT("set vol info,pts_incr=%d,\n",pDivxInfo->pts_incr));
5613 MVD_DEBUGINFO(MVD_PRINT("set vol info,width=%x,height=%x,frame_rate=%d,aspect_ratio=%x,\n",
5614 (unsigned int)pDivxInfo->width,(unsigned int)pDivxInfo->height,pDivxInfo->frame_rate,pDivxInfo->aspect_ratio));
5615 MVD_DEBUGINFO(MVD_PRINT("set vol info,progressive_sequence=%x,mpeg1=%x,play_mode=%x,\n",
5616 pDivxInfo->progressive_sequence,pDivxInfo->mpeg1,pDivxInfo->play_mode));
5617
5618 MVD_WriteDivx311Data(u8Idx, pDivxInfo);
5619 return;
5620 }
5621
5622
5623
5624 ///////////////////////////////////////////////////////////////////////////////
5625 /// Get Hardware Pointer of MVD CC Ring Buffer
5626 /// Return value:: The HW Pointer Address of MVD CC Ring Buffer
5627 /// @param u8CC608 \b IN
5628 /// - # TRUE for CC608 parser
5629 /// - # FALSE for CC708 parser
5630 ///////////////////////////////////////////////////////////////////////////////
HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)5631 MS_VIRT HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)
5632 {
5633 #if 1
5634 MVD_CmdArg mvdcmd;
5635 MS_VIRT u32CCWrPtr = 0;
5636
5637 SETUP_CMDARG(mvdcmd);
5638 mvdcmd.Arg3 = u8CC608;
5639 if (HAL_MVD_MVDCommand( CMD_RD_USER_WP, &mvdcmd ) == FALSE)
5640 {
5641 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_USER_WP ) );
5642 return MVD_U32_MAX;
5643 }
5644 u32CCWrPtr = COMBU32(mvdcmd.Arg3, mvdcmd.Arg2, mvdcmd.Arg1, mvdcmd.Arg0);
5645 return u32CCWrPtr;
5646 #else
5647 MS_U32 u32MVDCC_Temp1 = 0;
5648 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5649 {
5650 //HAL_MVD_ARGINIT();
5651 HAL_MVD_RegWriteByte(MVD_ARG5, 0);
5652 HAL_MVD_RegWriteByte(MVD_ARG4, 0);
5653 HAL_MVD_RegWriteByte(MVD_ARG3, (MS_U8)u8CC608);
5654 HAL_MVD_RegWriteByte(MVD_COMMAND, (MS_U8)(CMD_RD_USER_WP));//CMD_GET_CCBUF_HWADDR
5655
5656 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5657 {
5658 u32MVDCC_Temp1 = 0;
5659 u32MVDCC_Temp1 = (((MS_U32)HAL_MVD_RegReadByte(MVD_ARG0)) & 0x000000FF);
5660 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG1)) & 0x000000FF) << 8);
5661 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG2)) & 0x000000FF) << 16);
5662 u32MVDCC_Temp1 = (u32MVDCC_Temp1 << 3);
5663 return (u32MVDCC_Temp1);
5664 }
5665 else
5666 {
5667 MVD_DEBUGINFO(MVD_PRINT("\nF:GHAV"));
5668 }
5669 }
5670 else
5671 {
5672 MVD_DEBUGINFO(MVD_PRINT("\nF:GHA"));
5673 }
5674
5675 return 0xffffffff;
5676 #endif
5677 }
5678
HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)5679 MS_BOOL HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)
5680 {
5681 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5682 MS_VIRT u32UsrDataWr = 0;
5683 MS_BOOL bIsAvail = FALSE;
5684
5685 #if defined(MVD_SUPPORT_X4_CC)
5686 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4);
5687 #else
5688 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2);
5689 #endif
5690 bIsAvail = !(pCtrlCfg->u32UsrDataRd == u32UsrDataWr);
5691 MVD_DEBUGINFO(MVD_PRINT("IsAvail:%x rd=%lx wr=%lx\n", bIsAvail,
5692 (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5693 return bIsAvail;
5694 }
5695
5696 //------------------------------------------------------------------------------
5697 /// Get info of user data
5698 //------------------------------------------------------------------------------
HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx,MVD_UsrDataInfo * pUsrInfo)5699 MS_BOOL HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx, MVD_UsrDataInfo* pUsrInfo)
5700 {
5701 MS_VIRT u32UsrData = NULL;
5702 MS_VIRT u32UsrDataWr = 0;
5703 #if defined(MVD_SUPPORT_X4_CC)
5704 FW_USER_DATA_BUF_EXT stUsrDataExt;
5705 #else
5706 FW_USER_DATA_BUF stUsrDataInfo;
5707 #endif
5708 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5709
5710 if ((!pUsrInfo) || (GET_FRMINFO_BUFFADD(u8Idx)==0))
5711 {
5712 MVD_DEBUGERROR(MVD_PRINT("%s: NULL ptr.\n", __FUNCTION__));
5713 return FALSE;
5714 }
5715
5716 //get write pointer
5717 #if defined(MVD_SUPPORT_X4_CC)
5718 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4);
5719 #else
5720 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2);
5721 #endif
5722 if (pCtrlCfg->u32UsrDataRd == (GET_USRDATA_BUFFADD(u8Idx)+MVD3_FW_USER_DATA_BUF_LEN))
5723 {
5724 pCtrlCfg->u32UsrDataRd = GET_USRDATA_BUFFADD(u8Idx); //wrap to BufStart
5725 }
5726 MVD_DEBUGINFO(MVD_PRINT("CC Rd=0x%lx Wr=0x%lx\n", (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5727
5728 if (pCtrlCfg->u32UsrDataRd == u32UsrDataWr)
5729 {
5730 MVD_DEBUGERROR(MVD_PRINT("%s: no data? Rd=0x%lx Wr=0x%lx\n", __FUNCTION__, (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5731 return FALSE;
5732 }
5733
5734 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pCtrlCfg->u32UsrDataRd,u32UsrData);
5735
5736 u32UsrData = HAL_MVD_PA2NonCacheSeg(u32UsrData);
5737
5738 HAL_MVD_CPU_Sync();
5739 HAL_MVD_ReadMemory();
5740
5741 #if defined(MVD_SUPPORT_X4_CC)
5742 stUsrDataExt = *(volatile FW_USER_DATA_BUF_EXT*)u32UsrData;
5743
5744 pUsrInfo->u32Pts = stUsrDataExt.pts;
5745 pUsrInfo->u8PicStruct = stUsrDataExt.PicStruct;
5746 pUsrInfo->u8PicType = stUsrDataExt.picType;
5747 pUsrInfo->u8TopFieldFirst = stUsrDataExt.top_ff;
5748 pUsrInfo->u8RptFirstField = stUsrDataExt.rpt_ff;
5749 pUsrInfo->u16TmpRef = stUsrDataExt.tmpRef;
5750 pUsrInfo->u8ByteCnt = stUsrDataExt.userdatabytecnt;
5751 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_EXT_HDR_LEN;
5752 #else
5753 stUsrDataInfo = *(volatile FW_USER_DATA_BUF*)u32UsrData;
5754
5755 pUsrInfo->u8PicType = stUsrDataInfo.picType;
5756 pUsrInfo->u8TopFieldFirst = stUsrDataInfo.top_ff;
5757 pUsrInfo->u8RptFirstField = stUsrDataInfo.rpt_ff;
5758 pUsrInfo->u16TmpRef = stUsrDataInfo.tmpRef;
5759 pUsrInfo->u8ByteCnt = stUsrDataInfo.userdatabytecnt;
5760 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_HDR_LEN;
5761 #endif
5762 //update read pointer
5763 pCtrlCfg->u32UsrDataRd += MVD_FW_USER_DATA_PKT_LEN;
5764 #if 0
5765 MVD_PRINT("xxInfo: ");
5766 MVD_PRINT("%02d, ", pUsrInfo->u16TmpRef);
5767 MVD_PRINT("%d, ", pUsrInfo->u8PicStruct);
5768 MVD_PRINT("%d, ", pUsrInfo->u8TopFieldFirst);
5769 MVD_PRINT("0x%x, ", pUsrInfo->u32DataBuf);
5770 MVD_PRINT("%d, ", pUsrInfo->u8ByteCnt);
5771 MVD_PRINT("%ld, ", pUsrInfo->u32Pts);
5772 MVD_PRINT("%d\n", pUsrInfo->u8PicType);
5773 #endif
5774 return TRUE;
5775 }
5776
5777
HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx,MS_VIRT u32HWPtr)5778 MS_VIRT HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx, MS_VIRT u32HWPtr)
5779 {
5780 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5781 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5782 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5783 MS_VIRT u32HWSt = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
5784 MS_VIRT u32DrvPtr;
5785
5786 if ((u32HWPtr<u32HWSt) && (u32HWPtr!=0))
5787 {
5788 MVD_DEBUGERROR(MVD_PRINT("Invalid u32HWPtr=0x%lx\n", (unsigned long)u32HWPtr));
5789 return 0;
5790 }
5791 if ((pstCtrlCfg->bSlqTblSync) && (u32HWPtr!=0))
5792 {
5793 u32DrvPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd + (u32HWPtr - u32HWSt);
5794 return u32DrvPtr;
5795 }
5796 return u32HWPtr;
5797 }
5798
5799
MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx,MVD_PacketInfo * pFileEnd)5800 static void MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx, MVD_PacketInfo* pFileEnd)
5801 {
5802 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5803 MS_VIRT u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
5804
5805 pFileEnd->u32StAddr = SLQ_TBL_SIZE*3;//u32EndPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5806 pFileEnd->u32Length = END_PATTERN_SIZE;
5807 pFileEnd->u32TimeStamp = MVD_NULLPKT_PTS;
5808 pFileEnd->u32ID_L = MVD_U32_MAX;
5809 pFileEnd->u32ID_H = MVD_U32_MAX;
5810 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x 0x%x 0x%x\n", (unsigned long)pFileEnd->u32StAddr,
5811 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4),
5812 HAL_MVD_MemRead4Byte(u32EndPattern+8), HAL_MVD_MemRead4Byte(u32EndPattern+12)));
5813 }
5814
5815
MVD_SLQTblGetDummyPkt(MVD_PacketInfo * pDummy)5816 static void MVD_SLQTblGetDummyPkt(MVD_PacketInfo* pDummy)
5817 {
5818 //MS_U32 u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
5819
5820 pDummy->u32StAddr = SLQ_TBL_SIZE*2;//u32DummyES - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5821 pDummy->u32Length = DUMMY_SIZE;
5822 pDummy->u32TimeStamp = MVD_NULLPKT_PTS;
5823 pDummy->u32ID_L = MVD_U32_MAX;
5824 pDummy->u32ID_H = MVD_U32_MAX;
5825 #if 0
5826 MVD_PRINT("u32DummyES(0x%x-->0x%x, size=0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES,
5827 pDummy->u32StAddr, pDummy->u32Length, HAL_MVD_MemRead4Byte(u32DummyES),
5828 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
5829 #endif
5830
5831 }
5832
5833
HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx,MVD_PatternType ePattern)5834 MS_BOOL HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx, MVD_PatternType ePattern)
5835 {
5836 MS_U32 i;
5837 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5838
5839 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
5840 {
5841 MVD_DEBUGINFO(MVD_PRINT("SLQTbl full!(0x%lx) Cannot insert pattern any more!\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5842 return FALSE;
5843 }
5844
5845 #if SLQ_NEW_PUSH
5846 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
5847 {
5848 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart)
5849 {
5850 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
5851 }
5852 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = FALSE;
5853 }
5854 #endif // #if SLQ_NEW_PUSH
5855 for (i =0; i<2; i++)
5856 { //insert dummy pattern
5857 MVD_PacketInfo stDummyPkt;
5858
5859 if (E_MVD_PATTERN_FLUSH == ePattern)
5860 {
5861 MVD_SLQTblGetDummyPkt(&stDummyPkt);
5862 }
5863 else if (E_MVD_PATTERN_FILEEND == ePattern)
5864 {
5865 MVD_SLQTblGetFileEndPkt(u8Idx, &stDummyPkt);
5866 }
5867 else
5868 {
5869 MVD_DEBUGERROR(MVD_PRINT("Invalid MVD_PatternType! Won't insert pattern!\n"));
5870 return FALSE;
5871 }
5872 #if SLQ_NEW_PUSH
5873 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = TRUE;
5874 #endif
5875 //MVD_PRINT("WrPtr 0x%x ", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5876 HAL_MVD_SLQTblSendPacket(u8Idx, &stDummyPkt);
5877 //MVD_PRINT("==> 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5878 HAL_MVD_SetSLQWritePtr(u8Idx, FALSE);
5879 }
5880 return TRUE;
5881 }
5882
5883
5884 #define FLAG_LAST_FRM_SHOW (MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_LAST_FRAME_SHOW, sizeof(MS_U32)))
HAL_MVD_IsDispFinish(MS_U8 u8Idx)5885 E_MVD_Result HAL_MVD_IsDispFinish(MS_U8 u8Idx)
5886 {
5887 MS_U32 u32TimeCnt;
5888 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
5889 MS_U32 u32FeByteCnt = 0;
5890 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5891 MS_VIRT u32FileEndPtr = pstSlqTblInfo->u32FileEndPtr;
5892 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
5893 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
5894 #ifdef VDEC3
5895 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
5896 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5897 #endif
5898
5899 //MVD_PRINT("MDrv_MVD_IsDispFinish::");
5900 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
5901 {
5902 MVD_DEBUGERROR(MVD_PRINT("%s err: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
5903 return E_MVD_RET_FAIL;
5904 }
5905
5906 //MVD_PRINT("0x%x\n", FLAG_LAST_FRM_SHOW);
5907 if ((E_MVD_SLQ_TBL_MODE == curSrcMode) && (TRUE != FLAG_LAST_FRM_SHOW))
5908 {
5909 //insert pattern when each time checking IsDispFinish
5910 #ifdef VDEC3
5911 if(pstCtrlCfg->u8McuMode == TRUE)
5912 {
5913 u32TimeCnt= HAL_MVD_GetTime();
5914 while ((HAL_MVD_GetTime() - u32TimeCnt) < 20) // timeout 20 ms
5915 {
5916 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
5917 {
5918 HAL_VPU_EX_PacketInfo stVpuPkt;
5919 MVD_PacketInfo stDummyPkt;
5920 MVD_SLQTblGetFileEndPkt(u8Idx,&stDummyPkt);
5921
5922 stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
5923 stVpuPkt.u32Length = stDummyPkt.u32Length;
5924 stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
5925 //If in display queue mode
5926 stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
5927 stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
5928 stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
5929
5930 HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
5931 }
5932
5933 if (TRUE == FLAG_LAST_FRM_SHOW)
5934 {
5935 break;
5936 }
5937 }
5938
5939 if (TRUE != FLAG_LAST_FRM_SHOW)
5940 {
5941 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_IsDispFinish TIMEOUT\n"));
5942 return E_MVD_RET_TIME_OUT;
5943 }
5944 else
5945 {
5946 return E_MVD_RET_OK;
5947 }
5948 }
5949 else
5950 #endif
5951 {
5952 //insert pattern when each time checking IsDispFinish
5953 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5954 {
5955 u32FeByteCnt += END_PATTERN_SIZE;
5956 }
5957
5958 if ((u32FileEndPtr == HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx))) &&
5959 (HAL_MVD_IsMcuMode(u8Idx) == FALSE) &&
5960 (HAL_MVD_IsMStreamerMode(u8Idx) == FALSE))
5961 {
5962 //insert padding pattern until timeout
5963 u32TimeCnt= HAL_MVD_GetTime();
5964 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
5965 {
5966 if (TRUE == FLAG_LAST_FRM_SHOW)
5967 {
5968 //MVD_PRINT("\nDisp finished!\n");
5969 break;
5970 }
5971 //insert file-end pattern again
5972 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5973 {
5974 u32FeByteCnt += END_PATTERN_SIZE;
5975 }
5976 }
5977 if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
5978 {
5979 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_IsDispFinish TIMEOUT!!! *****\n\n"));
5980 if (E_MVD_CODEC_VC1_MAIN == HAL_MVD_GetCodecType(u8Idx))
5981 {
5982 if ((HAL_MVD_GetPayloadLen(u8Idx) > 0x200000)
5983 && (TRUE != HAL_MVD_GotFileEndPattern(u8Idx)))
5984 {
5985 MVD_DEBUGERROR(MVD_PRINT("RCV payloadLen(0x%x) invalid!\n",
5986 HAL_MVD_GetPayloadLen(u8Idx)));
5987 }
5988 }
5989 MVD_DEBUGERROR(MVD_PRINT("***** fe=%lx, rd=%lx(%lx,%lx), wr=%lx, empty=%lx, u32FeByteCnt=%x\n",
5990 (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)),
5991 (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty, u32FeByteCnt));
5992 return E_MVD_RET_TIME_OUT;
5993 }
5994 else
5995 {
5996 return E_MVD_RET_OK;
5997 }
5998 }
5999 else
6000 {
6001 //just return fail if readPtr is not closed to file-end ptr
6002 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx(%lx), wr=%lx, empty=%lx\n", (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
6003 (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx)), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
6004 return E_MVD_RET_FAIL;
6005 }
6006 }
6007 }
6008
6009 if (FLAG_LAST_FRM_SHOW)
6010 {
6011 return E_MVD_RET_OK;
6012 }
6013 else
6014 {
6015 return E_MVD_RET_FAIL;
6016 }
6017 }
6018
6019 //------------------------------------------------------------------------------
6020 /// Set MVD SLQ start & end address
6021 /// @param -u32start \b IN : start address
6022 /// @param -u32end \b IN : end address
6023 //------------------------------------------------------------------------------
HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)6024 static void HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
6025 {
6026 MVD_CmdArg mvdcmd;
6027
6028 if ((u32start > SLQ_ADDR_LEN) || ((u32end+1) > SLQ_ADDR_LEN))
6029 {
6030 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetSLQStartEnd: only support 27bit add!\n"));
6031 }
6032
6033 SET_CMDARG(mvdcmd, (u32end+1), u8Idx);
6034 if (HAL_MVD_MVDCommand( CMD_SLQ_END, &mvdcmd ) == FALSE)
6035 {
6036 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_END ) );
6037 return;
6038 }
6039
6040 SET_CMDARG(mvdcmd, u32start, u8Idx);
6041 if (HAL_MVD_MVDCommand( CMD_SLQ_START, &mvdcmd ) == FALSE)
6042 {
6043 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_START ) );
6044 return;
6045 }
6046
6047 return;
6048 }
6049
HAL_MVD_DecodeIFrame(MS_U8 u8Idx,MS_PHY u32FrameBufAddr,MS_PHY u32StreamBufAddr,MS_PHY u32StreamBufEndAddr)6050 MS_BOOL HAL_MVD_DecodeIFrame(MS_U8 u8Idx, MS_PHY u32FrameBufAddr, MS_PHY u32StreamBufAddr, MS_PHY u32StreamBufEndAddr )
6051 {
6052 MS_U32 u32deley = 0;
6053 MS_U32 u32time = 0;
6054 MVD_CmdArg mvdcmd;
6055 MS_VIRT u32MVDFWSLQTABTmpbufAdr = GET_SLQ_BUFFADD(u8Idx);
6056
6057 MVD_DEBUGINFO(MVD_PRINT("%s offset FBAdd=0x%lx streamStart=0x%lx streamEnd=0x%lx\n",
6058 __FUNCTION__, (unsigned long)u32FrameBufAddr, (unsigned long)u32StreamBufAddr, (unsigned long)u32StreamBufEndAddr));
6059
6060 HAL_MVD_SetCodecInfo(u8Idx, E_MVD_CODEC_MPEG2, E_MVD_SLQ_MODE, DISABLE_PARSER);
6061 HAL_MVD_SetFrameBuffAddr(u8Idx, u32FrameBufAddr, HAL_MVD_GetFBMode(u8Idx));
6062
6063 SETUP_CMDARG(mvdcmd);
6064 mvdcmd.Arg0 = 1;
6065 SET_DECNUM(mvdcmd, u8Idx);
6066 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
6067
6068 if (HAL_MVD_StepDecode(u8Idx) == FALSE)
6069 {
6070 MVD_DEBUGERROR( MVD_PRINT( "HAL_MVD_StepDecode fail!!\r\n") );
6071 return FALSE;
6072 }
6073
6074 SETUP_CMDARG(mvdcmd);
6075 mvdcmd.Arg0 = 1;
6076 mvdcmd.Arg1 = 1;
6077 SET_DECNUM(mvdcmd, u8Idx);
6078 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
6079
6080 //set data
6081 HAL_MVD_Delayms(2);
6082
6083 HAL_MVD_CPU_Sync();
6084 HAL_MVD_FlushMemory();
6085
6086 //wait vld init success or data may lost!
6087 #define WAIT_INIT_SUCCESS_TIME 100 //100ms
6088 u32deley = HAL_MVD_GetTime();
6089 while ((HAL_MVD_GetDecodeStatus(u8Idx)==DEC_STAT_IDLE) && (u32time<WAIT_INIT_SUCCESS_TIME))
6090 {
6091 u32time = HAL_MVD_GetTime()-u32deley;
6092 }
6093 if (u32time>=WAIT_INIT_SUCCESS_TIME)
6094 {
6095 MVD_DEBUGERROR(MVD_PRINT("%s: wait init_success timeout!!!\n", __FUNCTION__));
6096 }
6097 HAL_MVD_SetSLQStartEnd(u8Idx, u32StreamBufAddr, u32StreamBufEndAddr);
6098 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_SLQ_TAB_TMPBUF_ADR=%lx\n",(unsigned long)u32MVDFWSLQTABTmpbufAdr));
6099
6100 HAL_MVD_CPU_Sync();
6101 HAL_MVD_FlushMemory();
6102 HAL_MVD_SetSLQStartEnd(u8Idx, u32MVDFWSLQTABTmpbufAdr, u32MVDFWSLQTABTmpbufAdr+MVD3_FW_SLQ_TAB_TMPBUF_LEN);
6103
6104 HAL_MVD_CPU_Sync();
6105 HAL_MVD_ReadMemory();
6106
6107 // wait decode complete
6108 #define WAIT_DECODE_DONE_TIME 33 //To decode 1 frame should take less than 33ms
6109 u32deley = HAL_MVD_GetTime();
6110 u32time = 0;
6111 while (HAL_MVD_GetPicCounter(u8Idx)<1 && (u32time<WAIT_DECODE_DONE_TIME))
6112 {
6113 u32time = HAL_MVD_GetTime()-u32deley;
6114 }
6115 if (u32time >= WAIT_DECODE_DONE_TIME)
6116 {
6117 MVD_DEBUGERROR(MVD_PRINT ("MDrv_MVD_DecodeIFrame time out(du=%d, st=%d, now=%d)\n", u32time, u32deley, HAL_MVD_GetTime()));
6118 MVD_DEBUGERROR(MVD_PRINT("frmCnt=%d state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx)));
6119 return FALSE;
6120 }
6121 MVD_DEBUGINFO(MVD_PRINT ("MDrv_MVD_DecodeIFrame time (%d, %d)\n", u32time, u32deley));
6122 //MVD_PRINT("frmCnt=%ld state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx));
6123
6124 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6125 pCtrlCfg->bDecodeIFrame = TRUE;
6126
6127 return TRUE;
6128 }
6129
6130
6131 //------------------------------------------------------------------------------
6132 /// Set bit stream buffer address to MVD
6133 /// @param -u32start \b IN : start address
6134 /// @param -u32end \b IN : end address
6135 //------------------------------------------------------------------------------
MVD_SetBitStreamAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)6136 static void MVD_SetBitStreamAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
6137 {
6138 MVD_CmdArg mvdcmd;
6139 MS_ASSERT((u32start%8)==0);
6140 u32start >>= 3;
6141 SET_CMDARG(mvdcmd, u32start, u8Idx);
6142 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_START, &mvdcmd ) == FALSE)
6143 {
6144 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_START ) );
6145 return;
6146 }
6147
6148 MS_ASSERT((u32end%8)==0);
6149 u32end >>= 3;
6150 SET_CMDARG(mvdcmd, u32end, u8Idx);
6151 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_END, &mvdcmd ) == FALSE)
6152 {
6153 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_END ) );
6154 return;
6155 }
6156 return;
6157 }
6158
HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_U32 u32len)6159 MS_BOOL HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_U32 u32len)
6160 {
6161 MS_VIRT tmpAdr, tmpLen;
6162 MVD_FWCfg* pFwCfg = NULL;
6163 MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
6164 MVD_MEMCfg* pstMemCfg = NULL;
6165 MVD_SLQTBLInfo* pstSlqTblInfo = NULL;
6166 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6167 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6168 MS_VIRT u32BuffStart = u32start+(MVD_FW_TASK_OFFSET*u8VPUIdx);
6169 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
6170 MS_VIRT u32StartOffset;
6171 MS_U8 u8MiuSel;
6172
6173 if(VPUSHMAddr != 0)
6174 {
6175 _phy_to_miu_offset(u8MiuSel, u32StartOffset, VPUSHMAddr);
6176
6177 u32StartOffset -= MVD_FW_CODE_LEN;
6178
6179 if(u8Idx == 0)
6180 {
6181 u32BuffStart = u32StartOffset; // for main decoder
6182 }
6183 else if(u8Idx == 1)
6184 {
6185 u32BuffStart = u32StartOffset + 0x20000; // VPUSHMAddr+128K bytes
6186 }
6187 }
6188
6189 MVD_DEBUGINFO(MVD_PRINT("MVD FW shared mem start = 0x%lx\n", (unsigned long)u32BuffStart));
6190 MVD_GetFWBuffAdd(u32BuffStart, u32len, pBuff);
6191 MVD_SetFWBuffAdd(u8Idx, pBuff);
6192
6193 tmpAdr = pBuff->u32DecFrmInfoAdd + MVD_FW_DECFRM_INFO_BUF_LEN;
6194
6195 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FB, &tmpAdr, &tmpLen);
6196 MVD_DEBUGINFO(MVD_PRINT("set MVD_FRAMEBUFFER_ADR=%lx\n",(unsigned long)tmpAdr));
6197 HAL_MVD_SetFrameBuffAddr(u8Idx, tmpAdr, HAL_MVD_GetFBMode(u8Idx));
6198 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
6199 HAL_MVD_SetFrameBuffNum(u8Idx, pFwCfg->u8FBNum,pFwCfg->u32FBUsedSize);
6200
6201 // If VD_MHEG5(CPU) and MVD HW engine are run on different MIU,
6202 // IAP, DP, and MV buffers are allocated after FB.
6203 // The reason is that these 3 buffers are used by MVD HW engine.
6204 if(pMVDHalContext->bCMAUsed == FALSE)
6205 {
6206 tmpAdr += pFwCfg->u32FBUsedSize;
6207 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6208 if (pstMemCfg->u32FBSize < (pFwCfg->u32FBUsedSize + MVD_HW_BUF_TOTAL_LEN))
6209 {
6210 MVD_DEBUGERROR(MVD_PRINT("MVD HW buffers larger than FB size!!!\n"));
6211 }
6212 MVD_DEBUGINFO(MVD_PRINT("MVD FB boundary =0x%lx\n",(unsigned long)tmpAdr));
6213 tmpAdr = HAL_MVD_SetHWBuffer(u8Idx, tmpAdr);
6214 }
6215
6216 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_BS, &tmpAdr, &tmpLen);
6217 MVD_DEBUGINFO(MVD_PRINT("set MVD_BITSTREAM_ADR=%lx\n",(unsigned long)tmpAdr));
6218 MVD_SetBitStreamAddr(u8Idx, tmpAdr,tmpAdr+tmpLen);
6219 pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6220 pstSlqTblInfo->u32ESBuffEnd = tmpAdr+tmpLen;
6221
6222 if((pFwCfg->stFBReduction.LumaFBReductionMode != E_MVD_FB_REDUCTION_NONE)
6223 || (pFwCfg->stFBReduction.ChromaFBReductionMode != E_MVD_FB_REDUCTION_NONE))
6224 {
6225 //for chips not support reduction mode, just ignore related config.
6226 MVD_DEBUGERROR(MVD_PRINT("MVD Err: Not support FB reduction mode!!\n"));
6227 }
6228
6229 return TRUE;
6230 }
6231
6232 //------------------------------------------------------------------------------
6233 /// Issue "Decode Pause" command.
6234 //------------------------------------------------------------------------------
HAL_MVD_DecodePause(MS_U8 u8Idx)6235 void HAL_MVD_DecodePause(MS_U8 u8Idx)
6236 {
6237 MVD_CmdArg mvdcmd;
6238 SETUP_CMDARG(mvdcmd);
6239 SET_DECNUM(mvdcmd, u8Idx);
6240 if (HAL_MVD_MVDCommand(CMD_PAUSE, &mvdcmd)== FALSE)
6241 {
6242 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PAUSE) );
6243 return;
6244 }
6245
6246 return;
6247 }
6248
6249
6250 //------------- Below functions are for MediaCodec SLQ Table --------------------
6251 #if _SLQTBL_DUMP_PTS
_SLQTbl_DumpPtsTbl(MS_U8 u8Idx,MS_U32 u32EntryStart,MS_U32 u32EntryEnd)6252 static void _SLQTbl_DumpPtsTbl(MS_U8 u8Idx, MS_U32 u32EntryStart, MS_U32 u32EntryEnd)
6253 {
6254 MS_U32 i;
6255 MS_VIRT u32EsRp, u32EsStart, u32EsEnd;
6256 MS_VIRT u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
6257
6258 for (i=u32EntryStart; i<u32EntryEnd; i++)
6259 {
6260 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + i*8;
6261
6262 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
6263 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
6264 MVD_PRINT("ES[%x] Start=0x%x End=0x%x u32EsRp=%x\n",
6265 i, u32EsStart, u32EsEnd, u32EsRp);
6266 }
6267
6268 MVD_PRINT("\n=======Dump PTS table========\n");
6269 MVD_PRINT("addr\t byte_cnt\t dummy_cnt\t id_low\t id_high\t time_stamp\n");
6270 for (i=u32EntryStart; i<u32EntryEnd; i++)
6271 {
6272 MVD_PRINT("0x%x\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\n", u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN,
6273 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN), //byteCnt
6274 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+4), //dummyPktCnt
6275 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+8), //idLow
6276 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+12),//idHigh
6277 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+16) //pts
6278 );
6279 }
6280 MVD_PRINT("=====================================\n");
6281 }
6282 #endif
6283
6284
6285 #if SLQ_NEW_PUSH
MVD_SLQTblGetHdrPkt(MS_U8 u8Idx,MVD_PacketInfo * pDivxHdr,MVD_PacketInfo * pDivxData)6286 void MVD_SLQTblGetHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6287 #else
6288 static void MVD_SLQTblGetDivxHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6289 #endif
6290 {
6291 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6292 MS_VIRT u32DivXPattern = pstSlqTblInfo->pDrvDivxTbl->u32WrPtr;
6293 MS_U32 u32FrmSize = pDivxData->u32Length;
6294 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6295 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6296 #ifdef VDEC3
6297 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6298 #endif
6299 #if SLQ_NEW_PUSH
6300 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit && pstCtrlCfg->u8McuMode == FALSE)
6301 {
6302 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart && pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6303 {
6304 //MVD_PRINT("Show KC the SlqPushLength = 0x%x\n",pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6305 if (E_MVD_CODEC_DIVX311 == curCodecType)
6306 {
6307 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6308 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , DIVX_PATTERN);
6309 }
6310 else if(E_MVD_CODEC_VC1_MAIN == curCodecType)
6311 {//rcv
6312 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, RCV_PATTERN);
6313 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6314 }
6315 else if (E_MVD_CODEC_VC1_ADV == curCodecType)
6316 {
6317 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , VC1_PATTERN);
6318 }
6319 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
6320 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
6321 pstSlqTblInfo->pSlqStatus->bSlqFireRdy =TRUE;
6322 pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;// - 16;
6323 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
6324 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
6325 }
6326
6327 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6328 {
6329 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = u32DivXPattern;
6330 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6331 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = TRUE;
6332 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6333 }
6334 else if(pstSlqTblInfo->pSlqStatus->bSlqPicCollect)
6335 {
6336 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6337 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6338 }
6339 }
6340 else
6341 {
6342 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6343 HAL_MVD_MemWrite4Byte(u32DivXPattern +4,u32FrmSize);
6344 }
6345 #else
6346 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6347 HAL_MVD_MemWrite4Byte(u32DivXPattern+4, u32FrmSize);
6348 #endif
6349 pDivxHdr->u32StAddr = u32DivXPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
6350 pDivxHdr->u32TimeStamp = pDivxData->u32TimeStamp; //unit: ms
6351 pDivxHdr->u32ID_L = pDivxData->u32ID_L;
6352 pDivxHdr->u32ID_H = pDivxData->u32ID_H;
6353 //MVD_PRINT("u32DivXPattern(0x%x==>0x%x)=0x%x 0x%x\n", u32DivXPattern, pDivxHdr->u32StAddr,
6354 // HAL_MVD_MemRead4Byte(u32DivXPattern), HAL_MVD_MemRead4Byte(u32DivXPattern+4));
6355 if (E_MVD_CODEC_VC1_ADV == curCodecType)
6356 {
6357 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6358 pDivxHdr->u32Length = 4;
6359 }
6360 else
6361 {
6362 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6363 if(pstCtrlCfg->u8McuMode == TRUE)
6364 {
6365 pDivxHdr->u32Length = 64;
6366 if (pstSlqTblInfo->pDrvDivxTbl->u32WrPtr >= pstSlqTblInfo->pDrvDivxTbl->u32EndAdd)
6367 {
6368 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
6369 }
6370 }
6371 else
6372 {
6373 pDivxHdr->u32Length = 8;
6374 }
6375 }
6376
6377 #if SLQ_NEW_PUSH
6378 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart && pstCtrlCfg->u8McuMode == FALSE)
6379 {
6380 if (E_MVD_CODEC_VC1_ADV == curCodecType)
6381 {
6382 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6383 pDivxHdr->u32Length = 4;
6384 }
6385 else
6386 {
6387 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6388 pDivxHdr->u32Length = 8;
6389 }
6390 }
6391 #endif
6392 }
6393
MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx,MVD_CodecType eType)6394 static void MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx, MVD_CodecType eType)
6395 {
6396 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6397 MS_PHY u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
6398 MS_PHY temp = 0;
6399
6400 #if 0
6401 _MVD_Memset(u32EndPattern, 0xff, END_PATTERN_SIZE);
6402 #else
6403 //_miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32EndPattern,temp);
6404 temp = u32EndPattern+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6405 memset((void*)(MS_PA2KSEG1(temp)),0xff,END_PATTERN_SIZE);
6406 MsOS_FlushMemory();
6407 MsOS_ReadMemory();
6408 #endif
6409
6410 if ((E_MVD_CODEC_FLV == eType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == eType))
6411 {
6412 HAL_MVD_MemWrite4Byte(u32EndPattern, FLV_PATTERN);
6413 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6414 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6415 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6416 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6417 //MVD_PRINT("##########FileEnd for FLV/SVH!, u32EndPattern=%x\n",u32EndPattern);
6418 }
6419 else if (E_MVD_CODEC_DIVX311 == eType)
6420 {
6421 HAL_MVD_MemWrite4Byte(u32EndPattern, DIVX_PATTERN);
6422 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6423 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6424 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6425 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6426 //MVD_PRINT("##########FileEnd for DIVX311!, u32EndPattern=%x\n",u32EndPattern);
6427 }
6428 else if ((E_MVD_CODEC_MPEG2 == eType)||(E_MVD_CODEC_MPEG4 == eType))
6429 {
6430 HAL_MVD_MemWrite4Byte(u32EndPattern, MPEG_PATTERN_0);
6431 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6432 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2);
6433 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3);
6434 //MVD_PRINT("##########FileEnd for MPEG2/4!, u32EndPattern=%x\n",u32EndPattern);
6435 }
6436 else
6437 {
6438 HAL_MVD_MemWrite4Byte(u32EndPattern, END_PATTERN_0);
6439 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6440 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2); //scw
6441 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3); //scw
6442 //MVD_PRINT("##########FileEnd for VC1!, u32EndPattern=%x\n",u32EndPattern);
6443 }
6444
6445 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x\n", (unsigned long)u32EndPattern,
6446 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4)));
6447 }
6448
6449
MVD_SLQTblInitDummyPkt(MS_U8 u8Idx,MVD_CodecType eType)6450 static void MVD_SLQTblInitDummyPkt(MS_U8 u8Idx, MVD_CodecType eType)
6451 {
6452 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6453 MS_PHY u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
6454 MS_U32 u32DummyPattern[3];
6455 MS_U32 u32PatternSize;
6456 MS_U32 i;
6457 MS_PHY temp = 0;
6458
6459 //MVD_PRINT("eType = 0x%x\n", eType);
6460 //initial content for dummy packet
6461 #if 0
6462 _MVD_Memset(u32DummyES, 0xff, DUMMY_SIZE);
6463 #else
6464 temp = u32DummyES+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6465 memset((void*)(MS_PA2KSEG1(temp)),0xff,DUMMY_SIZE);
6466 MsOS_FlushMemory();
6467 MsOS_ReadMemory();
6468 #endif
6469
6470 switch (eType)
6471 {
6472 case E_MVD_CODEC_FLV:
6473 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6474 u32DummyPattern[0] = FLV_PATTERN;
6475 u32PatternSize = 1;
6476 break;
6477
6478 case E_MVD_CODEC_DIVX311:
6479 u32DummyPattern[0] = DIVX_PATTERN;
6480 u32PatternSize = 1;
6481 break;
6482
6483 case E_MVD_CODEC_VC1_ADV: //vc1
6484 u32DummyPattern[0] = VC1_PATTERN_0;
6485 u32DummyPattern[1] = VC1_PATTERN_1;
6486 u32DummyPattern[2] = VC1_PATTERN_2;
6487 u32PatternSize = 3;
6488 break;
6489
6490 case E_MVD_CODEC_VC1_MAIN: //rcv
6491 u32DummyPattern[0] = RCV_PATTERN_0;
6492 u32DummyPattern[1] = RCV_PATTERN_1;
6493 u32DummyPattern[2] = RCV_PATTERN_2;
6494 u32PatternSize = 3;
6495 break;
6496
6497 default:
6498 u32DummyPattern[0] = DUMMY_PATTERN;
6499 u32PatternSize = 1;
6500 break;
6501 }
6502 for (i=0; i<u32PatternSize; i++)
6503 {
6504 HAL_MVD_MemWrite4Byte(u32DummyES+i*4, u32DummyPattern[i]);
6505 }
6506 #if 0
6507 MVD_PRINT("u32DummyES(0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES, HAL_MVD_MemRead4Byte(u32DummyES),
6508 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
6509 #endif
6510
6511 }
6512
MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST * pDrvSlqTbl,MS_U32 u32Addr)6513 static void MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST* pDrvSlqTbl, MS_U32 u32Addr)
6514 {
6515 MS_PHY temp = 0;
6516 pDrvSlqTbl->u32StAdd = u32Addr;
6517 pDrvSlqTbl->u32EndAdd = u32Addr + SLQ_TBL_SIZE;
6518 pDrvSlqTbl->u32EntryCntMax = SLQ_ENTRY_MAX;
6519
6520 //reset SLQ table read/write pointers
6521 pDrvSlqTbl->u32RdPtr = pDrvSlqTbl->u32StAdd;
6522 pDrvSlqTbl->u32WrPtr = pDrvSlqTbl->u32StAdd;
6523 pDrvSlqTbl->pu32LastEntry = &pDrvSlqTbl->u32WrPtr;
6524
6525 #if (!MVD_TURBO_INIT)
6526 //reset SLQ table
6527 #if 0
6528 _MVD_Memset(pDrvSlqTbl->u32StAdd, 0, SLQ_TBL_SIZE);
6529 #else
6530 temp = pDrvSlqTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6531 memset((void*)(MS_PA2KSEG1(temp)),0,SLQ_TBL_SIZE);
6532 MsOS_FlushMemory();
6533 MsOS_ReadMemory();
6534 #endif
6535 #endif
6536 pDrvSlqTbl->u32Empty = SLQ_TBL_SIZE;
6537 //_SLQTbl_DumpInfo(pDrvSlqTbl);
6538 }
6539
MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS * pSlqStatus,MS_VIRT u32WrPtr)6540 static void MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS* pSlqStatus, MS_VIRT u32WrPtr)
6541 {
6542 #if SLQ_NEW_PUSH
6543 pSlqStatus->u32VaildWptrAddr = u32WrPtr ;
6544 pSlqStatus->bSlqPicWaitNextStart = FALSE;
6545 pSlqStatus->bSlqCtrlBit = FALSE;
6546 pSlqStatus->u32SlqPushLength = 0;
6547 pSlqStatus->bSlqPicStart = FALSE;
6548 pSlqStatus->bSlqPicCollect = FALSE;
6549 pSlqStatus->bSlqEnLastFrameShow =FALSE;
6550 pSlqStatus->bSlqFireRdy = FALSE;
6551 #endif
6552 }
6553
MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST * pDrvDivxTbl,MS_U32 u32StAdd,MS_U32 u32Val)6554 static void MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST* pDrvDivxTbl, MS_U32 u32StAdd, MS_U32 u32Val)
6555 {
6556 MS_PHY temp = 0;
6557 ///// init SLQ entries for DivX311
6558 pDrvDivxTbl->u32StAdd = u32StAdd;
6559 pDrvDivxTbl->u32EndAdd= pDrvDivxTbl->u32StAdd + SLQ_TBL_SIZE;
6560 pDrvDivxTbl->u32WrPtr = pDrvDivxTbl->u32StAdd;
6561 //pDrvDivxTbl->u32RdPtr = pDrvDivxTbl->u32StAdd;
6562 #if (!MVD_TURBO_INIT)
6563 //reset DivX311 pattern table
6564 #if 0
6565 _MVD_Memset(pDrvDivxTbl->u32StAdd, 0, u32Val);
6566 #else
6567 temp = pDrvDivxTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6568 memset((void*)(MS_PA2KSEG1(temp)),0,u32Val);
6569 MsOS_FlushMemory();
6570 MsOS_ReadMemory();
6571 #endif
6572 #endif
6573 }
6574
MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST * pDrvEsTbl,MS_U32 u32StAdd,MS_U32 u32Val)6575 static void MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST* pDrvEsTbl, MS_U32 u32StAdd, MS_U32 u32Val)
6576 {
6577 UNUSED(u32Val);
6578 MS_PHY temp = 0;
6579 ///// init ES table
6580 pDrvEsTbl->u32StAdd = u32StAdd;
6581 pDrvEsTbl->u32EndAdd= pDrvEsTbl->u32StAdd + ES_TBL_SIZE;
6582 pDrvEsTbl->u32WrPtr = pDrvEsTbl->u32StAdd;
6583 //reset ES table
6584 #if 0
6585 _MVD_Memset(pDrvEsTbl->u32StAdd, 0, ES_TBL_SIZE);
6586 #else
6587 temp = pDrvEsTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6588 memset((void*)(MS_PA2KSEG1(temp)),0,ES_TBL_SIZE);
6589 MsOS_FlushMemory();
6590 MsOS_ReadMemory();
6591 #endif
6592 }
6593
6594 //------------------------------------------------------------------------------------------------------------
6595 // Layout of drvProcBuffer
6596 // -----------------
6597 // drvProcBuff | SlqTbl entries | <- pstSlqTblInfo->pDrvSlqTbl->u32StAdd
6598 // | 8K bytes |
6599 // | (1024 entries) |
6600 // | |
6601 // |-----------------|
6602 // | DivX311 | <- pstSlqTblInfo->pDrvSlqTbl->u32EndAdd <- pstSlqTblInfo->pDrvDivxTbl->u32StAdd
6603 // | 8K bytes |
6604 // | (1024 entries) |
6605 // | |
6606 // |-----------------|
6607 // | Flush Patterns |... <- pstSlqTblInfo->pDrvDivxTbl->u32EndAdd <- _drvDummy.u32StAdd
6608 // | 8K bytes |
6609 // | (1024 entries) |
6610 // | |
6611 // |-----------------|
6612 // | FileEnd Pattern |... <- _drvDummy.u32EndAdd <- _drvFileEnd.u32StAdd
6613 // | 8K bytes |
6614 // | (1024 entries) |
6615 // | |
6616 // |-----------------|
6617 // | ES table |... <- _drvFileEnd.u32EndAdd <- pstSlqTblInfo->pDrvEsTbl->u32StAdd
6618 // | 8K bytes |
6619 // | (1024 entries) |
6620 // | |
6621 // |-----------------|
6622 // | |........ End of drvProcBuff
6623 //
6624 //------------------------------------------------------------------------------------------------------------
HAL_MVD_SLQTblInit(MS_U8 u8Idx)6625 MS_BOOL HAL_MVD_SLQTblInit(MS_U8 u8Idx)
6626 {
6627 MS_VIRT u32Addr, u32Len;
6628 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6629 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6630 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6631
6632 if(curCodecType == E_MVD_CODEC_UNKNOWN)
6633 {
6634 MVD_DEBUGERROR(MVD_PRINT("%s: unknow codec type!\n", __FUNCTION__));
6635 return FALSE;
6636 }
6637 pstSlqTblInfo->u32DummyPktCnt = 0;//reset dummy packet counter
6638 pstSlqTblInfo->u32SlqByteCnt = 0; //reset SLQ table byte counter
6639 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
6640
6641 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_DRV, &u32Addr, &u32Len);
6642
6643 //init SLQ table attributes & reset SLQ table read/write pointers
6644 MVD_SLQTblInitDrvSlqTbl(pstSlqTblInfo->pDrvSlqTbl, u32Addr);
6645 pstSlqTblInfo->u32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6646
6647 MVD_SLQTblInitSlqStatus(pstSlqTblInfo->pSlqStatus, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
6648
6649 //set SLQ table start/end to F/W
6650 HAL_MVD_SetSLQTblBufStartEnd(u8Idx, HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr), HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr+SLQ_TBL_SIZE));
6651
6652 ///// init SLQ entries for DivX311
6653 MVD_SLQTblInitDrvDivxTbl(pstSlqTblInfo->pDrvDivxTbl, pstSlqTblInfo->pDrvSlqTbl->u32EndAdd, SLQ_TBL_SIZE);
6654
6655 ///// init flush pattern
6656 MVD_SLQTblInitDummyPkt(u8Idx, curCodecType);
6657
6658 ///// init file-end pattern
6659 MVD_SLQTblInitFileEndPkt(u8Idx, curCodecType);
6660
6661 MVD_SLQTblInitDrvEsTbl(pstSlqTblInfo->pDrvEsTbl, (pstSlqTblInfo->pDrvDivxTbl->u32EndAdd + DUMMY_SIZE*2), pstMemCfg->u32DrvBufSize);
6662
6663 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX; //reset ES read pointer
6664 pstSlqTblInfo->u32PreEsWr = 0; //reset ES write pointer
6665
6666 return TRUE;
6667 }
6668
6669
6670 #if 0
6671 static void _SLQTbl_DumpInfo(MVD_SLQ_TBL_ST* pInfo)
6672 {
6673 MVD_PRINT("str=0x%x\n", pInfo->u32StAdd);
6674 MVD_PRINT("end=0x%x\n", pInfo->u32EndAdd);
6675 MVD_PRINT("cnt=0x%x\n", pInfo->u32EntryCntMax);
6676 MVD_PRINT("rd =0x%x\n", pInfo->u32RdPtr);
6677 MVD_PRINT("wr =0x%x\n", pInfo->u32WrPtr);
6678 return;
6679 }
6680 #endif
6681
6682
HAL_MVD_GetQueueVacancy(MS_U8 u8Idx,MS_BOOL bCached)6683 MS_U32 HAL_MVD_GetQueueVacancy(MS_U8 u8Idx, MS_BOOL bCached)
6684 {
6685 MS_U32 u32Empty;
6686 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6687
6688 #if 0
6689 if (MDrv_MVD_GetVldErrCount()!=0)
6690 {
6691 MVD_PRINT("QQQ wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x) vldErr=0x%x\n", writePtrLast[u8Idx], pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
6692 HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, MDrv_MVD_GetVldErrCount(u8Idx));
6693 MVD_PRINT("Previous EsRead=0x%x EsWrite=0x%x\n", pstSlqTblInfo->u32PreEsRd, pstSlqTblInfo->u32PreEsWr);
6694 _SLQTbl_DumpPtsTbl(u8Idx, 0x0, 0x620);
6695 while(1);
6696 }
6697 #endif
6698
6699 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32Empty;
6700 if ((TRUE == bCached) && (u32Empty > SLQTBL_CHECKVACANCY_WATERLEVEL))
6701 {
6702 //To have better performance, we only query F/W read pointer
6703 //when queue_vacancy is lower than water_level
6704 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6705 {
6706 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6707 }
6708 else
6709 {
6710 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6711 }
6712
6713 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6714 {
6715 u32Empty = SLQ_TBL_SIZE;
6716 }
6717 u32Empty -= SLQ_TBL_SAFERANGE;
6718 return (u32Empty / SLQ_ENTRY_LEN);
6719 }
6720
6721 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx));
6722 //MVD_PRINT("QV=0x%x rd=0x%x==>", u32Empty, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6723 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= (pstSlqTblInfo->pDrvSlqTbl->u32StAdd+SLQ_ENTRY_LEN))
6724 {
6725 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
6726 {
6727 MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too large!\n",
6728 __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6729 }
6730 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr -= SLQ_ENTRY_LEN;
6731 }
6732 else if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd)
6733 {
6734 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32EndAdd - SLQ_ENTRY_LEN;
6735 }
6736 else
6737 {
6738 MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too small!\n",
6739 __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6740 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6741 }
6742 //MVD_PRINT("0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6743
6744 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6745 {
6746 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6747 }
6748 else
6749 {
6750 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6751 }
6752
6753 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6754 {
6755 u32Empty = SLQ_TBL_SIZE;
6756 }
6757
6758 pstSlqTblInfo->pDrvSlqTbl->u32Empty = u32Empty;
6759
6760 if (u32Empty < SLQ_TBL_SAFERANGE)
6761 {//to avoid write_pointer catch up to read_pointer
6762 u32Empty= 0;
6763 }
6764 else
6765 {
6766 u32Empty -= SLQ_TBL_SAFERANGE;
6767 }
6768
6769 //MVD_PRINT("%s r=0x%x w=0x%x u32Empty=0x%x\n", __FUNCTION__,
6770 // pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32Empty);
6771 return (u32Empty / SLQ_ENTRY_LEN);
6772 }
6773
HAL_MVD_PushQueue(MS_U8 u8Idx,MVD_PacketInfo * pInfo)6774 E_MVD_Result HAL_MVD_PushQueue(MS_U8 u8Idx, MVD_PacketInfo* pInfo)
6775 {
6776 E_MVD_Result eRet=E_MVD_RET_INVALID_PARAM;
6777 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6778 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6779 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6780 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6781 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6782 #ifdef VDEC3
6783 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
6784 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6785 #endif
6786 if (pInfo == NULL)
6787 {
6788 MVD_DEBUGERROR(MVD_PRINT("PushQueue NULL pInfo\n"));
6789 return E_MVD_RET_INVALID_PARAM;
6790 }
6791
6792 #ifndef VDEC3
6793 if(pMVDHalContext->bAutoInsertDummyPattern[u8Idx] == TRUE)
6794 #else
6795 if(pstCtrlCfg->u8McuMode == TRUE)
6796 #endif
6797 {
6798 MS_U8* temp = (MS_U8*)(MS_PA2KSEG1( (MS_PHY)(pInfo->u32StAddr)+pstMemCfg->u32BSAddr));
6799 MS_U32 i;
6800 MS_U32 u32DummyPattern[3];
6801 MS_U32 u32PatternSize;
6802
6803 switch (curCodecType)
6804 {
6805 case E_MVD_CODEC_FLV:
6806 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6807 u32DummyPattern[0] = FLV_PATTERN;
6808 u32PatternSize = 1;
6809 break;
6810
6811 case E_MVD_CODEC_DIVX311:
6812 u32DummyPattern[0] = DIVX_PATTERN;
6813 u32PatternSize = 1;
6814 break;
6815
6816 case E_MVD_CODEC_VC1_ADV: //vc1
6817 u32DummyPattern[0] = VC1_PATTERN_0;
6818 u32DummyPattern[1] = VC1_PATTERN_3;
6819 u32PatternSize = 2;
6820 break;
6821 case E_MVD_CODEC_VC1_MAIN: //rcv
6822 u32DummyPattern[0] = RCV_PATTERN_3;
6823 u32DummyPattern[1] = RCV_PATTERN_1;
6824 u32DummyPattern[2] = RCV_PATTERN_3;
6825 u32PatternSize = 3;
6826 break;
6827
6828 default:
6829 u32DummyPattern[0] = DUMMY_PATTERN;
6830 u32DummyPattern[1] = DUMMY_PATTERN;
6831 u32PatternSize = 2;
6832 break;
6833 }
6834
6835
6836 for (i=0; i<u32PatternSize; i++)
6837 {
6838 temp[4*i+pInfo->u32Length] = ((u32DummyPattern[i])&0xff);
6839 temp[4*i+pInfo->u32Length+1] = ((u32DummyPattern[i]>>8)&0xff);
6840 temp[4*i+pInfo->u32Length+2] = ((u32DummyPattern[i]>>16)&0xff);
6841 temp[4*i+pInfo->u32Length+3] = ((u32DummyPattern[i]>>24)&0xff);
6842 }
6843
6844 for(i=u32PatternSize*4;i<256;i++)
6845 {
6846 temp[pInfo->u32Length+i] = 0xFF;
6847 }
6848
6849 pInfo->u32Length += 256;
6850 }
6851
6852
6853 #if _SLQTBL_DUMP_PUSHQ
6854 {
6855 //static MS_U32 u32pqTimes[MAX_DEC_NUM]= {0, 0};
6856
6857 MVD_PRINT("Push[%x] st=0x%x len=0x%x pts=0x%x\n", pMVDHalContext->u32pqTimes[u8Idx]++,
6858 pInfo->u32StAddr, pInfo->u32Length, pInfo->u32TimeStamp);
6859 }
6860 #endif
6861
6862 #if SLQ_NEW_PUSH
6863 if((pInfo->u32StAddr & SLQ_PIC_START_FLAG) == SLQ_PIC_START_FLAG)
6864 {
6865 pInfo->u32StAddr = pInfo->u32StAddr&~SLQ_PIC_START_FLAG;
6866 pstSlqTblInfo->pSlqStatus->bSlqPicStart =TRUE;
6867 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = TRUE;
6868 }
6869 else
6870 {
6871 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
6872 }
6873 #endif
6874 //check input parameters
6875 if (pInfo->u32StAddr >= pstMemCfg->u32BSSize)
6876 {
6877 //since u32StAddr is offset, it shouldn't be larger than size.
6878 MVD_DEBUGERROR(MVD_PRINT("PushQueue invalid u32StAddr=0x%lx, bsSize=0x%lx\n", (unsigned long)pInfo->u32StAddr, (unsigned long)pstMemCfg->u32BSSize));
6879 return E_MVD_RET_INVALID_PARAM;
6880 }
6881 else if ((pInfo->u32TimeStamp == MVD_NULLPKT_PTS) && (pInfo->u32Length==0))
6882 {
6883 // AVI NULL packet.
6884 pstSlqTblInfo->u32DummyPktCnt++;
6885 //MVD_PRINT("Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6886 return E_MVD_RET_OK;
6887 }
6888
6889 if (FALSE == (HAL_MVD_IsMStreamerMode(u8Idx) ||HAL_MVD_IsMcuMode(u8Idx)))
6890 { //Check repeat PTS for non-MStreamer/Mcu mode.
6891 //MVD_PRINT(".Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6892 if (pInfo->u32TimeStamp == pstSlqTblInfo->u32LastPts)
6893 {
6894 //MVD_PRINT("Repeat PTS!\n");
6895 if (pInfo->u32TimeStamp != MVD_NULLPKT_PTS)
6896 pInfo->u32TimeStamp = MVD_NULLPKT_PTS; //repeat PTS
6897 }
6898 else
6899 {
6900 pstSlqTblInfo->u32LastPts = pInfo->u32TimeStamp;
6901 }
6902 }
6903
6904 //check queue vacancy
6905 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty >= SLQ_TBL_SAFERANGE)
6906 { //put packets
6907 #if SLQ_NEW_PUSH
6908 if (E_MVD_CODEC_DIVX311 == curCodecType
6909 ||E_MVD_CODEC_VC1_MAIN == curCodecType //rcv
6910 ||E_MVD_CODEC_VC1_ADV == curCodecType)
6911 {
6912 MVD_PacketInfo stHdr;
6913 if((pstSlqTblInfo->pSlqStatus->bSlqCtrlBit) || (E_MVD_CODEC_DIVX311 == curCodecType))
6914 {
6915 MVD_SLQTblGetHdrPkt(u8Idx, &stHdr, pInfo);
6916
6917 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart||(!pstSlqTblInfo->pSlqStatus->bSlqCtrlBit))
6918 {
6919 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6920 { //to mark this packet's pts as unused.
6921 stHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6922 stHdr.u32ID_H = MVD_NULLPKT_PTS;
6923 }
6924 #ifdef VDEC3
6925 if(pstCtrlCfg->u8McuMode == TRUE)
6926 {
6927 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 1)
6928 {
6929 HAL_VPU_EX_PacketInfo stVpuPkt;
6930
6931 stVpuPkt.u32Offset = stHdr.u32StAddr;
6932 stVpuPkt.u32Length = stHdr.u32Length;
6933 stVpuPkt.u64TimeStamp = (MS_U64)stHdr.u32TimeStamp;
6934 //If in display queue mode
6935 stVpuPkt.u64TimeStamp |= ((MS_U64)stHdr.u32ID_H << 32);
6936 stVpuPkt.u32ID_H = stHdr.u32ID_H;
6937 stVpuPkt.u32ID_L = stHdr.u32ID_L;
6938
6939 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6940 eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6941 }
6942 else
6943 {
6944 return E_MVD_RET_FAIL;
6945 }
6946 }
6947 else
6948 #endif
6949 {
6950 HAL_MVD_SLQTblSendPacket(u8Idx, &stHdr);
6951 }
6952 }
6953 }
6954 }
6955 #else
6956 if (E_MVD_CODEC_DIVX311 == curCodecType)
6957 {
6958 MVD_PacketInfo stDivxHdr;
6959 MVD_SLQTblGetDivxHdrPkt(u8Idx, &stDivxHdr, pInfo);
6960 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6961 { //to mark this packet's pts as unused.
6962 stDivxHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6963 stDivxHdr.u32ID_H = MVD_NULLPKT_PTS;
6964 }
6965 HAL_MVD_SLQTblSendPacket(u8Idx, &stDivxHdr);
6966 }
6967 #endif
6968
6969 #ifdef VDEC3
6970 if(pstCtrlCfg->u8McuMode == TRUE)
6971 {
6972 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
6973 {
6974 HAL_VPU_EX_PacketInfo stVpuPkt;
6975
6976 stVpuPkt.u32Offset = pInfo->u32StAddr;
6977 stVpuPkt.u32Length = pInfo->u32Length;
6978 stVpuPkt.u64TimeStamp = (MS_U64)pInfo->u32TimeStamp;
6979 //If in display queue mode
6980 stVpuPkt.u64TimeStamp |= ((MS_U64)pInfo->u32ID_H << 32);
6981 stVpuPkt.u32ID_H = pInfo->u32ID_H;
6982 stVpuPkt.u32ID_L = pInfo->u32ID_L;
6983
6984 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6985 eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6986 //VPRINTF("[%d]%s[%d],ret=%d,u32StAddr %x,u32Length %d,u32TimeStamp %d\n",u8Idx,__FUNCTION__,__LINE__,eRet,(unsigned int)pInfo->u32StAddr,(unsigned int)pInfo->u32Length,(unsigned int)pInfo->u32TimeStamp);
6987 return eRet;
6988 }
6989 else
6990 {
6991 return E_MVD_RET_FAIL;
6992 }
6993 }
6994 else
6995 #endif
6996 {
6997 HAL_MVD_SLQTblSendPacket(u8Idx, pInfo);
6998 eRet=E_MVD_RET_OK;
6999 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
7000 }
7001 }
7002 else
7003 {
7004 MS_ASSERT(0); //shouldn't be here!
7005 MVD_DEBUGERROR(MVD_PRINT("PushQueue FULL!!! empty=0x%lx\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
7006 //Player will only push queue when queue vacancy != 0
7007 eRet=E_MVD_RET_QUEUE_FULL;
7008 }
7009
7010 if (E_MVD_RET_OK != eRet)
7011 {
7012 MVD_DEBUGERROR(MVD_PRINT("%s ret = %d\n", __FUNCTION__, eRet));
7013 }
7014 return eRet;
7015 }
7016
7017
MVD_FlushTSQueue(MS_U8 u8Idx)7018 static E_MVD_Result MVD_FlushTSQueue(MS_U8 u8Idx)
7019 {
7020 if (HAL_MVD_GetLastCmd(u8Idx)!=CMD_PAUSE)
7021 {
7022 HAL_MVD_PauseDisp(u8Idx);
7023 HAL_MVD_DecodePause(u8Idx);
7024 HAL_MVD_FlushDisplayBuf(u8Idx);
7025 }
7026
7027 if(HAL_MVD_SkipData(u8Idx) == FALSE)
7028 {
7029 return E_MVD_RET_FAIL;
7030 }
7031 else
7032 {
7033 return E_MVD_RET_OK;
7034 }
7035 }
7036
7037
MVD_PatternLenIsValid(MS_U8 u8Idx,MS_U32 u32Len)7038 static MS_BOOL MVD_PatternLenIsValid(MS_U8 u8Idx, MS_U32 u32Len)
7039 {
7040 MS_U32 u32ValidLen = 0;
7041 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7042 #define MAX_VALIDLEN 0x200000 //2M
7043
7044 if (E_MVD_CODEC_VC1_MAIN != curCodecType)
7045 {
7046 return TRUE;
7047 }
7048 else
7049 {
7050 //only RCV has to check this
7051 u32ValidLen = HAL_MVD_GetPayloadLen(u8Idx);
7052 if (u32ValidLen > MAX_VALIDLEN)
7053 { //avoid the extreme large value due to error bitstream
7054 u32ValidLen = MAX_VALIDLEN;
7055 }
7056 MVD_DEBUGINFO(MVD_PRINT("(%x) ValidLen=0x%x CurLen=0x%x\n",
7057 (u32Len > u32ValidLen), u32ValidLen, u32Len));
7058 return (u32Len > u32ValidLen);
7059 }
7060 }
7061
MVD_FlushSlqTblQueue(MS_U8 u8Idx)7062 static E_MVD_Result MVD_FlushSlqTblQueue(MS_U8 u8Idx)
7063 {
7064 MS_U32 u32TimeCnt;
7065 MS_U32 u32PatternByteCnt = 0;
7066 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7067 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
7068 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
7069 #ifdef VDEC3
7070 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7071 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
7072 #endif
7073 HAL_MVD_ResetHandShake(u8Idx,MVD_HANDSHAKE_PAUSE);
7074 HAL_MVD_PauseDisp(u8Idx);
7075 HAL_MVD_DecodePause(u8Idx);
7076 HAL_MVD_FlushDisplayBuf(u8Idx);
7077
7078 u32TimeCnt = HAL_MVD_GetTime();
7079 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS) ||
7080 (TRUE != MVD_PatternLenIsValid(u8Idx, u32PatternByteCnt)))
7081 {
7082 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
7083 {
7084 MVD_DEBUGINFO(MVD_PRINT("\nPause finished!\n"));
7085 break;
7086 }
7087
7088 #ifdef VDEC3
7089 if(pstCtrlCfg->u8McuMode == TRUE)
7090 {
7091 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
7092 {
7093 HAL_VPU_EX_PacketInfo stVpuPkt;
7094 MVD_PacketInfo stDummyPkt;
7095 MVD_SLQTblGetDummyPkt(&stDummyPkt);
7096
7097 stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
7098 stVpuPkt.u32Length = stDummyPkt.u32Length;
7099 stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
7100 //If in display queue mode
7101 stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
7102 stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
7103 stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
7104
7105 HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
7106 }
7107 }
7108 else
7109 #endif
7110 {
7111 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
7112 {
7113 HAL_MVD_GetQueueVacancy(u8Idx, FALSE); //update pstSlqTblInfo->pDrvSlqTbl->u32Empty
7114 HAL_MVD_Delayms(1); //avoid busy query
7115 }
7116 //insert dummy pattern
7117 if (TRUE == HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FLUSH))
7118 {
7119 u32PatternByteCnt += DUMMY_SIZE*2; //2 dummy were inserted
7120 }
7121 }
7122
7123
7124 //Timeout for RCV
7125 if ((HAL_MVD_GetTime() - u32TimeCnt) > (CMD_TIMEOUT_MS*10))
7126 {
7127 MVD_DEBUGERROR(MVD_PRINT("RCV timeout!!! pl=%d, pbc=%d, emp=%ld\n",
7128 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt,
7129 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
7130 break;
7131 }
7132 }
7133 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7134 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7135 //if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
7136 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
7137 {
7138 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue PAUSE TIMEOUT!!! *****\n\n"));
7139 MVD_DEBUGERROR(MVD_PRINT("ValidLen=0x%x CurPatternLen=0x%x\n",
7140 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt));
7141
7142 return E_MVD_RET_FAIL;
7143 }
7144
7145 //flush ES buffer & reset SLQ tbl
7146 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SLQ_RST);
7147 if (HAL_MVD_SlqTblRst(u8Idx) == TRUE)
7148 {
7149 //return E_MVD_RET_OK;
7150 }
7151
7152 u32TimeCnt = HAL_MVD_GetTime();
7153 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS))
7154 {
7155 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7156 {
7157 MVD_DEBUGINFO(MVD_PRINT("\nSlqRst finished!\n"));
7158 break;
7159 }
7160 }
7161 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7162 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7163 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7164 {
7165 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue SlqRst TIMEOUT!!! *****\n\n"));
7166 return E_MVD_RET_FAIL;
7167 }
7168
7169 HAL_MVD_SLQTblInit(u8Idx); //reset related buffers
7170
7171 return E_MVD_RET_OK;
7172 }
7173
HAL_MVD_FlushQueue(MS_U8 u8Idx)7174 E_MVD_Result HAL_MVD_FlushQueue(MS_U8 u8Idx)
7175 {
7176 E_MVD_Result eRet = E_MVD_RET_OK;
7177 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
7178
7179 if (HAL_MVD_GetDecodeStatus(u8Idx) == E_MVD_STAT_IDLE)
7180 {
7181 return eRet;
7182 }
7183
7184 //flush ES buffer (and cmd queue if used)
7185 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
7186 {
7187 eRet = MVD_FlushSlqTblQueue(u8Idx);
7188 }
7189 else if (E_MVD_TS_FILE_MODE == curSrcMode)
7190 {
7191 eRet = MVD_FlushTSQueue(u8Idx);
7192 }
7193 if (E_MVD_RET_OK != eRet)
7194 {
7195 return eRet;
7196 }
7197
7198 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
7199 //flush display buffer
7200
7201 if (HAL_MVD_FlushDisplayBuf(u8Idx) != TRUE)
7202 {
7203 return E_MVD_RET_FAIL;
7204 }
7205
7206 if (TRUE == HAL_MVD_SkipToIFrame(u8Idx))
7207 {
7208 return E_MVD_RET_OK;
7209 }
7210 else
7211 {
7212 return E_MVD_RET_FAIL;
7213 }
7214 }
7215
HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)7216 MS_BOOL HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)
7217 {
7218 return HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
7219 }
7220
HAL_MVD_EnableInt(MS_U8 u8Idx,MS_U32 bEn)7221 MS_BOOL HAL_MVD_EnableInt(MS_U8 u8Idx, MS_U32 bEn)
7222 {
7223 MVD_CmdArg mvdcmd;
7224 MS_U32 u32IntFlag = 0;
7225
7226 u32IntFlag = (((bEn & E_MVD_EVENT_USER_DATA) == E_MVD_EVENT_USER_DATA) ? INT_USER_DATA : 0) |
7227 (((bEn & E_MVD_EVENT_USER_DATA_DISP) == E_MVD_EVENT_USER_DATA_DISP) ? INT_USER_DATA_DISP : 0) |
7228 (((bEn & E_MVD_EVENT_PIC_FOUND) == E_MVD_EVENT_PIC_FOUND) ? INT_PIC_FOUND : 0) |
7229 (((bEn & E_MVD_EVENT_FIRST_FRAME) == E_MVD_EVENT_FIRST_FRAME) ? INT_FIRST_FRAME : 0) |
7230 (((bEn & E_MVD_EVENT_DISP_RDY) == E_MVD_EVENT_DISP_RDY) ? INT_DISP_RDY : 0) |
7231 (((bEn & E_MVD_EVENT_SEQ_FOUND) == E_MVD_EVENT_SEQ_FOUND) ? INT_SEQ_FOUND : 0)|
7232 (((bEn & E_MVD_EVENT_DEC_ONE_FRAME) == E_MVD_EVENT_DEC_ONE_FRAME) ? INT_DEC_DONE : 0)|
7233 (((bEn & E_MVD_EVENT_DEC_ERR) == E_MVD_EVENT_DEC_ERR) ? INT_DEC_ERR : 0)|
7234 (((bEn & E_MVD_EVENT_DEC_DATA_ERR) == E_MVD_EVENT_DEC_DATA_ERR) ? INT_VES_INVALID : 0)|
7235 (((bEn & E_MVD_EVENT_XC_LOW_DEALY) == E_MVD_EVENT_XC_LOW_DEALY) ? INT_XC_LOW_DELAY : 0)|
7236 (((bEn & E_MVD_EVENT_DEC_I) == E_MVD_EVENT_DEC_I) ? INT_DEC_I : 0);
7237 if (((bEn & E_MVD_EVENT_DISP_VSYNC) == E_MVD_EVENT_DISP_VSYNC) ||
7238 ((bEn & E_MVD_EVENT_UNMUTE) == E_MVD_EVENT_UNMUTE))
7239 {
7240 u32IntFlag |= INT_DISP_VSYNC;
7241 }
7242
7243 MVD_DEBUGINFO(MVD_PRINT("u32IntFlag = 0x%x\n", u32IntFlag));
7244 SETUP_CMDARG(mvdcmd);
7245 mvdcmd.Arg0 = u32IntFlag & 0xff;
7246 mvdcmd.Arg1 = (u32IntFlag>>8) & 0xff;
7247 mvdcmd.Arg2 = (u32IntFlag>>16) & 0xff;
7248 SET_DECNUM(mvdcmd, u8Idx);
7249 SET_CMD_RET_FALSE(CMD_ENABLE_INT_STAT, &mvdcmd);
7250
7251 return TRUE;
7252 }
7253
HAL_MVD_EnablePTSDetector(MS_U8 u8Idx,MS_BOOL bEn)7254 E_MVD_Result HAL_MVD_EnablePTSDetector(MS_U8 u8Idx, MS_BOOL bEn)
7255 {
7256 MVD_CmdArg stCmdArg;
7257
7258 SETUP_CMDARG(stCmdArg);
7259 if(TRUE == bEn)
7260 {
7261 stCmdArg.Arg0 = 1;
7262 }
7263 SET_DECNUM(stCmdArg, u8Idx);
7264 if (HAL_MVD_MVDCommand(CMD_PTS_DETECTOR_EN, &stCmdArg) == FALSE)
7265 {
7266 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7267 return E_MVD_RET_FAIL;
7268 }
7269 return E_MVD_RET_OK;
7270 }
7271
HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx,MS_BOOL bEn)7272 E_MVD_Result HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx, MS_BOOL bEn)
7273 {
7274 MVD_CmdArg stCmdArg;
7275
7276 SETUP_CMDARG(stCmdArg);
7277 if(TRUE == bEn)
7278 {
7279 stCmdArg.Arg0 = 1;
7280 }
7281 SET_DECNUM(stCmdArg, u8Idx);
7282 if (HAL_MVD_MVDCommand(CMD_DISABLE_PATCH_PBFRAME, &stCmdArg) == FALSE)
7283 {
7284 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7285 return E_MVD_RET_FAIL;
7286 }
7287 return E_MVD_RET_OK;
7288 }
7289
HAL_MVD_EnableDispOneField(MS_U8 u8Idx,MS_BOOL bEn)7290 E_MVD_Result HAL_MVD_EnableDispOneField(MS_U8 u8Idx, MS_BOOL bEn)
7291 {
7292 MVD_CmdArg stCmdArg;
7293
7294 SETUP_CMDARG(stCmdArg);
7295 if(TRUE == bEn)
7296 {
7297 stCmdArg.Arg0 = 1;
7298 }
7299 SET_DECNUM(stCmdArg, u8Idx);
7300 if (HAL_MVD_MVDCommand(CMD_SHOW_ONE_FIELD, &stCmdArg) == FALSE)
7301 {
7302 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SHOW_ONE_FIELD ) );
7303 return E_MVD_RET_FAIL;
7304 }
7305 return E_MVD_RET_OK;
7306 }
7307
HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx,MS_U16 u16Cnt)7308 E_MVD_Result HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx, MS_U16 u16Cnt)
7309 {
7310 MVD_CmdArg stCmdArg;
7311
7312 SETUP_CMDARG(stCmdArg);
7313 //16bits and unit in vsync for mute the fd_mask
7314 stCmdArg.Arg0 = u16Cnt & 0xff;
7315 stCmdArg.Arg1 = (u16Cnt>>8) & 0xff;
7316 SET_DECNUM(stCmdArg, u8Idx);
7317 if (HAL_MVD_MVDCommand(CMD_FD_MASK_DELAY_CNT, &stCmdArg) == FALSE)
7318 {
7319 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FD_MASK_DELAY_CNT ) );
7320 return E_MVD_RET_FAIL;
7321 }
7322 return E_MVD_RET_OK;
7323 }
7324
HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx,MS_U8 u8FrameRate,MS_U8 u8Interlace)7325 E_MVD_Result HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx, MS_U8 u8FrameRate, MS_U8 u8Interlace)
7326 {
7327 MVD_CmdArg stCmdArg;
7328 if((u8Interlace != 0) && (u8Interlace != 1))
7329 {
7330 return E_MVD_RET_FAIL;
7331 }
7332 SETUP_CMDARG(stCmdArg);
7333 stCmdArg.Arg0 = u8FrameRate;
7334 stCmdArg.Arg1 = u8Interlace;
7335 SET_DECNUM(stCmdArg, u8Idx);
7336 if (HAL_MVD_MVDCommand(CMD_FRC_OUPUT, &stCmdArg) == FALSE)
7337 {
7338 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_OUPUT ) );
7339 return E_MVD_RET_FAIL;
7340 }
7341 return E_MVD_RET_OK;
7342 }
7343
7344
HAL_MVD_SetFRCDropType(MS_U8 u8Idx,MS_U8 u8DropType)7345 E_MVD_Result HAL_MVD_SetFRCDropType(MS_U8 u8Idx, MS_U8 u8DropType)
7346 {
7347 MVD_CmdArg stCmdArg;
7348
7349 if((u8DropType != FRC_DROP_FRAME)
7350 && (u8DropType != FRC_DROP_FIELD))
7351 {
7352 return E_MVD_RET_FAIL;
7353 }
7354
7355 SETUP_CMDARG(stCmdArg);
7356 stCmdArg.Arg0 = u8DropType;
7357 SET_DECNUM(stCmdArg, u8Idx);
7358 if (HAL_MVD_MVDCommand(CMD_FRC_DROP_BEHAVIOR, &stCmdArg) == FALSE)
7359 {
7360 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_DROP_BEHAVIOR ) );
7361 return E_MVD_RET_FAIL;
7362 }
7363 return E_MVD_RET_OK;
7364 }
7365
HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx,MS_BOOL bEnable)7366 E_MVD_Result HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx, MS_BOOL bEnable)
7367 {
7368 MVD_CmdArg stCmdArg;
7369
7370 SETUP_CMDARG(stCmdArg);
7371 stCmdArg.Arg0 = bEnable;
7372 SET_DECNUM(stCmdArg, u8Idx);
7373 if (HAL_MVD_MVDCommand(CMD_FORBID_RESOLUTION_CHANGE, &stCmdArg) == FALSE)
7374 {
7375 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FORBID_RESOLUTION_CHANGE ) );
7376 return E_MVD_RET_FAIL;
7377 }
7378 MVD_DEBUGINFO(MVD_PRINT("MVD CMD_FORBID_RESOLUTION_CHANGE(0x%x) OK\n", bEnable));
7379
7380 return E_MVD_RET_OK;
7381 }
7382
HAL_MVD_DbgGetData(MS_VIRT u32Addr,MS_U32 * u32Data)7383 E_MVD_Result HAL_MVD_DbgGetData(MS_VIRT u32Addr, MS_U32* u32Data)
7384 {
7385 MVD_CmdArg mvdcmd;
7386 MS_U32 u32Val;
7387
7388 if (!u32Data)
7389 {
7390 return E_MVD_RET_INVALID_PARAM;
7391 }
7392
7393 SET_CMDARG(mvdcmd, u32Addr, 0); //FIXME
7394 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7395 {
7396 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
7397 return E_MVD_RET_FAIL;
7398 }
7399
7400 u32Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7401 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7402 *u32Data = u32Val;
7403
7404 return E_MVD_RET_OK;
7405 }
7406
7407
HAL_MVD_DbgDumpBits(MS_U8 u8Idx,MS_PHY u32base,MS_U32 u32size)7408 void HAL_MVD_DbgDumpBits(MS_U8 u8Idx, MS_PHY u32base, MS_U32 u32size)
7409 {
7410 MVD_CmdArg mvdcmd;
7411
7412 u32base = HAL_MVD_GetMemOffset(u32base);
7413 MVD_PRINT("%s base=0x%lx size=0x%x\n", __FUNCTION__, (unsigned long)u32base, u32size);
7414 MS_ASSERT((u32base%8)==0);
7415 u32base >>= 3;
7416 SET_CMDARG(mvdcmd, u32base, u8Idx);
7417 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_BASE, &mvdcmd ) == FALSE)
7418 {
7419 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_BASE ) );
7420 return;
7421 }
7422
7423 MS_ASSERT((u32size%8)==0);
7424 u32size >>= 3;
7425 SET_CMDARG(mvdcmd, u32size, u8Idx);
7426 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_LENGTH, &mvdcmd ) == FALSE)
7427 {
7428 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_LENGTH ) );
7429 return;
7430 }
7431 return;
7432 }
7433
7434
HAL_MVD_GetActiveFormat(MS_U8 u8Idx)7435 MS_U8 HAL_MVD_GetActiveFormat(MS_U8 u8Idx)
7436 {
7437 MVD_CmdArg mvdcmd;
7438 MS_U8 u8Afd = 0;
7439
7440 SETUP_CMDARG(mvdcmd);
7441 SET_DECNUM(mvdcmd, u8Idx);
7442 if (HAL_MVD_MVDCommand( CMD_GET_AFD, &mvdcmd ) == FALSE)
7443 {
7444 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_AFD ) );
7445 return 0xff;
7446 }
7447 u8Afd = mvdcmd.Arg0;
7448 return u8Afd;
7449 }
7450
HAL_MVD_EnableAVSync(MS_U8 u8Idx,MS_BOOL bEnable)7451 MS_BOOL HAL_MVD_EnableAVSync(MS_U8 u8Idx, MS_BOOL bEnable)
7452 {
7453 MVD_CmdArg mvdcmd;
7454 SETUP_CMDARG(mvdcmd);
7455 mvdcmd.Arg0 = bEnable;
7456 SET_DECNUM(mvdcmd, u8Idx);
7457 SET_CMD_RET_FALSE(CMD_SYNC_ON, &mvdcmd);
7458
7459 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7460 pCtrlCfg->bAVSyncOn = bEnable;
7461
7462 return TRUE;
7463 }
7464
HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx,MS_U32 u32Delay)7465 MS_BOOL HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx, MS_U32 u32Delay)
7466 {
7467 MVD_CmdArg mvdcmd;
7468 SET_CMDARG(mvdcmd, _MS_TO_90K(u32Delay), u8Idx); //u32Delay ms ==> 90k counter
7469 SET_CMD_RET_FALSE(CMD_SYNC_OFFSET, &mvdcmd);
7470 return TRUE;
7471 }
7472
HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx,MS_U32 u32Th)7473 MS_BOOL HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7474 {
7475 MVD_CmdArg mvdcmd;
7476
7477 if (u32Th == 0x00)
7478 {
7479 return FALSE; //invalid parameter, do nothing
7480 }
7481 if (u32Th > 0xff)
7482 {
7483 u32Th = 0xff; //set to maximum
7484 }
7485
7486 SETUP_CMDARG(mvdcmd);
7487 mvdcmd.Arg3 = u32Th;
7488 SET_DECNUM(mvdcmd, u8Idx);
7489 SET_CMD_RET_FALSE(CMD_SYN_THRESHOLD, &mvdcmd);
7490 return TRUE;
7491 }
7492
HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx,MS_U32 u32Th)7493 MS_BOOL HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7494 {
7495 MVD_CmdArg mvdcmd;
7496 SET_CMDARG(mvdcmd, u32Th, u8Idx);
7497 SET_CMD_RET_FALSE(CMD_AVSYNC_FREERUN_THRESHOLD, &mvdcmd);
7498 return TRUE;
7499 }
7500
HAL_MVD_ChangeAVsync(MS_U8 u8Idx,MS_BOOL bEnable,MS_U16 u16PTS)7501 MS_BOOL HAL_MVD_ChangeAVsync(MS_U8 u8Idx, MS_BOOL bEnable, MS_U16 u16PTS)
7502 {
7503 MVD_CmdArg mvdcmd;
7504
7505 u16PTS = _MS_TO_90K(u16PTS); //u16PTS ms ==> 90k counter
7506 SETUP_CMDARG(mvdcmd);
7507 mvdcmd.Arg0 = (MS_U8)bEnable;
7508 mvdcmd.Arg1 = 0;
7509 mvdcmd.Arg2 = (MS_U8)(u16PTS&0xff);
7510 mvdcmd.Arg3 = (MS_U8)((u16PTS&0xff00)>>8);
7511 SET_DECNUM(mvdcmd, u8Idx);
7512 SET_CMD_RET_FALSE(CMD_MVD_FAST_INT, &mvdcmd);
7513 return TRUE;
7514 }
7515
HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)7516 MS_BOOL HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)
7517 {
7518 MS_U32 u32IntStat = 0;
7519 MS_BOOL bRet = FALSE;
7520
7521 u32IntStat = HAL_MVD_GetIntState(u8Idx);
7522 if (u32IntStat != 0)
7523 {
7524 bRet = ((u32IntStat&INT_SYN_REP)==INT_SYN_REP) ? TRUE : FALSE;
7525 }
7526 return bRet;
7527 }
7528
HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)7529 MS_BOOL HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)
7530 {
7531 MS_U32 u32IntStat = 0;
7532 MS_BOOL bRet = FALSE;
7533
7534 u32IntStat = HAL_MVD_GetIntState(u8Idx);
7535 if (u32IntStat != 0)
7536 {
7537 bRet = ((u32IntStat&INT_SYN_SKIP)==INT_SYN_SKIP) ? TRUE : FALSE;
7538 }
7539
7540 return bRet;
7541 }
7542
HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)7543 MS_U8 HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)
7544 {
7545 #define MVD_SYNC_DONE 1
7546 if(MVD_GetSyncStat(u8Idx, 1) == MVD_SYNC_DONE)
7547 return 1;
7548 else
7549 return 0xFF;
7550 }
7551
HAL_MVD_GetDispRdy(MS_U8 u8Idx)7552 MS_U8 HAL_MVD_GetDispRdy(MS_U8 u8Idx)
7553 {
7554 if (HAL_MVD_GetPicCounter(u8Idx) > 0)
7555 {
7556 return 1;
7557 }
7558 else
7559 {
7560 return 0;
7561 }
7562 }
7563
HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)7564 MVD_DecStat HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)
7565 {
7566 MVD_CmdArg mvdcmd;
7567 MVD_DecStat stat = E_MVD_STAT_UNKNOWN;
7568
7569 SETUP_CMDARG(mvdcmd);
7570 SET_DECNUM(mvdcmd, u8Idx);
7571 if (HAL_MVD_MVDCommand(CMD_DECODE_STATUS, &mvdcmd) == FALSE)
7572 {
7573 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7574 return E_MVD_STAT_UNKNOWN;
7575 }
7576
7577 switch(mvdcmd.Arg1)
7578 {
7579 case DEC_STAT_IDLE:
7580 stat = E_MVD_STAT_IDLE;
7581 break;
7582 case DEC_STAT_FIND_SC:
7583 stat = E_MVD_STAT_FIND_STARTCODE;
7584 break;
7585 case DEC_STAT_FIND_SPE_SC:
7586 stat = E_MVD_STAT_FIND_SPECIALCODE;
7587 break;
7588 case DEC_STAT_FIND_FRAMEBUFFER:
7589 stat = E_MVD_STAT_FIND_FRAMEBUFFER;
7590 break;
7591 case DEC_STAT_WAIT_DECODE_DONE:
7592 stat = E_MVD_STAT_WAIT_DECODEDONE;
7593 break;
7594 case DEC_STAT_DECODE_DONE:
7595 stat = E_MVD_STAT_DECODE_DONE;
7596 break;
7597 case DEC_STAT_WAIT_VDFIFO:
7598 stat = E_MVD_STAT_WAIT_VDFIFO;
7599 break;
7600 case DEC_STAT_INIT_SUCCESS:
7601 stat = E_MVD_STAT_INIT_SUCCESS;
7602 break;
7603 default:
7604 break;
7605 }
7606
7607 return stat;
7608 }
7609
HAL_MVD_GetLastCmd(MS_U8 u8Idx)7610 MS_U8 HAL_MVD_GetLastCmd(MS_U8 u8Idx)
7611 {
7612 MVD_CmdArg mvdcmd;
7613 SETUP_CMDARG(mvdcmd);
7614 SET_DECNUM(mvdcmd, u8Idx);
7615 if (HAL_MVD_MVDCommand( CMD_DECODE_STATUS, &mvdcmd ) == FALSE)
7616 {
7617 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7618 return 0xff;
7619 }
7620
7621 return (mvdcmd.Arg0);
7622 }
7623
HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)7624 MS_U32 HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)
7625 {
7626 MVD_CmdArg mvdcmd;
7627 MS_U32 u32Cnt = 0;
7628
7629 SETUP_CMDARG(mvdcmd);
7630
7631 //To be accurate, it's "VLD byte count", instead of "parser byte count".
7632 mvdcmd.Arg0 = 0x34;
7633 mvdcmd.Arg1 = 0x2;
7634 SET_DECNUM(mvdcmd, u8Idx);
7635 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7636 {
7637 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_RD_IO ) );
7638 return 0;
7639 }
7640 u32Cnt = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7641 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7642
7643 //MVD_PRINT(" parser byte count = %lu byte \n", u32Cnt);
7644 return u32Cnt;
7645 }
7646
HAL_MVD_DropErrorFrame(MS_U8 u8Idx,MS_BOOL bDrop)7647 MS_BOOL HAL_MVD_DropErrorFrame(MS_U8 u8Idx, MS_BOOL bDrop)
7648 {
7649 MVD_CmdArg mvdcmd;
7650 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7651
7652 SETUP_CMDARG(mvdcmd);
7653 mvdcmd.Arg1 = (MS_U8)bDrop;
7654 mvdcmd.Arg2 = (MS_U8)pstCtrlCfg->bDropDispfrm;
7655 mvdcmd.Arg3 = (MS_U8)pstCtrlCfg->eFrcMode;
7656 SET_DECNUM(mvdcmd, u8Idx);
7657 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
7658 return TRUE;
7659 }
7660
HAL_MVD_SetDivXCfg(MS_U8 u8Idx,MS_U8 u8MvAdjust,MS_U8 u8IdctSel)7661 void HAL_MVD_SetDivXCfg(MS_U8 u8Idx, MS_U8 u8MvAdjust, MS_U8 u8IdctSel)
7662 {
7663 MVD_CmdArg stCmdArg;
7664
7665 SETUP_CMDARG(stCmdArg);
7666 stCmdArg.Arg0 = u8MvAdjust;
7667 SET_DECNUM(stCmdArg, u8Idx);
7668 if (HAL_MVD_MVDCommand(CMD_DIVX_PATCH, &stCmdArg) == FALSE)
7669 {
7670 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIVX_PATCH ) );
7671 return;
7672 }
7673
7674 SETUP_CMDARG(stCmdArg);
7675 stCmdArg.Arg0 = u8IdctSel;
7676 SET_DECNUM(stCmdArg, u8Idx);
7677 if (HAL_MVD_MVDCommand(CMD_IDCT_SEL, &stCmdArg) == FALSE)
7678 {
7679 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IDCT_SEL ) );
7680 return;
7681 }
7682
7683 return;
7684 }
7685
7686 #define _IsNotInStreamBuff(x) \
7687 (((x) < pstMemCfg->u32DrvBufSize) || \
7688 ((x) > pstMemCfg->u32BSSize) )
7689
7690 //------------------------------------------------------------------------------
7691 /// Get read pointer in ElementaryStream buffer for SLQ table mode
7692 /// @return -the read pointer
7693 //------------------------------------------------------------------------------
MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)7694 MS_VIRT MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)
7695 {
7696 MS_U32 u32Idx;
7697 MS_U32 u32SlqRp = 0, u32SlqRp1 = 0;
7698 MS_VIRT u32EsRp;
7699 MS_VIRT u32EsStart;
7700 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7701 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7702 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7703
7704 u32SlqRp1 = HAL_MVD_GetSLQReadPtr(u8Idx);
7705
7706 if (u32SlqRp1 == 0)
7707 {
7708 return MVD_U32_MAX;
7709 }
7710 else
7711 {
7712 u32SlqRp = HAL_MVD_Map2DrvSlqTbl(u8Idx, u32SlqRp1);
7713 }
7714
7715 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = u32SlqRp; //update pstSlqTblInfo->pDrvSlqTbl->u32RdPtr
7716
7717 //report (readPtr-1) for HW may still use (readPtr)
7718 if (u32SlqRp > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7719 {
7720 u32Idx = ((u32SlqRp - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7721 }
7722 else
7723 {
7724 u32Idx = SLQ_ENTRY_MAX - 1;
7725 }
7726 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7727
7728 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7729 #if 0
7730 MS_U32 u32EsEnd;
7731 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
7732 MVD_PRINT("GetESReadPtr ES[%x] Start=0x%x End=0x%x u32EsRp=%x u32SlqRp=%x\n",
7733 u32Idx, HAL_MVD_MemRead4Byte(u32EsRp), u32EsEnd, u32EsRp, u32SlqRp);
7734 #endif
7735
7736 if ((_IsNotInStreamBuff(u32EsStart)) && (u32EsStart != 0))
7737 { //ESRead is not in BS buffer, so this entry is a divx or dummy pattern.
7738 //Report the last ESRead, instead of this one.
7739 if(curCodecType == E_MVD_CODEC_DIVX311)
7740 {
7741 //update last slq index es end address
7742 if(u32Idx == 0)
7743 {
7744 u32Idx = SLQ_ENTRY_MAX-1;
7745 }
7746 else
7747 {
7748 u32Idx = u32Idx-1;
7749 }
7750 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7751 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7752 if(_IsNotInStreamBuff(u32EsStart))
7753 {
7754 return (pstSlqTblInfo->u32PreEsRd);
7755 }
7756 }
7757 else
7758 {
7759 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsRd=0x%lx\n", (unsigned long)u32EsStart, (unsigned long)pstSlqTblInfo->u32PreEsRd));
7760 return (pstSlqTblInfo->u32PreEsRd);
7761 }
7762 }
7763 pstSlqTblInfo->u32PreEsRd = u32EsStart;
7764
7765 return u32EsStart;
7766 }
7767
7768 //------------------------------------------------------------------------------
7769 /// Get write pointer in ElementaryStream buffer for SLQ table mode
7770 /// @return -the read pointer
7771 //------------------------------------------------------------------------------
MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)7772 MS_VIRT MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)
7773 {
7774 MS_VIRT u32EsWp;
7775 MS_VIRT u32EsEnd;
7776 MS_U32 u32Idx;
7777 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7778 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7779
7780 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7781 {
7782 u32Idx = ((pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7783 }
7784 else
7785 {
7786 u32Idx = SLQ_ENTRY_MAX - 1;
7787 }
7788 u32EsWp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7789
7790 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsWp+4);
7791 #if 0
7792 MVD_PRINT("GetESWritePtr[%x] ES Start=0x%x End=0x%x u32EsWp=%x\n",
7793 (u32EsWp - pstSlqTblInfo->pDrvEsTbl->u32StAdd)/8,
7794 HAL_MVD_MemRead4Byte(u32EsWp), u32EsEnd, u32EsWp);
7795 #endif
7796
7797 if ((_IsNotInStreamBuff(u32EsEnd)) && (u32EsEnd != 0))
7798 { //ESRead is not in BS buffer, so this entry is a divx pattern.
7799 //Report the last ESRead, instead of this one.
7800 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsWr=0x%lx\n", (unsigned long)u32EsEnd, (unsigned long)pstSlqTblInfo->u32PreEsWr));
7801 return (pstSlqTblInfo->u32PreEsWr);
7802 }
7803 pstSlqTblInfo->u32PreEsWr = u32EsEnd;
7804
7805 return u32EsEnd;
7806 }
7807
7808
HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)7809 MS_VIRT HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)
7810 {
7811 MS_VIRT u32RdPtr = 0;
7812
7813 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7814 {
7815 #ifndef VDEC3
7816 MVD_CmdArg mvdcmd;
7817 SETUP_CMDARG(mvdcmd);
7818 SET_DECNUM(mvdcmd, u8Idx);
7819 if (HAL_MVD_MVDCommand( CMD_SLQ_GET_TBL_RPTR, &mvdcmd ) == FALSE)
7820 {
7821 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_GET_TBL_RPTR ) );
7822 return 0;
7823 }
7824 u32RdPtr = mvdcmd.Arg0 | (mvdcmd.Arg1<<8) | (mvdcmd.Arg2<<16) | (mvdcmd.Arg3<<24);
7825 #else
7826 u32RdPtr = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SLQ_TBL_RPTR, sizeof(MS_U32));
7827 #endif
7828 }
7829 else
7830 {
7831 u32RdPtr = HAL_MVD_SlqTblProbeRdPtr(u8Idx);
7832 }
7833
7834 //MVD_PRINT("##### HAL_MVD_GetSLQReadPtr 0x%x\n", readPtr);
7835
7836 if(u32RdPtr == 0)//not start decode yet,MVD return 0
7837 {
7838 u32RdPtr = 0;
7839 }
7840 else
7841 {
7842 u32RdPtr = u32RdPtr << 3;
7843 }
7844
7845 return u32RdPtr;
7846 }
7847
7848
HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx,MS_BOOL bCheckData)7849 MS_BOOL HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx, MS_BOOL bCheckData)
7850 {
7851 MVD_CmdArg mvdcmd;
7852 MS_VIRT u32WrPtr;
7853 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7854 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7855 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7856
7857 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7858 {
7859 //check FW is init success and thus ready to update write pointer
7860 MS_U32 u32TimeCnt;
7861
7862 u32TimeCnt = HAL_MVD_GetTime();
7863 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
7864 {
7865 if (HAL_MVD_GetDecodeStatus(u8Idx) != E_MVD_STAT_IDLE)
7866 {
7867 pstSlqTblInfo->bRdyToFireCmd = TRUE;
7868 MVD_DEBUGVERBAL(MVD_PRINT("time=0x%x ms, ", (HAL_MVD_GetTime() - u32TimeCnt)));
7869 break;
7870 }
7871 }
7872 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7873 {
7874 MVD_DEBUGERROR(MVD_PRINT("%s: err timeout(%d)! stat=0x%x\n", __FUNCTION__,
7875 HAL_MVD_GetTime() - u32TimeCnt, HAL_MVD_GetDecodeStatus(u8Idx)));
7876 return FALSE;
7877 }
7878 else
7879 {
7880 MVD_DEBUGVERBAL(MVD_PRINT("%s: ready to update WrPtr.\n", __FUNCTION__));
7881 }
7882 }
7883
7884
7885 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr < pstSlqTblInfo->pDrvSlqTbl->u32EndAdd);
7886 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7887 #if SLQ_NEW_PUSH
7888 if((!pstSlqTblInfo->pSlqStatus->bSlqFireRdy)&&pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7889 {
7890 MVD_DEBUGINFO(MVD_PRINT("**** pstSlqTblInfo->pSlqStatus->bSlqFireRdy is not Ready ** \n"));
7891 return FALSE;
7892 }
7893 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
7894 #endif
7895 if ((bCheckData==TRUE) && (FALSE==pstSlqTblInfo->bSlqTblHasValidData))
7896 {
7897 MVD_DEBUGINFO(MVD_PRINT("**** SlqWrPtr(0x%lx) is not update!(%x, %x) ****\n",
7898 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, bCheckData, pstSlqTblInfo->bSlqTblHasValidData));
7899 return FALSE;
7900 }
7901 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
7902
7903 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
7904 {
7905 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
7906 }
7907 else
7908 {
7909 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7910 }
7911
7912 if (pstCtrlCfg->bSlqTblSync)
7913 {
7914 //Update SLQ table, DivX311 patterns, and dummy patterns to bitstream buffer
7915 MS_VIRT u32SrcOffset = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7916 MS_VIRT u32SrcAdd = u32SrcOffset;
7917 MS_VIRT u32DstAdd = pstMemCfg->u32BSAddr;
7918 MS_VIRT u32DstOffset = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
7919 MS_VIRT u32TblWr;
7920
7921 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32SrcOffset,u32SrcAdd);
7922
7923
7924 HAL_MVD_CPU_Sync();
7925
7926 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
7927 BDMA_Result bdmaRlt;
7928
7929 bdmaRlt = MDrv_BDMA_CopyHnd(u32SrcAdd, u32DstAdd, pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType, BDMA_OPCFG_DEF);
7930
7931 if (E_BDMA_OK != bdmaRlt)
7932 {
7933 MVD_DEBUGERROR(MVD_PRINT("%s MDrv_BDMA_MemCopy fail ret=%x!\n", __FUNCTION__, bdmaRlt));
7934 }
7935 #endif
7936 MVD_DEBUGINFO(MVD_PRINT("SlqWrPtr_BDMA src=0x%lx dst=0x%lx size=0x%lx cpyType=0x%x\n",
7937 (unsigned long)u32SrcAdd, (unsigned long)u32DstAdd, (unsigned long)pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType));
7938
7939 u32TblWr = u32DstOffset + (u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7940
7941 u32WrPtr = u32TblWr;
7942 }
7943 //MVD_PRINT("wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x)\n", writePtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
7944 // HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
7945
7946
7947 //writePtrLast[u8Idx] = u32WrPtr;
7948 #if SLQ_NEW_PUSH
7949 if(!pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow && pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7950 {
7951 u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
7952 }
7953 #endif
7954 MS_ASSERT((u32WrPtr%8)==0);
7955 u32WrPtr >>= 3;
7956
7957 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7958 {
7959 SET_CMDARG(mvdcmd, u32WrPtr, u8Idx);
7960 HAL_MVD_CPU_Sync();
7961 SET_CMD_RET_FALSE(CMD_SLQ_UPDATE_TBL_WPTR, &mvdcmd);
7962 }
7963 else
7964 {
7965 HAL_MVD_SlqTblLoadWrPtr(u8Idx, u32WrPtr);
7966 if (HAL_MVD_SlqTblProbeWrPtr(u8Idx) != u32WrPtr)
7967 {
7968 MVD_DEBUGERROR(MVD_PRINT("Ooops! SlqWrPtr update fail!!! 0x%lx != 0x%lx\n", (unsigned long)HAL_MVD_SlqTblProbeWrPtr(u8Idx), (unsigned long)u32WrPtr));
7969 return FALSE;
7970 }
7971 }
7972
7973 return TRUE;
7974 }
7975
HAL_MVD_SetOverflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7976 void HAL_MVD_SetOverflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7977 {
7978 MVD_CmdArg mvdcmd;
7979
7980 MS_ASSERT((u32Threshold%8)==0);
7981 u32Threshold >>= 3;
7982 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7983 if (HAL_MVD_MVDCommand( CMD_DMA_OVFTH, &mvdcmd ) == FALSE)
7984 {
7985 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_OVFTH ) );
7986 return;
7987 }
7988 return;
7989 }
7990
7991 //------------------------------------------------------------------------------
7992 /// Set bitstream buffer underflow threshold
7993 /// @return -none
7994 //------------------------------------------------------------------------------
HAL_MVD_SetUnderflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7995 void HAL_MVD_SetUnderflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7996 {
7997 MVD_CmdArg mvdcmd;
7998
7999 MS_ASSERT((u32Threshold%8)==0);
8000 u32Threshold >>= 3;
8001 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
8002 if (HAL_MVD_MVDCommand( CMD_DMA_UNFTH, &mvdcmd ) == FALSE)
8003 {
8004 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_UNFTH ) );
8005 return;
8006 }
8007 return;
8008 }
8009
HAL_MVD_GenPattern(MS_U8 u8Idx,MVD_PatternType ePattern,MS_PHY u32PAddr,MS_U32 * pu32Size)8010 MS_BOOL HAL_MVD_GenPattern(MS_U8 u8Idx, MVD_PatternType ePattern, MS_PHY u32PAddr, MS_U32* pu32Size)
8011 {
8012 MS_U8* pu8DummyData = NULL;
8013 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
8014
8015 if ((!pu32Size) || (*pu32Size < SKIP_PATTERN_SIZE))
8016 {
8017 return FALSE;
8018 }
8019
8020 pu8DummyData = (MS_U8*) HAL_MVD_PA2NonCacheSeg(u32PAddr);
8021
8022 if(pu8DummyData == NULL)
8023 {
8024 MVD_PRINT("%s %d NULL Address\n",__FILE__,__LINE__);
8025 return FALSE;
8026 }
8027
8028 switch (ePattern)
8029 {
8030 case E_MVD_PATTERN_FLUSH:
8031 #if 0
8032 *pu8DummyData = SKIP_PATTERN_0;
8033 pu8DummyData++;
8034 *pu8DummyData = SKIP_PATTERN_1;
8035 *pu32Size = SKIP_PATTERN_SIZE;
8036 #else
8037 pu8DummyData[0] = SKIP_PATTERN_0&0xff;
8038 pu8DummyData[1] = (SKIP_PATTERN_0>>8)&0xff;
8039 pu8DummyData[2] = (SKIP_PATTERN_0>>16)&0xff;
8040 pu8DummyData[3] = (SKIP_PATTERN_0>>24)&0xff;
8041
8042 pu8DummyData[4] = SKIP_PATTERN_1&0xff;
8043 pu8DummyData[5] = (SKIP_PATTERN_1>>8)&0xff;
8044 pu8DummyData[6] = (SKIP_PATTERN_1>>16)&0xff;
8045 pu8DummyData[7] = (SKIP_PATTERN_1>>24)&0xff;
8046
8047 *pu32Size = SKIP_PATTERN_SIZE;
8048 #endif
8049 break;
8050 case E_MVD_PATTERN_FILEEND:
8051 if ((E_MVD_CODEC_FLV == curCodecType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == curCodecType))
8052 {
8053 #if 0
8054 *pu8DummyData = FLV_PATTERN;
8055 pu8DummyData++;
8056 *pu8DummyData = 0xffffffff;
8057 pu8DummyData++;
8058 *pu8DummyData = END_PATTERN_1;
8059 pu8DummyData++;
8060 *pu8DummyData = END_PATTERN_2;
8061 pu8DummyData++;
8062 *pu8DummyData = END_PATTERN_3;
8063 #else
8064 pu8DummyData[0] = FLV_PATTERN&0xff;
8065 pu8DummyData[1] = (FLV_PATTERN>>8)&0xff;
8066 pu8DummyData[2] = (FLV_PATTERN>>16)&0xff;
8067 pu8DummyData[3] = (FLV_PATTERN>>24)&0xff;
8068
8069 pu8DummyData[4] = 0xffffffff&0xff;
8070 pu8DummyData[5] = (0xffffffff>>8)&0xff;
8071 pu8DummyData[6] = (0xffffffff>>16)&0xff;
8072 pu8DummyData[7] = (0xffffffff>>24)&0xff;
8073
8074 pu8DummyData[8] = END_PATTERN_1&0xff;
8075 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
8076 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
8077 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
8078
8079 pu8DummyData[12] = END_PATTERN_2&0xff;
8080 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
8081 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
8082 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
8083
8084 pu8DummyData[16] = END_PATTERN_3&0xff;
8085 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
8086 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
8087 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
8088
8089 #endif
8090
8091 }
8092 else if (E_MVD_CODEC_DIVX311 == curCodecType)
8093 {
8094 #if 0
8095 *pu8DummyData = DIVX_PATTERN;
8096 pu8DummyData++;
8097 *pu8DummyData = 0xffffffff;
8098 pu8DummyData++;
8099 *pu8DummyData = END_PATTERN_1;
8100 pu8DummyData++;
8101 *pu8DummyData = END_PATTERN_2;
8102 pu8DummyData++;
8103 *pu8DummyData = END_PATTERN_3;
8104 #else
8105 pu8DummyData[0] = DIVX_PATTERN&0xff;
8106 pu8DummyData[1] = (DIVX_PATTERN>>8)&0xff;
8107 pu8DummyData[2] = (DIVX_PATTERN>>16)&0xff;
8108 pu8DummyData[3] = (DIVX_PATTERN>>24)&0xff;
8109
8110 pu8DummyData[4] = 0xffffffff&0xff;
8111 pu8DummyData[5] = (0xffffffff>>8)&0xff;
8112 pu8DummyData[6] = (0xffffffff>>16)&0xff;
8113 pu8DummyData[7] = (0xffffffff>>24)&0xff;
8114
8115 pu8DummyData[8] = END_PATTERN_1&0xff;
8116 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
8117 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
8118 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
8119
8120 pu8DummyData[12] = END_PATTERN_2&0xff;
8121 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
8122 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
8123 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
8124
8125 pu8DummyData[16] = END_PATTERN_3&0xff;
8126 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
8127 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
8128 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
8129 #endif
8130 }
8131 else if ((E_MVD_CODEC_MPEG2 == curCodecType)||(E_MVD_CODEC_MPEG4 == curCodecType))
8132 {
8133 #if 0
8134 *pu8DummyData = MPEG_PATTERN_0;
8135 pu8DummyData++;
8136 *pu8DummyData = END_PATTERN_1;
8137 pu8DummyData++;
8138 *pu8DummyData = END_PATTERN_2;
8139 pu8DummyData++;
8140 *pu8DummyData = END_PATTERN_3;
8141 #else
8142 pu8DummyData[0] = MPEG_PATTERN_0&0xff;
8143 pu8DummyData[1] = (MPEG_PATTERN_0>>8)&0xff;
8144 pu8DummyData[2] = (MPEG_PATTERN_0>>16)&0xff;
8145 pu8DummyData[3] = (MPEG_PATTERN_0>>24)&0xff;
8146
8147 pu8DummyData[4] = END_PATTERN_1&0xff;
8148 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8149 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8150 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8151
8152 pu8DummyData[8] = END_PATTERN_2&0xff;
8153 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8154 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8155 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8156
8157 pu8DummyData[12] = END_PATTERN_3&0xff;
8158 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8159 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8160 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8161 #endif
8162 }
8163 else
8164 {
8165 #if 0
8166 *pu8DummyData = END_PATTERN_0;
8167 pu8DummyData++;
8168 *pu8DummyData = END_PATTERN_1;
8169 pu8DummyData++;
8170 *pu8DummyData = END_PATTERN_2;
8171 pu8DummyData++;
8172 *pu8DummyData = END_PATTERN_3;
8173 #else
8174 pu8DummyData[0] = END_PATTERN_0&0xff;
8175 pu8DummyData[1] = (END_PATTERN_0>>8)&0xff;
8176 pu8DummyData[2] = (END_PATTERN_0>>16)&0xff;
8177 pu8DummyData[3] = (END_PATTERN_0>>24)&0xff;
8178
8179 pu8DummyData[4] = END_PATTERN_1&0xff;
8180 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8181 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8182 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8183
8184 pu8DummyData[8] = END_PATTERN_2&0xff;
8185 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8186 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8187 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8188
8189 pu8DummyData[12] = END_PATTERN_3&0xff;
8190 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8191 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8192 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8193 #endif
8194 }
8195 *pu32Size = 16;
8196 break;
8197 default:
8198 break;
8199 }
8200
8201 return TRUE;
8202 }
8203
8204
8205
HAL_MVD_DbgDump(MS_U8 u8Idx)8206 void HAL_MVD_DbgDump(MS_U8 u8Idx)
8207 {
8208 MS_U32 u32VdCnt=0;
8209 //static MS_U32 u32PreVdCnt[MAX_DEC_NUM]= {0, 0};
8210 MS_U32 u32ErrCnt=0;
8211 //static MS_U32 u32PreErrCnt[MAX_DEC_NUM]= {0, 0};
8212 //static MS_BOOL b1stDump[MAX_DEC_NUM]= {TRUE, TRUE};
8213 MVD_FrmInfo stFrm = {_INIT_ADDR, _INIT_ADDR, _INIT_TIMESTAMP, _INIT_ID,
8214 _INIT_ID, _INIT_LEN, _INIT_LEN, _INIT_LEN, 0xff, E_MVD_PIC_UNKNOWN};
8215 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
8216 #ifndef VDEC3
8217 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8218 #endif
8219 if (pMVDHalContext->b1stDump[u8Idx])
8220 {
8221 MVD_FWCfg* pFwCfg = NULL;
8222 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
8223 MVD_PRINT("curDisablePESParsing = %d\n", pFwCfg->bDisablePESParsing);
8224 pMVDHalContext->b1stDump[u8Idx] = FALSE;
8225 }
8226
8227 u32VdCnt = HAL_MVD_GetParserByteCnt(u8Idx);
8228 u32ErrCnt= HAL_MVD_GetVldErrCount(u8Idx);
8229 MVD_PRINT("input: vfifo=%d(full=%d,empty=%d), vdCnt=%d(%d), vldErr=%d(%d); ",
8230 HAL_MVD_RegReadByte(0x1564)>>6, HAL_MVD_RegReadByte(0x1564)&0x20,
8231 HAL_MVD_RegReadByte(0x1564)&0x10, u32VdCnt, (u32VdCnt-pMVDHalContext->u32PreVdCnt[u8Idx]),
8232 u32ErrCnt, (u32ErrCnt-pMVDHalContext->u32PreErrCnt[u8Idx]));
8233 pMVDHalContext->u32PreVdCnt[u8Idx] = u32VdCnt;
8234 pMVDHalContext->u32PreErrCnt[u8Idx] = u32ErrCnt;
8235
8236 MVD_PRINT("state: fw=0x%x, lastCmd=0x%x, pc=0x%x\n",
8237 HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx), HAL_VPU_EX_GetProgCnt());
8238 MVD_PRINT("cnt: dec=%d, skip=%d, drop=%ld\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetSkipPicCounter(u8Idx), 0x0UL);
8239 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE, &stFrm);
8240 MVD_PRINT("frm Dec Y=%lx UV=%lx Pitch=%x; ", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8241 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY, &stFrm);
8242 MVD_PRINT("Disp Y=%lx UV=%lx Pitch=%x\n", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8243 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
8244 {
8245 #ifndef VDEC3
8246 MVD_PRINT("fe=%x, rd=%x(%x), wr=%x, empty=%x; ", pstSlqTblInfo->u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
8247 HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty);
8248
8249 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)MVD_GetSlqTblESReadPtr(u8Idx), (unsigned long)MVD_GetSlqTblESWritePtr(u8Idx));
8250 #endif
8251 }
8252 else if (curSrcMode == E_MVD_TS_FILE_MODE)
8253 {
8254 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)HAL_MVD_GetTsFileESReadPtr(u8Idx), (unsigned long)HAL_MVD_GetTsFileESWritePtr(u8Idx));
8255 }
8256 }
8257
8258 #ifdef MS_DEBUG
8259 #define _STRINGIFY_HAL_SID(x) \
8260 (x==E_HAL_MVD_MAIN_STREAM0)?"E_HAL_MVD_MAIN_STREAM0": \
8261 ((x==E_HAL_MVD_SUB_STREAM0)?"E_HAL_MVD_SUB_STREAM0":"E_HAL_MVD_STREAM_NONE")
MVD_DumpMVDStream(void)8262 void MVD_DumpMVDStream(void)
8263 {
8264 //if (_u8HalDbgLevel == 0) return;
8265 MS_U8 i = 0;
8266 for (i=0; i< MAX_DEC_NUM; i++)
8267 {
8268 MVD_DEBUGINFO(MVD_PRINT("[%d] eStreamId=0x%x(%s) bUsed=0x%x\n", i, pMVDHalContext->_stMVDStream[i].eStreamId,
8269 _STRINGIFY_HAL_SID(pMVDHalContext->_stMVDStream[i].eStreamId), pMVDHalContext->_stMVDStream[i].bUsed));
8270 }
8271 }
8272 #endif
HAL_MVD_Init_Share_Mem(void)8273 MS_BOOL HAL_MVD_Init_Share_Mem(void)
8274 {
8275 #if (defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS) || defined(MSOS_TYPE_LINUX_KERNEL))
8276 #if !defined(SUPPORT_X_MODEL_FEATURE)
8277 MS_U32 u32ShmId;
8278 MS_VIRT u32Addr;
8279 MS_U32 u32BufSize;
8280
8281
8282 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux MVD HAL",
8283 sizeof(MVD_Hal_CTX),
8284 &u32ShmId,
8285 &u32Addr,
8286 &u32BufSize,
8287 MSOS_SHM_QUERY))
8288 {
8289 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVD HAL",
8290 sizeof(MVD_Hal_CTX),
8291 &u32ShmId,
8292 &u32Addr,
8293 &u32BufSize,
8294 MSOS_SHM_CREATE))
8295 {
8296 MVD_PRINT("[%s]SHM allocation failed!!! use global structure instead!!!\n",__FUNCTION__);
8297 if(pMVDHalContext == NULL)
8298 {
8299 pMVDHalContext = &gMVDHalContext;
8300 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8301 HAL_MVD_Context_Init();
8302 MVD_PRINT("[%s]Global structure init Success!!!\n",__FUNCTION__);
8303 }
8304 else
8305 {
8306 MVD_PRINT("[%s]Global structure exists!!!\n",__FUNCTION__);
8307 }
8308 //return FALSE;
8309 }
8310 else
8311 {
8312 memset((MS_U8*)u32Addr,0,sizeof(MVD_Hal_CTX));
8313 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for one process
8314 HAL_MVD_Context_Init();
8315 }
8316 }
8317 else
8318 {
8319 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for another process
8320 }
8321 #else
8322 if(pMVDHalContext == NULL)
8323 {
8324 pMVDHalContext = &gMVDHalContext;
8325 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8326 HAL_MVD_Context_Init();
8327 }
8328 #endif
8329 OSAL_MVD_MutexInit();
8330 #else
8331 if(pMVDHalContext == NULL)
8332 {
8333 pMVDHalContext = &gMVDHalContext;
8334 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8335 HAL_MVD_Context_Init();
8336 }
8337 #endif
8338
8339
8340 return TRUE;
8341
8342 }
8343
8344 //------------------------------------------------------------------------------
HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)8345 HAL_MVD_StreamId HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)
8346 {
8347 MS_U32 i = 0;
8348
8349 #ifdef MS_DEBUG
8350 MVD_DumpMVDStream();
8351 #endif
8352 if (eStreamType == E_HAL_MVD_MAIN_STREAM)
8353 {
8354 for (i = 0;
8355 i <
8356 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8357 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8358 {
8359 if ((E_HAL_MVD_MAIN_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8360 {
8361 return pMVDHalContext->_stMVDStream[i].eStreamId;
8362 }
8363 }
8364 }
8365 else if (eStreamType == E_HAL_MVD_SUB_STREAM)
8366 {
8367 for (i = 0;
8368 i <
8369 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8370 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8371 {
8372 if ((E_HAL_MVD_SUB_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8373 {
8374 return pMVDHalContext->_stMVDStream[i].eStreamId;
8375 }
8376 }
8377 }
8378 #ifdef VDEC3
8379 else if ((eStreamType >= E_HAL_MVD_N_STREAM) && (eStreamType < E_HAL_MVD_N_STREAM + MAX_DEC_NUM))
8380 {
8381 i = eStreamType - E_HAL_MVD_N_STREAM;
8382 if (!pMVDHalContext->_stMVDStream[i].bUsed)
8383 {
8384 return pMVDHalContext->_stMVDStream[i].eStreamId;
8385 }
8386 }
8387 #endif
8388
8389 return E_HAL_MVD_STREAM_NONE;
8390 }
8391
HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)8392 MS_U8 HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)
8393 {
8394 #ifdef VDEC3
8395 return eSID - E_HAL_MVD_N_STREAM_BASE;
8396 #else
8397 MS_U8 u8Idx = 0;
8398 switch (eSID)
8399 {
8400 case E_HAL_MVD_MAIN_STREAM0:
8401 u8Idx = 0;
8402 break;
8403 case E_HAL_MVD_SUB_STREAM0:
8404 u8Idx = 1;
8405 break;
8406 #if 0
8407 case E_HAL_MVD_SUB_STREAM1:
8408 u8Idx = 2;
8409 break;
8410 #endif
8411 default:
8412 u8Idx = 0;
8413 break;
8414 }
8415 return u8Idx;
8416 #endif
8417 }
8418
HAL_MVD_ReleaseFdMask(MS_U8 u8Idx,MS_BOOL bRls)8419 MS_BOOL HAL_MVD_ReleaseFdMask(MS_U8 u8Idx, MS_BOOL bRls)
8420 {
8421 MVD_CmdArg mvdcmd;
8422
8423 SETUP_CMDARG(mvdcmd);
8424 mvdcmd.Arg0 = bRls; //1 to release the fd mask
8425 MVD_DEBUGINFO(MVD_PRINT("%s: release=0x%x\n", __FUNCTION__, bRls));
8426 SET_DECNUM(mvdcmd, u8Idx);
8427 SET_CMD_RET_FALSE(CMD_UPDATE_FRAME, &mvdcmd);
8428
8429 return TRUE;
8430 }
8431
HAL_MVD_ParserRstDone(MS_U8 u8Idx,MS_BOOL bEnable)8432 MS_BOOL HAL_MVD_ParserRstDone(MS_U8 u8Idx, MS_BOOL bEnable)
8433 {
8434 #define PARSER_RST_TIMEOUT 0x40000
8435 MS_U32 u32TimeOut = 0;
8436 MVD_CmdArg mvdcmd;
8437
8438 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_PARSER_RST);
8439 SETUP_CMDARG(mvdcmd);
8440 mvdcmd.Arg1 = bEnable;
8441 SET_DECNUM(mvdcmd, u8Idx);
8442 SET_CMD_RET_FALSE(CMD_PTS_TBL_RESET, &mvdcmd);
8443
8444 while ((TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PARSER_RST)) && (u32TimeOut < PARSER_RST_TIMEOUT))
8445 {
8446 u32TimeOut++;
8447 }
8448 if (u32TimeOut >= PARSER_RST_TIMEOUT)
8449 {
8450 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_PTS_TBL_RESET ) );
8451 return FALSE;
8452 }
8453 return TRUE;
8454 }
8455
HAL_MVD_FlushPTSBuf(MS_U8 u8Idx,MS_BOOL bEnable)8456 MS_BOOL HAL_MVD_FlushPTSBuf(MS_U8 u8Idx, MS_BOOL bEnable)
8457 {
8458 #ifdef VDEC3
8459 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8460
8461 if(pstCtrlCfg->u8McuMode == FALSE)
8462 #endif
8463 {
8464 MVD_CmdArg mvdcmd;
8465 SETUP_CMDARG(mvdcmd);
8466 mvdcmd.Arg0 = bEnable;
8467 if (HAL_MVD_MVDCommand( CMD_SEND_UNI_PTS, &mvdcmd ) == FALSE)
8468 {
8469 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SEND_UNI_PTS ) );
8470 return FALSE;
8471 }
8472 }
8473 return TRUE;
8474 }
8475
8476
HAL_MVD_GetSLQNum(MS_U8 u8Idx)8477 MS_U32 HAL_MVD_GetSLQNum(MS_U8 u8Idx)
8478 {
8479 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8480 MS_VIRT u32RdPtr = HAL_MVD_GetSLQReadPtr(u8Idx);
8481 MS_VIRT u32Diff = 0;
8482
8483 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= u32RdPtr)
8484 {
8485 u32Diff = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - u32RdPtr;
8486 }
8487 else
8488 {
8489 u32Diff = SLQ_TBL_SIZE - (u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
8490 }
8491
8492 // MVD_PRINT("slq wptr = 0x%x, rptr = 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32RdPtr);
8493
8494 return (u32Diff/SLQ_ENTRY_LEN);
8495 }
8496
8497
HAL_MVD_GetDispQNum(MS_U8 u8Idx)8498 MS_U32 HAL_MVD_GetDispQNum(MS_U8 u8Idx)
8499 {
8500 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPQ_NUM, sizeof(MS_U8));
8501 }
HAL_MVD_SetAutoMute(MS_U8 u8Idx,MS_BOOL bEn)8502 MS_BOOL HAL_MVD_SetAutoMute(MS_U8 u8Idx, MS_BOOL bEn)
8503 {
8504 MVD_CmdArg mvdcmd;
8505
8506 SETUP_CMDARG(mvdcmd);
8507 mvdcmd.Arg0 = bEn; //1 to enable
8508 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8509 SET_DECNUM(mvdcmd, u8Idx);
8510 SET_CMD_RET_FALSE(CMD_ENABLE_AUTO_MUTE, &mvdcmd);
8511
8512 return TRUE;
8513 }
8514
HAL_MVD_SetVSizeAlign(MS_U8 u8Idx,MS_BOOL bEn)8515 MS_BOOL HAL_MVD_SetVSizeAlign(MS_U8 u8Idx, MS_BOOL bEn)
8516 {
8517 MVD_CmdArg mvdcmd;
8518
8519 SETUP_CMDARG(mvdcmd);
8520 mvdcmd.Arg0 = bEn; //1 to enable VSize alignment to 4x
8521 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8522 SET_DECNUM(mvdcmd, u8Idx);
8523 SET_CMD_RET_FALSE(CMD_FORCE_ALIGN_VSIZE, &mvdcmd);
8524
8525 return TRUE;
8526 }
8527
HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize,MS_U16 u16VSize,MS_U32 u32FrmRate)8528 MS_BOOL HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate)
8529 {
8530 MVD_DEBUGINFO(MVD_PRINT("%s w:%d, h:%d, fr:%d, MAX:%lld\n", __FUNCTION__, u16HSize, u16VSize, u32FrmRate, MVD_HW_MAX_PIXEL));
8531 return (((MS_U64)u16HSize*(MS_U64)u16VSize*(MS_U64)u32FrmRate) <= MVD_HW_MAX_PIXEL);
8532 }
8533
HAL_MVD_GetColorInfo(MS_U8 u8Idx,MVD_Color_Info * pstColorInfo)8534 MS_BOOL HAL_MVD_GetColorInfo(MS_U8 u8Idx, MVD_Color_Info* pstColorInfo)
8535 {
8536 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
8537
8538 if((pu8MVDGetFrameInfoBufStart==0) || (pstColorInfo==0))
8539 {
8540 MVD_DEBUGERROR(MVD_PRINT("HAL_MVD_GetColorInfo error: pu8MVDGetFrameInfoBufStart=NULL\n"));
8541 return FALSE;
8542 }
8543
8544 pstColorInfo->bColor_Descript = (MS_BOOL)(HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_DESCRIPT));
8545
8546 if(pstColorInfo->bColor_Descript)
8547 {
8548 pstColorInfo->u8Color_Primaries = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_PRIMARIES);
8549 pstColorInfo->u8Transfer_Char = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TRANSFER_CHAR);
8550 pstColorInfo->u8Matrix_Coef = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_MATRIX_COEF);
8551 }
8552 return TRUE;
8553
8554 }
8555
8556
8557 //------------------------------------------------------------------------------
8558 /// Wait MVD generate CRC done or timeout
8559 /// @return -MVD generate CRC done or timeout
8560 //------------------------------------------------------------------------------
_HAL_MVD_CrcTimeOut(MS_U8 u8Idx)8561 MS_BOOL _HAL_MVD_CrcTimeOut(MS_U8 u8Idx)
8562 {
8563 MS_U32 i;
8564 MS_U32 u32StartTime = MsOS_GetSystemTime();
8565
8566 for ( i = 0; i < MVD_PollingTimes; i++ )
8567 {
8568 ///- wait until MVD generate CRC done or timeout
8569 if ( ( HAL_MVD_RegReadByte(MVD_CRC_CTL) & MVD_CRC_CTL_DONE ) == MVD_CRC_CTL_DONE )
8570 {
8571 return FALSE;
8572 }
8573
8574 if ((TRUE == pMVDHalContext->bStopped[u8Idx]) || ((MsOS_GetSystemTime()-u32StartTime)>1300))
8575 {
8576 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
8577 return TRUE;
8578 }
8579
8580 }
8581 MVD_DEBUGERROR( MVD_PRINT("_HAL_MVD_CrcTimeOut=%x\n", i) );
8582 return TRUE;
8583 }
8584
HAL_MVD_GetCrcValue(MS_U8 u8Idx,MVD_CrcIn * pCrcIn,MVD_CrcOut * pCrcOut)8585 E_MVD_Result HAL_MVD_GetCrcValue(MS_U8 u8Idx, MVD_CrcIn *pCrcIn, MVD_CrcOut *pCrcOut)
8586 {
8587 E_MVD_Result eRet = E_MVD_RET_OK;
8588 MS_U32 u32tmp = 0;
8589
8590 #if defined(MSOS_TYPE_ECOS)
8591 if(MsOS_In_Interrupt() != TRUE)
8592 {
8593 OSAL_MVD_IntDisable();
8594 OSAL_MVD_LockHwMutex();
8595 }
8596 #else
8597 OSAL_MVD_LockHwMutex();
8598 #endif
8599
8600 MVD_DEBUGINFO(MVD_PRINT("%s width=0x%x, height=0x%x, pitch=0x%x, luma=0x%lx, chroma=0x%lx\n",
8601 __FUNCTION__, pCrcIn->u32HSize, pCrcIn->u32VSize, pCrcIn->u32Strip, (unsigned long)pCrcIn->u32YStartAddr, (unsigned long)pCrcIn->u32UVStartAddr));
8602
8603 //Set generate CRC value
8604 u32tmp = ((pCrcIn->u32HSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8605 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE, u32tmp & 0xf0);
8606 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE+1, (u32tmp >> 8) & 0x3f);
8607
8608 u32tmp = ((pCrcIn->u32VSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8609 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE, u32tmp & 0xff);
8610 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE+1, (u32tmp >> 8) & 0xff);
8611
8612 u32tmp = (pCrcIn->u32Strip) >> 3;
8613 HAL_MVD_RegWriteByte(MVD_CRC_STRIP, u32tmp & 0xff);
8614 HAL_MVD_RegWriteByte((MVD_CRC_STRIP+1), (u32tmp >> 8) & 0xff);
8615
8616 u32tmp = (pCrcIn->u32YStartAddr) >> 3;
8617 HAL_MVD_RegWrite4Byte(MVD_CRC_Y_START, u32tmp & MVD_CRC_Y_START_LEN);
8618
8619 u32tmp = (pCrcIn->u32UVStartAddr) >> 3;
8620 HAL_MVD_RegWrite4Byte(MVD_CRC_UV_START, u32tmp & MVD_CRC_UV_START_LEN);
8621
8622 //Fire
8623 HAL_MVD_RegWriteBit(MVD_CRC_CTL, 1, MVD_CRC_CTL_FIRE);
8624
8625 //Check CRC done
8626 if ( _HAL_MVD_CrcTimeOut(u8Idx) == TRUE )
8627 {
8628 eRet = E_MVD_RET_TIME_OUT;
8629 goto _CRC_DONE;
8630 }
8631
8632 //Get CRC value
8633 pCrcOut->u32YCrc = HAL_MVD_RegReadByte(MVD_CRC_Y_L) |
8634 (HAL_MVD_RegReadByte(MVD_CRC_Y_L+1) << 8) |
8635 (HAL_MVD_RegReadByte(MVD_CRC_Y_H) <<16) |
8636 (HAL_MVD_RegReadByte(MVD_CRC_Y_H+1) <<24);
8637
8638 pCrcOut->u32UVCrc = HAL_MVD_RegReadByte(MVD_CRC_UV_L) |
8639 (HAL_MVD_RegReadByte(MVD_CRC_UV_L+1) << 8) |
8640 (HAL_MVD_RegReadByte(MVD_CRC_UV_H) <<16) |
8641 (HAL_MVD_RegReadByte(MVD_CRC_UV_H+1) <<24);
8642
8643 MVD_DEBUGINFO(MVD_PRINT("%s Y=0x%x, UV=0x%x\n", __FUNCTION__, pCrcOut->u32YCrc, pCrcOut->u32UVCrc));
8644
8645 _CRC_DONE:
8646 #if defined(MSOS_TYPE_ECOS)
8647 if(MsOS_In_Interrupt() != TRUE)
8648 {
8649 OSAL_MVD_UnlockHwMutex();
8650 OSAL_MVD_IntEnable();
8651 }
8652 #else
8653 OSAL_MVD_UnlockHwMutex();
8654 #endif
8655 return eRet;
8656 }
8657
8658
HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx,MS_BOOL bEn)8659 MS_BOOL HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx, MS_BOOL bEn)
8660 {
8661 MVD_CmdArg mvdcmd;
8662
8663 SETUP_CMDARG(mvdcmd);
8664 mvdcmd.Arg0 = bEn;
8665 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8666 SET_DECNUM(mvdcmd, u8Idx);
8667 SET_CMD_RET_FALSE(CMD_SUSPEND_DS, &mvdcmd);
8668
8669 return TRUE;
8670 }
8671
HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)8672 MS_U8 HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)
8673 {
8674 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_SUSPEND_DS, sizeof(MS_U8));
8675 }
8676
HAL_MVD_GetStereoType(MS_U8 u8Idx)8677 MS_U8 HAL_MVD_GetStereoType(MS_U8 u8Idx)
8678 {
8679 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_STEREO_TYPE, sizeof(MS_U8));
8680 }
8681
HAL_MVD_GetDivxVer(MS_U8 u8Idx)8682 MS_U32 HAL_MVD_GetDivxVer(MS_U8 u8Idx)
8683 {
8684 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DIVX_VER_5X, sizeof(MS_U32));
8685 }
8686
HAL_MVD_SetIdctMode(MS_U8 u8Idx,MS_U8 u8Mode)8687 MS_BOOL HAL_MVD_SetIdctMode(MS_U8 u8Idx, MS_U8 u8Mode)
8688 {
8689 MVD_CmdArg mvdcmd;
8690
8691 SETUP_CMDARG(mvdcmd);
8692 mvdcmd.Arg0 = u8Mode;
8693 SET_DECNUM(mvdcmd, u8Idx);
8694
8695 MVD_DEBUGINFO(MVD_PRINT("%s CMD_IDCT_SEL arg0=%x)\n", __FUNCTION__, u8Mode));
8696 SET_CMD_RET_FALSE(CMD_IDCT_SEL, &mvdcmd);
8697
8698 return TRUE;
8699 }
8700
HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)8701 E_MVD_Result HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)
8702 {
8703 UNUSED(eClockSpeed);
8704 MVD_PRINT("This chip does not support mvd clock presetting~\n");
8705 return E_MVD_RET_FAIL;
8706 }
8707
HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)8708 MS_BOOL HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)
8709 {
8710 MS_BOOL bAVSyncOn = FALSE;
8711 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8712 if (pCtrlCfg)
8713 {
8714 bAVSyncOn = pCtrlCfg->bAVSyncOn;
8715 }
8716
8717 return bAVSyncOn;
8718 }
8719
HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx,MS_VIRT u32VPUAddr,MS_VIRT u32DrvAddr)8720 MS_BOOL HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx, MS_VIRT u32VPUAddr, MS_VIRT u32DrvAddr)
8721 {
8722 MS_BOOL bRet = TRUE;
8723 MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
8724
8725 pBuff->u32DynScalingAdd = u32DrvAddr;
8726 bRet = HAL_MVD_SetDynamicScaleAddr(u8Idx, u32VPUAddr);
8727 return bRet;
8728 }
8729
HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx,MS_U8 bEnable)8730 MS_BOOL HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx, MS_U8 bEnable)
8731 {
8732 MVD_CmdArg mvdcmd;
8733
8734 SETUP_CMDARG(mvdcmd);
8735 mvdcmd.Arg0 = bEnable;
8736 SET_DECNUM(mvdcmd, u8Idx);
8737
8738 MVD_DEBUGINFO(MVD_PRINT("%s CMD_PUSH_FIRST_FRAME_DISP arg0=%x)\n", __FUNCTION__, bEnable));
8739 SET_CMD_RET_FALSE(CMD_PUSH_FIRST_FRAME_DISP, &mvdcmd);
8740
8741 return TRUE;
8742 }
8743
HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)8744 E_MVD_Result HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)
8745 {
8746 MVD_CmdArg mvdcmd;
8747
8748 SETUP_CMDARG(mvdcmd);
8749 mvdcmd.Arg0 = L_WORD(u32Para); // for set the XC diff_field_number
8750 mvdcmd.Arg1 = H_WORD(u32Para); // for set XC UCNR diff field no
8751 SET_DECNUM(mvdcmd, u8Idx);
8752
8753 SET_CMD_RET_FALSE(CMD_XC_LOW_DELAY_PARA, &mvdcmd);
8754
8755 return TRUE;
8756 }
8757
HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)8758 MS_U8 HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)
8759 {
8760 return (MS_U8)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CURRENT_ES_BUFFER_STATUS, sizeof(MS_U8)));
8761 }
8762
HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx,MS_BOOL bEn,MS_U8 top_bottom)8763 MS_BOOL HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx, MS_BOOL bEn,MS_U8 top_bottom)
8764 {
8765 MVD_CmdArg mvdcmd;
8766
8767 SETUP_CMDARG(mvdcmd);
8768 mvdcmd.Arg2 = bEn;
8769 mvdcmd.Arg3 = top_bottom;
8770 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x,top_bottom=%x\n", __FUNCTION__, bEn,top_bottom));
8771 SET_DECNUM(mvdcmd, u8Idx);
8772 SET_CMD_RET_FALSE(CMD_FP_FILTER, &mvdcmd);
8773
8774 return TRUE;
8775 }
8776
8777
HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8sel)8778 MS_BOOL HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8sel)
8779 {
8780 u8SHMMiuSel = u8sel;
8781 u32SharememoryBase[u8Idx] = u32base - MVD_FW_CODE_LEN;
8782 return TRUE;
8783 }
8784
HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx,MS_VIRT * u32base)8785 MS_BOOL HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx, MS_VIRT *u32base)
8786 {
8787 *u32base=u32SharememoryBase[u8Idx];
8788 return TRUE;
8789 }
8790
HAL_MVD_Support2ndMVOPInterface(void)8791 MS_BOOL HAL_MVD_Support2ndMVOPInterface(void)
8792 {
8793 return TRUE;
8794 }
8795
HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8size,MS_U8 cc_type)8796 MS_BOOL HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8size, MS_U8 cc_type)
8797 {
8798 MVD_CmdArg mvdcmd;
8799 MS_U32 u32cc_size=0;
8800 MS_VIRT u32StartOffset;
8801 MS_U8 u8MiuSel;
8802
8803 SETUP_CMDARG(mvdcmd);
8804 if (u8size !=0)
8805 {
8806 mvdcmd.Arg0 = TRUE; //enable
8807 }
8808 else
8809 {
8810 mvdcmd.Arg0 = FALSE; //disable
8811 }
8812 mvdcmd.Arg1 = cc_type; //608->1,708->0
8813
8814 SET_DECNUM(mvdcmd, u8Idx);
8815 SET_CMD_RET_FALSE(CMD_CC_ENABLE_EXTERNAL_BUFFER, &mvdcmd);
8816
8817 if (u8size ==0)
8818 {
8819 SET_CMD_RET_FALSE(CMD_CLOSE_CC, &mvdcmd);
8820 return E_MVD_RET_OK;
8821 }
8822
8823 u32base *= (1<<10); //unit is bytes
8824 u32cc_size = u8size * (1<<10); //unit is bytes
8825
8826
8827 MS_U32 *pu32ReadPtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base));
8828 MS_U32 *pu32WritePtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)));
8829 MS_U32 *pu32LatchOverflow = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*2));
8830 MS_U32 *pu32CpuBaseAddr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*3));
8831
8832 //rptr,wptr,overflow,latch 16 bytes
8833 if(cc_type==1)
8834 {
8835 u32base += (4*sizeof(MS_U32));
8836 u32cc_size -= (4*sizeof(MS_U32));
8837 }
8838
8839 if(cc_type==0) // 708: start from 128 bytes
8840 {
8841 u32base += 128;
8842 u32cc_size -= 128;
8843 }
8844
8845 *pu32ReadPtr = *pu32WritePtr = u32base;
8846 *pu32LatchOverflow = 0;
8847 *pu32CpuBaseAddr = HAL_MVD_GetMEMCfg(u8Idx)->u32FWBinAddr;
8848
8849 _phy_to_miu_offset(u8MiuSel, u32StartOffset, u32base);
8850 _MVD_SetUserDataBufStart(u8Idx,u32StartOffset,cc_type);
8851 _MVD_SetUserDataBufSize(u8Idx,u32cc_size,cc_type);
8852 //MVD_DEBUGINFO(MVD_PRINT("%s: u32base=%x,u32size=%x,cc_type=%x\n", __FUNCTION__,u32base,u32cc_size,cc_type));
8853
8854 return E_MVD_RET_OK;
8855 }
8856
HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void * param)8857 MS_BOOL HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void* param)
8858 {
8859
8860 MVD_PVR_Seamless_Info* temp = (MVD_PVR_Seamless_Info*)param;
8861
8862 temp->u64PTS = ((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTS, sizeof(MS_U32))) |
8863 (((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTSHIGH, sizeof(MS_U8)))<<32);
8864
8865 temp->u32POC = 0xFF; // not support in mvd
8866 temp->u8FrameType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETFRAMETYPE, sizeof(MS_U8));
8867
8868 return TRUE;
8869 }
8870
HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)8871 E_MVD_Result HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)
8872 {
8873 pMVDHalContext->gMVDPreCtrl[u8Idx].bHWBufferReMapping = bEnable;
8874 return E_MVD_RET_OK;
8875 }
8876
HAL_MVD_SetPrebufferSize(MS_U8 u8Idx,MS_U32 size)8877 MS_BOOL HAL_MVD_SetPrebufferSize(MS_U8 u8Idx, MS_U32 size)
8878 {
8879 MVD_CmdArg mvdcmd;
8880
8881 SETUP_CMDARG(mvdcmd);
8882 mvdcmd.Arg0 = size&0xff;
8883 mvdcmd.Arg1 = (size>>8)&0xff;
8884 mvdcmd.Arg2 = (size>>16)&0xff;
8885 mvdcmd.Arg3 = (size>>24)&0xff;
8886 SET_DECNUM(mvdcmd, u8Idx);
8887 if (HAL_MVD_MVDCommand( CMD_PREBUFFER_SIZE, &mvdcmd ) == FALSE)
8888 {
8889 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PREBUFFER_SIZE ) );
8890 return FALSE;
8891 }
8892 return TRUE;
8893 }
8894
HAL_MVD_GetVsyncAddrOffset(void)8895 MS_VIRT HAL_MVD_GetVsyncAddrOffset(void)
8896 {
8897 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8898 MS_VIRT VsyncBridgeOffset = 0;
8899
8900 if(VPUSHMAddr != 0) // TEE project
8901 {
8902 VsyncBridgeOffset = VSYNC_BRIDGE_OFFSET;
8903 }
8904 else // normal project
8905 {
8906 VsyncBridgeOffset = COMMON_AREA_START + VSYNC_BRIDGE_OFFSET;
8907 }
8908
8909 return VsyncBridgeOffset;
8910 }
8911
HAL_MVD_GetVsyncExtAddrOffset(void)8912 MS_VIRT HAL_MVD_GetVsyncExtAddrOffset(void)
8913 {
8914 MS_VIRT VsyncBridgeExtOffset = 0;
8915 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8916
8917 if(VPUSHMAddr != 0) // TEE project
8918 {
8919 VsyncBridgeExtOffset = VSYNC_BRIDGE_EXT_OFFSET;
8920 }
8921 else // normal project
8922 {
8923 VsyncBridgeExtOffset = COMMON_AREA_START + VSYNC_BRIDGE_EXT_OFFSET;
8924 }
8925
8926 return VsyncBridgeExtOffset;
8927 }
8928
HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx,MS_U32 u32time)8929 E_MVD_Result HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx, MS_U32 u32time)
8930 {
8931 MVD_CmdArg mvdcmd;
8932 SETUP_CMDARG(mvdcmd);
8933
8934 mvdcmd.Arg0 = L_WORD(u32time); // Arg0(enable), 1 for enable, default is 0...
8935 mvdcmd.Arg1 = H_WORD(u32time); // Arg1(vop_time_incr_predict_count), 1 for predict once, 2 for twice...0xff for always guess the vop_time_incr even with the vol_header, default is 0...
8936 mvdcmd.Arg2 = L_DWORD(u32time);// Arg2(vop_time_incr_follow_vol_header), // 0 for follow vol_header...1 for bypass vol_header, default is 0...
8937 mvdcmd.Arg3 = H_DWORD(u32time);// Arg3, reserve...
8938 MVD_DEBUGINFO(MVD_PRINT("CMD_TIME_INCR_PREDICT=%x\n",u32time));
8939 if (HAL_MVD_MVDCommand(CMD_TIME_INCR_PREDICT, &mvdcmd) == FALSE)
8940 {
8941 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_TIME_INCR_PREDICT ) );
8942 return E_MVD_RET_FAIL;
8943 }
8944 return E_MVD_RET_OK;
8945
8946 }
8947
HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx,MS_BOOL enable,MS_U32 u32timeout)8948 MS_BOOL HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx, MS_BOOL enable,MS_U32 u32timeout)
8949 {
8950 MVD_CmdArg mvdcmd;
8951
8952 SETUP_CMDARG(mvdcmd);
8953
8954 if(enable == TRUE)
8955 {
8956 mvdcmd.Arg0 = 2; //0:disable, 2: enable decode timeout
8957 mvdcmd.Arg1 = u32timeout&0xff;
8958 mvdcmd.Arg2 = (u32timeout>>8)&0xff;
8959 mvdcmd.Arg3 = (u32timeout>>16)&0xff;
8960 }
8961 else
8962 {
8963 mvdcmd.Arg0 = 0; //0:disable, 2: enable decode timeout
8964 }
8965
8966 SET_DECNUM(mvdcmd, u8Idx);
8967
8968 if (HAL_MVD_MVDCommand( CMD_ENABLE_VLD_TIMEOUT, &mvdcmd ) == FALSE)
8969 {
8970 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_VLD_TIMEOUT ) );
8971 return FALSE;
8972 }
8973
8974 return TRUE;
8975 }
8976
HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx,MS_U8 btype)8977 E_MVD_Result HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx, MS_U8 btype)
8978 {
8979 MVD_CmdArg mvdcmd;
8980 SETUP_CMDARG(mvdcmd);
8981 mvdcmd.Arg0 = btype;
8982 MVD_DEBUGINFO(MVD_PRINT("%s: btype=%x\n", __FUNCTION__, btype));
8983 SET_DECNUM(mvdcmd, u8Idx);
8984 if (HAL_MVD_MVDCommand(CMD_SMOOTH_REWIND, &mvdcmd) == FALSE)
8985 {
8986 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SMOOTH_REWIND ) );
8987 return E_MVD_RET_FAIL;
8988 }
8989 return E_MVD_RET_OK;
8990 }
8991
HAL_MVD_IsAlive(MS_U8 u8Idx)8992 E_MVD_Result HAL_MVD_IsAlive(MS_U8 u8Idx)
8993 {
8994 MVD_ALIVEInfo* pAliveInfo = &(pMVDHalContext->aliveInfo[u8Idx]);
8995 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
8996
8997 if (E_MVD_SLQ_TBL_MODE == curSrcMode || E_MVD_TS_FILE_MODE == curSrcMode)
8998 {
8999 if(pMVDHalContext->u32LastAliveTime[u8Idx] == 0 || ((MsOS_GetSystemTime()-pMVDHalContext->u32LastAliveTime[u8Idx]) < 500))
9000 {
9001
9002 if(pMVDHalContext->u32LastAliveTime[u8Idx] == 0 )
9003 {
9004 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9005 }
9006 return E_MVD_RET_OK;
9007 }
9008 }
9009
9010 #if 0
9011 MVD_PRINT("[%d]%d,%d,%d,%d,%d,%d,%d,%d\n",__FUNCTION__,
9012 (MS_U32)MsOS_GetSystemTime(),
9013 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))),
9014 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))),
9015 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))),
9016 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))),
9017 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))),
9018 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))),
9019 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32))));
9020 #endif
9021
9022 //check count to vertify alive
9023 if((pAliveInfo->u32decode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))))||
9024 (pAliveInfo->u32searchbuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))))||
9025 (pAliveInfo->u32searchcode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))))||
9026 (pAliveInfo->u32prebuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))))||
9027 (pAliveInfo->u32vfifobuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))))||
9028 (pAliveInfo->u32searchheader_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))))||
9029 (pAliveInfo->u32flashpattern_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32))))||
9030 (pAliveInfo->u32IdleCount!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_IDLE_COUNT, sizeof(MS_U32)))))
9031 {
9032 pAliveInfo->u32decode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32)));
9033 pAliveInfo->u32searchbuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32)));
9034 pAliveInfo->u32searchcode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32)));
9035 pAliveInfo->u32prebuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32)));
9036 pAliveInfo->u32vfifobuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32)));
9037 pAliveInfo->u32searchheader_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32)));
9038 pAliveInfo->u32flashpattern_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)));
9039 pAliveInfo->u32IdleCount=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_IDLE_COUNT, sizeof(MS_U32)));
9040 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9041 return E_MVD_RET_OK;
9042 }
9043 else
9044 {
9045 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9046 return E_MVD_RET_FAIL;
9047 }
9048
9049 }
9050
HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx,MS_U16 u16Para)9051 E_MVD_Result HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx, MS_U16 u16Para)
9052 {
9053 MVD_CmdArg mvdcmd;
9054 SETUP_CMDARG(mvdcmd);
9055 mvdcmd.Arg0 = u16Para & 0xFF; //enable or disable
9056 mvdcmd.Arg1 = u16Para >> 8; // err rate 0~100%
9057 if(mvdcmd.Arg1 >= 100)
9058 mvdcmd.Arg1 = 100;
9059
9060 SET_DECNUM(mvdcmd, u8Idx);
9061 if (HAL_MVD_MVDCommand(CMD_DECODE_ERROR_TOLERANCE, &mvdcmd) == FALSE)
9062 {
9063 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_ERROR_TOLERANCE ) );
9064 return E_MVD_RET_FAIL;
9065 }
9066 return E_MVD_RET_OK;
9067
9068 }
9069
HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx,MS_BOOL bEnable)9070 void HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx, MS_BOOL bEnable)
9071 {
9072 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = bEnable;
9073 }
9074
HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)9075 void HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)
9076 {
9077 pMVDHalContext->bDropOnePTS[u8Idx] = TRUE;
9078 }
9079
HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx,MS_U8 u8Arg)9080 E_MVD_Result HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx, MS_U8 u8Arg)
9081 {
9082 #define STOP_TIMEOUT 500 //ms
9083 MVD_CmdArg mvdcmd;
9084 E_MVD_Result ret = E_MVD_RET_OK;
9085 MS_U32 u32StartTime;
9086 MS_U32 u32SeamlessStatus = 0;
9087 MS_U32 u32BufStart = 0;
9088 MS_U32* temp = 0;
9089
9090 if(u8Arg != 2)
9091 {
9092 // clear handshake dram
9093 u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);
9094 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart,u32BufStart);
9095 temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+OFFSET_PVR_SEAMLESS_STATUS);
9096 *temp = 0;
9097 MsOS_FlushMemory();
9098 }
9099
9100 SETUP_CMDARG(mvdcmd);
9101 mvdcmd.Arg0 = u8Arg;
9102 MVD_DEBUGINFO(MVD_PRINT("%s: arg=%d\n", __FUNCTION__, (unsigned int)u8Arg));
9103 SET_DECNUM(mvdcmd, u8Idx);
9104
9105 if (HAL_MVD_MVDCommand(CMD_PVR_SEAMLESS_MODE, &mvdcmd) == FALSE)
9106 {
9107 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PVR_SEAMLESS_MODE ) );
9108 return E_MVD_RET_FAIL;
9109 }
9110
9111
9112 u32StartTime = HAL_MVD_GetTime();
9113
9114 if(u8Arg == 1)
9115 {
9116 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = E_MVD_TS_FILE_MODE;
9117 while(1)
9118 {
9119 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
9120 if(u32SeamlessStatus&1) // bit0 , pause done
9121 {
9122 break;
9123 }
9124
9125 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
9126 {
9127 MVD_DEBUGERROR(MVD_PRINT("PVR seamless pause timeout\n" ) );
9128 ret = E_MVD_RET_FAIL;
9129 break;
9130 }
9131 }
9132 }
9133 else if(u8Arg == 2)
9134 {
9135 while(1)
9136 {
9137 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
9138 if(u32SeamlessStatus&4) // bit2, hw reset done
9139 {
9140 break;
9141 }
9142
9143 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
9144 {
9145 MVD_DEBUGERROR(MVD_PRINT("PVR seamless hw reset timeout\n" ) );
9146 ret = E_MVD_RET_FAIL;
9147 break;
9148 }
9149 }
9150 }
9151
9152 return ret;
9153 }
9154
HAL_MVD_SetDVXCShmAddr(MS_U8 u8Idx,MS_PHY u32FWBaseAddr,MS_PHY u32DVXCShmAddr)9155 E_MVD_Result HAL_MVD_SetDVXCShmAddr(MS_U8 u8Idx, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr)
9156 {
9157 E_MVD_Result ret = E_MVD_RET_OK;
9158
9159 MS_U8 u8XCShmMiuSel;
9160 MS_U32 u32XCShmStartOffset;
9161 MS_U8 u8FWBaseMiuSel;
9162 MS_U32 u32FWBaseOffset;
9163 MVD_CmdArg mvdcmd;
9164 MS_U32 u32temp = 0;
9165
9166 _phy_to_miu_offset(u8FWBaseMiuSel, u32FWBaseOffset, u32FWBaseAddr);
9167 _phy_to_miu_offset(u8XCShmMiuSel, u32XCShmStartOffset, u32DVXCShmAddr);
9168
9169 if (u8FWBaseMiuSel != u8XCShmMiuSel)
9170 {
9171 MVD_DEBUGERROR(MVD_PRINT("[ERROR] XC share memory and VDEC Code base MIU selections are different\n"));
9172 return E_MVD_RET_FAIL;
9173 }
9174
9175 u32temp = u32XCShmStartOffset - u32FWBaseOffset;
9176
9177 SETUP_CMDARG(mvdcmd);
9178
9179 mvdcmd.Arg0 = L_WORD(u32temp);
9180 mvdcmd.Arg1 = H_WORD(u32temp);
9181 mvdcmd.Arg2 = L_DWORD(u32temp);
9182 mvdcmd.Arg3 = H_DWORD(u32temp);
9183
9184 MVD_DEBUGINFO(MVD_PRINT("%s: arg=%x\n", __FUNCTION__, (unsigned int)u32temp));
9185
9186 SET_DECNUM(mvdcmd, u8Idx);
9187
9188 if (HAL_MVD_MVDCommand(CMD_SET_DV_XC_SHM_ADDR, &mvdcmd) == FALSE)
9189 {
9190 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SET_DV_XC_SHM_ADDR ) );
9191 return E_MVD_RET_FAIL;
9192 }
9193
9194 return ret;
9195 }
9196
9197
HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx,MS_U8 u8Mode)9198 E_MVD_Result HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx, MS_U8 u8Mode)
9199 {
9200 MVD_CmdArg mvdcmd;
9201
9202 SETUP_CMDARG(mvdcmd);
9203 mvdcmd.Arg0 = u8Mode;
9204
9205 SET_DECNUM(mvdcmd, u8Idx);
9206
9207 MVD_DEBUGINFO(MVD_PRINT("%s CMD_ENABLE_LAST_FRAME_QUALIFIER arg0=%x\n", __FUNCTION__, u8Mode));
9208 if (HAL_MVD_MVDCommand(CMD_ENABLE_LAST_FRAME_QUALIFIER, &mvdcmd)== FALSE)
9209 {
9210 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_LAST_FRAME_QUALIFIER) );
9211 return E_MVD_RET_FAIL;
9212 }
9213
9214 return E_MVD_RET_OK;
9215 }
HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx,MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)9216 E_MVD_Result HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx, MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)
9217 {
9218 MVD_CmdArg mvdcmd;
9219 SETUP_CMDARG(mvdcmd);
9220
9221 mvdcmd.Arg0 = u8RepeatPeriod;
9222
9223 SET_DECNUM(mvdcmd, u8Idx);
9224 if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_REPEAT, &mvdcmd) == FALSE)
9225 {
9226 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_REPEAT ) );
9227 return E_MVD_RET_FAIL;
9228 }
9229
9230
9231 mvdcmd.Arg0 = u8DropPeriod;
9232
9233 SET_DECNUM(mvdcmd, u8Idx);
9234 if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_SKIP, &mvdcmd) == FALSE)
9235 {
9236 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_SKIP ) );
9237 return E_MVD_RET_FAIL;
9238 }
9239
9240
9241 return E_MVD_RET_OK;
9242
9243 }
9244
HAL_MVD_VariableFrameRate(MS_U8 u8Idx)9245 MS_BOOL HAL_MVD_VariableFrameRate(MS_U8 u8Idx)
9246 {
9247 MVD_CmdArg mvdcmd;
9248 SETUP_CMDARG(mvdcmd);
9249 mvdcmd.Arg0 = 1;
9250 SET_DECNUM(mvdcmd, u8Idx);
9251 if (HAL_MVD_MVDCommand(CMD_VARIABLE_FRAMERATE, &mvdcmd)== FALSE)
9252 {
9253 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VARIABLE_FRAMERATE) );
9254 return FALSE;
9255 }
9256 return TRUE;
9257 }
9258
9259 //------------------------------------------------------------------------------
9260 /// Set FRC Only Show TopField
9261 /// @return -TRUE for success; FALSE for failure.
9262 //------------------------------------------------------------------------------
HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx,MS_BOOL bEnable)9263 MS_BOOL HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx, MS_BOOL bEnable)
9264 {
9265 MVD_CmdArg mvdcmd;
9266
9267 SETUP_CMDARG(mvdcmd);
9268 mvdcmd.Arg0 = bEnable; //1 -> show Only Show TopField. 0 -> normal case.
9269 SET_DECNUM(mvdcmd, u8Idx);
9270 SET_CMD_RET_FALSE(CMD_FRC_ONLY_SHOW_TOP_FIELD, &mvdcmd);
9271 return TRUE;
9272 }
9273
HAL_MVD_DisableESFullStop(MS_U8 u8Idx,MS_BOOL bDisable)9274 MS_BOOL HAL_MVD_DisableESFullStop(MS_U8 u8Idx, MS_BOOL bDisable)
9275 {
9276 MVD_CmdArg mvdcmd;
9277 SETUP_CMDARG(mvdcmd);
9278 mvdcmd.Arg0 = bDisable;
9279 SET_DECNUM(mvdcmd, u8Idx);
9280 if (HAL_MVD_MVDCommand( CMD_ES_FULL_STOP, &mvdcmd ) == FALSE)
9281 {
9282 MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ES_FULL_STOP);
9283 return FALSE;
9284 }
9285 return TRUE;
9286 }
9287
HAL_MVD_PUSI_Control(MS_U8 u8Idx,MS_BOOL bEnable)9288 MS_BOOL HAL_MVD_PUSI_Control(MS_U8 u8Idx, MS_BOOL bEnable)
9289 {
9290 MVD_CmdArg mvdcmd;
9291 SETUP_CMDARG(mvdcmd);
9292 mvdcmd.Arg0 = bEnable;
9293 SET_DECNUM(mvdcmd, u8Idx);
9294 if (HAL_MVD_MVDCommand( CMD_PUSI_CONTROL, &mvdcmd ) == FALSE)
9295 {
9296 MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PUSI_CONTROL);
9297 return FALSE;
9298 }
9299 return TRUE;
9300 }
9301
9302
HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)9303 MS_VIRT HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)
9304 {
9305 return pMVDHalContext->stFWBuff[(u8Idx)].u32VBBUTableAdd;
9306 }
9307
HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)9308 void HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)
9309 {
9310 pMVDHalContext->u32DmxFrameRate[u8HalIdx] = u32Value;
9311 }
9312
HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)9313 void HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)
9314 {
9315 pMVDHalContext->u32DmxFrameRateBase[u8HalIdx] = u32Value;
9316 }
9317
HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)9318 void HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)
9319 {
9320 pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = bEnable;
9321 }
9322
HAL_MVD_SetAVSyncDispAutoDrop(MS_U8 u8Idx,MS_BOOL bEnable)9323 MS_BOOL HAL_MVD_SetAVSyncDispAutoDrop(MS_U8 u8Idx, MS_BOOL bEnable)
9324 {
9325 MVD_CmdArg mvdcmd;
9326
9327 SETUP_CMDARG(mvdcmd);
9328 mvdcmd.Arg0 = bEnable;
9329
9330 SET_DECNUM(mvdcmd, u8Idx);
9331
9332 MVD_DEBUGINFO(MVD_PRINT("%s CMD_AUTO_DROP_FRAME_IN_DECODE arg0=%x\n", __FUNCTION__, bEnable));
9333 if (HAL_MVD_MVDCommand(CMD_AUTO_DROP_FRAME_IN_DECODE, &mvdcmd)== FALSE)
9334 {
9335 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_AUTO_DROP_FRAME_IN_DECODE) );
9336 return FALSE;
9337 }
9338
9339 return TRUE;
9340 }
9341
HAL_MVD_SetDynmcDispPath(MS_U8 u8Idx,MS_BOOL bConnect,MVD_DISPLAY_PATH eValue,MS_BOOL bPreSet)9342 MS_BOOL HAL_MVD_SetDynmcDispPath(MS_U8 u8Idx,MS_BOOL bConnect,MVD_DISPLAY_PATH eValue,MS_BOOL bPreSet)
9343 {
9344 MS_U32 u32TimeCnt = 0;
9345 MVD_CmdArg mvdcmd;
9346
9347 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL);
9348
9349 SETUP_CMDARG(mvdcmd);
9350 mvdcmd.Arg0 = bConnect;
9351 mvdcmd.Arg1 = eValue;
9352 mvdcmd.Arg2 = bPreSet;
9353
9354 SET_DECNUM(mvdcmd, u8Idx);
9355
9356 MVD_DEBUGINFO(MVD_PRINT("%s CMD_DYNAMIC_MVOP_CONNECT arg0=%x, arg1=%x\n", __FUNCTION__, bConnect,eValue));
9357 if (HAL_MVD_MVDCommand(CMD_DYNAMIC_MVOP_CONNECT, &mvdcmd)== FALSE)
9358 {
9359 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DYNAMIC_MVOP_CONNECT) );
9360 return FALSE;
9361 }
9362
9363 if(bConnect == FALSE) // disconnect, need to do handshake with fw
9364 {
9365 u32TimeCnt = HAL_MVD_GetTime();
9366 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
9367 {
9368 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL))
9369 {
9370 MVD_DEBUGINFO(MVD_PRINT("\n vsync control finished!\n"));
9371 break;
9372 }
9373 }
9374
9375 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
9376
9377 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL))
9378 {
9379 MVD_DEBUGINFO(MVD_PRINT("\n***** vsync control timeout *****\n\n"));
9380 return FALSE;
9381 }
9382 }
9383
9384 return TRUE;
9385 }
9386
HAL_MVD_PreConnectInputTsp(MS_U8 u8Idx,MS_BOOL bEnable,MVD_INPUT_TSP eInputTsp,MVD_Original_Stream eStream)9387 MS_BOOL HAL_MVD_PreConnectInputTsp(MS_U8 u8Idx, MS_BOOL bEnable, MVD_INPUT_TSP eInputTsp, MVD_Original_Stream eStream)
9388 {
9389 #ifdef CMD_PRESET_CONNET_INPUT_TSP
9390
9391 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
9392
9393 if (curSrcMode == E_MVD_TS_MODE)
9394 {
9395 MVD_CmdArg mvdcmd;
9396 MS_U8 u8Input = E_CTL_INPUT_TSP_NONE;
9397
9398 if (bEnable)
9399 {
9400 u8Input = (MS_U8)eInputTsp;
9401 VPRINTF("[NDec][%d] MVD preset tsp, eInputTsp %d\n", u8Idx, eInputTsp);
9402 }
9403 else
9404 {
9405 switch (eStream)
9406 {
9407 case E_MVD_ORIGINAL_MAIN_STREAM:
9408 u8Input = E_CTL_INPUT_TSP_0;
9409 break;
9410 case E_MVD_ORIGINAL_SUB_STREAM:
9411 u8Input = E_CTL_INPUT_TSP_1;
9412 break;
9413 case E_MVD_ORIGINAL_N_STREAM:
9414 default:
9415 u8Input = E_CTL_INPUT_TSP_NONE;
9416 break;
9417 }
9418 VPRINTF("[NDec][%d] MVD no preset tsp, input %d\n", u8Idx, u8Input);
9419 }
9420
9421 SETUP_CMDARG(mvdcmd);
9422 mvdcmd.Arg0 = u8Input;
9423 SET_DECNUM(mvdcmd, u8Idx);
9424
9425 MVD_DEBUGINFO(MVD_PRINT("%s CMD_PRESET_CONNET_INPUT_TSP arg0=%x\n", __FUNCTION__, u8Input));
9426 if (HAL_MVD_MVDCommand(CMD_PRESET_CONNET_INPUT_TSP, &mvdcmd)== FALSE)
9427 {
9428 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", CMD_PRESET_CONNET_INPUT_TSP));
9429 return FALSE;
9430 }
9431 }
9432 else
9433 {
9434 VPRINTF("[NDec][%d] MVD not TSP input, ignore PRESET_CONNECT_INPUT_TSP\n", u8Idx);
9435 }
9436
9437 return TRUE;
9438
9439 #else
9440
9441 return FALSE;
9442
9443 #endif
9444 }
9445
HAL_MVD_SetCMAInformation(void * cmaInitParam)9446 void HAL_MVD_SetCMAInformation(void* cmaInitParam)
9447 {
9448 pMVDHalContext->bCMAUsed = TRUE;
9449 memcpy((void*)(&pMVDHalContext->cmaInitParam),cmaInitParam,sizeof(struct CMA_Pool_Init_Param));
9450 }
9451
HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64 * u64Addr,MS_SIZE * u64Size,MS_BOOL * bAllocDone)9452 void HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64* u64Addr,MS_SIZE* u64Size,MS_BOOL* bAllocDone)
9453 {
9454 FW_VOL_INFO gvolInfo;
9455 MS_U32 u32VolAddr;
9456
9457 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9458
9459 gvolInfo = (*(volatile FW_VOL_INFO*)(MsOS_PA2KSEG1(u32VolAddr)));
9460
9461 *u64Addr = (MS_U64)gvolInfo.CMA_FB_Address;
9462 *u64Size = (MS_SIZE)gvolInfo.CMA_FB_Size;
9463 *bAllocDone = gvolInfo.CMA_AllocDone;
9464
9465 MsOS_ReadMemory();
9466 MsOS_FlushMemory();
9467 }
9468
HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)9469 void HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)
9470 {
9471 MS_U8* temp;
9472 MS_VIRT u32VolAddr;
9473
9474 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9475
9476 temp = (MS_U8*)(MsOS_PA2KSEG1(u32VolAddr+OFFSET_CMA_ALLOCDONE));
9477
9478 *temp = 1;
9479
9480 MsOS_ReadMemory();
9481 MsOS_FlushMemory();
9482 }
9483
HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)9484 void HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)
9485 {
9486 //to do....
9487 }
9488
9489
9490 #ifdef VDEC3
HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)9491 MS_BOOL HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)
9492 {
9493
9494 #if 1 // to do.
9495 UNUSED(u8Cmd);
9496 return TRUE;
9497 #else
9498 MS_BOOL ret;
9499 switch(u8Cmd)
9500 {
9501 case CMD_PLAY:
9502 case CMD_STOP:
9503 case CMD_DISPLAY_PAUSE:
9504 case CMD_PAUSE:
9505 case CMD_FLUSH_DISP_QUEUE:
9506 case CMD_VC1_HW_SLQ_RESET:
9507 case CMD_FAST_SLOW:
9508 case CMD_FLIP_RELEASE_FRAME:
9509 case CMD_FD_MASK_DELAY_CNT:
9510 case CMD_PVR_SEAMLESS_MODE:
9511 case CMD_SW_RESET:
9512 case CMD_CODEC_INFO:
9513 case CMD_CODE_OFFSET:
9514 case CMD_VOL_INFO_BUF:
9515 case CMD_FRAME_INFO_BUF:
9516 case CMD_HEADER_INFO_BUF:
9517 case CMD_USER_BUF_START:
9518 case CMD_USER_BUF_SIZE:
9519 case CMD_PTS_TBL_START:
9520 case CMD_DEC_FRAME_INFO_BUF:
9521 case CMD_SLQ_TBL_BUF_END:
9522 case CMD_SLQ_TBL_BUF_START:
9523 case CMD_STREAM_BUF_START:
9524 case CMD_STREAM_BUF_END:
9525 case CMD_FB_BASE:
9526 case CMD_IAP_BUF_START:
9527 case CMD_DP_BUF_START:
9528 case CMD_MV_BUF_START:
9529 case CMD_FB_NUM:
9530 case CMD_DISPLAY_CTL:
9531 case CMD_REPEAT_MODE:
9532 case CMD_DS_VIRTUAL_BOX:
9533 case CMD_ENABLE_FILE_SYNC:
9534 case CMD_RVU_EN:
9535 case CMD_START_DEC_STRICT:
9536 case CMD_SYNC_ON:
9537 case CMD_SET_MST_MODE:
9538 case CMD_SET_MCU_MODE:
9539 ret = TRUE;
9540 break;
9541 default:
9542 ret = FALSE;
9543 break;
9544 }
9545
9546 return ret;
9547 #endif
9548 }
9549
HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)9550 MS_BOOL HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)
9551 {
9552 MS_BOOL ret;
9553
9554 switch(u8Cmd)
9555 {
9556
9557 case CMD_DISP_SPEED_CTRL:
9558 case CMD_STEP_DISP_DECODE_ONE:
9559 case CMD_ENABLE_LAST_FRAME_SHOW:
9560 case CMD_STEP_TO_PTS:
9561 case CMD_SKIP_DATA:
9562 case CMD_DIU_WIDTH_ALIGN:
9563 case CMD_SCALER_INFO_BASE:
9564 case CMD_DYNAMIC_SCALE_BASE:
9565 case CMD_ENABLE_DYNAMIC_SCALE:
9566 case CMD_FORCE_BLUE_SCREEN:
9567 case CMD_FREEZE_DISP:
9568 case CMD_FIXED_FRAME_BUFFER:
9569 case CMD_SEND_UNI_PTS:
9570 case CMD_ENABLE_FREEZE_PIC:
9571 case CMD_PTS_BASE:
9572 case CMD_SINGLE_STEP:
9573 case CMD_PARSE_M4V_PACKMD:
9574 case CMD_SLQ_END:
9575 case CMD_SLQ_START:
9576 case CMD_ENABLE_INT_STAT:
9577 case CMD_SHOW_ONE_FIELD:
9578 case CMD_FRC_OUPUT:
9579 case CMD_FRC_DROP_BEHAVIOR:
9580 case CMD_FORBID_RESOLUTION_CHANGE:
9581 case CMD_DUMP_BITSTREAM_BASE:
9582 case CMD_DUMP_BITSTREAM_LENGTH:
9583 case CMD_SYNC_OFFSET:
9584 case CMD_SYN_THRESHOLD:
9585 case CMD_AVSYNC_FREERUN_THRESHOLD:
9586 case CMD_MVD_FAST_INT:
9587 case CMD_DIVX_PATCH:
9588 case CMD_IDCT_SEL:
9589 case CMD_SLQ_UPDATE_TBL_WPTR:
9590 case CMD_DMA_OVFTH:
9591 case CMD_DMA_UNFTH:
9592 case CMD_UPDATE_FRAME:
9593 case CMD_PTS_TBL_RESET:
9594 case CMD_ENABLE_AUTO_MUTE:
9595 case CMD_FORCE_ALIGN_VSIZE:
9596 case CMD_SUSPEND_DS:
9597 case CMD_PUSH_FIRST_FRAME_DISP:
9598 case CMD_XC_LOW_DELAY_PARA:
9599 case CMD_FP_FILTER:
9600 case CMD_CC_ENABLE_EXTERNAL_BUFFER:
9601 case CMD_CLOSE_CC:
9602 case CMD_PREBUFFER_SIZE:
9603 case CMD_TIME_INCR_PREDICT:
9604 case CMD_ENABLE_VLD_TIMEOUT:
9605 case CMD_SMOOTH_REWIND:
9606 case CMD_DECODE_ERROR_TOLERANCE:
9607 case CMD_MVD_IDLE:
9608 case CMD_PARSER_READ_POSITION:
9609 case CMD_SLQ_GET_TBL_RPTR:
9610 case CMD_DECODE_STATUS:
9611 case CMD_GET_AFD:
9612 case CMD_GET_SYNC_STAT:
9613 case CMD_RD_USER_WP:
9614 case CMD_ENABLE_LAST_FRAME_QUALIFIER:
9615 //case CMD_RD_IO: // no need in V3
9616 //case CMD_WR_IO: // no need in V3
9617 ret = TRUE;
9618 break;
9619 default:
9620 ret = FALSE;
9621 break;
9622 }
9623
9624 return ret;
9625 }
9626
HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)9627 MS_BOOL HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)
9628 {
9629 MS_BOOL ret;
9630
9631 switch(u8Cmd)
9632 {
9633 case CMD_GET_AFD:
9634 case CMD_GET_SYNC_STAT:
9635 case CMD_RD_USER_WP:
9636 case CMD_DECODE_STATUS:
9637 case CMD_PARSER_READ_POSITION:
9638 case CMD_MVD_IDLE:
9639 ret = TRUE;
9640 break;
9641 default:
9642 ret = FALSE;
9643 break;
9644 }
9645
9646 return ret;
9647 }
9648 #endif
9649 #endif
9650