1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
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91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 // Common Definition
100 #ifdef REDLION_LINUX_KERNEL_ENVI
101 #include "mdrv_types.h"
102 #include "mdrv_system.h"
103
104 #include "drvMVD_Common.h"
105 #include "drvMVD.h"
106
107 #include "regMVD.h"
108 #include "halMVD.h"
109
110 #include "halVPU.h"
111
112 static MS_U8 u8MVD_FW_Binary[] =
113 {
114 #include "fwMVD.dat"
115 };
116
117 #define MVD_ENABLE_BDMA_FW_FLASH_2_SDRAM 0
118
119 #else
120 #include "MsCommon.h"
121 #include "drvMVD.h"
122
123 // Internal Definition
124 #include "regMVD.h"
125 #include "halMVD.h"
126 #include "halVPU.h"
127 #include "osalMVD.h"
128 #include "mvd4_interface.h" //firmware header
129 #include "asmCPU.h"
130
131 #if defined(FW_EXTERNAL_BIN)
132 #include "drvSERFLASH.h"
133
134 #define MVD_ENABLE_BDMA_FW_FLASH_2_SDRAM 1
135 #else // defined(FW_EMBEDDED_ASC)
136 #define MVD_ENABLE_BDMA_FW_FLASH_2_SDRAM 0
137 #endif
138 #if (!MVD_ENABLE_BDMA_FW_FLASH_2_SDRAM)
139 static MS_U8 u8MVD_FW_Binary[] =
140 {
141 #include "fwMVD.dat"
142 };
143 #endif
144 #endif
145
146 extern MVD_MEMCfg stMemCfg;
147 extern MVD_FWCfg stFwCfg;
148 extern MS_BOOL bStopped;
149
150 //-------------------------------------------------------------------------------------------------
151 // Driver Compiler Options
152 //-------------------------------------------------------------------------------------------------
153 #ifndef REDLION_LINUX_KERNEL_ENVI
154 #if defined(MSOS_TYPE_NOS) //temp define for bring up
155 #define MVD_CACHE_TO_UNCACHE_CONVERT
156 #endif
157 #endif
158
159 //-------------------------------------------------------------------------------------------------
160 // Local Defines
161 //-------------------------------------------------------------------------------------------------
162 #define MIU1_BASEADDR stMemCfg.u32Miu1BaseAddr
163 #define _PA2Offset(x) (((x)>=MIU1_BASEADDR)?(x-MIU1_BASEADDR):(x))
164
165 #ifndef MS_ASSERT
166 #define MS_ASSERT(expr) do { \
167 if(!(expr)) \
168 printf("MVD assert fail %s %d!\n", __FILE__, __LINE__); \
169 } while(0)
170 #endif
171
172 //constant
173 #define MVD_PollingTimes 0x40000UL
174
175 #define MVD_DEBUG_FWCMD(x) if (_u8HalDbgLevel>2) { (x); }
176 #define MVD_DEBUGINFO(x) if (_u8HalDbgLevel>1) { (x); }
177 #define MVD_DEBUGERROR(x) if (_u8HalDbgLevel>0) { (x); }
178 #define MVD_ERROR(x) x
179
180 #define RIU ((unsigned short volatile *) u32RiuBaseAdd)
181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd)
182
183 #define MVDCPU_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL0_H) & BIT0) == BIT0)
184 #define MVDHW_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL2_L) & BIT4) == BIT4)
185
186 typedef enum
187 {
188 MVD_HKSLQ_GET_READPTR = 0,
189 MVD_HKSLQ_GET_WRITEPTR = 1,
190 MVD_HKSLQ_NONE = 2,
191 } MVD_HKSLQ_CMD;
192
193
194 //-------------------------------------------------------------------------------------------------
195 // Local Structures
196 //-------------------------------------------------------------------------------------------------
197
198
199 //-------------------------------------------------------------------------------------------------
200 // Global Variables
201 //-------------------------------------------------------------------------------------------------
202 static MS_U32 u32fmAddr, u32fmLen;
203 static MS_U32 u32bsAddr, u32bsLen;
204 static MS_U32 u32fbAddr, u32fbLen;
205 static MS_U32 u32DrvProcAddr, u32DrvProcLen;
206 static MS_U32 u32RiuBaseAdd;
207 static MS_U8 _u8HalDbgLevel = 0;
208 static MS_BOOL bEnSlqTblHkCtrl = FALSE;
209
210
211 //-------------------------------------------------------------------------------------------------
212 // Local Variables
213 //-------------------------------------------------------------------------------------------------
214
215
216 //-------------------------------------------------------------------------------------------------
217 // Debug Functions
218 //-------------------------------------------------------------------------------------------------
219
220
221 //-------------------------------------------------------------------------------------------------
222 // Local Functions
223 //-------------------------------------------------------------------------------------------------
224
225
226 //-------------------------------------------------------------------------------------------------
227 // Global Functions
228 //-------------------------------------------------------------------------------------------------
HAL_MVD_SetDbgLevel(MS_U8 level)229 void HAL_MVD_SetDbgLevel(MS_U8 level)
230 {
231 _u8HalDbgLevel = level;
232 return;
233 }
234
235
HAL_MVD_GetCaps(void)236 MS_U8 HAL_MVD_GetCaps(void)
237 {
238 MS_U8 caps = 0;
239
240 caps |= (MVD_SUPPORT_MPEG2|MVD_SUPPORT_MPEG4|MVD_SUPPORT_VC1);
241 return caps;
242 }
243
244
HAL_MVD_MemSetMap(MS_U8 u8type,MS_U32 u32addr,MS_U32 u32len)245 void HAL_MVD_MemSetMap(MS_U8 u8type, MS_U32 u32addr, MS_U32 u32len)
246 {
247 switch (u8type)
248 {
249 case E_MVD_MMAP_ALL:
250 case E_MVD_MMAP_FW:
251 u32fmAddr = _PA2Offset(u32addr);
252 u32fmLen = u32len;
253 break;
254 case E_MVD_MMAP_BS:
255 u32bsAddr = _PA2Offset(u32addr);
256 u32bsLen = u32len;
257 break;
258 case E_MVD_MMAP_FB:
259 u32fbAddr = _PA2Offset(u32addr);
260 u32fbLen = u32len;
261 break;
262
263 case E_MVD_MMAP_DRV:
264 u32DrvProcAddr = _PA2Offset(u32addr);
265 u32DrvProcLen = u32len;
266 break;
267
268 default:
269 break;
270 }
271
272 MVD_DEBUGINFO(printf("HAL_MVD_MemSetMap[%d] add=0x%lx offset=0x%lx len=0x%lx\n",u8type,u32addr,_PA2Offset(u32addr),u32len));
273 return;
274 }
275
HAL_MVD_MemGetMap(MS_U8 u8type,MS_U32 * pu32addr,MS_U32 * pu32len)276 void HAL_MVD_MemGetMap(MS_U8 u8type, MS_U32* pu32addr, MS_U32* pu32len)
277 {
278 switch (u8type)
279 {
280 case E_MVD_MMAP_ALL:
281 case E_MVD_MMAP_FW:
282 *pu32addr = u32fmAddr;
283 *pu32len = u32fmLen;
284 break;
285 case E_MVD_MMAP_BS:
286 *pu32addr = u32bsAddr;
287 *pu32len = u32bsLen;
288 break;
289 case E_MVD_MMAP_FB:
290 *pu32addr = u32fbAddr;
291 *pu32len = u32fbLen;
292 break;
293 case E_MVD_MMAP_DRV:
294 *pu32addr = u32DrvProcAddr;
295 *pu32len = u32DrvProcLen;
296 break;
297 default:
298 break;
299 }
300
301 MVD_DEBUGINFO(printf("HAL_MVD_MemGetMap[%d] add=0x%lx len=0x%lx\n",u8type,*pu32addr,*pu32len));
302 return;
303 }
304
305
HAL_MVD_RegSetBase(MS_U32 u32Base)306 void HAL_MVD_RegSetBase(MS_U32 u32Base)
307 {
308 u32RiuBaseAdd = u32Base;
309 HAL_VPU_InitRegBase(u32Base);
310 }
311
HAL_MVD_RegWriteByte(MS_U32 u32Reg,MS_U8 u8Val)312 void HAL_MVD_RegWriteByte(MS_U32 u32Reg, MS_U8 u8Val)
313 {
314 if ( __builtin_constant_p( u32Reg ) )
315 {
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val;
317 }
318 else
319 {
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
321 }
322 }
323
HAL_MVD_RegReadByte(MS_U32 u32Reg)324 MS_U8 HAL_MVD_RegReadByte(MS_U32 u32Reg)
325 {
326 return (__builtin_constant_p( u32Reg ) ?
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) :
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)]));
329 }
330
HAL_MVD_RegWriteBit(MS_U32 u32Reg,MS_BOOL bEnable,MS_U8 u8Mask)331 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask)
332 {
333 MS_U32 u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) :
335 (RIU8[u32Reg8] & ~(u8Mask));
336 }
337
HAL_MVD_RegWriteByteMask(MS_U32 u32Reg,MS_U8 u8Val,MS_U8 u8Msk)338 void HAL_MVD_RegWriteByteMask(MS_U32 u32Reg, MS_U8 u8Val, MS_U8 u8Msk)
339 {
340 MS_U32 u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk));
342 }
343
HAL_MVD_RegWrite4Byte(MS_U32 u32Reg,MS_U32 u32Val)344 void HAL_MVD_RegWrite4Byte(MS_U32 u32Reg, MS_U32 u32Val)
345 {
346 if ( __builtin_constant_p( u32Reg ) && !((u32Reg) & 0x01) )
347 {
348 RIU[u32Reg] = (MS_U16)(u32Val);
349 RIU[(u32Reg) + 2] = (MS_U16)((u32Val) >> 16);
350 }
351 else
352 {
353 if (u32Reg & 0x01)
354 {
355 RIU8[(u32Reg << 1) - 1] = u32Val;
356 RIU[u32Reg + 1] = (u32Val >> 8);
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24);
358 }
359 else
360 {
361 RIU[u32Reg] = u32Val;
362 RIU[u32Reg + 2] = (u32Val >> 16);
363 }
364 }
365 }
366
367
HAL_MVD_MemRead4Byte(MS_U32 u32Address)368 MS_U32 HAL_MVD_MemRead4Byte(MS_U32 u32Address)
369 {
370 volatile MS_U32 u32Val;
371 MS_ASSERT(!(u32Address & 0x03UL));
372
373 HAL_MVD_CPU_Sync();
374 HAL_MVD_ReadMemory();
375
376 if (stMemCfg.bFWMiuSel == MIU_SEL_1)
377 {
378 u32Address += MIU1_BASEADDR;
379 }
380 u32Val = *(volatile MS_U32*) HAL_MVD_PA2NonCacheSeg(u32Address);
381 //printf("mvd rd 0x%lx = 0x%lx\n", u32Address, u32Val);
382 return u32Val;
383 }
384
HAL_MVD_MemRead2Byte(MS_U32 u32Address)385 MS_U16 HAL_MVD_MemRead2Byte(MS_U32 u32Address)
386 {
387 MS_U32 u32ReadAddr;
388 MS_U32 u32ReadValue;
389 MS_U16 u16Value;
390 MS_U8 u8Shift;
391 u32ReadAddr = (u32Address >> 2) << 2;
392 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
393 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
394
395 u16Value = (MS_U16)(u32ReadValue >> u8Shift);
396 if(u8Shift == 24)
397 {
398 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr+4);
399 u16Value = u16Value << 8 || (MS_U16)(u32ReadValue & 0xFF);
400 }
401 return u16Value;
402 }
403
HAL_MVD_MemReadByte(MS_U32 u32Address)404 MS_U8 HAL_MVD_MemReadByte(MS_U32 u32Address)
405 {
406 MS_U32 u32ReadAddr;
407 MS_U32 u32ReadValue;
408 MS_U8 u8Value;
409 MS_U8 u8Shift;
410 u32ReadAddr = (u32Address >> 2) << 2;
411 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
412 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
413 u8Value = (MS_U8)(u32ReadValue >> u8Shift);
414
415 return u8Value;
416 }
417
HAL_MVD_MemWrite4Byte(MS_U32 u32Address,MS_U32 u32Value)418 MS_BOOL HAL_MVD_MemWrite4Byte(MS_U32 u32Address, MS_U32 u32Value)
419 {
420 if (stMemCfg.bFWMiuSel == MIU_SEL_1)
421 {
422 u32Address += MIU1_BASEADDR;
423 }
424 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
425 //printf("mvd wr 0x%lx = 0x%lx\n", u32Address, *(volatile MS_U32*)MS_PA2KSEG1(u32Address));
426
427 HAL_MVD_CPU_Sync();
428 HAL_MVD_FlushMemory();
429
430 return TRUE;
431 }
432
HAL_MVD_MemWriteByte(MS_U32 u32Address,MS_U8 u8Value)433 MS_BOOL HAL_MVD_MemWriteByte(MS_U32 u32Address, MS_U8 u8Value)
434 {
435 MS_U32 u32ReadAddr;
436 MS_U32 u32ReadValue;
437 MS_U8 u8Shift;
438
439 u32ReadAddr = (u32Address >> 2) << 2;
440 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8);
441 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
442 u32ReadValue &= ~(0xFFUL << u8Shift);
443 u32ReadValue |= ((MS_U32)u8Value << u8Shift);
444 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
445 return TRUE;
446 }
447
HAL_MVD_MemWrite2Byte(MS_U32 u32Address,MS_U16 u16Value)448 MS_BOOL HAL_MVD_MemWrite2Byte(MS_U32 u32Address, MS_U16 u16Value)
449 {
450 MS_U32 u32ReadAddr;
451 MS_U32 u32ReadValue;
452 MS_U8 u8Shift;
453
454 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8) ;
455 if(u8Shift < 24)
456 {
457 u32ReadAddr = (u32Address >> 2) << 2;
458 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
459 u32ReadValue &= ~(0xFFFF << u8Shift);
460 u32ReadValue |= ((MS_U32)u16Value << u8Shift);
461 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
462 }
463 else
464 {
465 HAL_MVD_MemWriteByte(u32Address, (MS_U8)(u16Value));
466 HAL_MVD_MemWriteByte(u32Address+1, (MS_U8)(u16Value >> 8));
467 }
468 return TRUE;
469 }
470
471
HAL_MVD_SetReqMask(MS_BOOL bEnMask)472 void HAL_MVD_SetReqMask(MS_BOOL bEnMask)
473 {
474 HAL_VPU_MIU_RW_Protect(bEnMask);
475
476 if (MVDHW_ON_MIU1)
477 {
478 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W
479 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W
480 }
481 else
482 {
483 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W
484 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W
485 }
486 HAL_MVD_Delayms(1);
487
488 return;
489 }
490
491
492 //------------------------------------------------------------------------------
493 /// Initialize MVD
494 /// @return -result of resetting MVD hardware
495 //------------------------------------------------------------------------------
HAL_MVD_RstHW(void)496 MS_BOOL HAL_MVD_RstHW(void)
497 {
498 MS_U32 u32Time = 0;
499 #ifndef REDLION_LINUX_KERNEL_ENVI
500 OSAL_MVD_LockHwMutex();
501 #endif
502
503 HAL_MVD_SetReqMask(ENABLE);
504
505 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU
506 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset
507
508 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD
509 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset
510
511 u32Time = HAL_MVD_GetTime();
512 while ( ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == 0)
513 && ((HAL_MVD_GetTime() - u32Time) < 200) );
514
515 #if 0 //bring up
516 printf("====================>>>>MVD Ctrl status1.5a : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
517 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset
518 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_1);//release reset
519 MVD_DEBUGINFO(printf("MVD Ctrl status : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS)));
520 printf("====================>>>>MVD Ctrl status1.5b : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
521 #endif
522
523 HAL_MVD_SetReqMask(DISABLE);
524
525 #ifndef REDLION_LINUX_KERNEL_ENVI
526 OSAL_MVD_UnlockHwMutex();
527 #endif
528
529 return TRUE;
530 }
531
532
533 //------------------------------------------------------------------------------
534 /// Release CPU
535 /// @return -release CPU successfully or not
536 //------------------------------------------------------------------------------
HAL_MVD_ReleaseFW(void)537 MS_BOOL HAL_MVD_ReleaseFW(void)
538 {
539 HAL_VPU_SwRstRelse();
540 return TRUE;
541 }
542
543
544 //------------------------------------------------------------------------------
545 /// config VD_AEON CPU
546 /// @param u32StAddr \b IN: CPU binary code base address in DRAM.
547 /// @param u8dlend_en \b IN: endian
548 /// - 1, little endian
549 /// - 0, big endian
550 //------------------------------------------------------------------------------
HAL_MVD_CPUSetting(MS_U32 u32StAddr)551 static void HAL_MVD_CPUSetting(MS_U32 u32StAddr)
552 {
553 if (!HAL_VPU_CPUSetting(u32StAddr))
554 {
555 MVD_ERROR(printf("HAL_MVD_CPUSetting fail!\n"));
556 }
557 return;
558 }
559
560 //------------------------------------------------------------------------------
561 /// H.264 SW/CPU reset
562 /// @return TRUE or FALSE
563 /// - TRUE, Success
564 /// - FALSE, Failed
565 //------------------------------------------------------------------------------
_HAL_MVD_SwCPURst(void)566 static MS_BOOL _HAL_MVD_SwCPURst(void)
567 {
568 HAL_VPU_SwRst();
569 return TRUE;
570 }
571
HAL_MVD_PA2NonCacheSeg(MS_PHYADDR u32PhyAddr)572 MS_PHYADDR HAL_MVD_PA2NonCacheSeg(MS_PHYADDR u32PhyAddr)
573 {
574 #ifdef REDLION_LINUX_KERNEL_ENVI
575 return (MS_PHYADDR) MDrv_SYS_PA2NonCacheSeg((void *) u32PhyAddr);
576 #else
577 return MS_PA2KSEG1(u32PhyAddr);
578 #endif
579 }
580
HAL_MVD_GetTime(void)581 MS_U32 HAL_MVD_GetTime(void)
582 {
583 #ifdef REDLION_LINUX_KERNEL_ENVI
584 return MDrv_SYS_GetSyetemTime();
585 #else
586 return MsOS_GetSystemTime();
587 #endif
588 }
589
HAL_MVD_Delayms(MS_U32 u32msecs)590 void HAL_MVD_Delayms(MS_U32 u32msecs)
591 {
592 #ifdef REDLION_LINUX_KERNEL_ENVI
593 msleep(u32msecs);
594 #else
595 MsOS_DelayTask(u32msecs);
596 #endif
597 }
598
HAL_MVD_CPU_Sync(void)599 void HAL_MVD_CPU_Sync(void)
600 {
601 #ifdef REDLION_LINUX_KERNEL_ENVI
602 MDrv_SYS_CPU_Sync();
603 #else
604 MAsm_CPU_Sync();
605 #endif
606 }
607
HAL_MVD_FlushMemory(void)608 void HAL_MVD_FlushMemory(void)
609 {
610 #ifdef REDLION_LINUX_KERNEL_ENVI
611 MDrv_SYS_Flush_Memory();
612 #else
613 MsOS_FlushMemory();
614 #endif
615 }
616
HAL_MVD_ReadMemory(void)617 void HAL_MVD_ReadMemory(void)
618 {
619 #ifdef REDLION_LINUX_KERNEL_ENVI
620 MDrv_SYS_Read_Memory();
621 #else
622 MsOS_ReadMemory();
623 #endif
624 }
625
626 //------------------------------------------------------------------------------
627 /// Load MVD firmware code
628 /// @return -Load firmware success or not
629 //------------------------------------------------------------------------------
HAL_MVD_LoadCode(void)630 MS_BOOL HAL_MVD_LoadCode( void )
631 {
632 MS_BOOL bRst = TRUE;
633 MS_U32 u32fwAddr = 0;
634 MS_U32 u32fwPA = 0;
635 MS_U32 u32fwLen = 0;
636 MS_U8* pu8fw;
637 MS_U32 i;
638 MS_U32 u32Size;
639
640 //set CPU clk
641 VPU_Init_Params VPUInitParams = {E_VPU_CLOCK_216MHZ, FALSE, -1, VPU_DEFAULT_MUTEX_TIMEOUT, FALSE};
642
643 if (stMemCfg.bFWMiuSel == MIU_SEL_1)
644 {
645 VPUInitParams.bInMIU1 = TRUE;
646 }
647 else
648 {
649 VPUInitParams.bInMIU1 = FALSE;
650 }
651
652 HAL_VPU_Init(&VPUInitParams);
653
654 HAL_MVD_MemGetMap(E_MVD_MMAP_FW, &u32fwAddr, &u32fwLen);
655
656 // reset
657 if(!_HAL_MVD_SwCPURst())
658 {
659 (printf("AVCH264 reset failed...\n"));
660 return FALSE;
661 }
662
663 // load code
664 if (stMemCfg.bFWMiuSel == MIU_SEL_1)
665 {
666 u32fwPA = u32fwAddr + MIU1_BASEADDR;
667 }
668 else
669 {
670 u32fwPA = u32fwAddr;
671 }
672 MVD_DEBUGINFO(printf("HAL_MVD_LoadCode u32fwAddr=%lx, miuSel=%x, miu1Base=%lx\n",u32fwAddr,stMemCfg.bFWMiuSel,MIU1_BASEADDR));
673
674 pu8fw = (MS_U8 *) HAL_MVD_PA2NonCacheSeg(u32fwPA);
675 MVD_DEBUGINFO(printf("HAL_MVD_LoadCode u32fwPA = %lx==>%lx\n", u32fwPA, HAL_MVD_PA2NonCacheSeg(u32fwPA)));
676
677 #if MVD_ENABLE_BDMA_FW_FLASH_2_SDRAM
678 if (stMemCfg.u32FWBinSize != 0)
679 {
680 if (stMemCfg.eFWSrcType == E_MVD_FW_SOURCE_DRAM)
681 {
682 u32Size = stMemCfg.u32FWBinSize;
683 if ((u32Size>0) && (stMemCfg.u32FWSrcVAddr != NULL))
684 {
685 printf("%s(%d) size=0x%lx, va=0x%lx\n", __FUNCTION__, __LINE__, u32Size, stMemCfg.u32FWSrcVAddr);
686 for (i = 0; i < u32Size; i++)
687 {
688 pu8fw[i] = *(MS_U8*)(stMemCfg.u32FWSrcVAddr+i);
689 }
690 }
691 else
692 {
693 printf("%s err: binSize=0x%lx, SrcVA=0x%lx", __FUNCTION__,
694 stMemCfg.u32FWBinSize, stMemCfg.u32FWSrcVAddr);
695 }
696 }
697 else //assume that either from DRAM or FLASH
698 {
699 SPIDMA_Dev eDmaDst = E_SPIDMA_DEV_MIU1;
700 if (stMemCfg.bFWMiuSel == MIU_SEL_1)
701 {
702 eDmaDst = E_SPIDMA_DEV_MIU1;
703 }
704 else
705 {
706 eDmaDst = E_SPIDMA_DEV_MIU0;
707 }
708
709 printf("%s src=0x%lx dst=0x%lx size=0x%lx eDmaDst=0x%x\n", __FUNCTION__,
710 stMemCfg.u32FWBinAddr, u32fwPA, stMemCfg.u32FWBinSize, eDmaDst);
711
712 HAL_MVD_CPU_Sync();
713
714 if (!MDrv_SERFLASH_CopyHnd(stMemCfg.u32FWBinAddr, u32fwPA, stMemCfg.u32FWBinSize, eDmaDst, SPIDMA_OPCFG_DEF))
715 {
716 printf("%s MDrv_SERFLASH_CopyHnd fail!\n", __FUNCTION__);
717 return FALSE;
718 }
719 }
720 }
721 else
722 {
723 printf("%s err: the source size of FW is zero\n", __FUNCTION__);
724 return FALSE;
725 }
726 #else
727 {
728 if (stMemCfg.eFWSrcType == E_MVD_FW_SOURCE_DRAM)
729 {
730 u32Size = stMemCfg.u32FWBinSize;
731 if ((u32Size>0) && (stMemCfg.u32FWSrcVAddr != NULL))
732 {
733 printf("%s(%d) size=0x%lx, va=0x%lx\n", __FUNCTION__, __LINE__, u32Size, stMemCfg.u32FWSrcVAddr);
734 for (i = 0; i < u32Size; i++)
735 {
736 pu8fw[i] = *(MS_U8*)(stMemCfg.u32FWSrcVAddr+i);
737 }
738 }
739 else
740 {
741 printf("%s err: binSize=0x%lx, SrcVA=0x%lx", __FUNCTION__,
742 stMemCfg.u32FWBinSize, stMemCfg.u32FWSrcVAddr);
743 }
744 }
745 else
746 {
747 #ifdef MVD_CACHE_TO_UNCACHE_CONVERT
748 MS_U8* pu8fw_temp;
749 u32Size = sizeof(u8MVD_FW_Binary);
750 pu8fw_temp = (MS_U8 *)((MS_U32)u8MVD_FW_Binary | 0xA0000000);
751 printf("HAL_MVD_LoadCode : From 0x%lx to 0x%lx, size = %ld\n", (MS_U32)pu8fw_temp, (MS_U32)pu8fw, u32Size);
752 for (i=0; i<u32Size; i++)
753 {
754 pu8fw[i] = pu8fw_temp[i];//u8MVD_FW_Binary[i];
755 }
756 #else
757 u32Size=sizeof(u8MVD_FW_Binary);
758 printf("HAL_MVD_LoadCode : From 0x%lx to 0x%lx, size = %ld\n", (MS_U32)u8MVD_FW_Binary, (MS_U32)pu8fw, u32Size);
759 for (i=0; i<u32Size; i++)
760 {
761 pu8fw[i] = u8MVD_FW_Binary[i];
762 }
763 #endif
764 }
765 }
766 #endif
767 HAL_MVD_CPU_Sync();
768 HAL_MVD_FlushMemory();
769
770 // setting cpu base and endian
771 HAL_MVD_CPUSetting(u32fwPA);
772
773 return bRst;
774 }
775
776 #ifdef MVD_ENABLE_WRITEPROTECT
777 //------------------------------------------------------------------------------
778 /// Enable write limitation for MVD3 hardware.
779 /// Set start/end address of the memory boundary; Enable the write protection.
780 //------------------------------------------------------------------------------
HAL_MVD_EnableWriteProtect(void)781 void HAL_MVD_EnableWriteProtect(void)
782 {
783 return;
784 }
785 #endif
786
787
HAL_MVD_PowerCtrl(MS_BOOL bOn)788 void HAL_MVD_PowerCtrl(MS_BOOL bOn)
789 {
790 HAL_MVD_RegWriteByteMask(REG_CKG_MVD, CKG_MVD_216MHZ, CKG_MVD_MASK);
791 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_GATED);
792 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_INVERT);
793
794 HAL_MVD_RegWriteByteMask(REG_CKG_MVD2, CKG_MVD2_216MHZ, CKG_MVD2_MASK);
795 HAL_MVD_RegWriteBit(REG_CKG_MVD2, !bOn, CKG_MVD2_GATED);
796 HAL_MVD_RegWriteBit(REG_CKG_MVD2, !bOn, CKG_MVD2_INVERT);
797
798 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_GATED);
799 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_INVERT);
800
801 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_GATED);
802 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_INVERT);
803
804 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_GATED);
805 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_INVERT);
806
807 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_GATED);
808 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_INVERT);
809
810 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_GATED);
811 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_INVERT);
812
813 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_GATED);
814 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_INVERT);
815
816 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_GATED);
817 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_INVERT);
818
819 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_GATED);
820 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_INVERT);
821
822 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_GATED);
823 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_INVERT);
824
825 //Set MVD all clock sources equal to clk_miu_p 0: enable 1: disable
826 //Per Lawrence, mark this line:
827 // Sync mode is debug mode, so driver shouldn't write 1 to this register in normal case.
828 //HAL_MVD_RegWriteBit(REG_CKG_MVD_SYNC, !bOn, CKG_MVD_SYNC_GATED);
829
830 return;
831 }
832
833 #if 0
834 void HAL_MVD_Sleep(MS_U32 u32us)
835 {
836 MsOS_DelayTaskUs(u32us);
837 }
838 #endif
839
840 //------------------------------------------------------------------------------
841 /// Wait MVD command ready or timeout
842 /// @return -MVD command ready or timeout
843 //------------------------------------------------------------------------------
HAL_MVD_TimeOut(void)844 MS_BOOL HAL_MVD_TimeOut(void)
845 {
846 MS_U32 i;
847 MS_U32 u32StartTime = MsOS_GetSystemTime();
848
849 for ( i = 0; i < MVD_PollingTimes; i++ )
850 {
851 ///- wait until MVD command ready or timeout
852 if ( ( HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY ) == MVD_STATUS_READY )
853 {
854 return FALSE;
855 }
856
857 if ((TRUE == bStopped) || ((MsOS_GetSystemTime()-u32StartTime)>1300))
858 {
859 MVD_DEBUGINFO(printf("%s: bStopped(%x) or timeout(%ld)\n", __FUNCTION__, bStopped, MsOS_GetSystemTime()-u32StartTime));
860 return TRUE;
861 }
862
863 //HAL_MVD_Sleep(5);
864 }
865 MVD_DEBUGERROR( printf("MVD_TimeOut=%lx\n", i) );
866 for (i=0; i<30; i++)
867 {
868 MVD_DEBUG_FWCMD(printf("pc=0x%lx\n", HAL_VPU_GetProgCnt()));
869 }
870 return TRUE;
871 }
872
873 //------------------------------------------------------------------------------
874 /// Set MVD firmware command
875 /// @param -u8cmd \b IN : MVD command
876 /// @param -pstCmdArg \b IN : pointer to command argument
877 //------------------------------------------------------------------------------
HAL_MVD_MVDCommand(MS_U8 u8cmd,MVD_CmdArg * pstCmdArg)878 MS_BOOL HAL_MVD_MVDCommand ( MS_U8 u8cmd, MVD_CmdArg *pstCmdArg )
879 {
880 OSAL_MVD_LockHwMutex();
881 if ( HAL_MVD_TimeOut() == TRUE )
882 {
883 OSAL_MVD_UnlockHwMutex();
884 return FALSE;
885 }
886
887 if ((pstCmdArg->Arg4!=0)||(pstCmdArg->Arg5!=0))
888 {
889 MVD_DEBUGERROR(printf("Warning: cmd%x; arg4=%x, arg5=%x\n", u8cmd,
890 pstCmdArg->Arg4, pstCmdArg->Arg5));
891 }
892
893 HAL_MVD_RegWriteByte(MVD_ARG0, pstCmdArg->Arg0);
894 HAL_MVD_RegWriteByte(MVD_ARG1, pstCmdArg->Arg1);
895 HAL_MVD_RegWriteByte(MVD_ARG2, pstCmdArg->Arg2);
896 HAL_MVD_RegWriteByte(MVD_ARG3, pstCmdArg->Arg3);
897 HAL_MVD_RegWriteByte(MVD_ARG4, pstCmdArg->Arg4);
898 HAL_MVD_RegWriteByte(MVD_ARG5, pstCmdArg->Arg5);
899 HAL_MVD_RegWriteByte(MVD_COMMAND, u8cmd);
900 if ((CMD_GET_AFD != u8cmd) && (CMD_SLQ_GET_TBL_RPTR != u8cmd) &&
901 (CMD_SLQ_UPDATE_TBL_WPTR != u8cmd) && (CMD_GET_NEXTDISPFRM != u8cmd))
902 {
903 MVD_DEBUG_FWCMD(printf("[SysTime: %ld] MVD_CMD: %x; %x, %x, %x, %x, %x, %x\n", MsOS_GetSystemTime(), u8cmd, pstCmdArg->Arg0,
904 pstCmdArg->Arg1, pstCmdArg->Arg2, pstCmdArg->Arg3, pstCmdArg->Arg4, pstCmdArg->Arg5));
905 }
906
907 if ( HAL_MVD_TimeOut() == TRUE )
908 {
909 OSAL_MVD_UnlockHwMutex();
910 return FALSE;
911 }
912
913 pstCmdArg->Arg0 = HAL_MVD_RegReadByte(MVD_ARG0);
914 pstCmdArg->Arg1 = HAL_MVD_RegReadByte(MVD_ARG1);
915 pstCmdArg->Arg2 = HAL_MVD_RegReadByte(MVD_ARG2);
916 pstCmdArg->Arg3 = HAL_MVD_RegReadByte(MVD_ARG3);
917 pstCmdArg->Arg4 = HAL_MVD_RegReadByte(MVD_ARG4);
918 pstCmdArg->Arg5 = HAL_MVD_RegReadByte(MVD_ARG5);
919 OSAL_MVD_UnlockHwMutex();
920 return TRUE;
921 }
922
HAL_MVD_SetSyncClk(MS_BOOL bEnable)923 void HAL_MVD_SetSyncClk(MS_BOOL bEnable)
924 {
925 MS_ASSERT(0==bEnable);//Notice: Euclid & T3 have no sync_mode; Bit4 must be 0.
926 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE);
927
928 return;
929 }
930
HAL_MVD_InitHW(void)931 MS_BOOL HAL_MVD_InitHW(void)
932 {
933 //Set MVD Clock @ reg_CHIPTOP
934 HAL_MVD_PowerCtrl(ENABLE);
935
936 //Set MVD Clock aync
937 HAL_MVD_SetSyncClk(DISABLE);
938
939 //MVD reset
940 if(!HAL_MVD_RstHW())
941 {
942 MVD_DEBUGERROR(printf("MDrv_MVD_MVDInit:MVD4ResetHW failed\n"));
943 return FALSE;
944 }
945 else
946 {
947 MVD_DEBUGINFO(printf("MDrv_MVD_MVDInit:MVD4ResetHW success\n"));
948 }
949
950 #ifdef MVD_ENABLE_WRITEPROTECT
951 HAL_MVD_EnableWriteProtect();
952 #endif
953
954 //release FW
955 HAL_VPU_SwRstRelse();
956 MVD_DEBUGINFO(printf("MDrv_MVD_MVDInit:MVD4ReleaseFW success\n"));
957
958 return TRUE;
959 }
960
961
962 //------------------------------------------------------------------------------
963 /// Get MVD firmware version
964 /// @return -firmware version
965 //------------------------------------------------------------------------------
HAL_MVD_GetFWVer(void)966 MS_U32 HAL_MVD_GetFWVer(void)
967 {
968 MVD_CmdArg mvdcmd;
969
970 SETUP_CMDARG(mvdcmd);
971 if (HAL_MVD_MVDCommand( CMD_GET_FW_VERSION, &mvdcmd ) == FALSE)
972 {
973 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_GET_FW_VERSION ) );
974 return 0;
975 }
976 MVD_DEBUGINFO(printf("HAL_MVD_GetFWVer: 0x%lx \n", (COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0))));
977 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
978 }
979
980
981 //------------------------------------------------------------------------------
982 /// Get MVD firmware interface version
983 /// @return -firmware interface version
984 //------------------------------------------------------------------------------
HAL_MVD_GetFWIfVer(void)985 MS_U32 HAL_MVD_GetFWIfVer(void)
986 {
987 MVD_CmdArg mvdcmd;
988
989 SETUP_CMDARG(mvdcmd);
990 if (HAL_MVD_MVDCommand( CMD_INTERFACE_VERSION, &mvdcmd ) == FALSE)
991 {
992 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_INTERFACE_VERSION ) );
993 return 0;
994 }
995
996 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
997 }
998
999 //------------------------------------------------------------------------------
1000 /// Check MVD firmware status
1001 /// @return -firmware is ready or not
1002 //------------------------------------------------------------------------------
_MVD_Check_FW_Rdy(void)1003 static MS_BOOL _MVD_Check_FW_Rdy(void)
1004 {
1005 MS_U32 u32TimeOut = 2000;
1006
1007 //check firmware version consistent with header file
1008 while ((INTERFACE_VERSION != HAL_MVD_GetFWIfVer()) && (--u32TimeOut));
1009 if (u32TimeOut == 0)
1010 {
1011 MVD_ERROR(printf("MVD_FW_IF_Version=%lx inconsistent with header file(%x)!\n",
1012 HAL_MVD_GetFWIfVer(), INTERFACE_VERSION));
1013 return FALSE;
1014 }
1015
1016 if (FW_VERSION != HAL_MVD_GetFWVer())
1017 {
1018 MVD_DEBUGINFO(printf("Warning! FWBinVer(%lx) != FWHdrVer(%x)\n", HAL_MVD_GetFWVer(), FW_VERSION));
1019 }
1020 MVD_DEBUGINFO(printf("MVD version Interface = %x, FW = %x\n", INTERFACE_VERSION, FW_VERSION));
1021
1022 return TRUE;
1023 }
1024
HAL_MVD_InitFW(void)1025 MS_BOOL HAL_MVD_InitFW(void)
1026 {
1027 MS_U32 i=0;
1028 MS_U32 u32Addr = 0;
1029 MS_U32 u32Len = 0;
1030 MVD_CmdArg mvdcmd;
1031
1032 //check FW ready
1033 if ( !_MVD_Check_FW_Rdy())
1034 {
1035 MS_ASSERT(0);
1036 return FALSE;
1037 }
1038
1039 //set code offset to MVD
1040 HAL_MVD_MemGetMap(E_MVD_MMAP_FW, &u32Addr, &u32Len);
1041 SETUP_CMDARG(mvdcmd);
1042 i = u32Addr >> 3;
1043 mvdcmd.Arg0 = L_WORD(i);
1044 mvdcmd.Arg1 = H_WORD(i);
1045 mvdcmd.Arg2 = L_DWORD(i);
1046 mvdcmd.Arg3 = H_DWORD(i);
1047 if (HAL_MVD_MVDCommand( CMD_CODE_OFFSET, &mvdcmd ) == FALSE)
1048 {
1049 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_CODE_OFFSET ) );
1050 return FALSE;
1051 }
1052
1053 return TRUE;
1054 }
1055
1056 //utility: get Program Counter
HAL_MVD_CPUGetPC(void)1057 void HAL_MVD_CPUGetPC(void)
1058 {
1059 MS_U32 u32pc = 0;
1060 u32pc = HAL_VPU_GetProgCnt();
1061 printf("VD_MHEG5 32-bit PC = 0x%lx\n", u32pc);
1062
1063 return;
1064 }
1065
1066 #define _MVD_CMDRDY ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == MVD_STATUS_READY)
1067 //------------------------------------------------------------------------------
1068 /// Check if MVD command is ready
1069 /// @return TRUE or FALSE
1070 /// - TRUE, Success to process the command
1071 /// - FALSE, Failed due to timeout
1072 //------------------------------------------------------------------------------
HAL_MVD_GetCmdRdy(void)1073 MS_BOOL HAL_MVD_GetCmdRdy(void)
1074 {
1075 MS_U32 timeoutTick = 2000;
1076
1077 while ((!_MVD_CMDRDY) && ((timeoutTick--)!=0));
1078
1079 if (0 == timeoutTick)
1080 return FALSE;
1081 else
1082 return TRUE;
1083 }
1084
HAL_MVD_CheckIdle(void)1085 MS_BOOL HAL_MVD_CheckIdle(void)
1086 {
1087 MS_BOOL bIsIdle = FALSE;
1088 MVD_CmdArg mvdcmd;
1089
1090 //issue CheckIdle command
1091 SETUP_CMDARG(mvdcmd);
1092 if (HAL_MVD_MVDCommand( CMD_MVD_IDLE, &mvdcmd ) == FALSE)
1093 {
1094 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_MVD_IDLE ) );
1095 return FALSE;
1096 }
1097
1098 bIsIdle = (mvdcmd.Arg0 == 1);
1099 if (HAL_MVD_GetCmdRdy())
1100 {
1101 return bIsIdle;
1102 }
1103 else
1104 {
1105 return FALSE;
1106 }
1107 }
1108
1109
_MVD_SoftRstHW(void)1110 static MS_BOOL _MVD_SoftRstHW(void)
1111 {
1112 #if 0
1113 MVD_CmdArg mvdcmd;
1114
1115 //ENG reset
1116 SETUP_CMDARG(mvdcmd);
1117 if (HAL_MVD_MVDCommand( CMD_SW_RESET, &mvdcmd ) == FALSE)
1118 {
1119 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SW_RESET ) );
1120 return FALSE;
1121 }
1122
1123 //SLQ reset
1124 SETUP_CMDARG(mvdcmd);
1125 if (HAL_MVD_MVDCommand( CMD_VC1_HW_SLQ_RESET, &mvdcmd ) == FALSE)
1126 {
1127 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_VC1_HW_SLQ_RESET ) );
1128 return FALSE;
1129 }
1130
1131 return TRUE;
1132 #else
1133 return FALSE;
1134 #endif
1135 }
1136
1137 //------------------------------------------------------------------------------
1138 /// Soft-reset MVD
1139 /// Ref AP note p.12 HK2MVD Reset Flow
1140 /// @return TRUE or FALSE
1141 /// - TRUE, Success to soft-reset MVD
1142 /// - FALSE, Failed. Need init MVD again.
1143 //------------------------------------------------------------------------------
HAL_MVD_SoftRstHW(void)1144 MS_BOOL HAL_MVD_SoftRstHW(void)
1145 {
1146 MS_U32 timetick = 2000;
1147
1148 if (HAL_MVD_GetCmdRdy())
1149 {
1150 //idle check
1151 while ((!HAL_MVD_CheckIdle()) && ((timetick--)!=0));
1152
1153 //either MVD is idle or timeout, do ENG/SLQ reset
1154 return _MVD_SoftRstHW(); //Reset HW engine
1155 }
1156 else
1157 {
1158 return FALSE; //here means "CPU hanging"
1159 }
1160 }
1161
1162 //------------------------------------------------------------------------------
1163 /// Clean the IRQ bit (in interrupt handler should call this function while the
1164 /// interrupt has been triggered.
1165 /// @param none
1166 /// @return none
1167 /// @internal
1168 //------------------------------------------------------------------------------
HAL_MVD_ClearIRQ(void)1169 void HAL_MVD_ClearIRQ(void)
1170 {
1171 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT);
1172
1173 return;
1174 }
1175
1176 //------------------------------------------------------------------------------
1177 /// Set display speed.
1178 ///FW use (# of B frames) / (# of decode frames) < Ratio this formula to adjustment.
1179 ///Once if the ratio is 1, that means, whenever (#Bframes / #decoded) < 1, then
1180 ///FW would drop the B frame.
1181 ///In other words, once AP need to back to normal mode, AP have to set the arg0 to 0.
1182 //------------------------------------------------------------------------------
HAL_MVD_SetSpeed(MVD_SpeedType eSpeedType,MS_U8 u8Multiple)1183 MS_BOOL HAL_MVD_SetSpeed(MVD_SpeedType eSpeedType, MS_U8 u8Multiple)
1184 {
1185 MS_BOOL bRst = TRUE;
1186 MVD_CmdArg mvdcmd;
1187
1188 SETUP_CMDARG(mvdcmd);
1189
1190 if (E_MVD_SPEED_FAST == eSpeedType)
1191 mvdcmd.Arg0 = 1; //fast forward
1192 else if (E_MVD_SPEED_SLOW == eSpeedType)
1193 mvdcmd.Arg0 = 2; //slow motion
1194 else
1195 mvdcmd.Arg0 = 0; //normal speed
1196
1197 if (u8Multiple == 1)
1198 {
1199 mvdcmd.Arg0 = 0;
1200 //The only way to be NORMAL speed.
1201 }
1202
1203 mvdcmd.Arg1 = u8Multiple;
1204 if (HAL_MVD_MVDCommand( CMD_DISP_SPEED_CTRL, &mvdcmd ) == FALSE)
1205 {
1206 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DISP_SPEED_CTRL ) );
1207 bRst = FALSE;
1208 }
1209
1210 return bRst;
1211 }
1212
1213
HAL_MVD_EnableForcePlay(void)1214 MS_BOOL HAL_MVD_EnableForcePlay(void)
1215 {
1216 MVD_CmdArg mvdcmd;
1217
1218 SETUP_CMDARG(mvdcmd);
1219 if (HAL_MVD_MVDCommand(CMD_PLAY_NO_SQE, &mvdcmd ) == FALSE)
1220 {
1221 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_PLAY_NO_SQE) );
1222 return FALSE;
1223 }
1224
1225 if (HAL_MVD_Resume() == FALSE)
1226 {
1227 MVD_DEBUGERROR( printf( "Command: HAL_MVD_Resume fail!!\r\n" ) );
1228 return FALSE;
1229 }
1230 return TRUE;
1231 }
1232
1233
1234 //------------------------------------------------------------------------------
1235 /// Set frame buffer address to MVD
1236 /// @param -u32addr \b IN : start address
1237 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffAddr(MS_U32 u32addr,MS_U8 u8fbMode)1238 void HAL_MVD_SetFrameBuffAddr(MS_U32 u32addr, MS_U8 u8fbMode)
1239 {
1240 MVD_CmdArg mvdcmd;
1241 MS_ASSERT((u32addr%8)==0);
1242 u32addr >>= 3;
1243
1244 SETUP_CMDARG(mvdcmd);
1245 mvdcmd.Arg0 = L_WORD(u32addr);
1246 mvdcmd.Arg1 = H_WORD(u32addr);
1247 mvdcmd.Arg2 = L_DWORD(u32addr);
1248
1249 //Frame Buffer Mode Setting
1250 mvdcmd.Arg3 = u8fbMode | ((u32addr>>24)&0x0f);
1251 MVD_DEBUGINFO(printf("FramebufferAdd 0x%lx, FB Mode 0x%x, arg3=0x%x\n", u32addr, u8fbMode, mvdcmd.Arg3));
1252
1253 if (HAL_MVD_MVDCommand( CMD_FB_BASE, &mvdcmd ) == FALSE)
1254 {
1255 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_FB_BASE ) );
1256 return;
1257 }
1258
1259 return;
1260 }
1261
1262 //------------------------------------------------------------------------------
1263 /// Set header buffer address to MVD
1264 /// @param -u32addr \b IN : start address
1265 //------------------------------------------------------------------------------
HAL_MVD_SetHeaderBufferAddr(MS_U32 u32addr)1266 void HAL_MVD_SetHeaderBufferAddr ( MS_U32 u32addr )
1267 {
1268 MVD_CmdArg mvdcmd;
1269
1270 MS_ASSERT((u32addr%8)==0);
1271 u32addr >>= 3;
1272
1273 SET_CMDARG(mvdcmd, u32addr);
1274 if (HAL_MVD_MVDCommand( CMD_HEADER_INFO_BUF, &mvdcmd ) == FALSE)
1275 {
1276 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_HEADER_INFO_BUF ) );
1277 }
1278 return;
1279 }
1280
1281 //------------------------------------------------------------------------------
1282 /// Set vol info buffer address to MVD
1283 /// @param -u32addr \b IN : start address
1284 //------------------------------------------------------------------------------
HAL_MVD_SetVolInfoBufferAddr(MS_U32 u32addr)1285 void HAL_MVD_SetVolInfoBufferAddr ( MS_U32 u32addr )
1286 {
1287 MVD_CmdArg mvdcmd;
1288 MS_ASSERT((u32addr%8)==0);
1289 u32addr >>= 3;
1290
1291 SET_CMDARG(mvdcmd, u32addr);
1292 if (HAL_MVD_MVDCommand( CMD_VOL_INFO_BUF, &mvdcmd ) == FALSE)
1293 {
1294 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_VOL_INFO_BUF ) );
1295 }
1296 return;
1297 }
1298
1299 //------------------------------------------------------------------------------
1300 /// Set frame info buffer address to MVD
1301 /// @param -u32addr \b IN : start address
1302 //------------------------------------------------------------------------------
HAL_MVD_SetFrameInfoBufferAddr(MS_U32 u32addr)1303 void HAL_MVD_SetFrameInfoBufferAddr ( MS_U32 u32addr )
1304 {
1305 MVD_CmdArg mvdcmd;
1306 MS_ASSERT((u32addr%8)==0);
1307 u32addr >>= 3;
1308
1309 SET_CMDARG(mvdcmd, u32addr);
1310 if (HAL_MVD_MVDCommand( CMD_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
1311 {
1312 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_FRAME_INFO_BUF ) );
1313 }
1314 return;
1315 }
1316
1317 //------------------------------------------------------------------------------
1318 /// Set IAP buffer address to MVD
1319 /// @param -u32addr \b IN : start address
1320 //------------------------------------------------------------------------------
HAL_MVD_SetIAPBufferAddr(MS_U32 u32addr)1321 void HAL_MVD_SetIAPBufferAddr ( MS_U32 u32addr )
1322 {
1323 MVD_CmdArg mvdcmd;
1324 MS_ASSERT((u32addr%8192)==0);
1325 u32addr >>= 13;
1326
1327 SET_CMDARG(mvdcmd, u32addr);
1328 if (HAL_MVD_MVDCommand( CMD_IAP_BUF_START, &mvdcmd ) == FALSE)
1329 {
1330 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_IAP_BUF_START ) );
1331 }
1332 return;
1333 }
1334
1335 //------------------------------------------------------------------------------
1336 /// Set Data Partition buffer address to MVD
1337 /// @param -u32addr \b IN : start address
1338 //------------------------------------------------------------------------------
HAL_MVD_SetDPBufferAddr(MS_U32 u32addr)1339 void HAL_MVD_SetDPBufferAddr ( MS_U32 u32addr )
1340 {
1341 MVD_CmdArg mvdcmd;
1342 MS_ASSERT((u32addr%8)==0);
1343 u32addr >>= 3;
1344
1345 SET_CMDARG(mvdcmd, u32addr);
1346 if (HAL_MVD_MVDCommand( CMD_DP_BUF_START, &mvdcmd ) == FALSE)
1347 {
1348 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DP_BUF_START ) );
1349 }
1350 return;
1351 }
1352
1353 //------------------------------------------------------------------------------
1354 /// Set Motion Vector buffer address to MVD
1355 /// @param -u32addr \b IN : start address
1356 //------------------------------------------------------------------------------
HAL_MVD_SetMVBufferAddr(MS_U32 u32addr)1357 void HAL_MVD_SetMVBufferAddr ( MS_U32 u32addr )
1358 {
1359 MVD_CmdArg mvdcmd;
1360 MS_ASSERT((u32addr%2048)==0);
1361 u32addr >>= 3;
1362
1363 SET_CMDARG(mvdcmd, u32addr);
1364 if (HAL_MVD_MVDCommand( CMD_MV_BUF_START, &mvdcmd ) == FALSE)
1365 {
1366 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_MV_BUF_START ) );
1367 }
1368 return;
1369 }
1370
_MVD_SetUserDataBufStart(MS_U32 u32addr,MS_U8 u8arg3)1371 static void _MVD_SetUserDataBufStart(MS_U32 u32addr, MS_U8 u8arg3)
1372 {
1373 MVD_CmdArg mvdcmd;
1374
1375 MS_ASSERT((u32addr%8)==0);
1376 u32addr >>= 3;
1377 MVD_DEBUGINFO(printf("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, u32addr, u8arg3));
1378
1379 SETUP_CMDARG(mvdcmd);
1380 mvdcmd.Arg0 = L_WORD(u32addr);
1381 mvdcmd.Arg1 = H_WORD(u32addr);
1382 mvdcmd.Arg2 = L_DWORD(u32addr);
1383 mvdcmd.Arg4 = H_DWORD(u32addr);
1384 mvdcmd.Arg3 = u8arg3;
1385
1386 if (HAL_MVD_MVDCommand( CMD_USER_BUF_START, &mvdcmd ) == FALSE)
1387 {
1388 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_START ) );
1389 return;
1390 }
1391 return;
1392 }
1393
_MVD_SetUserDataBufSize(MS_U32 u32size,MS_U8 u8arg3)1394 static void _MVD_SetUserDataBufSize(MS_U32 u32size, MS_U8 u8arg3)
1395 {
1396 MVD_CmdArg mvdcmd;
1397
1398 MS_ASSERT((u32size%8)==0);
1399 u32size >>= 3;
1400 MVD_DEBUGINFO(printf("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, u32size, u8arg3));
1401
1402 SETUP_CMDARG(mvdcmd);
1403 mvdcmd.Arg0 = L_WORD(u32size);
1404 mvdcmd.Arg1 = H_WORD(u32size);
1405 mvdcmd.Arg2 = L_DWORD(u32size);
1406 mvdcmd.Arg4 = H_DWORD(u32size);
1407 mvdcmd.Arg3 = u8arg3;
1408
1409 if (HAL_MVD_MVDCommand( CMD_USER_BUF_SIZE, &mvdcmd ) == FALSE)
1410 {
1411 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_SIZE ) );
1412 return;
1413 }
1414 return;
1415 }
1416
1417 //------------------------------------------------------------------------------
1418 /// Set user data buffer address to MVD
1419 /// @param -u32addr \b IN : start address
1420 //------------------------------------------------------------------------------
HAL_MVD_SetUserDataBuf(MS_U32 u32addr,MS_U32 u32size)1421 void HAL_MVD_SetUserDataBuf(MS_U32 u32addr, MS_U32 u32size)
1422 {
1423 MS_U8 u8ccType = 0;
1424
1425 MS_ASSERT((u32addr%8)==0);
1426 MS_ASSERT((u32size%8)==0);
1427 #ifdef REDLION_LINUX_KERNEL_ENVI
1428 u8ccType = 2;
1429 #elif defined(MVD_SUPPORT_X4_CC)
1430 u8ccType = 4; //display order
1431 #else
1432 u8ccType = 2;// 2 for testing 0;
1433 #endif
1434
1435 #if defined(MVD_SUPPORT_X4_CC)
1436 //set decoding buffer address
1437 _MVD_SetUserDataBufStart(u32addr+u32size, 3);
1438 #endif
1439
1440 //set CC output buffer address
1441 _MVD_SetUserDataBufStart(u32addr, u8ccType);
1442
1443 #if defined(MVD_SUPPORT_X4_CC)
1444 //set decoding buffer size
1445 _MVD_SetUserDataBufSize(u32size, 3);
1446 #endif
1447
1448 //set CC output buffer size
1449 _MVD_SetUserDataBufSize(u32size, u8ccType);
1450
1451 return;
1452 }
1453
HAL_MVD_SetSLQTblBufStartEnd(MS_U32 u32start,MS_U32 u32end)1454 void HAL_MVD_SetSLQTblBufStartEnd(MS_U32 u32start, MS_U32 u32end)
1455 {
1456 MVD_CmdArg mvdcmd;
1457 MS_U32 u32val = u32end>>3;
1458
1459 SET_CMDARG(mvdcmd, u32val);
1460 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_END, &mvdcmd ) == FALSE)
1461 {
1462 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_END ) );
1463 return;
1464 }
1465
1466 u32val = (u32start)>>3;
1467 SET_CMDARG(mvdcmd, u32val);
1468 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_START, &mvdcmd ) == FALSE)
1469 {
1470 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_START ) );
1471 return;
1472 }
1473
1474 MVD_DEBUGINFO(printf("%s st=0x%lx end=0x%lx OK!!!\n", __FUNCTION__, u32start, u32end));
1475 return;
1476 }
1477
1478 //------------------------------------------------------------------------------
1479 /// Issue StepDisplay command.
1480 /// @return -TRUE for success; FALSE for failure.
1481 //------------------------------------------------------------------------------
HAL_MVD_StepDisp(void)1482 MS_BOOL HAL_MVD_StepDisp(void)
1483 {
1484 MVD_CmdArg mvdcmd;
1485
1486 SETUP_CMDARG(mvdcmd);
1487 if (HAL_MVD_MVDCommand( CMD_STEP_DISP_DECODE_ONE, &mvdcmd ) == FALSE)
1488 {
1489 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_STEP_DISP_DECODE_ONE ) );
1490 return FALSE;
1491 }
1492 if (HAL_MVD_Resume() == FALSE)
1493 {
1494 MVD_DEBUGERROR( printf( "Command: HAL_MVD_Resume fail!!\r\n" ) );
1495 return FALSE;
1496 }
1497
1498 return TRUE;
1499 }
1500
1501
1502 //------------------------------------------------------------------------------
1503 /// Enable/Disable firmware to show the last frame.
1504 /// @return -TRUE for success; FALSE for failure.
1505 //------------------------------------------------------------------------------
HAL_MVD_EnableLastFrameShow(MS_BOOL bEnable)1506 MS_BOOL HAL_MVD_EnableLastFrameShow(MS_BOOL bEnable)
1507 {
1508 MVD_CmdArg mvdcmd;
1509
1510 SETUP_CMDARG(mvdcmd);
1511 mvdcmd.Arg0 = bEnable;
1512 if (HAL_MVD_MVDCommand(CMD_ENABLE_LAST_FRAME_SHOW, &mvdcmd ) == FALSE)
1513 {
1514 MVD_DEBUGERROR(printf("Command: 0x%x fail!!\r\n", CMD_ENABLE_LAST_FRAME_SHOW));
1515 return FALSE;
1516 }
1517 return TRUE;
1518 }
1519
1520
HAL_MVD_SlqTblRst(void)1521 MS_BOOL HAL_MVD_SlqTblRst(void)
1522 {
1523 MVD_CmdArg mvdcmd;
1524
1525 SETUP_CMDARG(mvdcmd);
1526 if (HAL_MVD_MVDCommand( CMD_VC1_HW_SLQ_RESET, &mvdcmd ) == FALSE)
1527 {
1528 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_VC1_HW_SLQ_RESET ) );
1529 return FALSE;
1530 }
1531 bEnSlqTblHkCtrl = FALSE;
1532 return TRUE;
1533 }
1534
HAL_MVD_SeekToPTS(MS_U32 u32Pts)1535 MS_BOOL HAL_MVD_SeekToPTS(MS_U32 u32Pts)
1536 {
1537 MVD_CmdArg mvdcmd;
1538
1539 SETUP_CMDARG(mvdcmd);
1540 mvdcmd.Arg0 = L_WORD(u32Pts);
1541 mvdcmd.Arg1 = H_WORD(u32Pts);
1542 mvdcmd.Arg2 = L_DWORD(u32Pts);
1543 mvdcmd.Arg3 = H_DWORD(u32Pts);
1544 if (HAL_MVD_MVDCommand(CMD_STEP_TO_PTS, &mvdcmd ) == FALSE)
1545 {
1546 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_STEP_TO_PTS) );
1547 return FALSE;
1548 }
1549
1550 if (HAL_MVD_Resume() == FALSE)
1551 {
1552 MVD_DEBUGERROR( printf( "Command: HAL_MVD_Resume fail!!\r\n" ) );
1553 return FALSE;
1554 }
1555 return TRUE;
1556 }
1557
HAL_MVD_SkipToPTS(MS_U32 u32Pts)1558 MS_BOOL HAL_MVD_SkipToPTS(MS_U32 u32Pts)
1559 {
1560 MVD_CmdArg mvdcmd;
1561
1562 SETUP_CMDARG(mvdcmd);
1563 mvdcmd.Arg0 = L_WORD(u32Pts);
1564 mvdcmd.Arg1 = H_WORD(u32Pts);
1565 mvdcmd.Arg2 = L_DWORD(u32Pts);
1566 mvdcmd.Arg3 = H_DWORD(u32Pts);
1567 if (HAL_MVD_MVDCommand(CMD_SKIP_TO_PTS, &mvdcmd ) == FALSE)
1568 {
1569 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SKIP_TO_PTS) );
1570 return FALSE;
1571 }
1572
1573 if (HAL_MVD_Resume() == FALSE)
1574 {
1575 MVD_DEBUGERROR( printf( "Command: HAL_MVD_Resume fail!!\r\n" ) );
1576 return FALSE;
1577 }
1578 return TRUE;
1579 }
1580
1581 //wait for bring up to merge
1582 #if 0
1583 MS_BOOL HAL_MVD_SetFileModeAVSync(MVD_TIMESTAMP_TYPE eSyncMode)
1584 {
1585 MVD_CmdArg mvdcmd;
1586
1587 SETUP_CMDARG(mvdcmd);
1588
1589 switch (eSyncMode)
1590 {
1591 case E_MVD_TIMESTAMP_PTS:
1592 case E_MVD_TIMESTAMP_PTS_RVU:
1593 mvdcmd.Arg0 = FILE_PTS_MODE;
1594 break;
1595
1596 case E_MVD_TIMESTAMP_DTS:
1597 case E_MVD_TIMESTAMP_DTS_RVU:
1598 mvdcmd.Arg0 = FILE_DTS_MODE;
1599 break;
1600
1601 case E_MVD_TIMESTAMP_FREERUN:
1602 default:
1603 mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
1604 break;
1605 }
1606 if (HAL_MVD_MVDCommand( CMD_ENABLE_FILE_SYNC, &mvdcmd ) == FALSE)
1607 {
1608 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_ENABLE_FILE_SYNC ) );
1609 return FALSE;
1610 }
1611 /////////////////
1612 SETUP_CMDARG(mvdcmd);
1613 switch (eSyncMode) //for set RVU mode
1614 {
1615 case E_MVD_TIMESTAMP_PTS_RVU:
1616 mvdcmd.Arg0 = FILE_PTS_MODE;
1617 break;
1618 case E_MVD_TIMESTAMP_DTS_RVU:
1619 mvdcmd.Arg0 = FILE_DTS_MODE;
1620 break;
1621 default:
1622 mvdcmd.Arg0 = 0xFF;
1623 break;
1624 }
1625
1626 if (HAL_MVD_MVDCommand( CMD_RVU_EN, &mvdcmd ) == FALSE)
1627 {
1628 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_RVU_EN ) );
1629 return FALSE;
1630 }
1631 return TRUE;
1632 }
1633 #endif
1634
1635
HAL_MVD_SetFileModeAVSync(MVD_TIMESTAMP_TYPE eSyncMode)1636 MS_BOOL HAL_MVD_SetFileModeAVSync(MVD_TIMESTAMP_TYPE eSyncMode)
1637 {
1638 MVD_CmdArg mvdcmd;
1639
1640 SETUP_CMDARG(mvdcmd);
1641 switch (eSyncMode)
1642 {
1643 case E_MVD_TIMESTAMP_PTS:
1644 mvdcmd.Arg0 = FILE_PTS_MODE;
1645 break;
1646
1647 case E_MVD_TIMESTAMP_DTS:
1648 mvdcmd.Arg0 = FILE_DTS_MODE;
1649 break;
1650
1651 case E_MVD_TIMESTAMP_FREERUN:
1652 default:
1653 mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
1654 break;
1655 }
1656 if (HAL_MVD_MVDCommand( CMD_ENABLE_FILE_SYNC, &mvdcmd ) == FALSE)
1657 {
1658 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_ENABLE_FILE_SYNC ) );
1659 return FALSE;
1660 }
1661 return TRUE;
1662 }
1663
1664 //------------------------------------------------------------------------------
1665 /// Set the start address of PTS table used for SLQ table link mode.
1666 /// @return -TRUE for success; FALSE for failure.
1667 //------------------------------------------------------------------------------
HAL_MVD_SetPtsTblAddr(MS_U32 u32addr)1668 MS_BOOL HAL_MVD_SetPtsTblAddr(MS_U32 u32addr)
1669 {
1670 MVD_CmdArg mvdcmd;
1671 MS_ASSERT((u32addr%8)==0);
1672 u32addr >>= 3;
1673
1674 SETUP_CMDARG(mvdcmd);
1675 mvdcmd.Arg0 = L_WORD(u32addr);
1676 mvdcmd.Arg1 = H_WORD(u32addr);
1677 mvdcmd.Arg2 = L_DWORD(u32addr);
1678 mvdcmd.Arg3 = H_DWORD(u32addr);
1679 if (HAL_MVD_MVDCommand( CMD_PTS_TBL_START, &mvdcmd ) == FALSE)
1680 {
1681 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_PTS_TBL_START ) );
1682 return FALSE;
1683 }
1684 return TRUE;
1685 }
1686
1687 //------------------------------------------------------------------------------
1688 /// Issue Pause command.
1689 /// @return -TRUE for success; FALSE for failure
1690 //------------------------------------------------------------------------------
HAL_MVD_Resume(void)1691 MS_BOOL HAL_MVD_Resume(void)
1692 {
1693 MS_BOOL bRst = TRUE;
1694 MVD_CmdArg mvdcmd;
1695
1696 SETUP_CMDARG(mvdcmd);
1697 mvdcmd.Arg0 = DISPLAY_PAUSE_OFF;
1698 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
1699 {
1700 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DISPLAY_PAUSE) );
1701 bRst = FALSE;
1702 }
1703 return bRst;
1704 }
1705
1706 //------------------------------------------------------------------------------
1707 /// Set base address for ScalerInfo structure to f/w
1708 /// @param -u32addr \b IN : start address (units in byte)
1709 //------------------------------------------------------------------------------
HAL_MVD_SetScalerInfoAddr(MS_U32 u32addr)1710 MS_BOOL HAL_MVD_SetScalerInfoAddr(MS_U32 u32addr)
1711 {
1712 MVD_CmdArg mvdcmd;
1713
1714 MS_ASSERT((u32addr%8)==0);
1715 u32addr >>= 3;
1716
1717 SETUP_CMDARG(mvdcmd);
1718 mvdcmd.Arg0 = L_WORD(u32addr);
1719 mvdcmd.Arg1 = H_WORD(u32addr);
1720 mvdcmd.Arg2 = L_DWORD(u32addr);
1721 mvdcmd.Arg3 = H_DWORD(u32addr);
1722 if (HAL_MVD_MVDCommand(CMD_SCALER_INFO_BASE, &mvdcmd) == FALSE)
1723 {
1724 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SCALER_INFO_BASE ) );
1725 return FALSE;
1726 }
1727 return TRUE;
1728 }
1729
1730 //------------------------------------------------------------------------------
1731 /// Set the dynamic scale base address
1732 /// @return -TRUE for success; FALSE for failure.
1733 //------------------------------------------------------------------------------
HAL_MVD_SetDynamicScaleAddr(MS_U32 u32addr)1734 MS_BOOL HAL_MVD_SetDynamicScaleAddr(MS_U32 u32addr)
1735 {
1736 MVD_CmdArg mvdcmd;
1737 MS_ASSERT((u32addr%8)==0);
1738 u32addr >>= 3;
1739
1740 SETUP_CMDARG(mvdcmd);
1741 mvdcmd.Arg0 = L_WORD(u32addr);
1742 mvdcmd.Arg1 = H_WORD(u32addr);
1743 mvdcmd.Arg2 = L_DWORD(u32addr);
1744 mvdcmd.Arg3 = H_DWORD(u32addr);
1745 if (HAL_MVD_MVDCommand(CMD_DYNAMIC_SCALE_BASE, &mvdcmd ) == FALSE)
1746 {
1747 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DYNAMIC_SCALE_BASE ) );
1748 return FALSE;
1749 }
1750 return TRUE;
1751 }
1752
1753 //------------------------------------------------------------------------------
1754 /// Set virtual box width/height to F/W.
1755 /// F/W will use the same w/h as scaler to calculate scaling factor.
1756 /// @return -TRUE for success; FALSE for failure.
1757 //------------------------------------------------------------------------------
HAL_MVD_SetVirtualBox(MS_U16 u16Width,MS_U16 u16Height)1758 MS_BOOL HAL_MVD_SetVirtualBox(MS_U16 u16Width, MS_U16 u16Height)
1759 {
1760 MVD_CmdArg mvdcmd;
1761
1762 SETUP_CMDARG(mvdcmd);
1763 mvdcmd.Arg0 = L_WORD(u16Width);
1764 mvdcmd.Arg1 = H_WORD(u16Width);
1765 mvdcmd.Arg2 = L_WORD(u16Height);
1766 mvdcmd.Arg3 = H_WORD(u16Height);
1767 if (HAL_MVD_MVDCommand( CMD_DS_VIRTUAL_BOX, &mvdcmd ) == FALSE) //CMD_DS_VIRTUAL_BOX
1768 {
1769 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DS_VIRTUAL_BOX ) );
1770 return FALSE;
1771 }
1772 return TRUE;
1773 }
1774
1775 //------------------------------------------------------------------------------
1776 /// Enable VC1 dynamic scaling
1777 /// @return -TRUE for success; FALSE for failure.
1778 //------------------------------------------------------------------------------
HAL_MVD_EnableDynamicScale(void)1779 MS_BOOL HAL_MVD_EnableDynamicScale(void)
1780 {
1781 MVD_CmdArg mvdcmd;
1782
1783 SETUP_CMDARG(mvdcmd);
1784 mvdcmd.Arg0 = TRUE;
1785 if (HAL_MVD_MVDCommand(CMD_ENABLE_DYNAMIC_SCALE, &mvdcmd ) == FALSE)
1786 {
1787 MVD_DEBUGERROR(printf("Command: 0x%x fail!!\r\n", CMD_ENABLE_DYNAMIC_SCALE));
1788 return FALSE;
1789 }
1790 return TRUE;
1791 }
1792
1793
1794 //------------------------------------------------------------------------------
1795 /// Set blue screen
1796 /// @return -TRUE for success; FALSE for failure.
1797 //------------------------------------------------------------------------------
HAL_MVD_SetBlueScreen(MS_BOOL bEn)1798 MS_BOOL HAL_MVD_SetBlueScreen(MS_BOOL bEn)
1799 {
1800 MVD_CmdArg mvdcmd;
1801
1802 SETUP_CMDARG(mvdcmd);
1803 mvdcmd.Arg0 = bEn; //1 -> show MVOP frame color. 0 -> normal case.
1804 if (HAL_MVD_MVDCommand(CMD_FORCE_BLUE_SCREEN, &mvdcmd ) == FALSE)
1805 {
1806 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_FORCE_BLUE_SCREEN ) );
1807 return FALSE;
1808 }
1809 return TRUE;
1810 }
1811
1812
HAL_MVD_SetFreezeDisp(MS_BOOL bEn)1813 MS_BOOL HAL_MVD_SetFreezeDisp(MS_BOOL bEn)
1814 {
1815 MVD_CmdArg mvdcmd;
1816
1817 SETUP_CMDARG(mvdcmd);
1818 mvdcmd.Arg0 = bEn;
1819 if (HAL_MVD_MVDCommand(CMD_FREEZE_DISP, &mvdcmd ) == FALSE)
1820 {
1821 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_FREEZE_DISP ) );
1822 return FALSE;
1823 }
1824 return TRUE;
1825 }
1826
1827
1828 //------------------------------------------------------------------------------
1829 /// Set base address for DecFrameInfo structure to f/w
1830 /// @param -u32addr \b IN : start address (units in byte)
1831 //------------------------------------------------------------------------------
HAL_MVD_SetDecFrmInfoAddr(MS_U32 u32addr)1832 void HAL_MVD_SetDecFrmInfoAddr(MS_U32 u32addr)
1833 {
1834 MVD_CmdArg mvdcmd;
1835
1836 MS_ASSERT((u32addr%8)==0);
1837 u32addr >>= 3;
1838
1839 SETUP_CMDARG(mvdcmd);
1840 mvdcmd.Arg0 = L_WORD(u32addr);
1841 mvdcmd.Arg1 = H_WORD(u32addr);
1842 mvdcmd.Arg2 = L_DWORD(u32addr);
1843 mvdcmd.Arg3 = H_DWORD(u32addr);
1844 if (HAL_MVD_MVDCommand( CMD_DEC_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
1845 {
1846 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DEC_FRAME_INFO_BUF ) );
1847 }
1848 return;
1849 }
1850
HAL_MVD_GetIntState(void)1851 MS_U32 HAL_MVD_GetIntState(void)
1852 {
1853 MS_U32 u32IntStat = 0;
1854 MVD_CmdArg mvdcmd;
1855
1856 SETUP_CMDARG(mvdcmd);
1857 if (HAL_MVD_MVDCommand( CMD_GET_INT_STAT, &mvdcmd ) == TRUE)
1858 {
1859 u32IntStat = (((MS_U32)mvdcmd.Arg4) << 16) |
1860 (((MS_U32)mvdcmd.Arg3) << 8) |
1861 (((MS_U32)mvdcmd.Arg2));
1862 }
1863 else
1864 {
1865 MVD_DEBUGERROR( printf( "Ctrl: 0x%x fail!!\n", CMD_GET_INT_STAT) );
1866 }
1867
1868 return u32IntStat;
1869 }
1870
1871 //------------------------------------------------------------------------------
1872 /// Report avsync status
1873 /// avsync_status=avsync_done|(avsync_skip_picture<<1)|(avsync_repeat_picture<<2),
1874 /// 0 for free run
1875 //------------------------------------------------------------------------------
HAL_MVD_GetAVSyncStatus(void)1876 MS_U8 HAL_MVD_GetAVSyncStatus(void)
1877 {
1878 MVD_CmdArg mvdcmd;
1879 SETUP_CMDARG(mvdcmd);
1880 if (HAL_MVD_MVDCommand( CMD_GET_SYNC_STAT, &mvdcmd ) == FALSE)
1881 {
1882 MVD_DEBUGERROR(printf("Ctrl: 0x%x fail!!\r\n", CMD_GET_SYNC_STAT));
1883 return 0xff;
1884 }
1885 //(printf("Sync On/Off %x, Done %x, Stat %x, diff=%ld\n", mvdcmd.Arg0, mvdcmd.Arg1, mvdcmd.Arg2, MDrv_MVD_GetPtsStcDiff()));
1886 return (mvdcmd.Arg2);
1887 }
1888
HAL_MVD_SlqTblLoadWrPtr(MS_U32 u32WrPtr)1889 void HAL_MVD_SlqTblLoadWrPtr(MS_U32 u32WrPtr)
1890 {
1891 #if 1
1892 MVD_CmdArg mvdcmd;
1893 MS_U16 u16Val = 0;
1894
1895 if (!bEnSlqTblHkCtrl)
1896 {
1897 SETUP_CMDARG(mvdcmd);
1898 mvdcmd.Arg0 = 0x10;
1899 mvdcmd.Arg1 = 0x01;
1900 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
1901 {
1902 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
1903 return;
1904 }
1905 u16Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8);
1906
1907 SETUP_CMDARG(mvdcmd);
1908 mvdcmd.Arg0 = 0x10;
1909 mvdcmd.Arg1 = 0x01;
1910 mvdcmd.Arg2 = u16Val & 0xff;
1911 mvdcmd.Arg3 = ((u16Val>>8 ) & 0xff) | 0x80;
1912 if (HAL_MVD_MVDCommand(CMD_WR_IO, &mvdcmd) == FALSE)
1913 {
1914 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_WR_IO ) );
1915 return;
1916 }
1917
1918 bEnSlqTblHkCtrl = TRUE;
1919 //printf("@@@ OPEN HK.SLQ.CTRL!\n");
1920 }
1921 #endif
1922 HAL_MVD_RegWriteByte(MVD_SLQ_WADR0, (u32WrPtr & 0xff));
1923 HAL_MVD_RegWriteByte(MVD_SLQ_WADR1, ((u32WrPtr>>8 ) & 0xff));
1924 HAL_MVD_RegWriteByte(MVD_SLQ_WADR2, ((u32WrPtr>>16) & 0xff));
1925 HAL_MVD_RegWriteByte(MVD_SLQ_WADR3, ((u32WrPtr>>24) & 0x01));
1926 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_RELOAD);
1927 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_RELOAD);
1928 }
1929
HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)1930 static MS_U32 HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)
1931 {
1932 MS_U32 u32Cadr = 0;
1933 switch (eCmd)
1934 {
1935 case MVD_HKSLQ_GET_READPTR:
1936 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_RADR_PROBE);
1937 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_RADR_PROBE);
1938 break;
1939 case MVD_HKSLQ_GET_WRITEPTR:
1940 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_PROBE);
1941 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_PROBE);
1942 break;
1943 default:
1944 break;
1945 }
1946 u32Cadr = HAL_MVD_RegReadByte(MVD_SLQ_CADR0) |
1947 (HAL_MVD_RegReadByte(MVD_SLQ_CADR1) << 8) |
1948 (HAL_MVD_RegReadByte(MVD_SLQ_CADR2) <<16) |
1949 ((HAL_MVD_RegReadByte(MVD_SLQ_CADR3) & 0x01) <<24);
1950 return u32Cadr;
1951 }
1952
HAL_MVD_SlqTblProbeWrPtr(void)1953 MS_U32 HAL_MVD_SlqTblProbeWrPtr(void)
1954 {
1955 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_WRITEPTR);
1956 }
1957
HAL_MVD_SlqTblProbeRdPtr(void)1958 MS_U32 HAL_MVD_SlqTblProbeRdPtr(void)
1959 {
1960 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_READPTR);
1961 }
1962
1963 //------------------------------------------------------------------------------
1964 /// Set firmware as MStreamer mode
1965 /// @return -TRUE for success; FALSE for failure.
1966 //------------------------------------------------------------------------------
HAL_MVD_SetMStreamerMode(MS_U8 u8Mode)1967 MS_BOOL HAL_MVD_SetMStreamerMode(MS_U8 u8Mode)
1968 {
1969 MVD_CmdArg mvdcmd;
1970
1971 SETUP_CMDARG(mvdcmd);
1972 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MStreamer mode.
1973 if (HAL_MVD_MVDCommand(CMD_SET_MST_MODE, &mvdcmd ) == FALSE)
1974 {
1975 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\n", CMD_SET_MST_MODE ) );
1976 return FALSE;
1977 }
1978
1979 return TRUE;
1980 }
1981
HAL_MVD_FrameOpt(MS_U8 u8FrmIdx,MVD_FrmOpt eOpt)1982 MS_BOOL HAL_MVD_FrameOpt(MS_U8 u8FrmIdx, MVD_FrmOpt eOpt)
1983 {
1984 MVD_CmdArg mvdcmd;
1985
1986 SETUP_CMDARG(mvdcmd);
1987 mvdcmd.Arg0 = u8FrmIdx;
1988 mvdcmd.Arg1 = eOpt; // 0 = Flip, 1 = Release.
1989 MVD_DEBUGINFO(printf("FLIP_RELEASE_FRAME: idx=0x%x, opt=0x%x\n", u8FrmIdx, eOpt));
1990 if (HAL_MVD_MVDCommand(CMD_FLIP_RELEASE_FRAME, &mvdcmd ) == FALSE)
1991 {
1992 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\n", CMD_FLIP_RELEASE_FRAME ) );
1993 return FALSE;
1994 }
1995
1996 return TRUE;
1997 }
1998
1999 //------------------------------------------------------------------------------
2000 /// Inform firwmare that PTS is updated.
2001 /// @return -TRUE for success; FALSE for failure.
2002 //------------------------------------------------------------------------------
HAL_MVD_UpdatePts(void)2003 MS_BOOL HAL_MVD_UpdatePts(void)
2004 {
2005 MVD_CmdArg mvdcmd;
2006
2007 SETUP_CMDARG(mvdcmd);
2008 if (HAL_MVD_MVDCommand(CMD_SEND_UNI_PTS, &mvdcmd ) == FALSE)
2009 {
2010 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\n", CMD_SEND_UNI_PTS ) );
2011 return FALSE;
2012 }
2013
2014 return TRUE;
2015 }
2016
HAL_MVD_FrameCapture(MS_U8 u8FrmIdx,MS_BOOL bEnable)2017 MS_BOOL HAL_MVD_FrameCapture(MS_U8 u8FrmIdx, MS_BOOL bEnable)
2018 {
2019 MVD_CmdArg mvdcmd;
2020
2021 SETUP_CMDARG(mvdcmd);
2022 mvdcmd.Arg0 = bEnable; //0 or 1 to enable/disable the freeze function
2023 mvdcmd.Arg2 = u8FrmIdx; //specify the freezed frame index
2024 MVD_DEBUGINFO(printf("CAPTURE_FRAME: idx=0x%x, enable=0x%x\n", u8FrmIdx, bEnable));
2025 if (HAL_MVD_MVDCommand(CMD_ENABLE_FREEZE_PIC, &mvdcmd ) == FALSE)
2026 {
2027 MVD_DEBUGERROR(printf("Command: 0x%x fail!!\n", CMD_ENABLE_FREEZE_PIC));
2028 return FALSE;
2029 }
2030
2031 return TRUE;
2032 }
2033
2034 #define MVD_HW_MAX_PIXEL (1920*1088*61000ULL) //FullHD@60p
HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize,MS_U16 u16VSize,MS_U32 u32FrmRate)2035 MS_BOOL HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate)
2036 {
2037 MVD_DEBUGINFO(printf("%s w:%d, h:%d, fr:%ld, MAX:%lld\n", __FUNCTION__, u16HSize, u16VSize, u32FrmRate, MVD_HW_MAX_PIXEL));
2038 return (((MS_U64)u16HSize*(MS_U64)u16VSize*(MS_U64)u32FrmRate) <= MVD_HW_MAX_PIXEL);
2039 }
2040