1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 // Common Definition
100 #include <string.h>
101
102 #include "MsCommon.h"
103 #include "drvMVD_EX.h"
104 #include "drvBDMA.h"
105
106 // Internal Definition
107 #include "regMVD_EX.h"
108 #include "halMVD_EX.h"
109 #include "halVPU_EX.h"
110 #include "osalMVD_EX.h"
111 #include "mvd4_interface.h" //firmware header
112 #include "asmCPU.h"
113 #include "controller.h"
114 #include "MVD_EX_Common.h"
115 #include "halCHIP.h"
116 #ifndef MSOS_TYPE_NUTTX
117
118
119 //-------------------------------------------------------------------------------------------------
120 // Driver Compiler Options
121 //-------------------------------------------------------------------------------------------------
122 #define SLQ_NEW_PUSH 1
123
124 //-------------------------------------------------------------------------------------------------
125 // Local Defines
126 //-------------------------------------------------------------------------------------------------
127 #define MIU1_BASEADDR pMVDHalContext->stMiuCfg.u32Miu1BaseAddr
128 #define _PA2Offset(x) (((x)>=MIU1_BASEADDR)?(x-MIU1_BASEADDR):(x))
129
130 #ifndef MS_ASSERT
131 #ifdef MS_DEBUG
132 #define MS_ASSERT(expr) do { \
133 if(!(expr)) \
134 MVD_PRINT("MVD assert fail %s %d!\n", __FILE__, __LINE__); \
135 } while(0)
136 #else
137 #define MS_ASSERT(expr)
138 #endif
139 #endif
140
141 #ifndef UNUSED
142 #define UNUSED(x) (void)(x)
143 #endif
144 //constant
145 #define MVD_PollingTimes 0x40000UL
146
147 #define MVD_DEBUGVERBAL(x) if (_u8HalDbgLevel>3) { (x); }
148 #define MVD_DEBUG_FWCMD(x) if (_u8HalDbgLevel>2) { (x); }
149 #define MVD_DEBUGINFO(x) if (_u8HalDbgLevel>1) { (x); }
150 #define MVD_DEBUGERROR(x) if (_u8HalDbgLevel>0) { (x); }
151 #define MVD_ERROR(x) x
152
153 #ifndef ANDROID
154 #define MVD_PRINT printf
155 #define MVD_ERR printf
156 #else
157 #include <sys/mman.h>
158 #include <cutils/ashmem.h>
159 #include <cutils/log.h>
160 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
161 #define MVD_PRINT ALOGI
162 #else
163 #define MVD_PRINT LOGI
164 #endif
165 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
166 #define MVD_ERR ALOGE
167 #else
168 #define MVD_ERR LOGE
169 #endif
170 #endif
171
172 #define RIU ((unsigned short volatile *) (u32RiuBaseAdd))
173 #define RIU8 ((unsigned char volatile *) (u32RiuBaseAdd))
174
175 #define MVDCPU_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL0_H) & BIT0) == BIT0)
176 #define MVDHW_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL2_L) & BIT4) == BIT4)
177
178 // MVD5
179 #define SLQ_TBL_ENTRY_LEN 0x7FFFFFFF //31-bit
180
181 #define MVD_WIDTH_ALIGN_BYTE 16
182 #define MVD_WIDTH_ALIGN_MASK (MVD_WIDTH_ALIGN_BYTE - 1)
183 #define MVD_WIDTH_ALIGN_BITS 4
184
185 #define MVD_FBNUM_DEFAULT 4
186 #define MVD_FBNUM_MAX 5
187 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
188
189 #define MVD_DHD_FBSIZE 0x5FA000 //Framebuffer size minimum for Dual HD: (1920*2)*1088*1.5
190 #define MVD_HD_FBSIZE 0x2FD000 //Framebuffer size minimum for High Definition
191 #define MVD4_VC1_FBSIZE_HDMIN 0xEF1000 //5 * 1920 * 1088 * 1.5 = 14.95MB
192 #define MVD4_VC1_FBSIZE_HDMIN1 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
193 #define MVD4_VC1_FBSIZE_SDMIN 0x2F7600 //5 * 720 * 576 * 1.5 = 2.97MB
194 #define MVD4_MPEG_FBSIZE_HDMIN 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
195 #define MVD4_MPEG_FBSIZE_SDMIN 0x25F800 //4 * 720 * 576 * 1.5 = 2.38MB
196
197 #define _IS_VC1(x) ((x==E_MVD_CODEC_VC1_ADV) || (x==E_MVD_CODEC_VC1_MAIN))
198
199 #define SLQ_ENTRY_LEN 8 //8-byte per entry
200
201 #define MVD_U32_MAX 0xffffffffUL
202 #define MAX_ADD_28BIT 0x0fffffff
203 #define SLQ_ADDR_LEN SLQ_TBL_ENTRY_LEN //Slq address length is the same as SlqTbl
204
205 //Initial value for PTS table
206 #define _INIT_ADDR MVD_U32_MAX
207 #define _INIT_LEN 0
208 #define _INIT_TIMESTAMP MVD_U32_MAX
209 #define _INIT_ID MVD_U32_MAX
210
211 #define _MS_TO_90K(x) (x*90) //ms ==> 90k counter
212 #define _90K_TO_MS(x) ((x!=MVD_U32_MAX)?(x/90):(x)) //90k counter ==> ms
213 #define _90K_TO_MS_U64(x) ((x!=MVD_U64_MAX)?(x/90):(x)) //90k counter ==> ms
214
215 #define MVD_DBG_STS(x) {}
216 #define _SLQTBL_DUMP_PTS FALSE//TRUE
217 #define _SLQTBL_DUMP_PUSHQ FALSE//TRUE
218 #define _SLQTBL_DUMP_PKT FALSE//TRUE
219 #define MVD_TURBO_INIT FALSE//TRUE
220
221 #define SLQ_ENTRY_MAX 1024
222 #define SLQ_ENTRY_LEN 8 //8-byte per entry
223 #define SLQ_TBL_SIZE (SLQ_ENTRY_MAX * SLQ_ENTRY_LEN)
224 #define ES_TBL_SIZE (SLQ_ENTRY_MAX * 8) //8-byte per entry
225
226 #define MVD_FW_SLQTBL_PTS_LEN 32
227
228 #define SLQ_TBL_SAFERANGE (40*SLQ_ENTRY_LEN)
229 //this should be smaller than FW's lookup range (current it's 16 entries)
230
231 #define SLQTBL_CHECKVACANCY_WATERLEVEL (44*SLQ_ENTRY_LEN)
232
233
234 #define DIVX_PATTERN 0x63643030
235 #define FLV_PATTERN 0xffff0000
236 #define MPEG_PATTERN_0 0xC6010000 //this SC just for mpeg2/4
237 #if SLQ_NEW_PUSH
238 #define SLQ_PIC_START_FLAG 0x40000000
239 #define VC1_PATTERN 0x0D010000
240 #define RCV_PATTERN 0xFF00A55A
241 #endif
242 #define VC1_PATTERN_0 0xff010000
243 #define VC1_PATTERN_1 0x0000ffff
244 #define VC1_PATTERN_2 0xffffff01
245 #define VC1_PATTERN_3 0x0000ffee
246
247 #define RCV_PATTERN_0 0x00000000
248 #define RCV_PATTERN_1 0xffffffff
249 #define RCV_PATTERN_2 0x00000000
250 #define RCV_PATTERN_3 0xeeeeeeee
251
252 #define DUMMY_PATTERN 0xBE010000
253 #define DUMMY_SIZE 0x2000 //8K
254
255 #define END_PATTERN_0 0xFF010000
256 #define END_PATTERN_1 0xDDCCBBAA
257 #define END_PATTERN_2 0xBBAAFFEE
258 #define END_PATTERN_3 0xFFEEDDCC
259 #define END_PATTERN_SIZE 256
260
261 #define SKIP_PATTERN_0 0xc5010000
262 #define SKIP_PATTERN_1 0x270608ab
263 #define SKIP_PATTERN_SIZE 8
264
265 #define CMD_TIMEOUT_MS 500
266 #define SKIP_DATA_TIMEOUT_MS 15
267
268 //Length of internal buffers
269 #define MVD_FW_IAP_BUF_LEN (0x4000UL) // 16k
270 #define MVD_FW_DP_BUF_LEN (0x80000UL) //512k
271 #define MVD_FW_MV_BUF_LEN (0x48000UL) //288K
272 //Alignment of HW buffers start address
273 #define MVD_FW_IAP_BUF_ALIGN (0x4000UL) // 16k
274 #define MVD_FW_DP_BUF_ALIGN (0x8000UL) // 32k
275 #define MVD_FW_MV_BUF_ALIGN (0x8000UL) // 32k
276
277 //Three HW buffers are allocated after framebuffer, so we need to
278 //consider these buffers when checking the available framebuffer size/number.
279 #define MVD_HW_BUF_TOTAL_LEN (MVD_FW_IAP_BUF_LEN + MVD_FW_DP_BUF_LEN + MVD_FW_MV_BUF_LEN) //u32HWBuffTotalSize
280
281 #define MVD_FW_CODE_LEN (OFFSET_BASE)//refer to the define in mvd4_interface.h
282 #define MVD_FW_CODE_LEN_V00 (0x70000UL) //length for old layout
283 #define MVD_FW_MPOOL_START_OFFSET (0x90000UL) //576K
284 #define MVD_FW_TASK_OFFSET (0x100000UL) //1M
285
286 #define MVD3_FW_VOL_INFO_BUF_LEN (0x1000UL) // 4K
287 #define MVD3_FW_FRAME_INFO_BUF_LEN (0x1000UL) // 4K
288 #define MVD3_FW_DIVX_INFO_BUF_LEN (0x1000UL) // 4K
289 #define MVD3_FW_USER_DATA_BUF_LEN (0x4000UL) // 16K
290 #define MVD3_FW_USER_DATA_BUF_BACKUP_LEN MVD3_FW_USER_DATA_BUF_LEN // 16K
291 #define MVD3_FW_SLQ_TAB_TMPBUF_LEN (0x200UL)
292 #define MVD_FW_SLQTBL_PTS_BUF_LEN (SLQ_ENTRY_MAX*MVD_FW_SLQTBL_PTS_LEN)
293 #define MVD_FW_DYN_SCALE_BUF_LEN (0x1000UL) // 4K
294 #define MVD_FW_SCALER_INFO_BUF_LEN (0x100UL) // 256bytes reserved
295 #define MVD_FW_DECFRM_INFO_BUF_LEN (0x100UL) // 256bytes reserved
296
297 #define MVD_FW_USER_DATA_HDR_LEN (6)
298 #define MVD_FW_USER_DATA_PKT_LEN (256)
299 #define MVD_FW_USER_DATA_EXT_HDR_LEN (16)
300 #define FW_BUFF_ALIGN (0x1000) //4k align
301
302 #define SLQ_ENTRY_MAX 1024
303 #define MVD_FW_SLQTBL_PTS_LEN 32
304 #define MVD_NULLPKT_PTS MVD_U32_MAX
305 #define MVD_U32_MAX 0xffffffffUL
306 #define MVD_U64_MAX 0xffffffffffffffffULL
307
308 //Get the start address, and the next start address.
309 #define GET_FW_BUFFADD(cur, size, start) \
310 do { \
311 start = cur; \
312 cur += size; \
313 } while(0)
314
315 //Get the aligned start address, and the next start address.
316 #define GET_FW_BUFFADD_ALIGN(cur, align, size, alignStart) \
317 do { \
318 cur = (MemAlign(cur, align)); \
319 GET_FW_BUFFADD(cur, size, alignStart); \
320 } while(0)
321
322 //Init command arguments
323 #define SETUP_CMDARG(x) \
324 do { \
325 x.Arg0 = 0; \
326 x.Arg1 = 0; \
327 x.Arg2 = 0; \
328 x.Arg3 = 0; \
329 x.Arg4 = 0; \
330 x.Arg5 = 0; \
331 } while(0)
332
333 //Set command arguments
334 #define SET_CMDARG(cmd, u32val, u8Num) \
335 do { \
336 cmd.Arg0 = L_WORD(u32val); \
337 cmd.Arg1 = H_WORD(u32val); \
338 cmd.Arg2 = L_DWORD(u32val); \
339 cmd.Arg3 = H_DWORD(u32val); \
340 cmd.Arg4 = 0; \
341 cmd.Arg5 = u8Num; \
342 } while(0)
343
344 #define SET_CMD_RET_FALSE(_cmdVal, _pStcmdArg) \
345 do { \
346 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
347 { \
348 MVD_DEBUGERROR(MVD_ERR("Command: 0x%x fail!!\r\n", _cmdVal)); \
349 return FALSE; \
350 } \
351 } while(0)
352
353 #define SET_CMD_RET_VOID(_cmdVal, _pStcmdArg) \
354 do { \
355 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
356 { \
357 MVD_DEBUGERROR(MVD_ERR("Command: 0x%x fail!!\r\n", _cmdVal)); \
358 return; \
359 } \
360 } while(0)
361
362 #define HAL_MVD_InvalidBuffRetFalse(x) \
363 do { \
364 if ((x)==0) \
365 { \
366 MVD_DEBUGERROR(MVD_ERR("%s(%d) error: NULL buffer address.\n", __FUNCTION__, __LINE__)); \
367 return FALSE; \
368 } \
369 } while(0)
370
371 #define _MVD_Memset(pDstAddr, u32value, u32Size) \
372 do { \
373 MS_U32 x = 0; \
374 for (x = 0; x < (u32Size/4); x=x+4) \
375 { \
376 HAL_MVD_Memset4Byte(pDstAddr+x,u32value); \
377 } \
378 HAL_MVD_CPU_Sync(); \
379 HAL_MVD_ReadMemory(); \
380 } while (0)
381
382 #define _MVD_MemResetBit(pDstAddr, mask_num) \
383 do{ \
384 *pDstAddr = (*pDstAddr) & (~(0x1<<mask_num)); \
385 }while(0) \
386
387
388 typedef enum
389 {
390 MVD_HKSLQ_GET_READPTR = 0,
391 MVD_HKSLQ_GET_WRITEPTR = 1,
392 MVD_HKSLQ_NONE = 2,
393 } MVD_HKSLQ_CMD;
394
395 #if SLQ_NEW_PUSH
396 typedef struct _MVD_SLQ_STATUS
397 {
398 MS_BOOL bSlqPicStart;
399 MS_BOOL bSlqPicCollect;
400 MS_BOOL bSlqPicWaitNextStart;
401 MS_BOOL bSlqFireRdy;
402 MS_BOOL bSlqCtrlBit;
403 MS_BOOL bSlqEnLastFrameShow;
404 MS_U32 u32SlqPatternAddr;
405 MS_U32 u32SlqPushLength;
406 MS_U32 u32VaildWptrAddr;
407 } MVD_SLQ_STATUS;
408 #endif
409
410 typedef struct _MVD_SLQ_TBL_ST
411 {
412 MS_U32 u32StAdd;
413 MS_U32 u32EndAdd;
414 MS_U32 u32EntryCntMax;
415
416 MS_U32 u32RdPtr;
417 MS_U32 u32WrPtr;
418 MS_U32 u32Empty;
419 MS_U32* pu32LastEntry;
420 } MVD_SLQ_TBL_ST;
421
422 typedef struct _MVD_SLQ_ES_ST
423 {
424 MS_U32 u32StAdd;
425 MS_U32 u32EndAdd;
426
427 MS_U32 u32RdPtr;
428 MS_U32 u32WrPtr;
429 } MVD_SLQ_ES_ST;
430
431 typedef struct _MVD_FWBuff
432 {
433 MS_U32 pu8MVDGetVolBufStart;
434 MS_U32 u32VolAdd;
435 MS_U32 pu8MVDGetFrameInfoBufStart;
436 MS_U32 pu8MVDSetHeaderBufStart;
437 MS_U32 u32UserDataBuf;
438 MS_U32 u32MVDFWSLQTABTmpbufAdr;
439 MS_U32 u32MVDFWPtsTblAddr;
440 MS_U32 u32DynScalingAdd;
441 MS_U32 u32ScalerInfoAdd;
442 MS_U32 u32DecFrmInfoAdd;
443 } MVD_FWBuff;
444
445 typedef enum _FW_BUFF_TYPE
446 {
447 FW_BUFF_VOLINFO,
448 FW_BUFF_FRMINFO,
449 FW_BUFF_HDR,
450 FW_BUFF_USRDATA,
451 FW_BUFF_SLQTBL,
452 FW_BUFF_FWSLQTAB,
453 FW_BUFF_PTSTBL,
454 FW_BUFF_DS,
455 FW_BUFF_XCINFO,
456 FW_BUFF_DECFRMINFO,
457 } FW_BUFF_TYPE;
458
459 typedef struct _MVD_SLQTBLInfo
460 {
461 MS_U32 u32LastPts; ///< record the last PTS to handle the repeat case
462 MS_U32 u32DummyPktCnt; ///< accumulated dummy packet counter
463 MS_U32 u32SlqByteCnt; ///< accumulated byte counter
464 MS_U32 u32ESBuffEnd; ///< miu offset of ES buffer end, used for report TS read/write ptr.
465 MS_U32 u32FileEndPtr; ///< write ptr of file-end
466 MS_U32 u32PreEsRd; ///< previous ES read ptr
467 MS_U32 u32PreEsWr; ///< previous ES write ptr
468 MS_BOOL bRdyToFireCmd; ///< TRUE after FW is ready to update write pointer
469 MS_BOOL bSlqTblHasValidData; ///< TRUE if the write ptr is not updated
470 MS_BOOL bEnSlqTblHkCtrl;
471 BDMA_CpyType bdmaCpyType;
472 MVD_SLQ_STATUS* pSlqStatus;
473 MVD_SLQ_TBL_ST* pDrvSlqTbl;
474 MVD_SLQ_ES_ST* pDrvEsTbl;
475 MVD_SLQ_ES_ST* pDrvDivxTbl;
476 } MVD_SLQTBLInfo;
477
478 typedef struct _MVD_ALIVEInfo
479 {
480 MS_U32 u32decode_count;
481 MS_U32 u32searchbuf_count;
482 MS_U32 u32searchcode_count;
483 MS_U32 u32prebuf_count;
484 MS_U32 u32vfifobuf_count;
485 MS_U32 u32searchheader_count;
486 MS_U32 u32flashpattern_count;
487 } MVD_ALIVEInfo;
488
489
490 //Only keep one record of MIU setting since there should be only one,
491 //even for multiple decoders.
492 typedef struct _MVDMiuCfg
493 {
494 MS_PHYADDR u32Miu1BaseAddr;
495 MS_BOOL bFWMiuSel;
496 MS_BOOL bHWMiuSel;
497 } MVDMiuCfg;
498
499
500 typedef enum
501 {
502 E_MVD_DEC_0 = 0,
503 E_MVD_DEC_1,
504 E_MVD_DEC_MAX
505 } MVD_DecNum;
506 #define MAX_DEC_NUM E_MVD_DEC_MAX
507
508 //-------------------------------------------------------------------------------------------------
509 // Local Structures
510 //-------------------------------------------------------------------------------------------------
511
512
513 //-------------------------------------------------------------------------------------------------
514 // Global Variables
515 //-------------------------------------------------------------------------------------------------
516 static MS_U32 u32RiuBaseAdd = 0;
517 MS_U8 _u8HalDbgLevel = 0;
518 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX};
519 static MS_BOOL bSHMMiuSel=MIU_SEL_1;
520 #if 0
521 static MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
522 static MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
523 static MVD_FWCfg stFwCfg[MAX_DEC_NUM];
524
525 // For SLQ table link
526 static MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
527 static MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
528 static MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
529 static MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
530 static MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
531 static FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
532 static MVD_ALIVEInfo aliveInfo[MAX_DEC_NUM];
533 MS_BOOL bSlqTblHKCtrl = FALSE; //read/write pointer can be accessed by HK directly
534 static MS_BOOL bStopped = TRUE;
535
536 static HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM] = {
537 {E_HAL_MVD_MAIN_STREAM0, FALSE},
538 {E_HAL_MVD_SUB_STREAM0, FALSE},
539 //{E_HAL_MVD_SUB_STREAM1, FALSE},
540 };
541 static MVD_FWBuff stFWBuff[MAX_DEC_NUM];
542 #endif
543
544 #define FRM_RATE_CODE_NUM 9
545
546 typedef struct
547 {
548 MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
549 MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
550 MVD_FWCfg stFwCfg[MAX_DEC_NUM];
551
552 // For SLQ table link
553 MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
554 MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
555 MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
556 MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
557 MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
558 FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
559
560 MS_BOOL bSlqTblHKCtrl[MAX_DEC_NUM]; //read/write pointer can be accessed by HK directly
561 MS_BOOL bStopped[MAX_DEC_NUM];
562
563 HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM];
564
565 MVD_FWBuff stFWBuff[MAX_DEC_NUM];
566
567 #if _SLQTBL_DUMP_PKT
568 MS_U32 u32SendTimes[MAX_DEC_NUM];//HAL_MVD_SLQTblSendPacket
569 #endif
570
571 MS_U32 u32pqTimes[MAX_DEC_NUM];//HAL_MVD_PushQueue
572 MS_BOOL bSetSkip[MAX_DEC_NUM];//MVD_FlushTSQueue
573
574 MS_U32 u32PreVdCnt[MAX_DEC_NUM];//HAL_MVD_DbgDump
575 MS_U32 u32PreErrCnt[MAX_DEC_NUM];
576 MS_BOOL b1stDump[MAX_DEC_NUM];
577
578 HAL_MVD_EX_ClockSpeed _eMVDClockSpeed;
579 MS_U32 _u32MVDClockType;
580 MS_U32 _u32MVD2ClockType;
581 //pre_set
582 HAL_MVD_Pre_Ctrl gMVDPreCtrl[MAX_DEC_NUM];
583 //alive
584 MVD_ALIVEInfo aliveInfo[MAX_DEC_NUM];
585 MS_BOOL bAutoInsertDummyPattern[MAX_DEC_NUM];
586 MVDMiuCfg stMiuCfg;
587 MS_BOOL bDropOnePTS[MAX_DEC_NUM];
588 MS_U32 u32DmxFrameRate[MAX_DEC_NUM];
589 MS_U32 u32DmxFrameRateBase[MAX_DEC_NUM];
590 } MVD_Hal_CTX;
591
592 //global variables
593 MVD_Hal_CTX* pMVDHalContext = NULL;
594 MVD_Hal_CTX gMVDHalContext;
595 const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
596 {
597 NULL,23976,24000,25000,29976,30000,50000,59947,60000
598 };
599
600
601 #define GET_VOL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetVolBufStart
602 #define GET_VOL_BUFFADD_NONCACHE(idx) pMVDHalContext->stFWBuff[(idx)].u32VolAdd
603 #define GET_FRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetFrameInfoBufStart
604 #define GET_HDR_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDSetHeaderBufStart
605 #define GET_USRDATA_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32UserDataBuf
606 #define GET_SLQ_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWSLQTABTmpbufAdr
607 #define GET_PTSTBL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWPtsTblAddr
608 #define GET_DS_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DynScalingAdd
609 #define GET_XCINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32ScalerInfoAdd
610 #define GET_DECFRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DecFrmInfoAdd
611
612 #if 0
613 static HAL_MVD_EX_ClockSpeed _eMVDClockSpeed = E_HAL_MVD_EX_CLOCK_SPEED_DEFAULT;
614 static MS_U32 _u32MVDClockType = CKG_MVD_172MHZ;
615 static MS_U32 _u32MVD2ClockType = CKG_MVD2_172MHZ;
616 #endif
617 //-------------------------------------------------------------------------------------------------
618 // Local Variables
619 //-------------------------------------------------------------------------------------------------
620
621
622 //-------------------------------------------------------------------------------------------------
623 // Debug Functions
624 //-------------------------------------------------------------------------------------------------
625
626
627 //-------------------------------------------------------------------------------------------------
628 // Local Functions
629 //-------------------------------------------------------------------------------------------------
630
HAL_MVD_Context_Init(void)631 static void HAL_MVD_Context_Init(void)
632 {
633 pMVDHalContext->bStopped[0] = TRUE;
634 pMVDHalContext->bStopped[1] = TRUE;
635 pMVDHalContext->_stMVDStream[0].eStreamId = E_HAL_MVD_MAIN_STREAM0;
636 pMVDHalContext->_stMVDStream[1].eStreamId = E_HAL_MVD_SUB_STREAM0;
637
638 pMVDHalContext->b1stDump[0] = TRUE;
639 pMVDHalContext->b1stDump[1] = TRUE;
640 pMVDHalContext->_eMVDClockSpeed = E_HAL_MVD_EX_CLOCK_SPEED_DEFAULT;
641 pMVDHalContext->_u32MVDClockType = CKG_MVD_160MHZ;
642 pMVDHalContext->_u32MVD2ClockType = CKG_MVD_160MHZ;
643 }
644
645
646
HAL_MVD_SetIsUsed(MS_U8 u8Idx,MS_BOOL bUsed)647 static void HAL_MVD_SetIsUsed(MS_U8 u8Idx, MS_BOOL bUsed)
648 {
649 pMVDHalContext->_stMVDStream[u8Idx].bUsed = bUsed;
650 }
651
652 //Given the start address & the available size for the FW buffers,
653 //return the address of each buffers.
654 //Now only support u8Size==1, 2, 4
MVD_GetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U8 u8Offset,MS_U8 u8Size)655 static MS_U32 MVD_GetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U8 u8Offset, MS_U8 u8Size)
656 {
657 MS_U32 u32Val = 0;
658 MS_U32 u32BufStart = NULL;
659 switch (eBuffType)
660 {
661 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
662 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
663 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
664 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
665 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
666 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
667 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
668 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
669 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
670 default:
671 break;
672 }
673 if (NULL == u32BufStart)
674 {
675 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
676 __FUNCTION__, u8Idx, eBuffType, u8Offset, u8Size);
677 return 0;
678 }
679
680 if (u8Size == sizeof(MS_U8))
681 {
682 u32Val = (MS_U32)HAL_MVD_MemReadByte(u32BufStart+u8Offset);
683 }
684 else if (u8Size == sizeof(MS_U32))
685 {
686 u32Val = HAL_MVD_MemRead4Byte(u32BufStart+u8Offset);
687 }
688 else if (u8Size == sizeof(MS_U16))
689 {
690 u32Val = HAL_MVD_MemRead2Byte(u32BufStart+u8Offset);
691 }
692
693 MVD_DEBUGVERBAL(MVD_PRINT("%s: u32Val=%ld for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
694 __FUNCTION__, u32Val, u8Idx, eBuffType, u8Offset, u8Size));
695 return u32Val;
696 }
697
698
699 //-------------------------------------------------------------------------------------------------
700 // Global Functions
701 //-------------------------------------------------------------------------------------------------
HAL_MVD_SetDbgLevel(MS_U8 level)702 void HAL_MVD_SetDbgLevel(MS_U8 level)
703 {
704 _u8HalDbgLevel = level;
705 return;
706 }
707
708
HAL_MVD_GetCaps(void)709 MS_U8 HAL_MVD_GetCaps(void)
710 {
711 MS_U8 caps = 0;
712
713 caps |= (MVD_SUPPORT_MPEG2|MVD_SUPPORT_MPEG4|MVD_SUPPORT_VC1);
714 return caps;
715 }
716
HAL_MVD_GetDrvFwVer(void)717 MS_U32 HAL_MVD_GetDrvFwVer(void)
718 {
719 return MVD_FW_VERSION;
720 }
721
HAL_MVD_GetMiu1BaseAdd(void)722 MS_U32 HAL_MVD_GetMiu1BaseAdd(void)
723 {
724 return MIU1_BASEADDR;
725 }
726
HAL_MVD_GetFWSelMiu1(void)727 MS_BOOL HAL_MVD_GetFWSelMiu1(void)
728 {
729 return MVDCPU_ON_MIU1;
730 }
731
HAL_MVD_MemGetMap(MS_U8 u8Idx,MS_U8 u8type,MS_U32 * pu32addr,MS_U32 * pu32len)732 void HAL_MVD_MemGetMap(MS_U8 u8Idx, MS_U8 u8type, MS_U32* pu32addr, MS_U32* pu32len)
733 {
734 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
735 switch (u8type)
736 {
737 case E_MVD_MMAP_ALL:
738 case E_MVD_MMAP_FW:
739 *pu32addr = _PA2Offset(pstMemCfg->u32FWCodeAddr);
740 *pu32len = pstMemCfg->u32FWCodeSize;
741 break;
742 case E_MVD_MMAP_BS:
743 *pu32addr = _PA2Offset(pstMemCfg->u32BSAddr);
744 *pu32len = pstMemCfg->u32BSSize;
745 break;
746 case E_MVD_MMAP_FB:
747 *pu32addr = _PA2Offset(pstMemCfg->u32FBAddr);
748 *pu32len = pstMemCfg->u32FBSize;
749 break;
750 case E_MVD_MMAP_DRV:
751 *pu32addr = _PA2Offset(pstMemCfg->u32DrvBufAddr);
752 *pu32len = pstMemCfg->u32DrvBufSize;
753 break;
754 default:
755 break;
756 }
757
758 MVD_DEBUGINFO(MVD_PRINT("HAL_MVD_MemGetMap[%d] add=0x%lx len=0x%lx\n",u8type,*pu32addr,*pu32len));
759 return;
760 }
761
HAL_MVD_RegSetBase(MS_U32 u32Base)762 void HAL_MVD_RegSetBase(MS_U32 u32Base)
763 {
764 u32RiuBaseAdd = u32Base;
765 HAL_VPU_EX_InitRegBase(u32Base);
766 }
767
HAL_MVD_RegWriteByte(MS_U32 u32Reg,MS_U8 u8Val)768 void HAL_MVD_RegWriteByte(MS_U32 u32Reg, MS_U8 u8Val)
769 {
770 if ( __builtin_constant_p( u32Reg ) )
771 {
772 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val;
773 }
774 else
775 {
776 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
777 }
778 }
779
HAL_MVD_RegReadByte(MS_U32 u32Reg)780 MS_U8 HAL_MVD_RegReadByte(MS_U32 u32Reg)
781 {
782 return (__builtin_constant_p( u32Reg ) ?
783 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) :
784 (RIU8[(u32Reg << 1) - (u32Reg & 1)]));
785 }
786
HAL_MVD_RegWriteBit(MS_U32 u32Reg,MS_BOOL bEnable,MS_U8 u8Mask)787 void HAL_MVD_RegWriteBit(MS_U32 u32Reg, MS_BOOL bEnable, MS_U8 u8Mask)
788 {
789 MS_U32 u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
790 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) :
791 (RIU8[u32Reg8] & ~(u8Mask));
792 }
793
HAL_MVD_RegWriteByteMask(MS_U32 u32Reg,MS_U8 u8Val,MS_U8 u8Msk)794 void HAL_MVD_RegWriteByteMask(MS_U32 u32Reg, MS_U8 u8Val, MS_U8 u8Msk)
795 {
796 MS_U32 u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
797 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk));
798 }
799
HAL_MVD_RegWrite4Byte(MS_U32 u32Reg,MS_U32 u32Val)800 void HAL_MVD_RegWrite4Byte(MS_U32 u32Reg, MS_U32 u32Val)
801 {
802 if ( __builtin_constant_p( u32Reg ) && !((u32Reg) & 0x01) )
803 {
804 RIU[u32Reg] = (MS_U16)(u32Val);
805 RIU[(u32Reg) + 2] = (MS_U16)((u32Val) >> 16);
806 }
807 else
808 {
809 if (u32Reg & 0x01)
810 {
811 RIU8[(u32Reg << 1) - 1] = u32Val;
812 RIU[u32Reg + 1] = (u32Val >> 8);
813 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24);
814 }
815 else
816 {
817 RIU[u32Reg] = u32Val;
818 RIU[u32Reg + 2] = (u32Val >> 16);
819 }
820 }
821 }
822
823
HAL_MVD_MemRead4Byte(MS_U32 u32Address)824 MS_U32 HAL_MVD_MemRead4Byte(MS_U32 u32Address)
825 {
826 volatile MS_U32 u32Val;
827 MS_ASSERT(!(u32Address & 0x03UL));
828
829 HAL_MVD_CPU_Sync();
830 HAL_MVD_ReadMemory();
831 #if 0 //test for miu0
832 if(bSHMMiuSel==MIU_SEL_1)
833 {
834 u32Address += MIU1_BASEADDR;
835 }
836
837 else
838 #endif
839 {
840 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
841 {
842 u32Address += MIU1_BASEADDR;
843 }
844 }
845 u32Val = *(volatile MS_U32*) HAL_MVD_PA2NonCacheSeg(u32Address);
846
847 //printf("mvd rd 0x%lx = 0x%lx\n", u32Address, u32Val);
848 return u32Val;
849 }
850
HAL_MVD_MemRead2Byte(MS_U32 u32Address)851 MS_U16 HAL_MVD_MemRead2Byte(MS_U32 u32Address)
852 {
853 MS_U32 u32ReadAddr;
854 MS_U32 u32ReadValue;
855 MS_U16 u16Value;
856 MS_U8 u8Shift;
857 u32ReadAddr = (u32Address >> 2) << 2;
858 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
859 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
860
861 u16Value = (MS_U16)(u32ReadValue >> u8Shift);
862 if(u8Shift == 24)
863 {
864 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr+4);
865 u16Value = u16Value << 8 || (MS_U16)(u32ReadValue & 0xFF);
866 }
867 return u16Value;
868 }
869
HAL_MVD_MemReadByte(MS_U32 u32Address)870 MS_U8 HAL_MVD_MemReadByte(MS_U32 u32Address)
871 {
872 MS_U32 u32ReadAddr;
873 MS_U32 u32ReadValue;
874 MS_U8 u8Value;
875 MS_U8 u8Shift;
876 u32ReadAddr = (u32Address >> 2) << 2;
877 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
878 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
879 u8Value = (MS_U8)(u32ReadValue >> u8Shift);
880
881 return u8Value;
882 }
883
HAL_MVD_MemWrite4Byte(MS_U32 u32Address,MS_U32 u32Value)884 MS_BOOL HAL_MVD_MemWrite4Byte(MS_U32 u32Address, MS_U32 u32Value)
885 {
886 #if 0 //test for miu0
887 if(bSHMMiuSel==MIU_SEL_1)
888 {
889 u32Address += MIU1_BASEADDR;
890 }
891 else
892 #endif
893 {
894 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
895 {
896 u32Address += MIU1_BASEADDR;
897 }
898 }
899
900 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
901
902 HAL_MVD_CPU_Sync();
903 HAL_MVD_FlushMemory();
904
905 return TRUE;
906 }
907
HAL_MVD_MemWriteByte(MS_U32 u32Address,MS_U8 u8Value)908 MS_BOOL HAL_MVD_MemWriteByte(MS_U32 u32Address, MS_U8 u8Value)
909 {
910 MS_U32 u32ReadAddr;
911 MS_U32 u32ReadValue;
912 MS_U8 u8Shift;
913
914 u32ReadAddr = (u32Address >> 2) << 2;
915 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8);
916 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
917 u32ReadValue &= ~(0xFFUL << u8Shift);
918 u32ReadValue |= ((MS_U32)u8Value << u8Shift);
919 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
920 return TRUE;
921 }
922
HAL_MVD_MemWrite2Byte(MS_U32 u32Address,MS_U16 u16Value)923 MS_BOOL HAL_MVD_MemWrite2Byte(MS_U32 u32Address, MS_U16 u16Value)
924 {
925 MS_U32 u32ReadAddr;
926 MS_U32 u32ReadValue;
927 MS_U8 u8Shift;
928
929 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8) ;
930 if(u8Shift < 24)
931 {
932 u32ReadAddr = (u32Address >> 2) << 2;
933 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
934 u32ReadValue &= ~(0xFFFF << u8Shift);
935 u32ReadValue |= ((MS_U32)u16Value << u8Shift);
936 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
937 }
938 else
939 {
940 HAL_MVD_MemWriteByte(u32Address, (MS_U8)(u16Value));
941 HAL_MVD_MemWriteByte(u32Address+1, (MS_U8)(u16Value >> 8));
942 }
943 return TRUE;
944 }
945
946
HAL_MVD_SetReqMask(MS_BOOL bEnMask)947 void HAL_MVD_SetReqMask(MS_BOOL bEnMask)
948 {
949 HAL_VPU_EX_MIU_RW_Protect(bEnMask);
950
951 if (MVDHW_ON_MIU1)
952 {
953 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W
954 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W
955 }
956 else
957 {
958 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT4); //MVD R/W
959 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT4); //MVD bbu R/W
960 }
961 HAL_MVD_Delayms(1);
962
963 return;
964 }
965
HAL_MVD_Memset4Byte(MS_U32 u32Address,MS_U32 u32Value)966 static MS_BOOL HAL_MVD_Memset4Byte(MS_U32 u32Address, MS_U32 u32Value)
967 {
968 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
969 {
970 u32Address += MIU1_BASEADDR;
971 }
972 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
973
974 return TRUE;
975 }
976
977 //------------------------------------------------------------------------------
978 /// Initialize MVD
979 /// @return -result of resetting MVD hardware
980 //------------------------------------------------------------------------------
HAL_MVD_RstHW(void)981 MS_BOOL HAL_MVD_RstHW(void)
982 {
983 MS_U32 u32Time = 0;
984
985 OSAL_MVD_LockHwMutex();
986
987 HAL_MVD_SetReqMask(ENABLE);
988
989 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU
990 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset
991
992 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD
993 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset
994
995 u32Time = HAL_MVD_GetTime();
996 while ( ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == 0)
997 && ((HAL_MVD_GetTime() - u32Time) < 200) );
998
999 #if 0 //bring up
1000 MVD_PRINT("====================>>>>MVD Ctrl status1.5a : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1001 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset
1002 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_1);//release reset
1003 MVD_DEBUGINFO(MVD_PRINT("MVD Ctrl status : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS)));
1004 MVD_PRINT("====================>>>>MVD Ctrl status1.5b : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1005 #endif
1006
1007 HAL_MVD_SetReqMask(DISABLE);
1008
1009 OSAL_MVD_UnlockHwMutex();
1010
1011 return TRUE;
1012 }
1013
1014
1015 //------------------------------------------------------------------------------
1016 /// Release CPU
1017 /// @return -release CPU successfully or not
1018 //------------------------------------------------------------------------------
HAL_MVD_ReleaseFW(void)1019 MS_BOOL HAL_MVD_ReleaseFW(void)
1020 {
1021 //For dual decoder, we only release VPU if it is not released yet.
1022 if (TRUE == HAL_VPU_EX_IsRsted())
1023 {
1024 MVD_DEBUGINFO(MVD_PRINT("%s VPU_IsRsted\n", __FUNCTION__));
1025 return TRUE;
1026 }
1027
1028 HAL_VPU_EX_SwRstRelse();
1029 return TRUE;
1030 }
1031
HAL_MVD_PA2NonCacheSeg(MS_PHYADDR u32PhyAddr)1032 MS_PHYADDR HAL_MVD_PA2NonCacheSeg(MS_PHYADDR u32PhyAddr)
1033 {
1034 return MS_PA2KSEG1(u32PhyAddr);
1035 }
1036
HAL_MVD_GetTime(void)1037 MS_U32 HAL_MVD_GetTime(void)
1038 {
1039 return MsOS_GetSystemTime();
1040 }
1041
HAL_MVD_Delayms(MS_U32 u32msecs)1042 void HAL_MVD_Delayms(MS_U32 u32msecs)
1043 {
1044 MsOS_DelayTask(u32msecs);
1045 }
1046
HAL_MVD_CPU_Sync(void)1047 void HAL_MVD_CPU_Sync(void)
1048 {
1049 MAsm_CPU_Sync();
1050 }
1051
HAL_MVD_FlushMemory(void)1052 void HAL_MVD_FlushMemory(void)
1053 {
1054 MsOS_FlushMemory();
1055 }
1056
HAL_MVD_ReadMemory(void)1057 void HAL_MVD_ReadMemory(void)
1058 {
1059 MsOS_ReadMemory();
1060 }
1061
1062 //Record the memory layout from system configuration
HAL_MVD_SetMEMCfg(MS_U8 u8Idx,MVD_MEMCfg * pMEMCfg)1063 MS_BOOL HAL_MVD_SetMEMCfg(MS_U8 u8Idx, MVD_MEMCfg* pMEMCfg)
1064 {
1065 memcpy(&(pMVDHalContext->stMemCfg[u8Idx]), pMEMCfg, sizeof(MVD_MEMCfg));
1066 //record the MIU settings
1067 pMVDHalContext->stMiuCfg.u32Miu1BaseAddr = pMEMCfg->u32Miu1BaseAddr;
1068 pMVDHalContext->stMiuCfg.bFWMiuSel = pMEMCfg->bFWMiuSel;
1069 pMVDHalContext->stMiuCfg.bHWMiuSel = pMEMCfg->bHWMiuSel;
1070 return TRUE;
1071 }
1072
HAL_MVD_GetMEMCfg(MS_U8 u8Idx)1073 MVD_MEMCfg* HAL_MVD_GetMEMCfg(MS_U8 u8Idx)
1074 {
1075 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1076 MVD_MEMCfg* pInfo = NULL;
1077 pInfo = &(pMVDHalContext->stMemCfg[u8Idx]);
1078 return pInfo;
1079 }
1080
HAL_MVD_SetFWCfg(MS_U8 u8Idx,MVD_FWCfg * pFWCfg)1081 MS_BOOL HAL_MVD_SetFWCfg(MS_U8 u8Idx, MVD_FWCfg* pFWCfg)
1082 {
1083 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1084 memcpy(&(pMVDHalContext->stFwCfg[u8Idx]), pFWCfg, sizeof(MVD_FWCfg));
1085 memcpy(&(pMVDHalContext->stFwCfg[u8Idx].stFBReduction), &pFWCfg->stFBReduction,sizeof(MVD_FB_Reduction));
1086 return TRUE;
1087 }
1088
HAL_MVD_GetFWCfg(MS_U8 u8Idx)1089 MVD_FWCfg* HAL_MVD_GetFWCfg(MS_U8 u8Idx)
1090 {
1091 MVD_FWCfg* pInfo = NULL;
1092 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1093 pInfo = &(pMVDHalContext->stFwCfg[u8Idx]);
1094 return pInfo;
1095 }
1096
HAL_MVD_GetFBMode(MS_U8 u8Idx)1097 MS_U8 HAL_MVD_GetFBMode(MS_U8 u8Idx)
1098 {
1099 MS_U8 u8Mode = MVD3_SD_MODE;
1100 u8Mode = pMVDHalContext->stFwCfg[u8Idx].u8FBMode;
1101 MVD_DEBUGINFO(MVD_PRINT("FBMode=0x%x\n", u8Mode));
1102 return u8Mode;
1103 }
1104
HAL_MVD_GetCodecType(MS_U8 u8Idx)1105 MVD_CodecType HAL_MVD_GetCodecType(MS_U8 u8Idx)
1106 {
1107 MVD_CodecType eCodecType = E_MVD_CODEC_UNKNOWN;
1108 eCodecType = pMVDHalContext->stFwCfg[u8Idx].eCodecType;
1109 return eCodecType;
1110 }
1111
HAL_MVD_GetSrcMode(MS_U8 u8Idx)1112 MVD_SrcMode HAL_MVD_GetSrcMode(MS_U8 u8Idx)
1113 {
1114 MVD_SrcMode eSrcMode = E_MVD_SRC_UNKNOWN;
1115 eSrcMode = pMVDHalContext->stFwCfg[u8Idx].eSrcMode;
1116 return eSrcMode;
1117 }
1118
HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)1119 MS_BOOL HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)
1120 {
1121 if(pMVDHalContext != NULL)
1122 {
1123 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = mode;
1124 return TRUE;
1125 }
1126 else
1127 {
1128 return FALSE;
1129 }
1130 }
1131
1132
HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)1133 MVD_CtrlCfg* HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)
1134 {
1135 MVD_CtrlCfg* pInfo = NULL;
1136 pInfo = &(pMVDHalContext->stCtrlCfg[u8Idx]);
1137 return pInfo;
1138 }
1139
HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)1140 MVD_SLQTBLInfo* HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)
1141 {
1142 MVD_SLQTBLInfo* pInfo = NULL;
1143 pInfo = &(pMVDHalContext->stSlqTblInfo[u8Idx]);
1144 return pInfo;
1145 }
HAL_MVD_GetAliveInfo(MS_U8 u8Idx)1146 MVD_ALIVEInfo* HAL_MVD_GetAliveInfo(MS_U8 u8Idx)
1147 {
1148 MVD_ALIVEInfo* pInfo = NULL;
1149 pInfo = &(pMVDHalContext->aliveInfo[u8Idx]);
1150 return pInfo;
1151 }
1152
HAL_MVD_PowerCtrl(MS_BOOL bOn)1153 void HAL_MVD_PowerCtrl(MS_BOOL bOn)
1154 {
1155 HAL_MVD_RegWriteByteMask(REG_CKG_MVD, pMVDHalContext->_u32MVDClockType, CKG_MVD_MASK);
1156 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_GATED);
1157 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_INVERT);
1158
1159 HAL_MVD_RegWriteByteMask(REG_CKG_MVD2, pMVDHalContext->_u32MVD2ClockType, CKG_MVD2_MASK);
1160 HAL_MVD_RegWriteBit(REG_CKG_MVD2, !bOn, CKG_MVD2_GATED);
1161 HAL_MVD_RegWriteBit(REG_CKG_MVD2, !bOn, CKG_MVD2_INVERT);
1162
1163 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_GATED);
1164 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_INVERT);
1165
1166 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_GATED);
1167 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_INVERT);
1168
1169 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_GATED);
1170 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_INVERT);
1171
1172 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_GATED);
1173 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_INVERT);
1174
1175 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_GATED);
1176 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_INVERT);
1177
1178 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_GATED);
1179 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_INVERT);
1180
1181 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_GATED);
1182 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_INVERT);
1183
1184 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_GATED);
1185 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_INVERT);
1186
1187 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_GATED);
1188 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_INVERT);
1189
1190 //Set MVD all clock sources equal to clk_miu_p 0: enable 1: disable
1191 //Per Lawrence, mark this line:
1192 // Sync mode is debug mode, so driver shouldn't write 1 to this register in normal case.
1193 //HAL_MVD_RegWriteBit(REG_CKG_MVD_SYNC, !bOn, CKG_MVD_SYNC_GATED);
1194
1195 return;
1196 }
1197
1198 #if 0
1199 void HAL_MVD_Sleep(MS_U32 u32us)
1200 {
1201 MsOS_DelayTaskUs(u32us);
1202 }
1203 #endif
HAL_MVD_ResetHandShake(MS_U8 u8Idx,MVD_HANDSHAKE_CMD cmd)1204 void HAL_MVD_ResetHandShake(MS_U8 u8Idx, MVD_HANDSHAKE_CMD cmd)
1205 {
1206 MS_U32 u32BufStart2 = GET_FRMINFO_BUFFADD(u8Idx);
1207 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.bFWMiuSel,u32BufStart2,u32BufStart2);
1208 MS_U32* temp2 = (MS_U32*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_CMD_HANDSHAKE_INDEX);
1209
1210 _MVD_MemResetBit(temp2,cmd);
1211 MsOS_FlushMemory();
1212 }
1213
1214 //------------------------------------------------------------------------------
1215 /// Wait MVD command ready or timeout
1216 /// @return -MVD command ready or timeout
1217 //------------------------------------------------------------------------------
HAL_MVD_TimeOut(MS_U8 u8Idx)1218 MS_BOOL HAL_MVD_TimeOut(MS_U8 u8Idx)
1219 {
1220 MS_U32 i;
1221 MS_U32 u32StartTime = MsOS_GetSystemTime();
1222
1223 for ( i = 0; i < MVD_PollingTimes; i++ )
1224 {
1225 ///- wait until MVD command ready or timeout
1226 if ( ( HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY ) == MVD_STATUS_READY )
1227 {
1228 return FALSE;
1229 }
1230
1231 if (/*(TRUE == pMVDHalContext->bStopped[u8Idx]) ||*/ ((MsOS_GetSystemTime()-u32StartTime)>1300))
1232 {
1233 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%ld)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
1234 return TRUE;
1235 }
1236
1237 //HAL_MVD_Sleep(5);
1238 }
1239 MVD_DEBUGERROR( MVD_ERR("MVD_TimeOut=%lx\n", i) );
1240 return TRUE;
1241 }
1242
1243 //------------------------------------------------------------------------------
1244 /// Set MVD firmware command
1245 /// @param -u8cmd \b IN : MVD command
1246 /// @param -pstCmdArg \b IN : pointer to command argument
1247 //------------------------------------------------------------------------------
HAL_MVD_MVDCommand(MS_U8 u8cmd,MVD_CmdArg * pstCmdArg)1248 MS_BOOL HAL_MVD_MVDCommand ( MS_U8 u8cmd, MVD_CmdArg *pstCmdArg )
1249 {
1250 MS_BOOL bRet = TRUE;
1251 #if defined(MSOS_TYPE_ECOS)
1252 if(MsOS_In_Interrupt() != TRUE)
1253 {
1254 OSAL_MVD_IntDisable();
1255 OSAL_MVD_LockHwMutex();
1256 }
1257 #else
1258 OSAL_MVD_LockHwMutex();
1259 #endif
1260
1261 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1262 {
1263 bRet = FALSE;
1264 goto _CMD_DONE;
1265 }
1266
1267 HAL_MVD_RegWriteByte(MVD_ARG0, pstCmdArg->Arg0);
1268 HAL_MVD_RegWriteByte(MVD_ARG1, pstCmdArg->Arg1);
1269 HAL_MVD_RegWriteByte(MVD_ARG2, pstCmdArg->Arg2);
1270 HAL_MVD_RegWriteByte(MVD_ARG3, pstCmdArg->Arg3);
1271 HAL_MVD_RegWriteByte(MVD_ARG4, pstCmdArg->Arg4);
1272 HAL_MVD_RegWriteByte(MVD_ARG5, pstCmdArg->Arg5);
1273 HAL_MVD_RegWriteByte(MVD_COMMAND, u8cmd);
1274 if ((CMD_GET_AFD != u8cmd) && (CMD_SLQ_GET_TBL_RPTR != u8cmd) &&
1275 (CMD_SLQ_UPDATE_TBL_WPTR != u8cmd) && (CMD_GET_NEXTDISPFRM != u8cmd) &&
1276 (CMD_DECODE_STATUS != u8cmd) && (CMD_RD_PTS != u8cmd) &&
1277 (CMD_GET_INT_STAT != u8cmd) && (CMD_RD_IO != u8cmd))
1278 {
1279 MVD_DEBUG_FWCMD(MVD_PRINT("MVD_CMD: %x; %x, %x, %x, %x, %x, %x\n", u8cmd, pstCmdArg->Arg0,
1280 pstCmdArg->Arg1, pstCmdArg->Arg2, pstCmdArg->Arg3, pstCmdArg->Arg4, pstCmdArg->Arg5));
1281 }
1282
1283 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1284 {
1285 bRet = FALSE;
1286 goto _CMD_DONE;
1287 }
1288
1289 pstCmdArg->Arg0 = HAL_MVD_RegReadByte(MVD_ARG0);
1290 pstCmdArg->Arg1 = HAL_MVD_RegReadByte(MVD_ARG1);
1291 pstCmdArg->Arg2 = HAL_MVD_RegReadByte(MVD_ARG2);
1292 pstCmdArg->Arg3 = HAL_MVD_RegReadByte(MVD_ARG3);
1293 pstCmdArg->Arg4 = HAL_MVD_RegReadByte(MVD_ARG4);
1294 pstCmdArg->Arg5 = HAL_MVD_RegReadByte(MVD_ARG5);
1295
1296 _CMD_DONE:
1297 #if defined(MSOS_TYPE_ECOS)
1298 if(MsOS_In_Interrupt() != TRUE)
1299 {
1300 OSAL_MVD_UnlockHwMutex();
1301 OSAL_MVD_IntEnable();
1302 }
1303 #else
1304 OSAL_MVD_UnlockHwMutex();
1305 #endif
1306
1307 if (!bRet)
1308 {
1309 MVD_DEBUG_FWCMD(MVD_PRINT("%s timeout dump pc\n", __FUNCTION__));
1310 MS_U32 x=0;
1311 for (x=0; x<30; x++)
1312 MVD_DEBUG_FWCMD(MVD_PRINT("0x%lx\n", HAL_VPU_EX_GetProgCnt()));
1313 MVD_DEBUG_FWCMD(MVD_PRINT("###\n"));
1314 }
1315
1316 return bRet;
1317 }
1318
HAL_MVD_SetSyncClk(MS_BOOL bEnable)1319 void HAL_MVD_SetSyncClk(MS_BOOL bEnable)
1320 {
1321 MS_ASSERT(0==bEnable);//Notice: Euclid & T3 have no sync_mode; Bit4 must be 0.
1322
1323 OSAL_MVD_LockHwMutex();
1324 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE);
1325 OSAL_MVD_UnlockHwMutex();
1326
1327 return;
1328 }
1329
HAL_MVD_InitHW(void)1330 MS_BOOL HAL_MVD_InitHW(void)
1331 {
1332 //Set MVD Clock @ reg_CHIPTOP
1333 HAL_MVD_PowerCtrl(ENABLE);
1334
1335 //Set MVD Clock aync
1336 HAL_MVD_SetSyncClk(DISABLE);
1337
1338 //MVD reset
1339 if(!HAL_MVD_RstHW())
1340 {
1341 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_MVDInit:MVD4ResetHW failed\n"));
1342 return FALSE;
1343 }
1344 else
1345 {
1346 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW success\n"));
1347 }
1348
1349 return TRUE;
1350 }
1351
1352
1353 //------------------------------------------------------------------------------
1354 /// Get MVD firmware version
1355 /// @return -firmware version
1356 //------------------------------------------------------------------------------
HAL_MVD_GetFWVer(MS_U32 u32VpuSid)1357 MS_U32 HAL_MVD_GetFWVer(MS_U32 u32VpuSid)
1358 {
1359 #if 0
1360 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_FW);
1361 #else
1362 UNUSED(u32VpuSid);
1363 MVD_CmdArg mvdcmd;
1364
1365 SETUP_CMDARG(mvdcmd);
1366 if (HAL_MVD_MVDCommand( CMD_GET_FW_VERSION, &mvdcmd ) == FALSE)
1367 {
1368 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_GET_FW_VERSION ) );
1369 return 0;
1370 }
1371 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1372 #endif
1373 }
1374
1375 //------------------------------------------------------------------------------
1376 /// Get MVD firmware interface version
1377 /// @return -firmware interface version
1378 //------------------------------------------------------------------------------
HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)1379 MS_U32 HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)
1380 {
1381 #if 0
1382 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_IF);
1383 #else
1384 UNUSED(u32VpuSid);
1385 MVD_CmdArg mvdcmd;
1386
1387 SETUP_CMDARG(mvdcmd);
1388 if (HAL_MVD_MVDCommand( CMD_INTERFACE_VERSION, &mvdcmd ) == FALSE)
1389 {
1390 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_INTERFACE_VERSION ) );
1391 return 0;
1392 }
1393 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1394 #endif
1395 }
1396
1397 //------------------------------------------------------------------------------
1398 /// Check MVD firmware status
1399 /// @return -firmware is ready or not
1400 //------------------------------------------------------------------------------
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1401 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1402 {
1403 MS_U32 u32TimeOut = 2000;
1404
1405 //check firmware version consistent with header file
1406 while ((INTERFACE_VERSION != HAL_MVD_GetFWIfVer(u32VpuSid)) && (--u32TimeOut));
1407 if (u32TimeOut == 0)
1408 {
1409 MVD_ERROR(MVD_ERR("MVD_FW_IF_Version=%lx inconsistent with header file(%x)!\n",
1410 HAL_MVD_GetFWIfVer(u32VpuSid), INTERFACE_VERSION));
1411 return FALSE;
1412 }
1413
1414 if (FW_VERSION != HAL_MVD_GetFWVer(u32VpuSid))
1415 {
1416 MVD_DEBUGINFO(MVD_PRINT("Warning! FWBinVer(%lx) != FWHdrVer(%x)\n", HAL_MVD_GetFWVer(u32VpuSid), FW_VERSION));
1417 }
1418 MVD_DEBUGINFO(MVD_PRINT("MVD version Interface = %x, FW = %x\n", INTERFACE_VERSION, FW_VERSION));
1419
1420 return TRUE;
1421 }
1422
_DumpCtrl(MS_U8 u8Idx)1423 MS_BOOL _DumpCtrl(MS_U8 u8Idx)
1424 {
1425 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1426
1427 //MVD_PRINT("u32VA=0x%lx, PA=0x%lx\n", u32VA, pstMemCfg->u32FWCodeAddr);
1428 struct _ctl_info *ctl_ptr = (struct _ctl_info *)
1429 HAL_MVD_PA2NonCacheSeg(pstMemCfg->u32FWCodeAddr + CTL_INFO_ADDR);
1430 MS_U32 u32timeout = HAL_MVD_GetTime() + 1000;//u32HVDCmdTimeout;
1431
1432 HAL_MVD_ReadMemory();
1433
1434 MVD_DEBUGINFO(MVD_PRINT("version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1435 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1436
1437 while (CTL_TASK_CMDRDY != ctl_ptr->statue)
1438 {
1439 if (HAL_MVD_GetTime() > u32timeout)
1440 {
1441 MVD_DEBUGERROR(MVD_ERR("CTRL timeout!!! %d\n", __LINE__));
1442 return FALSE;
1443 }
1444 }
1445
1446 MVD_DEBUGINFO(MVD_PRINT("Version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1447 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1448
1449 MS_U8 i;
1450
1451 for (i = 0; i < 4; i++)
1452 {
1453 MVD_DEBUGINFO(MVD_PRINT("%s: Task %d, status=%d\n", __FUNCTION__, i, ctl_ptr->task_statue[i]));
1454 }
1455 return TRUE;
1456 }
1457
1458
MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)1459 static VPU_EX_SourceType MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)
1460 {
1461 VPU_EX_SourceType eVpuSrcType = E_VPU_EX_INPUT_NONE;
1462 switch (eSrcMode)
1463 {
1464 case E_MVD_TS_MODE:
1465 case E_MVD_TS_FILE_MODE:
1466 eVpuSrcType = E_VPU_EX_INPUT_TSP;
1467 break;
1468
1469 case E_MVD_SLQ_TBL_MODE:
1470 case E_MVD_SLQ_MODE:
1471 case E_MVD_FILE_MODE:
1472 eVpuSrcType = E_VPU_EX_INPUT_FILE;
1473 break;
1474
1475 case E_MVD_SRC_UNKNOWN:
1476 default:
1477 break;
1478 }
1479 return eVpuSrcType;
1480 }
1481
MVD_GetTaskInfo(VPU_EX_TaskInfo * pstTaskInfo,MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1482 static void MVD_GetTaskInfo(VPU_EX_TaskInfo* pstTaskInfo, MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1483 {
1484 pstTaskInfo->u32Id = (u8Idx << 8 | eVpuId);
1485 pstTaskInfo->eDecType = E_VPU_EX_DECODER_MVD;
1486 pstTaskInfo->eVpuId = eVpuId;
1487 pstTaskInfo->eSrcType = MVD_MapVpuSrcType(HAL_MVD_GetSrcMode(u8Idx));
1488 pstTaskInfo->u32HeapSize = MVD_DRAM_SIZE;
1489 }
1490
1491
HAL_MVD_CreateTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1492 MS_BOOL HAL_MVD_CreateTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1493 {
1494 MS_BOOL bRet = FALSE;
1495
1496 MVD_FWCfg* pstCfg = HAL_MVD_GetFWCfg(u8Idx);
1497 HAL_VPU_EX_SetFWReload(!(pstCfg->bNotReload));
1498
1499 MVD_DEBUGINFO(MVD_PRINT("\n\n Create Task(%x)!!!\n", u8Idx));
1500 VPU_EX_TaskInfo stTaskInfo;
1501 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
1502
1503 VPU_EX_FWCodeCfg stVpuFWCfg;
1504 VPU_EX_NDecInitPara stVpuInitPara;
1505 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1506 stVpuInitPara.pTaskInfo = &stTaskInfo;
1507 stVpuInitPara.pVLCCfg = NULL;
1508
1509 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1510 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1511 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1512 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1513 stVpuFWCfg.u32DstSize = pMemCfg->u32FWCodeSize;
1514 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
1515 bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara);
1516
1517 MVD_DEBUGINFO(MVD_PRINT(" Create Task!!! bRet=%x ###\n\n", bRet));
1518 _DumpCtrl(u8Idx);
1519
1520 return bRet;
1521 }
1522
HAL_MVD_DeleteTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1523 MS_BOOL HAL_MVD_DeleteTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1524 {
1525 MS_BOOL bRet = FALSE;
1526 MVD_DEBUGINFO(MVD_PRINT("\n\n Delete Task(%x)!!!\n", u8Idx));
1527
1528 VPU_EX_TaskInfo stTaskInfo;
1529 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
1530
1531 VPU_EX_FWCodeCfg stVpuFWCfg;
1532 VPU_EX_NDecInitPara stVpuInitPara;
1533 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1534 stVpuInitPara.pTaskInfo = &stTaskInfo;
1535
1536 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1537 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1538 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1539 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1540 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
1541
1542
1543 bRet = HAL_VPU_EX_TaskDelete((MS_U32) eVpuId, &stVpuInitPara);
1544 MVD_DEBUGINFO(MVD_PRINT(" Delete Task!!! ###\n\n"));
1545 _DumpCtrl(u8Idx);
1546 return bRet;
1547 }
1548
HAL_MVD_InitFW(MS_U32 u32VpuSid)1549 MS_BOOL HAL_MVD_InitFW(MS_U32 u32VpuSid)
1550 {
1551 //to fix the timing issue of getting FWIfVer on Chakra2
1552 HAL_MVD_Delayms(1);
1553
1554 //check FW ready
1555 if ( !_MVD_Check_FW_Rdy(u32VpuSid))
1556 {
1557 MS_ASSERT(0);
1558 return FALSE;
1559 }
1560
1561 if(pMVDHalContext->_stMVDStream[0].bUsed == FALSE && pMVDHalContext->_stMVDStream[1].bUsed == FALSE) // no mvd is used
1562 {
1563 MVD_CmdArg mvdcmd;
1564 SETUP_CMDARG(mvdcmd);
1565 mvdcmd.Arg0 = 1; //reset mvd engine,if have only one mvd
1566 SET_DECNUM(mvdcmd, ((MS_U8)u32VpuSid));
1567 if (HAL_MVD_MVDCommand( CMD_SW_RESET, &mvdcmd ) == FALSE)
1568 {
1569 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SW_RESET ) );
1570 return FALSE;
1571 }
1572 }
1573
1574 return TRUE;
1575 }
1576
1577 #define _MVD_INIT_FAIL_RET() \
1578 do { \
1579 HAL_MVD_SetIsUsed(u8HalIdx, FALSE); \
1580 return FALSE; \
1581 } while (0)
1582
1583
HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType,MS_U32 u32VpuSid)1584 MS_BOOL HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType, MS_U32 u32VpuSid)
1585 {
1586 //OSAL_MVD_MutexInit();
1587 MS_BOOL no_use = FALSE;
1588 MS_BOOL ret;
1589
1590 ret = MDrv_MVD_AUTH_IPCheck(eCodecType,&no_use);
1591 if(ret == FALSE)
1592 {
1593 return FALSE;
1594 }
1595
1596 if (!HAL_MVD_CreateTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
1597 {
1598 _MVD_INIT_FAIL_RET();
1599 }
1600
1601 pMVDHalContext->bStopped[u8HalIdx] = FALSE;
1602
1603 if (!HAL_MVD_InitFW(u8HalIdx))
1604 {
1605 MVD_DEBUGERROR(MVD_ERR("%s:HAL_MVD_InitFW(%x) failed\n", __FUNCTION__, u8HalIdx));
1606 if (!HAL_MVD_DeleteTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
1607 {
1608 MVD_DEBUGERROR(MVD_ERR("%s:HAL_MVD_DeleteTask failed\n", __FUNCTION__));
1609 }
1610
1611 _MVD_INIT_FAIL_RET();
1612 }
1613 else
1614 {
1615 MVD_DEBUGINFO(MVD_PRINT("%s:HAL_MVD_InitFW(%x) success\n", __FUNCTION__, u8HalIdx));
1616 }
1617
1618 HAL_MVD_SetIsUsed(u8HalIdx, TRUE);
1619
1620 return TRUE;
1621 }
1622
1623 #define _MVD_CMDRDY ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == MVD_STATUS_READY)
1624 //------------------------------------------------------------------------------
1625 /// Check if MVD command is ready
1626 /// @return TRUE or FALSE
1627 /// - TRUE, Success to process the command
1628 /// - FALSE, Failed due to timeout
1629 //------------------------------------------------------------------------------
HAL_MVD_GetCmdRdy(void)1630 MS_BOOL HAL_MVD_GetCmdRdy(void)
1631 {
1632 MS_U32 timeoutTick = 2000;
1633
1634 while ((!_MVD_CMDRDY) && ((timeoutTick--)!=0));
1635
1636 if (0 == timeoutTick)
1637 return FALSE;
1638 else
1639 return TRUE;
1640 }
1641
HAL_MVD_CheckIdle(void)1642 MS_BOOL HAL_MVD_CheckIdle(void)
1643 {
1644 MS_BOOL bIsIdle = FALSE;
1645 MVD_CmdArg mvdcmd;
1646
1647 //issue CheckIdle command
1648 SETUP_CMDARG(mvdcmd);
1649 SET_CMD_RET_FALSE(CMD_MVD_IDLE, &mvdcmd);
1650
1651 bIsIdle = (mvdcmd.Arg0 == 1);
1652 if (HAL_MVD_GetCmdRdy())
1653 {
1654 return bIsIdle;
1655 }
1656 else
1657 {
1658 return FALSE;
1659 }
1660 }
1661
1662
_MVD_SoftRstHW(void)1663 static MS_BOOL _MVD_SoftRstHW(void)
1664 {
1665 return FALSE;
1666 }
1667
1668 //------------------------------------------------------------------------------
1669 /// Soft-reset MVD
1670 /// Ref AP note p.12 HK2MVD Reset Flow
1671 /// @return TRUE or FALSE
1672 /// - TRUE, Success to soft-reset MVD
1673 /// - FALSE, Failed. Need init MVD again.
1674 //------------------------------------------------------------------------------
HAL_MVD_SoftRstHW(void)1675 MS_BOOL HAL_MVD_SoftRstHW(void)
1676 {
1677 MS_U32 timetick = 2000;
1678
1679 if (HAL_MVD_GetCmdRdy())
1680 {
1681 //idle check
1682 while ((!HAL_MVD_CheckIdle()) && ((timetick--)!=0));
1683
1684 //either MVD is idle or timeout, do ENG/SLQ reset
1685 return _MVD_SoftRstHW(); //Reset HW engine
1686 }
1687 else
1688 {
1689 return FALSE; //here means "CPU hanging"
1690 }
1691 }
1692
1693 //------------------------------------------------------------------------------
1694 /// Clean the IRQ bit (in interrupt handler should call this function while the
1695 /// interrupt has been triggered.
1696 /// @param none
1697 /// @return none
1698 /// @internal
1699 //------------------------------------------------------------------------------
HAL_MVD_ClearIRQ(void)1700 void HAL_MVD_ClearIRQ(void)
1701 {
1702 OSAL_MVD_LockHwMutex();
1703 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT);
1704 OSAL_MVD_UnlockHwMutex();
1705 return;
1706 }
1707
1708 //------------------------------------------------------------------------------
1709 /// Set display speed.
1710 ///FW use (# of B frames) / (# of decode frames) < Ratio this formula to adjustment.
1711 ///Once if the ratio is 1, that means, whenever (#Bframes / #decoded) < 1, then
1712 ///FW would drop the B frame.
1713 ///In other words, once AP need to back to normal mode, AP have to set the arg0 to 0.
1714 //------------------------------------------------------------------------------
HAL_MVD_SetSpeed(MS_U8 u8Idx,MVD_SpeedType eSpeedType,MS_U8 u8Multiple)1715 MS_BOOL HAL_MVD_SetSpeed(MS_U8 u8Idx, MVD_SpeedType eSpeedType, MS_U8 u8Multiple)
1716 {
1717 MVD_CmdArg mvdcmd;
1718
1719 SETUP_CMDARG(mvdcmd);
1720
1721 if (E_MVD_SPEED_FAST == eSpeedType)
1722 mvdcmd.Arg0 = 1; //fast forward
1723 else if (E_MVD_SPEED_SLOW == eSpeedType)
1724 mvdcmd.Arg0 = 2; //slow motion
1725 else
1726 mvdcmd.Arg0 = 0; //normal speed
1727
1728 if (u8Multiple == 1)
1729 {
1730 mvdcmd.Arg0 = 0;
1731 //The only way to be NORMAL speed.
1732 }
1733
1734 mvdcmd.Arg1 = u8Multiple;
1735 SET_DECNUM(mvdcmd, u8Idx);
1736 SET_CMD_RET_FALSE(CMD_DISP_SPEED_CTRL, &mvdcmd);
1737 return TRUE;
1738 }
1739
1740 //------------------------------------------------------------------------------
1741 /// Set frame buffer address to MVD
1742 /// @param -u32addr \b IN : start address
1743 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx,MS_U32 u32addr,MS_U8 u8fbMode)1744 void HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx, MS_U32 u32addr, MS_U8 u8fbMode)
1745 {
1746 MVD_CmdArg mvdcmd;
1747
1748 if ((u32addr>>3) > MAX_ADD_28BIT)
1749 {
1750 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_SetFrameBuffAddr: only support 28bit add!\n"));
1751 return;
1752 }
1753
1754 MS_ASSERT((u32addr%8)==0);
1755 u32addr >>= 3;
1756
1757 SETUP_CMDARG(mvdcmd);
1758 mvdcmd.Arg0 = L_WORD(u32addr);
1759 mvdcmd.Arg1 = H_WORD(u32addr);
1760 mvdcmd.Arg2 = L_DWORD(u32addr);
1761
1762 //Frame Buffer Mode Setting
1763 mvdcmd.Arg3 = u8fbMode | ((u32addr>>24)&0x0f);
1764 MVD_DEBUGINFO(MVD_PRINT("FramebufferAdd 0x%lx, FB Mode 0x%x, arg3=0x%x\n", u32addr, u8fbMode, mvdcmd.Arg3));
1765 SET_DECNUM(mvdcmd, u8Idx);
1766 if (HAL_MVD_MVDCommand( CMD_FB_BASE, &mvdcmd ) == FALSE)
1767 {
1768 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FB_BASE ) );
1769 return;
1770 }
1771
1772 return;
1773 }
1774
1775 //------------------------------------------------------------------------------
1776 /// Set header buffer address to MVD
1777 /// @param -u32addr \b IN : start address
1778 //------------------------------------------------------------------------------
HAL_MVD_SetHeaderBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1779 void HAL_MVD_SetHeaderBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1780 {
1781 MVD_CmdArg mvdcmd;
1782 #if 0 //test for miu0
1783 MVD_MEMCfg* pstMemCfg = NULL;
1784 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1785 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
1786 u32addr += HAL_VPU_EX_MIU1BASE();
1787 #endif
1788 MS_ASSERT((u32addr%8)==0);
1789 u32addr >>= 3;
1790
1791 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1792 if (HAL_MVD_MVDCommand( CMD_HEADER_INFO_BUF, &mvdcmd ) == FALSE)
1793 {
1794 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_HEADER_INFO_BUF ) );
1795 }
1796 return;
1797 }
1798
1799 //------------------------------------------------------------------------------
1800 /// Set vol info buffer address to MVD
1801 /// @param -u32addr \b IN : start address
1802 //------------------------------------------------------------------------------
HAL_MVD_SetVolInfoBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1803 void HAL_MVD_SetVolInfoBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1804 {
1805 MVD_CmdArg mvdcmd;
1806 #if 0 //test for miu0
1807 MVD_MEMCfg* pstMemCfg = NULL;
1808 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1809 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
1810 u32addr += HAL_VPU_EX_MIU1BASE();
1811 #endif
1812 MS_ASSERT((u32addr%8)==0);
1813 u32addr >>= 3;
1814
1815 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1816 if (HAL_MVD_MVDCommand( CMD_VOL_INFO_BUF, &mvdcmd ) == FALSE)
1817 {
1818 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_VOL_INFO_BUF ) );
1819 }
1820 return;
1821 }
1822
1823 //------------------------------------------------------------------------------
1824 /// Set frame info buffer address to MVD
1825 /// @param -u32addr \b IN : start address
1826 //------------------------------------------------------------------------------
HAL_MVD_SetFrameInfoBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1827 void HAL_MVD_SetFrameInfoBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1828 {
1829 MVD_CmdArg mvdcmd;
1830 #if 0 //test for miu0
1831 MVD_MEMCfg* pstMemCfg = NULL;
1832 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1833 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
1834 u32addr += HAL_VPU_EX_MIU1BASE();
1835 #endif
1836 MS_ASSERT((u32addr%8)==0);
1837 u32addr >>= 3;
1838
1839 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1840 if (HAL_MVD_MVDCommand( CMD_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
1841 {
1842 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FRAME_INFO_BUF ) );
1843 }
1844 return;
1845 }
1846
1847 //------------------------------------------------------------------------------
1848 /// Set IAP buffer address to MVD
1849 /// @param -u32addr \b IN : start address
1850 //------------------------------------------------------------------------------
HAL_MVD_SetIAPBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1851 void HAL_MVD_SetIAPBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1852 {
1853 MVD_CmdArg mvdcmd;
1854 MS_ASSERT((u32addr%8192)==0);
1855 u32addr >>= 13;
1856
1857 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1858 if (HAL_MVD_MVDCommand( CMD_IAP_BUF_START, &mvdcmd ) == FALSE)
1859 {
1860 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_IAP_BUF_START ) );
1861 }
1862 return;
1863 }
1864
1865 //------------------------------------------------------------------------------
1866 /// Set Data Partition buffer address to MVD
1867 /// @param -u32addr \b IN : start address
1868 //------------------------------------------------------------------------------
HAL_MVD_SetDPBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1869 void HAL_MVD_SetDPBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1870 {
1871 MVD_CmdArg mvdcmd;
1872 MS_ASSERT((u32addr%8)==0);
1873 u32addr >>= 3;
1874
1875 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1876 if (HAL_MVD_MVDCommand( CMD_DP_BUF_START, &mvdcmd ) == FALSE)
1877 {
1878 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DP_BUF_START ) );
1879 }
1880 return;
1881 }
1882
1883 //------------------------------------------------------------------------------
1884 /// Set Motion Vector buffer address to MVD
1885 /// @param -u32addr \b IN : start address
1886 //------------------------------------------------------------------------------
HAL_MVD_SetMVBufferAddr(MS_U8 u8Idx,MS_U32 u32addr)1887 void HAL_MVD_SetMVBufferAddr (MS_U8 u8Idx, MS_U32 u32addr )
1888 {
1889 MVD_CmdArg mvdcmd;
1890 MS_ASSERT((u32addr%2048)==0);
1891 u32addr >>= 3;
1892
1893 SET_CMDARG(mvdcmd, u32addr, u8Idx);
1894 if (HAL_MVD_MVDCommand( CMD_MV_BUF_START, &mvdcmd ) == FALSE)
1895 {
1896 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_MV_BUF_START ) );
1897 }
1898 return;
1899 }
1900
_MVD_SetUserDataBufStart(MS_U8 u8Idx,MS_U32 u32addr,MS_U8 u8arg3)1901 static void _MVD_SetUserDataBufStart(MS_U8 u8Idx, MS_U32 u32addr, MS_U8 u8arg3)
1902 {
1903 MVD_CmdArg mvdcmd;
1904 #if 0 //test for miu0
1905 MVD_MEMCfg* pstMemCfg = NULL;
1906 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1907 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
1908 u32addr += HAL_VPU_EX_MIU1BASE();
1909 #endif
1910 MS_ASSERT((u32addr%8)==0);
1911 u32addr >>= 3;
1912 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, u32addr, u8arg3));
1913
1914 SETUP_CMDARG(mvdcmd);
1915 mvdcmd.Arg0 = L_WORD(u32addr);
1916 mvdcmd.Arg1 = H_WORD(u32addr);
1917 mvdcmd.Arg2 = L_DWORD(u32addr);
1918 mvdcmd.Arg4 = H_DWORD(u32addr);
1919 mvdcmd.Arg3 = u8arg3;
1920 SET_DECNUM(mvdcmd, u8Idx);
1921 if (HAL_MVD_MVDCommand( CMD_USER_BUF_START, &mvdcmd ) == FALSE)
1922 {
1923 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_START ) );
1924 return;
1925 }
1926 return;
1927 }
1928
_MVD_SetUserDataBufSize(MS_U8 u8Idx,MS_U32 u32size,MS_U8 u8arg3)1929 static void _MVD_SetUserDataBufSize(MS_U8 u8Idx, MS_U32 u32size, MS_U8 u8arg3)
1930 {
1931 MVD_CmdArg mvdcmd;
1932
1933 MS_ASSERT((u32size%8)==0);
1934 u32size >>= 3;
1935 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, u32size, u8arg3));
1936
1937 SETUP_CMDARG(mvdcmd);
1938 mvdcmd.Arg0 = L_WORD(u32size);
1939 mvdcmd.Arg1 = H_WORD(u32size);
1940 mvdcmd.Arg2 = L_DWORD(u32size);
1941 mvdcmd.Arg4 = H_DWORD(u32size);
1942 mvdcmd.Arg3 = u8arg3;
1943 if(mvdcmd.Arg3 <= 1) //mean 608 and 708 in MM RVU
1944 {
1945 mvdcmd.Arg2 = 7;//ntsc1+ntsc2+atsc
1946 mvdcmd.Arg4 = 0;
1947 }
1948 SET_DECNUM(mvdcmd, u8Idx);
1949 if (HAL_MVD_MVDCommand( CMD_USER_BUF_SIZE, &mvdcmd ) == FALSE)
1950 {
1951 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_SIZE ) );
1952 return;
1953 }
1954 return;
1955 }
1956
1957 //------------------------------------------------------------------------------
1958 /// Set user data buffer address to MVD
1959 /// @param -u32addr \b IN : start address
1960 //------------------------------------------------------------------------------
HAL_MVD_SetUserDataBuf(MS_U8 u8Idx,MS_U32 u32addr,MS_U32 u32size)1961 void HAL_MVD_SetUserDataBuf(MS_U8 u8Idx, MS_U32 u32addr, MS_U32 u32size)
1962 {
1963 MS_U8 u8ccType = 0;
1964 #if 0 //test for miu0
1965 MVD_MEMCfg* pstMemCfg = NULL;
1966 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1967 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
1968 u32addr += HAL_VPU_EX_MIU1BASE();
1969 #endif
1970 MS_ASSERT((u32addr%8)==0);
1971 MS_ASSERT((u32size%8)==0);
1972 #ifdef REDLION_LINUX_KERNEL_ENVI
1973 u8ccType = 2;
1974 #elif defined(MVD_SUPPORT_X4_CC)
1975 u8ccType = 4; //display order
1976 #else
1977 u8ccType = 2;// 2 for testing 0;
1978 #endif
1979
1980 #if defined(MVD_SUPPORT_X4_CC)
1981 //set decoding buffer address
1982 _MVD_SetUserDataBufStart(u8Idx, u32addr+u32size, 3);
1983 #endif
1984
1985 //set CC output buffer address
1986 _MVD_SetUserDataBufStart(u8Idx, u32addr, u8ccType);
1987
1988 #if defined(MVD_SUPPORT_X4_CC)
1989 //set decoding buffer size
1990 _MVD_SetUserDataBufSize(u8Idx, u32size, 3);
1991 #endif
1992
1993 //set CC output buffer size
1994 _MVD_SetUserDataBufSize(u8Idx, u32size, u8ccType);
1995
1996 return;
1997 }
1998
HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)1999 void HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
2000 {
2001 MVD_CmdArg mvdcmd;
2002 MS_U32 u32val = u32end>>3;
2003 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx\n", __FUNCTION__, u32start, u32end));
2004
2005 SET_CMDARG(mvdcmd, u32val, u8Idx);
2006 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_END, &mvdcmd ) == FALSE)
2007 {
2008 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_END ) );
2009 return;
2010 }
2011
2012 u32val = (u32start)>>3;
2013 SET_CMDARG(mvdcmd, u32val, u8Idx);
2014 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_START, &mvdcmd ) == FALSE)
2015 {
2016 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_START ) );
2017 return;
2018 }
2019
2020 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx OK!!!\n", __FUNCTION__, u32start, u32end));
2021 return;
2022 }
2023
2024 //------------------------------------------------------------------------------
2025 /// Issue StepDisplay command.
2026 /// @return -TRUE for success; FALSE for failure.
2027 //------------------------------------------------------------------------------
HAL_MVD_StepDisp(MS_U8 u8Idx)2028 MS_BOOL HAL_MVD_StepDisp(MS_U8 u8Idx)
2029 {
2030 MVD_CmdArg mvdcmd;
2031
2032 SETUP_CMDARG(mvdcmd);
2033 SET_DECNUM(mvdcmd, u8Idx);
2034 SET_CMD_RET_FALSE(CMD_STEP_DISP_DECODE_ONE, &mvdcmd);
2035 if (HAL_MVD_Resume(u8Idx) == FALSE)
2036 {
2037 MVD_DEBUGERROR( MVD_ERR( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2038 return FALSE;
2039 }
2040
2041 return TRUE;
2042 }
2043
2044 //------------------------------------------------------------------------------
2045 /// Get ES read address for TS file mode.
2046 /// @return ES read address
2047 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)2048 MS_U32 HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)
2049 {
2050 MS_U32 u32Add = 0;
2051 MVD_CmdArg mvdcmd;
2052
2053 SETUP_CMDARG(mvdcmd);
2054 mvdcmd.Arg0 = 2; //ES diff
2055 SET_DECNUM(mvdcmd, u8Idx);
2056 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2057 {
2058 //in order to latch the newest parser status
2059 //u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2060 // (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2061 }
2062 else
2063 {
2064 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2065 }
2066
2067 SETUP_CMDARG(mvdcmd);
2068 mvdcmd.Arg0 = 1;
2069 SET_DECNUM(mvdcmd, u8Idx);
2070 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2071 {
2072 u32Add = (((MS_U32)mvdcmd.Arg3) <<24) |
2073 (((MS_U32)mvdcmd.Arg2) <<16) |
2074 (((MS_U32)mvdcmd.Arg1) << 8) |
2075 (((MS_U32)mvdcmd.Arg0));
2076 }
2077 else
2078 {
2079 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2080 }
2081
2082 return (u32Add*8);
2083 }
2084
2085 //------------------------------------------------------------------------------
2086 /// Get ES write address for TS file mode.
2087 /// @return ES write address
2088 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)2089 MS_U32 HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)
2090 {
2091 MS_U32 u32Diff = 0;
2092 MS_U32 u32WrPtr = 0;
2093 MVD_CmdArg mvdcmd;
2094 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2095 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2096
2097 SETUP_CMDARG(mvdcmd);
2098 mvdcmd.Arg0 = 2; //ES diff
2099 SET_DECNUM(mvdcmd, u8Idx);
2100 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2101 {
2102 u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2103 (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2104 }
2105 else
2106 {
2107 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2108 }
2109
2110 u32WrPtr = u32Diff*8 + HAL_MVD_GetTsFileESReadPtr(u8Idx);
2111 if (u32WrPtr > pstSlqTblInfo->u32ESBuffEnd)
2112 {
2113 MVD_DEBUGINFO(MVD_PRINT("ES wrapping Wr=0x%lx ==> ", u32WrPtr));
2114 u32WrPtr -= pstMemCfg->u32BSSize;
2115 MVD_DEBUGINFO(MVD_PRINT("0x%lx\n", u32WrPtr));
2116 }
2117 return u32WrPtr;
2118 }
2119
2120 //------------------------------------------------------------------------------
2121 /// Enable/Disable firmware to show the last frame.
2122 /// @return -TRUE for success; FALSE for failure.
2123 //------------------------------------------------------------------------------
HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx,MS_BOOL bEnable)2124 MS_BOOL HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx, MS_BOOL bEnable)
2125 {
2126 MVD_CmdArg mvdcmd;
2127 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
2128 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2129 MS_U32* pu32FileEndPtr = &pstSlqTblInfo->u32FileEndPtr;
2130
2131 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
2132 {
2133 #if SLQ_NEW_PUSH
2134 if (pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
2135 {
2136 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr + SLQ_ENTRY_LEN;
2137 }
2138 #endif //
2139 //save current writePtr
2140 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
2141 {
2142 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
2143 }
2144 else
2145 {
2146 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
2147 }
2148 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx, wr=%lx\n", *pu32FileEndPtr,
2149 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr));
2150 }
2151
2152 SETUP_CMDARG(mvdcmd);
2153 mvdcmd.Arg0 = bEnable;
2154 SET_DECNUM(mvdcmd, u8Idx);
2155 SET_CMD_RET_FALSE(CMD_ENABLE_LAST_FRAME_SHOW, &mvdcmd);
2156 return TRUE;
2157 }
2158
2159
HAL_MVD_SlqTblRst(MS_U8 u8Idx)2160 MS_BOOL HAL_MVD_SlqTblRst(MS_U8 u8Idx)
2161 {
2162 MVD_CmdArg mvdcmd;
2163 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2164
2165 SETUP_CMDARG(mvdcmd);
2166 SET_DECNUM(mvdcmd, u8Idx);
2167 SET_CMD_RET_FALSE(CMD_VC1_HW_SLQ_RESET, &mvdcmd);
2168 pstSlqTblInfo->bEnSlqTblHkCtrl = FALSE;
2169 return TRUE;
2170 }
2171
HAL_MVD_SeekToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2172 MS_BOOL HAL_MVD_SeekToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2173 {
2174 MVD_CmdArg mvdcmd;
2175
2176 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2177 SET_CMD_RET_FALSE(CMD_STEP_TO_PTS, &mvdcmd);
2178
2179 if (HAL_MVD_Resume(u8Idx) == FALSE)
2180 {
2181 MVD_DEBUGERROR( MVD_ERR( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2182 return FALSE;
2183 }
2184 return TRUE;
2185 }
2186
HAL_MVD_SkipToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2187 MS_BOOL HAL_MVD_SkipToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2188 {
2189 MVD_CmdArg mvdcmd;
2190
2191 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2192 SET_CMD_RET_FALSE(CMD_SKIP_TO_PTS, &mvdcmd);
2193
2194 if (HAL_MVD_Resume(u8Idx) == FALSE)
2195 {
2196 MVD_DEBUGERROR( MVD_ERR( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2197 return FALSE;
2198 }
2199 return TRUE;
2200 }
2201
HAL_MVD_TrickPlay(MS_U8 u8Idx,MVD_TrickDec trickDec,MS_U8 u8DispDuration)2202 MS_BOOL HAL_MVD_TrickPlay(MS_U8 u8Idx, MVD_TrickDec trickDec, MS_U8 u8DispDuration)
2203 {
2204 MVD_CmdArg mvdcmd;
2205 MS_U8 u8DecType;
2206
2207 switch (trickDec)
2208 {
2209 case E_MVD_TRICK_DEC_ALL:
2210 u8DecType = 0;
2211 break;
2212 case E_MVD_TRICK_DEC_I:
2213 u8DecType = 1;
2214 break;
2215 case E_MVD_TRICK_DEC_IP:
2216 u8DecType = 2;
2217 break;
2218 default:
2219 return FALSE;
2220 break;
2221 }
2222
2223 SETUP_CMDARG(mvdcmd);
2224 mvdcmd.Arg0 = u8DecType;
2225 mvdcmd.Arg1 = u8DispDuration;
2226 SET_DECNUM(mvdcmd, u8Idx);
2227 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
2228
2229 pMVDHalContext->stCtrlCfg[u8Idx].eTrickMode = trickDec;
2230 return TRUE;
2231 }
2232
HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)2233 MS_BOOL HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)
2234 {
2235 MVD_CmdArg mvdcmd;
2236 SETUP_CMDARG(mvdcmd);
2237 SET_DECNUM(mvdcmd, u8Idx);
2238 SET_CMD_RET_FALSE(CMD_FLUSH_DISP_QUEUE, &mvdcmd);
2239 return TRUE;
2240 }
2241
HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx,MVD_TIMESTAMP_TYPE eSyncMode)2242 MS_BOOL HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx, MVD_TIMESTAMP_TYPE eSyncMode)
2243 {
2244 MVD_CmdArg mvdcmd;
2245 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2246
2247 pstCtrlCfg->eFileSyncMode = eSyncMode;
2248 MVD_DEBUGINFO(printf("%s eSyncMode=%d\n", __FUNCTION__, eSyncMode));
2249 SETUP_CMDARG(mvdcmd);
2250 switch (eSyncMode)
2251 {
2252 case E_MVD_TIMESTAMP_PTS:
2253 case E_MVD_TIMESTAMP_PTS_RVU:
2254 mvdcmd.Arg0 = FILE_PTS_MODE;
2255 break;
2256
2257 case E_MVD_TIMESTAMP_DTS:
2258 case E_MVD_TIMESTAMP_DTS_RVU:
2259 mvdcmd.Arg0 = FILE_DTS_MODE;
2260 break;
2261 case E_MVD_TIMESTAMP_NEW_STS:
2262 mvdcmd.Arg0 = FILE_STS_MODE;
2263 break;
2264 case E_MVD_TIMESTAMP_FREERUN:
2265 default:
2266 mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
2267 break;
2268 }
2269 SET_DECNUM(mvdcmd, u8Idx);
2270 SET_CMD_RET_FALSE(CMD_ENABLE_FILE_SYNC, &mvdcmd);
2271
2272 SETUP_CMDARG(mvdcmd);
2273 switch (eSyncMode) //for set RVU mode
2274 {
2275 case E_MVD_TIMESTAMP_PTS_RVU:
2276 mvdcmd.Arg0 = FILE_PTS_MODE;
2277 break;
2278 case E_MVD_TIMESTAMP_DTS_RVU:
2279 mvdcmd.Arg0 = FILE_DTS_MODE;
2280 break;
2281 case E_MVD_TIMESTAMP_FREERUN:
2282 default:
2283 mvdcmd.Arg0 = 0xFF;
2284 break;
2285 }
2286 SET_DECNUM(mvdcmd, u8Idx);
2287 SET_CMD_RET_FALSE(CMD_RVU_EN, &mvdcmd);
2288 return TRUE;
2289 }
2290
2291 //------------------------------------------------------------------------------
2292 /// Set the start address of PTS table used for SLQ table link mode.
2293 /// @return -TRUE for success; FALSE for failure.
2294 //------------------------------------------------------------------------------
HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx,MS_U32 u32addr)2295 MS_BOOL HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx, MS_U32 u32addr)
2296 {
2297 MVD_CmdArg mvdcmd;
2298 #if 0 //test for miu0
2299 MVD_MEMCfg* pstMemCfg = NULL;
2300 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2301 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
2302 u32addr += HAL_VPU_EX_MIU1BASE();
2303 #endif
2304 MS_ASSERT((u32addr%8)==0);
2305 u32addr >>= 3;
2306
2307 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2308 SET_CMD_RET_FALSE(CMD_PTS_TBL_START, &mvdcmd);
2309 return TRUE;
2310 }
2311
HAL_MVD_SkipToIFrame(MS_U8 u8Idx)2312 MS_BOOL HAL_MVD_SkipToIFrame(MS_U8 u8Idx)
2313 {
2314 MVD_CmdArg mvdcmd;
2315 SETUP_CMDARG(mvdcmd);
2316 SET_DECNUM(mvdcmd, u8Idx);
2317 SET_CMD_RET_FALSE(CMD_START_DEC_STRICT, &mvdcmd);
2318 return TRUE;
2319 }
2320
2321 //Map driver FRC (Frame rate conversion) mode to firmware's.
HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)2322 MS_U8 HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)
2323 {
2324 MS_U8 frcMode = 0xf;
2325 switch (eFrcMode)
2326 {
2327 case E_MVD_FRC_NORMAL:
2328 frcMode = FrcNormal;
2329 break;
2330 case E_MVD_FRC_DISP_TWICE:
2331 frcMode = FrcDisplayTwice;
2332 break;
2333 case E_MVD_FRC_3_2_PULLDOWN: //film 24 -> 50i
2334 frcMode = Frc32Pulldown;
2335 break;
2336 case E_MVD_FRC_PAL_TO_NTSC:
2337 frcMode = FrcPALtoNTSC;
2338 break;
2339 case E_MVD_FRC_NTSC_TO_PAL:
2340 frcMode = FrcNTSCtoPAL;
2341 break;
2342 case E_MVD_FRC_DISP_ONEFIELD:
2343 frcMode = FrcShowOneFiled;
2344 break;
2345 default:
2346 break;
2347 }
2348 return frcMode;
2349 }
2350
HAL_MVD_DispCtrl(MS_U8 u8Idx,MS_BOOL bDecOrder,MS_BOOL bDropErr,MS_BOOL bDropDisp,MVD_FrcMode eFrcMode)2351 MS_BOOL HAL_MVD_DispCtrl(MS_U8 u8Idx, MS_BOOL bDecOrder, MS_BOOL bDropErr, MS_BOOL bDropDisp, MVD_FrcMode eFrcMode)
2352 {
2353 MVD_CmdArg mvdcmd;
2354 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2355 MS_BOOL* pbDropErrFrm = &pstCtrlCfg->bDropErrFrm;
2356
2357 SETUP_CMDARG(mvdcmd);
2358 mvdcmd.Arg0 = (MS_U8)bDecOrder;
2359 mvdcmd.Arg1 = (MS_U8)bDropErr;
2360 mvdcmd.Arg2 = (MS_U8)bDropDisp;
2361 mvdcmd.Arg3 = HAL_MVD_MapFrcMode(eFrcMode);
2362 SET_DECNUM(mvdcmd, u8Idx);
2363 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
2364
2365 pstCtrlCfg->eFrcMode = eFrcMode;
2366
2367 if (*pbDropErrFrm != bDropErr)
2368 {
2369 MVD_DEBUGINFO( MVD_PRINT("bDropErrFrm(%d) != bDropErr(%d)\n", *pbDropErrFrm, bDropErr));
2370 *pbDropErrFrm = bDropErr;
2371 }
2372 pstCtrlCfg->bDropDispfrm = bDropDisp;
2373
2374 return TRUE;
2375 }
2376
2377
HAL_MVD_SkipData(MS_U8 u8Idx)2378 MS_BOOL HAL_MVD_SkipData(MS_U8 u8Idx)
2379 {
2380 MS_U32 u32TimeCnt = 0;
2381 MVD_CmdArg mvdcmd;
2382
2383 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
2384
2385 SETUP_CMDARG(mvdcmd);
2386 SET_DECNUM(mvdcmd, u8Idx);
2387 SET_CMD_RET_FALSE(CMD_SKIP_DATA, &mvdcmd);
2388
2389 u32TimeCnt = HAL_MVD_GetTime();
2390 while ((HAL_MVD_GetTime() - u32TimeCnt) < SKIP_DATA_TIMEOUT_MS)
2391 {
2392 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2393 {
2394 MVD_DEBUGINFO(MVD_PRINT("\nSkip data finished!\n"));
2395 break;
2396 }
2397 }
2398 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%lu t2=%lu diff=%lu)\n", __FUNCTION__,
2399 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
2400 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2401 {
2402 MVD_DEBUGINFO(MVD_ERR("\n***** TS flush timeout *****\n\n"));
2403 return FALSE;
2404 }
2405
2406 return TRUE;
2407 }
2408
HAL_MVD_DispRepeatField(MS_U8 u8Idx,MS_BOOL bEnable)2409 MS_BOOL HAL_MVD_DispRepeatField(MS_U8 u8Idx, MS_BOOL bEnable)
2410 {
2411 MVD_CmdArg mvdcmd;
2412 SETUP_CMDARG(mvdcmd);
2413 mvdcmd.Arg0 = bEnable;
2414 SET_DECNUM(mvdcmd, u8Idx);
2415 SET_CMD_RET_FALSE(CMD_REPEAT_MODE, &mvdcmd);
2416 return TRUE;
2417 }
2418
2419 //------------------------------------------------------------------------------
2420 /// Pause display.
2421 /// @return -TRUE for success; FALSE for failure
2422 //------------------------------------------------------------------------------
HAL_MVD_PauseDisp(MS_U8 u8Idx)2423 MS_BOOL HAL_MVD_PauseDisp(MS_U8 u8Idx)
2424 {
2425 MS_BOOL bRst = TRUE;
2426 MVD_CmdArg mvdcmd;
2427
2428 SETUP_CMDARG(mvdcmd);
2429 mvdcmd.Arg0 = DISPLAY_PAUSE_ON;
2430 SET_DECNUM(mvdcmd, u8Idx);
2431 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2432 {
2433 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x(ON) fail!!\r\n", CMD_DISPLAY_PAUSE) );
2434 bRst = FALSE;
2435 }
2436 return bRst;
2437 }
2438
2439 //------------------------------------------------------------------------------
2440 /// Issue Pause command.
2441 /// @return -TRUE for success; FALSE for failure
2442 //------------------------------------------------------------------------------
HAL_MVD_Resume(MS_U8 u8Idx)2443 MS_BOOL HAL_MVD_Resume(MS_U8 u8Idx)
2444 {
2445 MS_BOOL bRst = TRUE;
2446 MVD_CmdArg mvdcmd;
2447
2448 SETUP_CMDARG(mvdcmd);
2449 mvdcmd.Arg0 = DISPLAY_PAUSE_OFF;
2450 SET_DECNUM(mvdcmd, u8Idx);
2451 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2452 {
2453 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DISPLAY_PAUSE) );
2454 bRst = FALSE;
2455 }
2456 return bRst;
2457 }
2458
HAL_MVD_Play(MS_U8 u8Idx)2459 MS_BOOL HAL_MVD_Play(MS_U8 u8Idx)
2460 {
2461 MVD_CmdArg mvdcmd;
2462 SETUP_CMDARG(mvdcmd);
2463 mvdcmd.Arg0 = 1;
2464 SET_DECNUM(mvdcmd, u8Idx);
2465 SET_CMD_RET_FALSE(CMD_DIU_WIDTH_ALIGN, &mvdcmd);
2466
2467 SETUP_CMDARG(mvdcmd);
2468 SET_DECNUM(mvdcmd, u8Idx);
2469 SET_CMD_RET_FALSE(CMD_PLAY, &mvdcmd);
2470
2471 if (HAL_MVD_Resume(u8Idx) == FALSE)
2472 {
2473 MVD_DEBUGERROR( MVD_ERR( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2474 return FALSE;
2475 }
2476
2477 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2478 pCtrlCfg->bDecodeIFrame = FALSE;
2479
2480 return TRUE;
2481 }
2482
2483 //------------------------------------------------------------------------------
2484 /// Set base address for ScalerInfo structure to f/w
2485 /// @param -u32addr \b IN : start address (units in byte)
2486 //------------------------------------------------------------------------------
HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx,MS_U32 u32addr,MS_U8 u8Arg4)2487 MS_BOOL HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx, MS_U32 u32addr,MS_U8 u8Arg4)
2488 {
2489 MVD_CmdArg mvdcmd;
2490 #if 0 //test for miu0
2491 MVD_MEMCfg* pstMemCfg = NULL;
2492 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2493 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
2494 u32addr += HAL_VPU_EX_MIU1BASE();
2495 #endif
2496 MS_ASSERT((u32addr%8)==0);
2497 u32addr >>= 3;
2498
2499 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2500 mvdcmd.Arg4 = u8Arg4;
2501 SET_CMD_RET_FALSE(CMD_SCALER_INFO_BASE, &mvdcmd);
2502 return TRUE;
2503 }
2504
2505 //------------------------------------------------------------------------------
2506 /// Set the dynamic scale base address
2507 /// @return -TRUE for success; FALSE for failure.
2508 //------------------------------------------------------------------------------
HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx,MS_U32 u32addr)2509 MS_BOOL HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx, MS_U32 u32addr)
2510 {
2511 MVD_CmdArg mvdcmd;
2512 #if 0 //test for miu0
2513 MVD_MEMCfg* pstMemCfg = NULL;
2514 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2515 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
2516 u32addr += HAL_VPU_EX_MIU1BASE();
2517 #endif
2518 MS_ASSERT((u32addr%8)==0);
2519 u32addr >>= 3;
2520
2521 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2522 SET_CMD_RET_FALSE(CMD_DYNAMIC_SCALE_BASE, &mvdcmd);
2523 return TRUE;
2524 }
2525
2526 //------------------------------------------------------------------------------
2527 /// Set virtual box width/height to F/W.
2528 /// F/W will use the same w/h as scaler to calculate scaling factor.
2529 /// @return -TRUE for success; FALSE for failure.
2530 //------------------------------------------------------------------------------
HAL_MVD_SetVirtualBox(MS_U8 u8Idx,MS_U16 u16Width,MS_U16 u16Height)2531 MS_BOOL HAL_MVD_SetVirtualBox(MS_U8 u8Idx, MS_U16 u16Width, MS_U16 u16Height)
2532 {
2533 MVD_CmdArg mvdcmd;
2534
2535 SETUP_CMDARG(mvdcmd);
2536 mvdcmd.Arg0 = L_WORD(u16Width);
2537 mvdcmd.Arg1 = H_WORD(u16Width);
2538 mvdcmd.Arg2 = L_WORD(u16Height);
2539 mvdcmd.Arg3 = H_WORD(u16Height);
2540 SET_DECNUM(mvdcmd, u8Idx);
2541 SET_CMD_RET_FALSE(CMD_DS_VIRTUAL_BOX, &mvdcmd);
2542 return TRUE;
2543 }
2544
2545 //------------------------------------------------------------------------------
2546 /// Enable VC1 dynamic scaling
2547 /// @return -TRUE for success; FALSE for failure.
2548 //------------------------------------------------------------------------------
HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)2549 MS_BOOL HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)
2550 {
2551 MVD_CmdArg mvdcmd;
2552
2553 SETUP_CMDARG(mvdcmd);
2554 mvdcmd.Arg0 = TRUE;
2555 mvdcmd.Arg1 = u8NewDS;
2556 SET_DECNUM(mvdcmd, u8Idx);
2557 SET_CMD_RET_FALSE(CMD_ENABLE_DYNAMIC_SCALE, &mvdcmd);
2558 return TRUE;
2559 }
2560
2561
2562 //------------------------------------------------------------------------------
2563 /// Set blue screen
2564 /// @return -TRUE for success; FALSE for failure.
2565 //------------------------------------------------------------------------------
HAL_MVD_SetBlueScreen(MS_U8 u8Idx,MS_BOOL bEn)2566 MS_BOOL HAL_MVD_SetBlueScreen(MS_U8 u8Idx, MS_BOOL bEn)
2567 {
2568 MVD_CmdArg mvdcmd;
2569
2570 SETUP_CMDARG(mvdcmd);
2571 mvdcmd.Arg0 = bEn; //1 -> show MVOP frame color. 0 -> normal case.
2572 SET_DECNUM(mvdcmd, u8Idx);
2573 SET_CMD_RET_FALSE(CMD_FORCE_BLUE_SCREEN, &mvdcmd);
2574 return TRUE;
2575 }
2576
2577
HAL_MVD_SetFreezeDisp(MS_U8 u8Idx,MS_BOOL bEn)2578 MS_BOOL HAL_MVD_SetFreezeDisp(MS_U8 u8Idx, MS_BOOL bEn)
2579 {
2580 MVD_CmdArg mvdcmd;
2581
2582 SETUP_CMDARG(mvdcmd);
2583 mvdcmd.Arg0 = bEn;
2584 SET_DECNUM(mvdcmd, u8Idx);
2585 SET_CMD_RET_FALSE(CMD_FREEZE_DISP, &mvdcmd);
2586 return TRUE;
2587 }
2588
2589
2590 //------------------------------------------------------------------------------
2591 /// Set base address for DecFrameInfo structure to f/w
2592 /// @param -u32addr \b IN : start address (units in byte)
2593 //------------------------------------------------------------------------------
HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx,MS_U32 u32addr)2594 void HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx, MS_U32 u32addr)
2595 {
2596 MVD_CmdArg mvdcmd;
2597 #if 0 //test for miu0
2598 MVD_MEMCfg* pstMemCfg = NULL;
2599 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2600 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
2601 u32addr += HAL_VPU_EX_MIU1BASE();
2602 #endif
2603 MS_ASSERT((u32addr%8)==0);
2604 u32addr >>= 3;
2605
2606 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2607 if (HAL_MVD_MVDCommand( CMD_DEC_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
2608 {
2609 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DEC_FRAME_INFO_BUF ) );
2610 }
2611 return;
2612 }
2613
2614 //Check if the task has interrupt
HAL_MVD_GetHasInt(MS_U8 u8Idx)2615 MS_BOOL HAL_MVD_GetHasInt(MS_U8 u8Idx)
2616 {
2617 MS_BOOL bHasInt = FALSE;
2618 MS_U32 u32IntCnt = 0;
2619 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2620
2621 u32IntCnt = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_CNT, sizeof(MS_U32));
2622 if (u32IntCnt != pCtrlCfg->u32IntCnt)
2623 {
2624 MVD_DEBUGINFO(MVD_PRINT("%s %ld--> %ld\n", __FUNCTION__, pCtrlCfg->u32IntCnt, u32IntCnt));
2625 bHasInt = TRUE;
2626 pCtrlCfg->u32IntCnt = u32IntCnt;
2627 }
2628 return bHasInt;
2629 }
2630
HAL_MVD_GetIntState(MS_U8 u8Idx)2631 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
2632 {
2633 MS_U32 u32IntStat = 0;
2634 MVD_CmdArg mvdcmd;
2635
2636 SETUP_CMDARG(mvdcmd);
2637 SET_DECNUM(mvdcmd, u8Idx);
2638 if (HAL_MVD_MVDCommand( CMD_GET_INT_STAT, &mvdcmd ) == TRUE)
2639 {
2640 u32IntStat = (((MS_U32)mvdcmd.Arg4) << 16) |
2641 (((MS_U32)mvdcmd.Arg3) << 8) |
2642 (((MS_U32)mvdcmd.Arg2));
2643 }
2644 else
2645 {
2646 if (FALSE == pMVDHalContext->bStopped[u8Idx])
2647 {
2648 MVD_DEBUGERROR(MVD_ERR("Ctrl: 0x%x fail!!\n", CMD_GET_INT_STAT));
2649 }
2650 else
2651 {
2652 MVD_DEBUGINFO(MVD_PRINT("Cmd 0x%x normal timeout.\n", CMD_GET_INT_STAT));
2653 }
2654 }
2655
2656 return u32IntStat;
2657 }
2658
2659
2660 ///// functions to check interrupt status /////
MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)2661 MS_BOOL MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)
2662 {
2663 return (((u32IntStat&INT_USER_DATA_DISP)==INT_USER_DATA_DISP) ? TRUE : FALSE);
2664 }
2665
MVD_IntHasUsrData(MS_U32 u32IntStat)2666 MS_BOOL MVD_IntHasUsrData(MS_U32 u32IntStat)
2667 {
2668 return (((u32IntStat&INT_USER_DATA)==INT_USER_DATA) ? TRUE : FALSE);
2669 }
2670
MVD_IntIsDispRdy(MS_U32 u32IntStat)2671 MS_BOOL MVD_IntIsDispRdy(MS_U32 u32IntStat)
2672 {
2673 return (((u32IntStat&INT_DISP_RDY)==INT_DISP_RDY) ? TRUE : FALSE);
2674 }
2675
MVD_IntHasSeqHdr(MS_U32 u32IntStat)2676 MS_BOOL MVD_IntHasSeqHdr(MS_U32 u32IntStat)
2677 {
2678 return (((u32IntStat&INT_SEQ_FOUND)==INT_SEQ_FOUND) ? TRUE : FALSE);
2679 }
2680
MVD_IntHasESDataInvalid(MS_U32 u32IntStat)2681 MS_BOOL MVD_IntHasESDataInvalid(MS_U32 u32IntStat)
2682 {
2683 return (((u32IntStat&INT_VES_VALID)==INT_VES_VALID) ? TRUE : FALSE);
2684 }
2685
MVD_IntHasDecodeErr(MS_U32 u32IntStat)2686 MS_BOOL MVD_IntHasDecodeErr(MS_U32 u32IntStat)
2687 {
2688 return (((u32IntStat&INT_DEC_ERR)==INT_DEC_ERR) ? TRUE : FALSE);
2689 }
2690 //INT_FIRST_FRAME means "1st frame be push to display queue & ready for display"
2691 //So, (1) in IPB or IP stream, that's I-frame
2692 // (2) in PB only stream, that's first P-frame
MVD_IntHas1stFrame(MS_U32 u32IntStat)2693 MS_BOOL MVD_IntHas1stFrame(MS_U32 u32IntStat)
2694 {
2695 return (((u32IntStat&INT_FIRST_FRAME)==INT_FIRST_FRAME) ? TRUE : FALSE);
2696 }
2697
2698 //INT_XC_LOW_DELAY
MVD_IntHasXcLowDelay(MS_U32 u32IntStat)2699 MS_BOOL MVD_IntHasXcLowDelay(MS_U32 u32IntStat)
2700 {
2701 //printf("MVD_IntHasXcLowDelay=%x \n ", u32IntStat);
2702 return (((u32IntStat&INT_XC_LOW_DELAY)==INT_XC_LOW_DELAY) ? TRUE : FALSE);
2703 }
2704
MVD_IntHasDecodeIframe(MS_U32 u32IntStat)2705 MS_BOOL MVD_IntHasDecodeIframe(MS_U32 u32IntStat)
2706 {
2707 return (((u32IntStat&INT_DEC_I)==INT_DEC_I) ? TRUE : FALSE);
2708 }
2709
2710
MVD_IntVSyncInt(MS_U32 u32IntStat)2711 MS_BOOL MVD_IntVSyncInt(MS_U32 u32IntStat)
2712 {
2713 return (((u32IntStat&INT_DISP_VSYNC)==INT_DISP_VSYNC) ? TRUE : FALSE);
2714 }
2715
MVD_IntDecOneFrmInt(MS_U32 u32IntStat)2716 MS_BOOL MVD_IntDecOneFrmInt(MS_U32 u32IntStat)
2717 {
2718 return (((u32IntStat&INT_DEC_DONE)==INT_DEC_DONE) ? TRUE : FALSE);
2719 }
2720
2721
MVD_GetSyncStat(MS_U8 u8Idx,MS_U8 u8ArgIdx)2722 static MS_U8 MVD_GetSyncStat(MS_U8 u8Idx, MS_U8 u8ArgIdx)
2723 {
2724 MS_U8 u8Val = 0xFF;
2725 MVD_CmdArg mvdcmd;
2726 SETUP_CMDARG(mvdcmd);
2727 SET_DECNUM(mvdcmd, u8Idx);
2728 if (HAL_MVD_MVDCommand( CMD_GET_SYNC_STAT, &mvdcmd ) == FALSE)
2729 {
2730 MVD_DEBUGERROR(MVD_ERR("Ctrl: 0x%x fail!!\r\n", CMD_GET_SYNC_STAT));
2731 return 0xFF;
2732 }
2733 MVD_DEBUGINFO(MVD_PRINT("Sync On/Off %x, Done %x, Stat %x, diff=%ld\n",
2734 mvdcmd.Arg0, mvdcmd.Arg1, mvdcmd.Arg2, HAL_MVD_GetPtsStcDiff(u8Idx)));
2735
2736 if (0==u8ArgIdx)
2737 {
2738 u8Val = mvdcmd.Arg0; //On/Off
2739 }
2740 else if (1==u8ArgIdx)
2741 {
2742 u8Val = mvdcmd.Arg1; //Done
2743 }
2744 else if (2==u8ArgIdx)
2745 {
2746 u8Val = mvdcmd.Arg2; //Stat
2747 }
2748 return u8Val;
2749 }
2750
2751 //------------------------------------------------------------------------------
2752 /// Report avsync status
2753 /// avsync_status=avsync_done|(avsync_skip_picture<<1)|(avsync_repeat_picture<<2),
2754 /// 0 for free run
2755 //------------------------------------------------------------------------------
HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)2756 MS_U8 HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)
2757 {
2758 return MVD_GetSyncStat(u8Idx, 2);
2759 }
2760
HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx,MS_U32 u32WrPtr)2761 void HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx, MS_U32 u32WrPtr)
2762 {
2763 #if 1
2764 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2765 MVD_CmdArg mvdcmd;
2766 MS_U16 u16Val = 0;
2767
2768 if (FALSE == pstSlqTblInfo->bEnSlqTblHkCtrl)
2769 {
2770 SETUP_CMDARG(mvdcmd);
2771 mvdcmd.Arg0 = 0x10;
2772 mvdcmd.Arg1 = 0x01;
2773 SET_DECNUM(mvdcmd, u8Idx);
2774 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
2775 {
2776 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
2777 return;
2778 }
2779 u16Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8);
2780
2781 SETUP_CMDARG(mvdcmd);
2782 mvdcmd.Arg0 = 0x10;
2783 mvdcmd.Arg1 = 0x01;
2784 mvdcmd.Arg2 = u16Val & 0xff;
2785 mvdcmd.Arg3 = ((u16Val>>8 ) & 0xff) | 0x80;
2786 SET_DECNUM(mvdcmd, u8Idx);
2787 if (HAL_MVD_MVDCommand(CMD_WR_IO, &mvdcmd) == FALSE)
2788 {
2789 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_WR_IO ) );
2790 return;
2791 }
2792
2793 pstSlqTblInfo->bEnSlqTblHkCtrl = TRUE;
2794 //MVD_PRINT("@@@ OPEN HK.SLQ.CTRL!\n");
2795 }
2796 #endif
2797 OSAL_MVD_LockHwMutex();
2798
2799 HAL_MVD_RegWriteByte(MVD_SLQ_WADR0, (u32WrPtr & 0xff));
2800 HAL_MVD_RegWriteByte(MVD_SLQ_WADR1, ((u32WrPtr>>8 ) & 0xff));
2801 HAL_MVD_RegWriteByte(MVD_SLQ_WADR2, ((u32WrPtr>>16) & 0xff));
2802 HAL_MVD_RegWriteByte(MVD_SLQ_WADR3, ((u32WrPtr>>24) & 0x01));
2803 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_RELOAD);
2804 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_RELOAD);
2805
2806 OSAL_MVD_UnlockHwMutex();
2807 }
2808
HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)2809 static MS_U32 HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)
2810 {
2811 MS_U32 u32Cadr = 0;
2812 OSAL_MVD_LockHwMutex();
2813
2814 switch (eCmd)
2815 {
2816 case MVD_HKSLQ_GET_READPTR:
2817 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_RADR_PROBE);
2818 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_RADR_PROBE);
2819 break;
2820 case MVD_HKSLQ_GET_WRITEPTR:
2821 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_PROBE);
2822 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_PROBE);
2823 break;
2824 default:
2825 break;
2826 }
2827 u32Cadr = HAL_MVD_RegReadByte(MVD_SLQ_CADR0) |
2828 (HAL_MVD_RegReadByte(MVD_SLQ_CADR1) << 8) |
2829 (HAL_MVD_RegReadByte(MVD_SLQ_CADR2) <<16) |
2830 ((HAL_MVD_RegReadByte(MVD_SLQ_CADR3) & 0x01) <<24);
2831
2832 OSAL_MVD_UnlockHwMutex();
2833 return u32Cadr;
2834 }
2835
HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)2836 MS_U32 HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)
2837 {
2838 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_WRITEPTR);
2839 }
2840
HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)2841 MS_U32 HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)
2842 {
2843 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_READPTR);
2844 }
2845
2846 //------------------------------------------------------------------------------
2847 /// Set firmware as MStreamer mode
2848 /// @return -TRUE for success; FALSE for failure.
2849 //------------------------------------------------------------------------------
HAL_MVD_SetMStreamerMode(MS_U8 u8Idx,MS_U8 u8Mode)2850 MS_BOOL HAL_MVD_SetMStreamerMode(MS_U8 u8Idx, MS_U8 u8Mode)
2851 {
2852 MVD_CmdArg mvdcmd;
2853 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2854
2855 SETUP_CMDARG(mvdcmd);
2856 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MStreamer mode.
2857 SET_DECNUM(mvdcmd, u8Idx);
2858 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
2859
2860 pstCtrlCfg->u8MstMode = u8Mode;
2861 return TRUE;
2862 }
2863
2864 //------------------------------------------------------------------------------
2865 /// Set firmware as MStreamer mode (IP clip mode)
2866 /// @return -TRUE for success; FALSE for failure.
2867 //------------------------------------------------------------------------------
HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx,MS_U8 u8Mode)2868 MS_BOOL HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx, MS_U8 u8Mode)
2869 {
2870 MVD_CmdArg mvdcmd;
2871 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2872
2873 SETUP_CMDARG(mvdcmd);
2874 mvdcmd.Arg0 = pstCtrlCfg->u8MstMode;
2875 mvdcmd.Arg1 = u8Mode;//a u8Mode; //1: clip mode, 0:normal mode.
2876 SET_DECNUM(mvdcmd, u8Idx);
2877 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
2878 return TRUE;
2879
2880 }
2881
HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)2882 MS_BOOL HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)
2883 {
2884 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2885 return (MST_MODE_TRUE == pstCtrlCfg->u8MstMode);
2886 }
2887
HAL_MVD_FrameOpt(MS_U8 u8Idx,MS_U8 u8FrmIdx,MVD_FrmOpt eOpt)2888 MS_BOOL HAL_MVD_FrameOpt(MS_U8 u8Idx, MS_U8 u8FrmIdx, MVD_FrmOpt eOpt)
2889 {
2890 MVD_CmdArg mvdcmd;
2891
2892 SETUP_CMDARG(mvdcmd);
2893 mvdcmd.Arg0 = u8FrmIdx;
2894 mvdcmd.Arg1 = eOpt; // 0 = Flip, 1 = Release.
2895 MVD_DEBUGINFO(MVD_PRINT("FLIP_RELEASE_FRAME: idx=0x%x, opt=0x%x\n", u8FrmIdx, eOpt));
2896 SET_DECNUM(mvdcmd, u8Idx);
2897 SET_CMD_RET_FALSE(CMD_FLIP_RELEASE_FRAME, &mvdcmd);
2898
2899 return TRUE;
2900 }
2901
2902 //------------------------------------------------------------------------------
2903 /// Set firmware dynamic allocate FrameBuffer, now support MCU mode only
2904 /// @return -TRUE for success; FALSE for failure.
2905 //------------------------------------------------------------------------------
_MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)2906 MS_BOOL _MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)
2907 {
2908 MVD_CmdArg mvdcmd;
2909
2910 SETUP_CMDARG(mvdcmd);
2911 mvdcmd.Arg0 = 1-bEnable; //Arg0 : 0(enable) , 1(disable)
2912 SET_DECNUM(mvdcmd, u8Idx);
2913 if (HAL_MVD_MVDCommand( CMD_FIXED_FRAME_BUFFER, &mvdcmd ) == FALSE)
2914 {
2915 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FIXED_FRAME_BUFFER ) );
2916 return FALSE;
2917 }
2918
2919 return TRUE;
2920 }
2921 //------------------------------------------------------------------------------
2922 /// Set firmware as MCU mode
2923 /// @return -TRUE for success; FALSE for failure.
2924 //------------------------------------------------------------------------------
HAL_MVD_SetMcuMode(MS_U8 u8Idx,MS_U8 u8Mode)2925 MS_BOOL HAL_MVD_SetMcuMode(MS_U8 u8Idx, MS_U8 u8Mode)
2926 {
2927 MVD_CmdArg mvdcmd;
2928 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2929
2930 SETUP_CMDARG(mvdcmd);
2931 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MCU
2932 SET_DECNUM(mvdcmd, u8Idx);
2933 SET_CMD_RET_FALSE(CMD_SET_MCU_MODE, &mvdcmd);
2934
2935 pstCtrlCfg->u8McuMode = u8Mode;
2936
2937 return TRUE;
2938 }
2939
HAL_MVD_IsMcuMode(MS_U8 u8Idx)2940 MS_BOOL HAL_MVD_IsMcuMode(MS_U8 u8Idx)
2941 {
2942 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2943 return (TRUE == pstCtrlCfg->u8McuMode);
2944 }
2945
2946 //------------------------------------------------------------------------------
2947 /// Set firmware as ForceInterlace mode
2948 /// @return -TRUE for success; FALSE for failure.
2949 //------------------------------------------------------------------------------
HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx,MS_U8 u8Mode)2950 MS_BOOL HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx, MS_U8 u8Mode)
2951 {
2952 MVD_CmdArg mvdcmd;
2953
2954 SETUP_CMDARG(mvdcmd);
2955 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable
2956 mvdcmd.Arg1 = 0;
2957 SET_DECNUM(mvdcmd, u8Idx);
2958 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
2959
2960 return TRUE;
2961 }
2962
2963 //------------------------------------------------------------------------------
2964 /// Set firmware as Progressive mode
2965 /// @return -TRUE for success; FALSE for failure.
2966 //------------------------------------------------------------------------------
HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx,MS_U8 u8Mode)2967 MS_BOOL HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx, MS_U8 u8Mode)
2968 {
2969 MVD_CmdArg mvdcmd;
2970
2971 SETUP_CMDARG(mvdcmd);
2972 mvdcmd.Arg0 = 0;
2973 mvdcmd.Arg1 = u8Mode; //1: enable, 0:disable
2974 SET_DECNUM(mvdcmd, u8Idx);
2975 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
2976
2977 return TRUE;
2978 }
2979
2980 //------------------------------------------------------------------------------
2981 /// Inform firwmare that PTS is updated.
2982 /// @return -TRUE for success; FALSE for failure.
2983 //------------------------------------------------------------------------------
HAL_MVD_UpdatePts(MS_U8 u8Idx)2984 MS_BOOL HAL_MVD_UpdatePts(MS_U8 u8Idx)
2985 {
2986 MVD_CmdArg mvdcmd;
2987
2988 SETUP_CMDARG(mvdcmd);
2989 SET_DECNUM(mvdcmd, u8Idx);
2990 SET_CMD_RET_FALSE(CMD_SEND_UNI_PTS, &mvdcmd);
2991
2992 return TRUE;
2993 }
2994
HAL_MVD_FrameCapture(MS_U8 u8Idx,MS_U8 u8FrmIdx,MS_BOOL bEnable)2995 MS_BOOL HAL_MVD_FrameCapture(MS_U8 u8Idx, MS_U8 u8FrmIdx, MS_BOOL bEnable)
2996 {
2997 MVD_CmdArg mvdcmd;
2998
2999 SETUP_CMDARG(mvdcmd);
3000 mvdcmd.Arg0 = bEnable; //0 or 1 to enable/disable the freeze function
3001 mvdcmd.Arg2 = u8FrmIdx; //specify the freezed frame index
3002 MVD_DEBUGINFO(MVD_PRINT("CAPTURE_FRAME: idx=0x%x, enable=0x%x\n", u8FrmIdx, bEnable));
3003 SET_DECNUM(mvdcmd, u8Idx);
3004 SET_CMD_RET_FALSE(CMD_ENABLE_FREEZE_PIC, &mvdcmd);
3005
3006 return TRUE;
3007 }
3008
3009 //------------------------------------------------------------------------------
3010 /// Set HW buffers' start address to MVD FW
3011 /// Return (the end address - 1)
3012 /// @param -u32Addr \b IN : start address (MIU offset)
3013 //------------------------------------------------------------------------------
HAL_MVD_SetHWBuffer(MS_U8 u8Idx,MS_U32 u32Add)3014 MS_U32 HAL_MVD_SetHWBuffer(MS_U8 u8Idx, MS_U32 u32Add)
3015 {
3016 MS_U32 tmpAdr;
3017
3018 MVD_DEBUGINFO(MVD_PRINT("====> %s u32Add = 0x%lx\n", __FUNCTION__, u32Add));
3019 tmpAdr = (MemAlign(u32Add, MVD_FW_IAP_BUF_ALIGN));
3020 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_IAP_BUF_ADR =%lx\n",tmpAdr));
3021 HAL_MVD_SetIAPBufferAddr(u8Idx, tmpAdr);
3022 tmpAdr += MVD_FW_IAP_BUF_LEN;
3023
3024 tmpAdr = (MemAlign(tmpAdr, MVD_FW_DP_BUF_ALIGN));
3025 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_DP_BUF_ADR=%lx\n",tmpAdr));
3026 HAL_MVD_SetDPBufferAddr(u8Idx, tmpAdr);
3027 tmpAdr += MVD_FW_DP_BUF_LEN;
3028
3029 tmpAdr = (MemAlign(tmpAdr, MVD_FW_MV_BUF_ALIGN));
3030 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_MV_BUF_ADR=%lx\n",tmpAdr));
3031 HAL_MVD_SetMVBufferAddr(u8Idx, tmpAdr);
3032 tmpAdr += MVD_FW_MV_BUF_LEN;
3033 MVD_DEBUGINFO(MVD_PRINT("====> %s End of HW buffers = 0x%lx\n", __FUNCTION__, tmpAdr));
3034
3035 return tmpAdr;
3036 }
3037
3038 //------------------------------------------------------------------------------
3039 /// Set the number of framebuffer
3040 /// @param -u8FrmNum \b IN : the number of framebuffer
3041 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx,MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)3042 void HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx, MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)
3043 {
3044 #define MVD_FBNUM_DEFAULT 4
3045 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
3046
3047 MVD_CmdArg mvdcmd;
3048
3049 MVD_DEBUGINFO(MVD_PRINT("%s u8FrmNum = %d\n", __FUNCTION__, u8FrmNum));
3050 if (u8FrmNum < MVD_FBNUM_MIN)
3051 {
3052 MVD_DEBUGINFO(MVD_PRINT("%s set u8FrmNum as %d instead of %d!\n",
3053 __FUNCTION__, MVD_FBNUM_MIN, u8FrmNum));
3054 u8FrmNum = MVD_FBNUM_MIN;
3055 }
3056 SETUP_CMDARG(mvdcmd);
3057 mvdcmd.Arg0 = u8FrmNum;
3058 mvdcmd.Arg1 = u32FBUsedSize&0xff;
3059 mvdcmd.Arg2 = (u32FBUsedSize>>8)&0xff;
3060 mvdcmd.Arg3 = (u32FBUsedSize>>16)&0xff;
3061 mvdcmd.Arg4 = (u32FBUsedSize>>24)&0xff;
3062 SET_DECNUM(mvdcmd, u8Idx);
3063 if (HAL_MVD_MVDCommand( CMD_FB_NUM, &mvdcmd ) == FALSE)
3064 {
3065 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FB_NUM ) );
3066 return;
3067 }
3068 return;
3069 }
3070
MVD_WriteFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U8 u8Offset,MS_U8 u8Size,MS_U32 u32Val)3071 static MS_BOOL MVD_WriteFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U8 u8Offset, MS_U8 u8Size, MS_U32 u32Val)
3072 {
3073 MS_BOOL bRet = FALSE;
3074 MS_U32 u32BufStart = NULL;
3075 switch (eBuffType)
3076 {
3077 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
3078 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
3079 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
3080 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
3081 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
3082 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
3083 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
3084 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
3085 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
3086 default:
3087 break;
3088 }
3089 if (NULL == u32BufStart)
3090 {
3091 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3092 __FUNCTION__, u8Idx, eBuffType, u8Offset, u8Size);
3093 return bRet;
3094 }
3095
3096 if (u8Size == sizeof(MS_U8))
3097 {
3098 bRet = HAL_MVD_MemWriteByte(u32BufStart+u8Offset, (MS_U8)u32Val);
3099 }
3100 else if (u8Size == sizeof(MS_U32))
3101 {
3102 bRet = HAL_MVD_MemWrite4Byte(u32BufStart+u8Offset, u32Val);
3103 }
3104
3105 MVD_DEBUGINFO(MVD_PRINT("%s: u32Val=%ld for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3106 __FUNCTION__, u32Val, u8Idx, eBuffType, u8Offset, u8Size));
3107 return bRet;
3108 }
3109
3110 //================== Vol Info ==================//
HAL_MVD_GetBitsRate(MS_U8 u8Idx)3111 MS_U32 HAL_MVD_GetBitsRate(MS_U8 u8Idx)
3112 {
3113 //Ref 13818-2, this flag is unit of 400 bits/sec
3114 return MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_BIT_RATE, sizeof(MS_U32))*400;
3115 }
3116
HAL_MVD_GetVideoRange(MS_U8 u8Idx)3117 MS_U8 HAL_MVD_GetVideoRange(MS_U8 u8Idx)
3118 {
3119 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_VIDEO_RANGE, sizeof(MS_U8));
3120 }
3121
HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)3122 MS_BOOL HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)
3123 {
3124 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_LOW_DELAY, sizeof(MS_U8));
3125 }
3126
HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)3127 MS_BOOL HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)
3128 {
3129 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_MPEG_FRC_MODE, sizeof(MS_U8));
3130 }
3131
HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)3132 MS_BOOL HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)
3133 {
3134 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_DS_ENABLE, sizeof(MS_U8));
3135 }
3136
HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)3137 MS_BOOL HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)
3138 {
3139 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_FIRST_DISPLAY, sizeof(MS_U8));
3140 }
3141
3142
3143 //================== FrameInfo ==================//
HAL_MVD_GetPicCounter(MS_U8 u8Idx)3144 MS_U32 HAL_MVD_GetPicCounter(MS_U8 u8Idx)
3145 {
3146 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FRAME_COUNT, sizeof(MS_U32));
3147 }
3148
HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)3149 MS_U32 HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)
3150 {
3151 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SKIP_FRAME_COUNT, sizeof(MS_U32));
3152 }
3153
HAL_MVD_GetDropPicCounter(MS_U8 u8Idx)3154 MS_U32 HAL_MVD_GetDropPicCounter(MS_U8 u8Idx)
3155 {
3156 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DROP_FRAME_COUNT, sizeof(MS_U32));
3157 }
3158
HAL_MVD_GetPicType(MS_U8 u8Idx)3159 MVD_PicType HAL_MVD_GetPicType(MS_U8 u8Idx)
3160 {
3161 MS_U32 picType = 0xff;
3162 MVD_PicType ret = E_MVD_PIC_UNKNOWN;
3163
3164 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3165 {
3166 MVD_DEBUGERROR(MVD_ERR("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3167 return E_MVD_PIC_UNKNOWN;
3168 }
3169 picType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PICTURE_TYPE, sizeof(MS_U32));
3170 switch (picType)
3171 {
3172 case 0:
3173 ret = E_MVD_PIC_I;
3174 break;
3175 case 1:
3176 ret = E_MVD_PIC_P;
3177 break;
3178 case 2:
3179 ret = E_MVD_PIC_B;
3180 break;
3181 default:
3182 break;
3183 }
3184 return ret;
3185 }
3186
HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)3187 MS_S32 HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)
3188 {
3189 return (MS_S32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PTS_STC, sizeof(MS_S32));
3190 }
3191
HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)3192 MS_U8 HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)
3193 {
3194 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FB_INDEX, sizeof(MS_U8));
3195 }
3196
HAL_MVD_GetVldErrCount(MS_U8 u8Idx)3197 MS_U32 HAL_MVD_GetVldErrCount(MS_U8 u8Idx)
3198 {
3199 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VLD_ERR_COUNT, sizeof(MS_U32));
3200 }
3201
HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)3202 MS_BOOL HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)
3203 {
3204 return !(MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INVALIDSTREAM, sizeof(MS_U8));
3205 }
3206
HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)3207 MS_U8 HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)
3208 {
3209 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FIRST_I_FOUND, sizeof(MS_U8));
3210 }
3211
3212 //------------------------------------------------------------------------------
3213 /// Set PTS base to MVD F/W
3214 /// @param -u32pts \b IN : pts unit in 90k counter
3215 //------------------------------------------------------------------------------
HAL_MVD_SetPTSBase(MS_U8 u8Idx,MS_U32 u32pts)3216 void HAL_MVD_SetPTSBase(MS_U8 u8Idx, MS_U32 u32pts)
3217 {
3218 MVD_CmdArg mvdcmd;
3219
3220 SET_CMDARG(mvdcmd, u32pts, u8Idx);
3221 if (HAL_MVD_MVDCommand( CMD_PTS_BASE, &mvdcmd ) == FALSE)
3222 {
3223 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_PTS_BASE ) );
3224 }
3225 return;
3226 }
3227
HAL_MVD_GetPTS(MS_U8 u8Idx)3228 MS_U32 HAL_MVD_GetPTS(MS_U8 u8Idx)
3229 {
3230 MS_U32 u32PTS = 0;
3231
3232 #if 1
3233 u32PTS = (MS_U32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3234 #else
3235 MVD_CmdArg mvdcmd;
3236 SETUP_CMDARG(mvdcmd);
3237 SET_DECNUM(mvdcmd, u8Idx);
3238 if (HAL_MVD_MVDCommand( CMD_RD_PTS, &mvdcmd ) == FALSE)
3239 {
3240 MVD_DEBUGERROR(MVD_ERR( "Ctrl: CMD_RD_PTS fail!!\n" ) );
3241 u32PTS = MVD_U32_MAX;
3242 }
3243 else
3244 {
3245 u32PTS = ((MS_U32)mvdcmd.Arg3 << 24 | (MS_U32)mvdcmd.Arg2 << 16 |
3246 (MS_U32)mvdcmd.Arg1 << 8 | (MS_U32)mvdcmd.Arg0);
3247 MVD_DEBUGVERBAL(MVD_PRINT("MDrv_MVD_GetPTS:0x%lx\n", u32PTS));
3248 }
3249 #endif
3250 u32PTS = _90K_TO_MS(u32PTS);
3251 return u32PTS;
3252 }
3253
HAL_MVD_GetU64PTS(MS_U8 u8Idx)3254 MS_U64 HAL_MVD_GetU64PTS(MS_U8 u8Idx)
3255 {
3256 MS_U64 u64PTS = 0;
3257 MS_U64 u32_high32_PTS = 0;
3258 MS_U64 u32_low32_PTS = 0;
3259
3260 u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3261 u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS_MSB, sizeof(MS_U32));
3262
3263 u64PTS = (u32_high32_PTS<<32)|u32_low32_PTS;
3264 u64PTS = _90K_TO_MS_U64(u64PTS);
3265 return u64PTS;
3266 }
3267
HAL_MVD_GetNextPTS(MS_U8 u8Idx)3268 MS_U32 HAL_MVD_GetNextPTS(MS_U8 u8Idx)
3269 {
3270 return (MS_U32)_90K_TO_MS(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_NEXT_PTS, sizeof(MS_U32)));
3271 }
3272
HAL_MVD_GetChromaFormat(MS_U8 u8Idx)3273 MS_U32 HAL_MVD_GetChromaFormat(MS_U8 u8Idx)
3274 {
3275 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CHROMA_FORMAT, sizeof(MS_U8));
3276 }
3277
HAL_MVD_GetGOPCount(MS_U8 u8Idx)3278 MS_U32 HAL_MVD_GetGOPCount(MS_U8 u8Idx)
3279 {
3280 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_I_FCNT, sizeof(MS_U32))
3281 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_P_FCNT, sizeof(MS_U32))
3282 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_B_FCNT, sizeof(MS_U32));
3283 }
3284
HAL_MVD_GetColorFormat(MS_U8 u8Idx)3285 MS_U8 HAL_MVD_GetColorFormat(MS_U8 u8Idx)
3286 {
3287 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3288 {
3289 MVD_DEBUGERROR(MVD_ERR("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3290 return 0xff;
3291 }
3292
3293 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VIDEO_FORMAT, sizeof(MS_U8));
3294 }
3295
HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)3296 MS_U8 HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)
3297 {
3298 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3299 {
3300 MVD_DEBUGERROR(MVD_ERR("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3301 return 0xff;
3302 }
3303
3304 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MATRIX_COEF, sizeof(MS_U8));
3305 }
3306
HAL_MVD_StepDecode(MS_U8 u8Idx)3307 MS_BOOL HAL_MVD_StepDecode(MS_U8 u8Idx)
3308 {
3309 MVD_CmdArg mvdcmd;
3310 SETUP_CMDARG(mvdcmd);
3311 SET_DECNUM(mvdcmd, u8Idx);
3312 SET_CMD_RET_FALSE(CMD_SINGLE_STEP, &mvdcmd);
3313
3314 if (HAL_MVD_Resume(u8Idx) == FALSE)
3315 {
3316 MVD_DEBUGERROR(MVD_ERR("Command: HAL_MVD_Resume fail!!\r\n"));
3317 return FALSE;
3318 }
3319
3320 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3321 if (pCtrlCfg)
3322 {
3323 pCtrlCfg->bStepDecode = TRUE;
3324 }
3325
3326 return TRUE;
3327 }
3328
HAL_MVD_IsStepDispDone(MS_U8 u8Idx)3329 MS_BOOL HAL_MVD_IsStepDispDone(MS_U8 u8Idx)
3330 {
3331 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8));
3332 }
3333
HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)3334 MS_BOOL HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)
3335 {
3336 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_TO_PTS_DONE, sizeof(MS_U8));
3337 }
3338
3339 //Only for RCV.
HAL_MVD_GetPayloadLen(MS_U8 u8Idx)3340 MS_U32 HAL_MVD_GetPayloadLen(MS_U8 u8Idx)
3341 {
3342 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_RCV_PAYLOAD_LENGTH, sizeof(MS_U32));
3343 }
3344
3345 //Only for RCV.
HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)3346 MS_BOOL HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)
3347 {
3348 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MEET_FILE_END_SC, sizeof(MS_U8));
3349 }
3350
HAL_MVD_IsCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3351 MS_BOOL HAL_MVD_IsCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3352 {
3353 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3354 MS_BOOL bCmdRdy = FALSE;
3355
3356 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3357
3358 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3359 MVD_DEBUGINFO(MVD_PRINT("u32CmdState.value = 0x%x\n", u32CmdState.value));
3360 switch (eCmd)
3361 {
3362 case MVD_HANDSHAKE_PAUSE:
3363 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_pause);
3364 break;
3365 case MVD_HANDSHAKE_SLQ_RST:
3366 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_slq_reset);
3367 break;
3368 case MVD_HANDSHAKE_STOP:
3369 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_stop);
3370 break;
3371 case MVD_HANDSHAKE_SKIP_DATA:
3372 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_skip_data);
3373 break;
3374 case MVD_HANDSHAKE_SINGLE_STEP:
3375 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_single_step);
3376 break;
3377 case MVD_HANDSHAKE_SCALER_INFO:
3378 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_scaler_data_ready);
3379 break;
3380 case MVD_HANDSHAKE_GET_NXTDISPFRM:
3381 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready);
3382 break;
3383 case MVD_HANDSHAKE_PARSER_RST:
3384 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_parser_rst);
3385 break;
3386 case MVD_HANDSHAKE_RST_CC608:
3387 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc608_rst);
3388 break;
3389 case MVD_HANDSHAKE_RST_CC708:
3390 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc708_rst);
3391 break;
3392 default:
3393 bCmdRdy = FALSE;
3394 break;
3395 }
3396 return bCmdRdy;
3397 }
3398
HAL_MVD_ClearCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3399 MS_BOOL HAL_MVD_ClearCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3400 {
3401 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3402
3403 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3404
3405 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3406 MVD_DEBUGINFO(MVD_PRINT("before CLR u32CmdState.value = 0x%x\n", u32CmdState.value));
3407 switch (eCmd)
3408 {
3409 case MVD_HANDSHAKE_SCALER_INFO:
3410 u32CmdState.mvdcmd_handshake_scaler_data_ready = 0;
3411 break;
3412 default:
3413 break;
3414 }
3415
3416 //write the value back: may it overwrite the value that f/w is supposed to write?
3417 MVD_WriteFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32), u32CmdState.value);
3418 MVD_DEBUGINFO(MVD_PRINT("after CLR u32CmdState.value = 0x%lx\n",
3419 MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32))));
3420 return TRUE;
3421 }
3422
3423
HAL_MVD_GetTimeCode(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_TimeCode * pInfo)3424 MS_BOOL HAL_MVD_GetTimeCode(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_TimeCode* pInfo)
3425 {
3426 MS_BOOL bRet = FALSE;
3427 MS_U32 pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3428 if (NULL == pInfo)
3429 {
3430 return FALSE;
3431 }
3432
3433 HAL_MVD_InvalidBuffRetFalse(pu8MVDGetFrameInfoBufStart);
3434
3435 if (E_MVD_FRMINFO_DECODE == eType)
3436 {
3437 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS);
3438 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES);
3439 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS);
3440 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES);
3441 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG);
3442 }
3443 else if (E_MVD_FRMINFO_DISPLAY == eType)
3444 {
3445 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS_DISP);
3446 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES_DISP);
3447 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS_DISP);
3448 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES_DISP);
3449 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG_DISP);
3450 }
3451 else
3452 {
3453 bRet = FALSE;
3454 }
3455
3456 return bRet;
3457 }
3458
HAL_MVD_GetDispCnt(MS_U8 u8Idx)3459 MS_U32 HAL_MVD_GetDispCnt(MS_U8 u8Idx)
3460 {
3461 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPLAYED_CNT, sizeof(MS_U32));
3462 }
3463
HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)3464 MS_U32 HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)
3465 {
3466 MS_U32 pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3467
3468 if(pu8MVDGetFrameInfoBufStart==0)
3469 {
3470 MVD_DEBUGERROR(printf("MDrv_MVD_GetXcLowDelayIntState error: pu8MVDGetFrameInfoBufStart=NULL\n"));
3471 return 0;
3472 }
3473
3474 MVD_DEBUGINFO(printf("MDrv_MVD_GetXcLowDelayIntState()=%lx,%lx,%lx,%lx,%lx\n",
3475 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT)),
3476 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE)),
3477 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_DIFF_FIELD_NO)),
3478 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT_LATCH)),
3479 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_FRAME_COUNT))));
3480
3481 return HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE);
3482 }
3483
3484 //Get ErrStatus when ErrCode==ErrShape
MVD_GetErrShapeStat(MS_U32 u32errStat)3485 static MVD_ErrStatus MVD_GetErrShapeStat(MS_U32 u32errStat)
3486 {
3487 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
3488 switch (u32errStat)
3489 {
3490 case 0:
3491 st = E_MVD_ERR_SHAPE_RECTANGULAR;
3492 break;
3493 case 1:
3494 st = E_MVD_ERR_SHAPE_BINARY;
3495 break;
3496 case 2:
3497 st = E_MVD_ERR_SHAPE_BINARY_ONLY;
3498 break;
3499 case 3:
3500 st = E_MVD_ERR_SHAPE_GRAYSCALE;
3501 break;
3502 default:
3503 break;
3504 }
3505 return st;
3506 }
3507
3508 //Get ErrStatus when ErrCode==ErrSprite
MVD_GetErrSpriteStat(MS_U32 u32errStat)3509 static MVD_ErrStatus MVD_GetErrSpriteStat(MS_U32 u32errStat)
3510 {
3511 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
3512 switch (u32errStat)
3513 {
3514 case 0:
3515 st = E_MVD_ERR_USED_SPRITE_UNUSED;
3516 break;
3517 case 1:
3518 st = E_MVD_ERR_USED_SPRITE_STATIC;
3519 break;
3520 case 2:
3521 st = E_MVD_ERR_USED_SPRITE_GMC;
3522 break;
3523 case 3:
3524 st = E_MVD_ERR_USED_SPRITE_RESERVED;
3525 break;
3526 default:
3527 break;
3528 }
3529 return st;
3530 }
3531
HAL_MVD_GetErrInfo(MS_U8 u8Idx,MVD_ErrCode * errCode,MVD_ErrStatus * errStatus)3532 void HAL_MVD_GetErrInfo(MS_U8 u8Idx, MVD_ErrCode *errCode, MVD_ErrStatus *errStatus)
3533 {
3534 MS_U32 errorCode = E_MVD_ERR_UNKNOWN;
3535 MS_U32 errorStatus = E_MVD_ERR_STATUS_UNKOWN;
3536 MS_U32 pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3537
3538 if(pu8MVDGetFrameInfoBufStart==0)
3539 {
3540 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_GetErrInfo error!\n"));
3541 return;
3542 }
3543
3544 errorCode = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_CODE);
3545 errorStatus = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_STATUS);
3546
3547 switch (errorCode)
3548 {
3549 case VOL_SHAPE:
3550 *errCode = E_MVD_ERR_SHAPE;
3551 *errStatus = MVD_GetErrShapeStat(errorStatus);
3552 break;
3553 case VOL_USED_SPRITE:
3554 *errCode = E_MVD_ERR_USED_SPRITE;
3555 *errStatus = MVD_GetErrSpriteStat(errorStatus);
3556 break;
3557 case VOL_NOT_8_BIT:
3558 *errCode = E_MVD_ERR_NOT_8_BIT;
3559 *errStatus = E_MVD_ERR_STATUS_NONE;
3560 break;
3561 case VOL_NERPRED_ENABLE:
3562 *errCode = E_MVD_ERR_NERPRED_ENABLE;
3563 *errStatus = E_MVD_ERR_STATUS_NONE;
3564 break;
3565 case VOL_REDUCED_RES_ENABLE:
3566 *errCode = E_MVD_ERR_REDUCED_RES_ENABLE;
3567 *errStatus = E_MVD_ERR_STATUS_NONE;
3568 break;
3569 case VOL_SCALABILITY:
3570 *errCode = E_MVD_ERR_SCALABILITY;
3571 *errStatus = E_MVD_ERR_STATUS_NONE;
3572 break;
3573 case VOL_H263_ERROR:
3574 *errCode = E_MVD_ERR_H263_ERROR;
3575 *errStatus = E_MVD_ERR_STATUS_NONE;
3576 break;
3577 case VOL_RES_NOT_SUPPORT:
3578 *errCode = E_MVD_ERR_RES_NOT_SUPPORT;
3579 *errStatus = E_MVD_ERR_STATUS_NONE;
3580 break;
3581 case VOL_MPEG4_NOT_SUPPORT:
3582 *errCode = E_MVD_ERR_MPEG4_NOT_SUPPORT;
3583 *errStatus = E_MVD_ERR_STATUS_NONE;
3584 break;
3585 case VOL_PROFILE_NOT_SUPPORT:
3586 *errCode = E_MVD_ERR_PROFILE_NOT_SUPPORT;
3587 *errStatus = E_MVD_ERR_STATUS_NONE;
3588 break;
3589 case VOL_RCV_ERROR_OCCUR:
3590 *errCode = E_MVD_ERR_RCV_ERROR_OCCUR;
3591 *errStatus = E_MVD_ERR_STATUS_NONE;
3592 break;
3593 case VOL_OTHER:
3594 *errCode = E_MVD_ERR_OTHER;
3595 *errStatus = E_MVD_ERR_STATUS_NONE;
3596 break;
3597 default:
3598 *errCode = E_MVD_ERR_UNKNOWN;
3599 *errStatus = E_MVD_ERR_STATUS_UNKOWN;
3600 break;
3601 }
3602
3603 return;
3604 }
3605
3606 //take care MIU1 address
HAL_MVD_GetMemOffset(MS_PHYADDR u32PhyAdd)3607 MS_U32 HAL_MVD_GetMemOffset(MS_PHYADDR u32PhyAdd)
3608 {
3609 if (u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu1BaseAddr)
3610 {
3611 return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu1BaseAddr);
3612 }
3613 else
3614 {
3615 return u32PhyAdd;
3616 }
3617 }
3618
HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx,MVD_PacketInfo * pstVideoPKT)3619 MS_BOOL HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx, MVD_PacketInfo *pstVideoPKT)
3620 {
3621 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
3622 MS_U32 u32EsLast;
3623 MS_U32* u32LastEntry = &pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
3624 MS_U32* pu32EsNew = &pstSlqTblInfo->pDrvEsTbl->u32WrPtr;
3625 MS_U32 u32EntryWord = 0;
3626 MS_U32 u32Index = 0;
3627 MS_U32 u32Pts;
3628 MS_U32 u32ESStart=0;
3629 MS_U32 u32ESEnd=0;
3630 MS_U32 u32MVDFWPtsTblAddr = NULL;
3631 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
3632 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3633
3634 //SEC IP clip mode dummy pkt. no need to update pts.
3635 MS_U8 *pu8Data = (MS_U8 *)HAL_MVD_PA2NonCacheSeg(pstVideoPKT->u32StAddr + pstMemCfg->u32BSAddr);
3636 MS_BOOL bIsNeedUpdatePTS = TRUE;
3637 #if _SLQTBL_DUMP_PKT
3638 // static MS_U32 u32SendTimes[MAX_DEC_NUM]= {0, 0};
3639
3640 MVD_PRINT("Pkt[%lx] st=0x%lx len=0x%lx pts=0x%lx id_l=0x%lx id_h=0x%lx\n", u32SendTimes[u8Idx]++,
3641 pstVideoPKT->u32StAddr, pstVideoPKT->u32Length, pstVideoPKT->u32TimeStamp,
3642 pstVideoPKT->u32ID_L, pstVideoPKT->u32ID_H);
3643 #endif
3644
3645 u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
3646 MS_ASSERT(u32MVDFWPtsTblAddr != NULL);
3647
3648 //Fixed me. SEC IP clip mode dummy pkt. size = 256. pattern : 000001C6FFFF...FF.
3649 //we only check first 8 bytes for speed.
3650 if (HAL_MVD_IsMStreamerMode(u8Idx) && (pstVideoPKT->u32Length == 256))
3651 {
3652 //dummy pkt, no need to udpate PTS entry~~
3653 if((pu8Data[0] == 0x00)
3654 && (pu8Data[1] == 0x00)
3655 && (pu8Data[2] == 0x01)
3656 && (pu8Data[3] == 0xC6)
3657 && (pu8Data[4] == 0xFF)
3658 && (pu8Data[5] == 0xFF)
3659 && (pu8Data[6] == 0xFF)
3660 && (pu8Data[7] == 0xFF))
3661 {
3662 bIsNeedUpdatePTS = FALSE;
3663 }
3664 }
3665
3666 if (u32MVDFWPtsTblAddr && (bIsNeedUpdatePTS == TRUE))
3667 {
3668 MS_U32 u32PtsTblEntryAddr = 0;
3669 //so far, this is the only place that driver will write f/w 1M area after init.
3670 u32Index = (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/8;
3671 if(HAL_MVD_IsMcuMode(u8Idx) == FALSE)
3672 {
3673 if (pstVideoPKT->u32TimeStamp != MVD_NULLPKT_PTS)
3674 {
3675 u32Pts = _MS_TO_90K(pstVideoPKT->u32TimeStamp);
3676 }
3677 else
3678 {
3679 u32Pts = MVD_NULLPKT_PTS;
3680 }
3681 }
3682 else
3683 {
3684 u32Pts = pstVideoPKT->u32TimeStamp;
3685 }
3686 u32PtsTblEntryAddr = u32MVDFWPtsTblAddr+u32Index*MVD_FW_SLQTBL_PTS_LEN;
3687 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+4, pstSlqTblInfo->u32DummyPktCnt); //dummyPktCnt
3688 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+8, pstVideoPKT->u32ID_L); //idLow
3689 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+12, pstVideoPKT->u32ID_H); //idHigh
3690 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+16, u32Pts); //PTS
3691 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr, (pstSlqTblInfo->u32SlqByteCnt)&0xffffff); //byteCnt
3692 //MVD_PRINT("PTS=0x%lx(%lx), idx=0x%lx add=0x%lx\n", pstVideoPKT->u32TimeStamp,
3693 // HAL_MVD_MemRead4Byte(u32PtsTblEntryAddr+16),
3694 // u32Index, u32PtsTblEntryAddr+16);
3695
3696 if ((HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
3697 && (pstCtrlCfg->eFileSyncMode == E_MVD_TIMESTAMP_STS))
3698 {
3699 if(pMVDHalContext->bDropOnePTS[u8Idx] == FALSE)
3700 {
3701 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12, pstVideoPKT->u32ID_H); //idHigh
3702 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16, pstVideoPKT->u32TimeStamp); //PTS
3703
3704 MVD_DBG_STS(MVD_PRINT(">>> drvMVD pts,idH = %lu, %lu\n", HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16),
3705 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12)));
3706 if (((MVD_NULLPKT_PTS == pstVideoPKT->u32ID_H) && (MVD_NULLPKT_PTS == pstVideoPKT->u32TimeStamp)) == FALSE)
3707 { //Only update PTS to firmware when pts field is valid.
3708 //Plz refer to MDrv_MVD_PushQueue if (u8MstMode == MST_MODE_TRUE) {}
3709 HAL_MVD_UpdatePts(u8Idx); //for uniplayer or MCU mode
3710 }
3711 }
3712
3713 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
3714 }
3715 }
3716 #if _SLQTBL_DUMP_PTS
3717 if (u32Index == 0x177)
3718 {
3719 _SLQTbl_DumpPtsTbl(u8Idx, 0, 0x179);
3720 }
3721 #endif
3722
3723 pstSlqTblInfo->u32SlqByteCnt += pstVideoPKT->u32Length;
3724
3725 //update SLQ tbl entry
3726 //u32EsLast = (pstVideoPKT->u32StAddr)+pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
3727 u32EsLast = (pstVideoPKT->u32StAddr)+HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
3728 HAL_MVD_MemWrite4Byte(*pu32EsNew, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
3729 u32ESStart = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
3730
3731 u32EsLast += pstVideoPKT->u32Length; //update ES write pointer
3732 //Notice: This is for MVD HW, so no need to minus one.
3733 HAL_MVD_MemWrite4Byte((*pu32EsNew)+4, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
3734 u32ESEnd = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
3735
3736 *pu32EsNew += 8;
3737 if (*pu32EsNew >= pstSlqTblInfo->pDrvEsTbl->u32EndAdd)
3738 { //wrap to the beginning of the table
3739 MVD_DEBUGINFO(MVD_PRINT("...ES wrapping to the beginning!\n"));
3740 *pu32EsNew = pstSlqTblInfo->pDrvEsTbl->u32StAdd;
3741 }
3742
3743 //MVD_PRINT("===>[%lx] u32ESStart=0x%lx u32ESEnd=0x%lx u32EsLast=0x%lx\n",
3744 // pMVDHalContext->u32SendTimes[u8Idx]++, u32ESStart, u32ESEnd, u32EsLast);
3745
3746 u32EntryWord = u32ESEnd;
3747 HAL_MVD_MemWrite4Byte(*u32LastEntry, u32EntryWord);
3748 //MVD_PRINT("===> u32EntryWord1 addr=0x%lx\n", (*u32LastEntry));
3749 //MVD_PRINT("===> u32EntryWord0=0x%lx\n", u32EntryWord);
3750
3751 u32EntryWord = u32ESStart;
3752 HAL_MVD_MemWrite4Byte((*u32LastEntry)+4, u32EntryWord);
3753 //MVD_PRINT("===> u32EntryWord1 addr=0x%lx\n", (*u32LastEntry)+4);
3754 //MVD_PRINT("===> u32EntryWord1=0x%lx\n", u32EntryWord);
3755
3756 *u32LastEntry += 8;
3757 if (*u32LastEntry >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
3758 { //wrap to the beginning of the table
3759 MVD_DEBUGINFO(MVD_PRINT("...wrapping to the beginning!\n"));
3760 *u32LastEntry = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
3761 //also wrap DivX311 pattern table
3762 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
3763 }
3764
3765 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty> SLQ_ENTRY_LEN)
3766 {
3767 pstSlqTblInfo->pDrvSlqTbl->u32Empty -= SLQ_ENTRY_LEN;
3768 }
3769
3770 return TRUE;
3771 }
3772
3773 //Table of frame rate code for MPEG-2
3774 #if 0
3775 #define FRM_RATE_CODE_NUM 9
3776 static const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
3777 {
3778 NULL,23976,24000,25000,29976,30000,50000,59947,60000
3779 };
3780 #endif
MVD_GCD(MS_U32 u32A,MS_U32 u32B)3781 static MS_U32 MVD_GCD(MS_U32 u32A, MS_U32 u32B)
3782 {
3783 MS_S32 i;
3784 MS_U32 x[4]; /* need x[0], x[1], x[i-1] */
3785
3786 if (u32A > u32B)
3787 {
3788 x[0] = u32A; x[1] = u32B;
3789 }
3790 else
3791 {
3792 x[0] = u32B; x[1] = u32A;
3793 }
3794
3795 i = 1;
3796
3797 #define w(x) (((x)<4)?(x):(2+((x)&1)))
3798
3799 while( x[w(i)] != 0 )
3800 {
3801 x[w(i+1)] = x[w(i-1)] % x[w(i)];
3802 i++;
3803 }
3804
3805 return x[w(i-1)];
3806
3807 #undef w
3808 }
HAL_MVD_GetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)3809 void HAL_MVD_GetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo)
3810 {
3811 FW_VOL_INFO gvolInfo;
3812 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
3813 MS_U32 u32DAR_Width=0,u32DAR_Height=0,u32PAR_Width=0,u32PAR_Height=0,u32GCD=0;
3814 MS_U32 u32Vertical_Size=0, u32Horizontal_Size=0;
3815 //13818-2 page 38 Table 6-3
3816 MS_U8 u8DARTable[5][2] = { {1,1}, {1,1}, {4,3}, {16,9}, {221,100} };
3817 MS_U32 pu8MVDGetVolBufStart = NULL;
3818 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
3819
3820 pu8MVDGetVolBufStart = GET_VOL_BUFFADD(u8Idx);
3821 if (pu8MVDGetVolBufStart == NULL)
3822 {
3823 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_GetFrameInfo error: pu8MVDGetVolBufStart=NULL\n"));
3824 return;
3825 }
3826
3827 HAL_MVD_CPU_Sync();
3828 HAL_MVD_ReadMemory();
3829 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
3830 {
3831 gvolInfo = (*(volatile FW_VOL_INFO*)(HAL_MVD_PA2NonCacheSeg(GET_VOL_BUFFADD(u8Idx)+pMVDHalContext->stMiuCfg.u32Miu1BaseAddr)));
3832 }
3833 else
3834 {
3835 gvolInfo = (*(volatile FW_VOL_INFO*)(HAL_MVD_PA2NonCacheSeg(GET_VOL_BUFFADD(u8Idx))));
3836 }
3837
3838 #if 0
3839 MVD_DEBUGINFO(MVD_PRINT("vol info,vol_info=%d,sprite_usage=%d,pts_incr=%d,\n",
3840 gvolInfo.vol_info,gvolInfo.sprite_usage,gvolInfo.pts_incr));
3841 MVD_DEBUGINFO(MVD_PRINT("vol info,width=%x,height=%x,frame_rate=%d,aspect_ratio=%x,\n",
3842 gvolInfo.width,gvolInfo.height,gvolInfo.frame_rate,gvolInfo.aspect_ratio));
3843 MVD_DEBUGINFO(MVD_PRINT("vol info,progressive_sequence=%x,mpeg1=%x,play_mode=%x,bit_rate=%x,\n",
3844 gvolInfo.progressive_sequence,gvolInfo.mpeg1,gvolInfo.play_mode,gvolInfo.bit_rate));
3845 #endif
3846
3847 pinfo->u16HorSize = (MS_U16) gvolInfo.width;
3848 pinfo->u16VerSize = (MS_U16) gvolInfo.height;
3849 pinfo->u16par_width = (MS_U16) gvolInfo.par_width;
3850 pinfo->u16par_height = (MS_U16) gvolInfo.par_height;
3851 pinfo->u8AspectRate = gvolInfo.aspect_ratio;
3852
3853 pinfo->u16CropBottom = gvolInfo.CropBottom;
3854 pinfo->u16CropTop = 0;
3855 pinfo->u16CropLeft = 0;
3856
3857 if (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK)
3858 {
3859 //Notice: Firmware and driver have to be consistent for this part,
3860 // otherwise the pitch will not match and video is noisy.
3861 pinfo->u16CropRight = MVD_WIDTH_ALIGN_BYTE - (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK);
3862 pinfo->u16HorSize = ((pinfo->u16HorSize >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
3863 }
3864 else
3865 {
3866 pinfo->u16CropRight = 0;
3867 }
3868
3869 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
3870 if ((curCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER) ||
3871 (curCodecType == E_MVD_CODEC_DIVX311) || (curCodecType == E_MVD_CODEC_FLV))
3872 {
3873 pinfo->u8Interlace= FALSE; //divx311/flv/svh just has progressive mode
3874 MS_ASSERT(gvolInfo.progressive_sequence == 1); //FW will init it as 1
3875 }
3876 else
3877 {
3878 if (gvolInfo.progressive_sequence == 0)
3879 {
3880 pinfo->u8Interlace=1;
3881 }
3882 else
3883 {
3884 pinfo->u8Interlace=0;
3885 }
3886 }
3887
3888 ///Calculate PAR info
3889 if (pinfo->u16par_width == 0 || pinfo->u16par_height == 0)
3890 {
3891 if ((pinfo->u8AspectRate > 0) && (pinfo->u8AspectRate < 5 ))
3892 {
3893 if (pinfo->u8AspectRate == 1)
3894 { //SAR=1.0 square sample
3895 u32DAR_Width = (MS_U32)pinfo->u16HorSize;
3896 u32DAR_Height = (MS_U32)pinfo->u16VerSize;
3897 pinfo->u16par_width = 1;
3898 pinfo->u16par_height = 1;
3899 }
3900 else
3901 {
3902 u32DAR_Width = (MS_U32)u8DARTable[pinfo->u8AspectRate][0];
3903 u32DAR_Height = (MS_U32)u8DARTable[pinfo->u8AspectRate][1];
3904 u32Vertical_Size = (MS_U32)pinfo->u16VerSize;
3905 u32Horizontal_Size = (MS_U32)(pinfo->u16HorSize - pinfo->u16CropRight);
3906 u32PAR_Width = u32DAR_Width * u32Vertical_Size;
3907 u32PAR_Height = u32DAR_Height * u32Horizontal_Size;
3908 u32GCD = MVD_GCD(u32PAR_Width, u32PAR_Height);
3909 if (0 == u32GCD)
3910 {
3911 pinfo->u16HorSize = 0xFFFF;
3912 pinfo->u16VerSize = 0xFFFF;
3913
3914 return;
3915 }
3916 else
3917 {
3918 pinfo->u16par_width = (MS_U16) (u32PAR_Width / u32GCD);
3919 pinfo->u16par_height = (MS_U16) (u32PAR_Height / u32GCD);
3920 MVD_DEBUGVERBAL(MVD_PRINT("u32PAR_Width:%ld,u32PAR_Height:%ld,GCD:%ld\n",u32PAR_Width,u32PAR_Height,u32GCD));
3921 }
3922 }
3923 }
3924 else
3925 {
3926 //set to 0 to indicate it's abnormal
3927 u32DAR_Width = 0;
3928 u32DAR_Height = 0;
3929 pinfo->u16par_width = 0;
3930 pinfo->u16par_height = 0;
3931 }
3932 MVD_DEBUGVERBAL(MVD_PRINT("u32DAR_Width:%ld,u32DAR_Height%ld\n",u32DAR_Width,u32DAR_Height));
3933 }
3934 MVD_DEBUGVERBAL(MVD_PRINT("pinfo->u16par_width:%d, pinfo->u16par_height:%d\n",pinfo->u16par_width, pinfo->u16par_height));
3935
3936 if (curCodecType == E_MVD_CODEC_MPEG2)
3937 {
3938 if (gvolInfo.frame_rate < FRM_RATE_CODE_NUM)
3939 {
3940 pinfo->u32FrameRate = stFrameRateCode[gvolInfo.frame_rate];
3941 }
3942 else
3943 {
3944 pinfo->u32FrameRate = 0;
3945 }
3946 }
3947 else if ((curCodecType == E_MVD_CODEC_VC1_ADV) || (curCodecType == E_MVD_CODEC_VC1_MAIN))
3948 {
3949 if ((gvolInfo.vc1_frame_rate != 0) && (gvolInfo.vc1_frame_rate != MVD_U32_MAX))
3950 {
3951 pinfo->u32FrameRate = gvolInfo.vc1_frame_rate;
3952 }
3953 else
3954 {
3955 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
3956 }
3957
3958 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vc1_frameRate=%ld\n", pinfo->u32FrameRate));
3959 }
3960 else if (curCodecType == E_MVD_CODEC_MPEG4)
3961 {
3962 if (pDivxInfo->frame_rate != 0)
3963 {
3964 pinfo->u32FrameRate = pDivxInfo->frame_rate;
3965 //report framerate specified in MDrv_MVD_SetFrameInfo(), which is usually obtained from container
3966 }
3967 else if (gvolInfo.frame_rate != 0)
3968 {
3969 pinfo->u32FrameRate = gvolInfo.frame_rate; //report framerate from f/w
3970 }
3971 else if ((gvolInfo.fixed_vop_time_incr != 0) && (gvolInfo.vol_time_incr_res != 0))
3972 {
3973 pinfo->u32FrameRate = (gvolInfo.vol_time_incr_res * 1000) / gvolInfo.fixed_vop_time_incr;
3974 //calculate framerate according to vol header
3975 }
3976 else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
3977 {
3978 pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx]/pMVDHalContext->u32DmxFrameRateBase[u8Idx])*1000;
3979 }
3980 else
3981 {
3982 pinfo->u32FrameRate = 60000; //set default frame rate according to chip capability
3983 }
3984 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vol_time_incr_res=%d, fixed_vop_time_incr=%d\n", gvolInfo.vol_time_incr_res, gvolInfo.fixed_vop_time_incr));
3985 }
3986 else
3987 {
3988 if (gvolInfo.frame_rate != 0)
3989 {
3990 pinfo->u32FrameRate = gvolInfo.frame_rate;
3991 }
3992 else
3993 {
3994 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
3995 }
3996 }
3997 MVD_DEBUGVERBAL(MVD_PRINT("===> MVD: frameRate=%ld curCodecType=0x%x\n", pinfo->u32FrameRate, curCodecType));
3998
3999 //for MM
4000 pinfo->u8MPEG1=gvolInfo.mpeg1;
4001 pinfo->u16PTSInterval=gvolInfo.pts_incr;
4002 pinfo->u8PlayMode=gvolInfo.play_mode;
4003 pinfo->u8FrcMode=gvolInfo.mpeg_frc_mode;
4004
4005 //for dynamic scaling
4006 pinfo->bEnableMIUSel = pMVDHalContext->stMiuCfg.bFWMiuSel;
4007 if (pstMemCfg->bEnableDynScale)
4008 {
4009 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
4010 {
4011 pinfo->u32DynScalingAddr= GET_DS_BUFFADD(u8Idx) + pMVDHalContext->stMiuCfg.u32Miu1BaseAddr;
4012 }
4013 else
4014 {
4015 pinfo->u32DynScalingAddr= GET_DS_BUFFADD(u8Idx);
4016 }
4017 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4018 pinfo->u8DynScalingDepth= pCtrlCfg->u8DynScalingDepth;
4019 pinfo->u32DynScalingBufSize= gvolInfo.DSbufsize;
4020 }
4021 else
4022 {
4023 pinfo->u32DynScalingAddr= NULL;
4024 pinfo->u8DynScalingDepth= 0;
4025 pinfo->u32DynScalingBufSize= 0;
4026 }
4027
4028 return;
4029 }
4030
MVD_RstFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType)4031 E_MVD_Result MVD_RstFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType)
4032 {
4033 E_MVD_Result eRet = E_MVD_RET_OK;
4034 MS_U32 u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4035 if (NULL == u32DecFrmInfoAdd)
4036 {
4037 return E_MVD_RET_FAIL;
4038 }
4039
4040 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%lx\n", __FUNCTION__, u32DecFrmInfoAdd);
4041 if (E_MVD_FRMINFO_DECODE == eType)
4042 {
4043 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR), _INIT_ADDR);
4044 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR), _INIT_ADDR);
4045 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP), _INIT_TIMESTAMP);
4046 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L), _INIT_ID);
4047 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H), _INIT_ID);
4048 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH), _INIT_LEN);
4049 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH), _INIT_LEN);
4050 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT), _INIT_LEN);
4051 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE), 0xff);
4052 }
4053 else if (E_MVD_FRMINFO_DISPLAY == eType)
4054 {
4055 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR), _INIT_ADDR);
4056 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR), _INIT_ADDR);
4057 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP), _INIT_TIMESTAMP);
4058 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L), _INIT_ID);
4059 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H), _INIT_ID);
4060 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH), _INIT_LEN);
4061 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH), _INIT_LEN);
4062 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT), _INIT_LEN);
4063 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE), 0xff);
4064 }
4065 else
4066 {
4067 eRet = E_MVD_RET_INVALID_PARAM;
4068 }
4069
4070 return eRet;
4071 }
4072
4073 //Given the start address & the available size for the FW buffers,
4074 //Calculate the start address of each buffers.
MVD_GetFWBuffAdd(MS_U32 u32Start,MS_U32 u32AvailLen,MVD_FWBuff * pBuff)4075 static MS_BOOL MVD_GetFWBuffAdd(MS_U32 u32Start, MS_U32 u32AvailLen, MVD_FWBuff* pBuff)
4076 {
4077 MS_U32 tmpAdr = u32Start;
4078
4079 if(pBuff == NULL)
4080 {
4081 MVD_DEBUGERROR(MVD_ERR("%s err: NULL pBuff\n", __FUNCTION__));
4082 return FALSE;
4083 }
4084 tmpAdr += MVD_FW_CODE_LEN;
4085 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_VOL_INFO_BUF_LEN, pBuff->pu8MVDGetVolBufStart);
4086 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_FRAME_INFO_BUF_LEN, pBuff->pu8MVDGetFrameInfoBufStart);
4087 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_DIVX_INFO_BUF_LEN, pBuff->pu8MVDSetHeaderBufStart);
4088 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN,
4089 (MVD3_FW_USER_DATA_BUF_LEN+MVD3_FW_USER_DATA_BUF_BACKUP_LEN), pBuff->u32UserDataBuf);
4090 //MVD3_FW_USER_DATA_BUF_BACKUP_LEN is used as CC decoding buffer for MVD_SUPPORT_X4_CC
4091
4092 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_SLQ_TAB_TMPBUF_LEN, pBuff->u32MVDFWSLQTABTmpbufAdr);
4093 GET_FW_BUFFADD(tmpAdr, MVD_FW_SLQTBL_PTS_BUF_LEN, pBuff->u32MVDFWPtsTblAddr);
4094 GET_FW_BUFFADD(tmpAdr, MVD_FW_DYN_SCALE_BUF_LEN, pBuff->u32DynScalingAdd);
4095 GET_FW_BUFFADD(tmpAdr, MVD_FW_SCALER_INFO_BUF_LEN, pBuff->u32ScalerInfoAdd);
4096 GET_FW_BUFFADD(tmpAdr, MVD_FW_DECFRM_INFO_BUF_LEN, pBuff->u32DecFrmInfoAdd);
4097
4098 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetVolBufStart=%lx\n", pBuff->pu8MVDGetVolBufStart));
4099 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetFrameInfoBufStart=%lx\n", pBuff->pu8MVDGetFrameInfoBufStart));
4100 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDSetHeaderBufStart=%lx\n", pBuff->pu8MVDSetHeaderBufStart));
4101 MVD_DEBUGINFO(MVD_PRINT("u32UserDataBuf start=%lx\n", pBuff->u32UserDataBuf));
4102 MVD_DEBUGINFO(MVD_PRINT("u32MVDFWSLQTABTmpbufAdr start=%lx\n", pBuff->u32MVDFWSLQTABTmpbufAdr));
4103 MVD_DEBUGINFO(MVD_PRINT("PtsTblAddr start=%lx\n", pBuff->u32MVDFWPtsTblAddr));
4104 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAdd start=%lx\n", pBuff->u32DynScalingAdd));
4105 MVD_DEBUGINFO(MVD_PRINT("ScalerInfo start=%lx end=%lx\n",
4106 pBuff->u32ScalerInfoAdd, (pBuff->u32ScalerInfoAdd+MVD_FW_SCALER_INFO_BUF_LEN)));
4107 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx end=%lx\n",
4108 pBuff->u32DecFrmInfoAdd, (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN)));
4109
4110 MS_U32 u32ShMemBoundary = (MVD_FW_CODE_LEN==MVD_FW_CODE_LEN_V00) ? MVD_FW_MPOOL_START_OFFSET : MVD_FW_TASK_OFFSET;
4111 if ((pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start) > u32ShMemBoundary)
4112 {
4113 //shared memory should not overlap with FW memory pool.
4114 MVD_DEBUGERROR(MVD_ERR("%s err: 0x%lx out of memory boundary!\n", __FUNCTION__,
4115 (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start)));
4116 return FALSE;
4117 }
4118
4119 return TRUE;
4120 }
4121
4122 //Set buffer address to f/w
4123 //Init the memory erea if necessary
MVD_SetFWBuffAdd(MS_U8 u8Idx,MVD_FWBuff * pBuff)4124 static MS_BOOL MVD_SetFWBuffAdd(MS_U8 u8Idx, MVD_FWBuff* pBuff)
4125 {
4126 MS_U32 i;
4127 MVD_SrcMode curSrcMode = E_MVD_SRC_UNKNOWN;
4128 MVD_MEMCfg* pstMemCfg = NULL;
4129 MVD_CtrlCfg* pCtrlCfg = NULL;
4130
4131 if(pBuff == NULL)
4132 {
4133 MVD_DEBUGERROR(MVD_ERR("%s err: NULL pBuff\n", __FUNCTION__));
4134 return FALSE;
4135 }
4136
4137 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4138
4139 MVD_DEBUGINFO(printf("\nMIU is (shm,hw,fw)=(%x,%x,%x)\n",bSHMMiuSel,pstMemCfg->bHWMiuSel,pstMemCfg->bFWMiuSel));
4140
4141 curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
4142
4143 HAL_MVD_SetVolInfoBufferAddr(u8Idx, pBuff->pu8MVDGetVolBufStart);
4144 _MVD_Memset(pBuff->pu8MVDGetVolBufStart, 0, MVD3_FW_VOL_INFO_BUF_LEN);
4145
4146 pBuff->u32VolAdd = pBuff->pu8MVDGetVolBufStart;
4147 #if 0 //test for miu0
4148 if(u32SharememoryBase[u8Idx] == MVD_U32_MAX)
4149 {
4150 if (stMiuCfg.bFWMiuSel == MIU_SEL_1)
4151 {
4152 pBuff->u32VolAdd += stMiuCfg.u32Miu1BaseAddr;
4153 }
4154 }
4155 else
4156 {
4157 if(bSHMMiuSel== MIU_SEL_1)
4158 {
4159 pBuff->u32VolAdd += stMiuCfg.u32Miu1BaseAddr;
4160 }
4161 }
4162 #endif
4163 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
4164 {
4165 pBuff->u32VolAdd += pMVDHalContext->stMiuCfg.u32Miu1BaseAddr;
4166 }
4167 pBuff->u32VolAdd = HAL_MVD_PA2NonCacheSeg(pBuff->u32VolAdd);
4168 MVD_DEBUGINFO(MVD_PRINT("gvolInfo = 0x%lx, volBuf=0x%lx\n", pBuff->u32VolAdd, pBuff->pu8MVDGetVolBufStart));
4169
4170 HAL_MVD_SetFrameInfoBufferAddr(u8Idx, pBuff->pu8MVDGetFrameInfoBufStart);
4171 _MVD_Memset(pBuff->pu8MVDGetFrameInfoBufStart, 0, MVD3_FW_FRAME_INFO_BUF_LEN);
4172
4173 HAL_MVD_SetHeaderBufferAddr(u8Idx, pBuff->pu8MVDSetHeaderBufStart);
4174 HAL_MVD_SetUserDataBuf(u8Idx, pBuff->u32UserDataBuf, MVD3_FW_USER_DATA_BUF_LEN);
4175
4176 pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4177 pCtrlCfg->u32UsrDataRd = pBuff->u32UserDataBuf;
4178
4179
4180 if((curSrcMode != E_MVD_TS_FILE_MODE)
4181 && (curSrcMode != E_MVD_TS_MODE))
4182 {
4183 _MVD_Memset(pBuff->u32MVDFWSLQTABTmpbufAdr, 0, MVD3_FW_SLQ_TAB_TMPBUF_LEN);
4184 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr, 0xBE010000UL);
4185 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr+4, 0x000000FAUL);
4186
4187 HAL_MVD_SetPtsTblAddr(u8Idx, pBuff->u32MVDFWPtsTblAddr);
4188 for (i=0; i<MVD_FW_SLQTBL_PTS_BUF_LEN; i+=MVD_FW_SLQTBL_PTS_LEN)
4189 {
4190 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i, 0); //byteCnt
4191 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+4, 0); //dummyPktCnt
4192 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+8, 0); //idLow
4193 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+12, 0); //idHigh
4194
4195 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+16, MVD_NULLPKT_PTS); //PTS
4196 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+20, 0); //reserved0
4197 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+24, 0); //reserved1
4198 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+28, 0); //reserved2
4199 }
4200 //MS_ASSERT((u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)<=(u32start+u32len));
4201 MVD_DEBUGINFO(MVD_PRINT("PTS tbl start=%lx end=%lx\n",
4202 pBuff->u32MVDFWPtsTblAddr, (pBuff->u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)));
4203 }
4204
4205 if (pstMemCfg->bEnableDynScale)
4206 {
4207 HAL_MVD_SetDynamicScaleAddr(u8Idx, pBuff->u32DynScalingAdd);
4208 HAL_MVD_EnableDynamicScale(u8Idx,0); //default old DS style
4209 pCtrlCfg->u8DynScalingDepth = 16; //HAL_MVD_GetDynamicScaleDepth
4210 MVD_DEBUGINFO(MVD_PRINT("bEnableMIUSel = 0x%x\n", pMVDHalContext->stMiuCfg.bFWMiuSel));
4211 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAddr= 0x%lx\n", pBuff->u32DynScalingAdd));
4212 MVD_DEBUGINFO(MVD_PRINT("u8DynScalingDepth= 0x%x\n", pCtrlCfg->u8DynScalingDepth));
4213 }
4214 MVD_DEBUGINFO(MVD_PRINT("DynScaling start=%lx end=%lx\n",
4215 pBuff->u32DynScalingAdd, (pBuff->u32DynScalingAdd+MVD_FW_DYN_SCALE_BUF_LEN)));
4216
4217 HAL_MVD_SetDecFrmInfoAddr(u8Idx, pBuff->u32DecFrmInfoAdd);
4218
4219 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
4220 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY);
4221 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx\n", pBuff->u32DecFrmInfoAdd));
4222
4223 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
4224 {
4225 HAL_MVD_SLQTblInit(u8Idx);
4226 }
4227
4228 return TRUE;
4229 }
4230
MVD_IsNextDispFrmRdy(MS_U8 u8Idx)4231 static MS_BOOL MVD_IsNextDispFrmRdy(MS_U8 u8Idx)
4232 {
4233 #define NXT_DISP_TIMEOUT 20000//0x20
4234 MS_U32 u32TimeOut = 0;
4235 MVD_CmdArg mvdcmd;
4236
4237 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM);
4238
4239 SETUP_CMDARG(mvdcmd);
4240 SET_DECNUM(mvdcmd, u8Idx);
4241 SET_CMD_RET_FALSE(CMD_GET_NEXTDISPFRM, &mvdcmd);
4242
4243 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM) && (u32TimeOut < NXT_DISP_TIMEOUT))
4244 {
4245 u32TimeOut++;
4246 }
4247 if(u32TimeOut >= NXT_DISP_TIMEOUT)
4248 {
4249 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\r\n", CMD_GET_NEXTDISPFRM ) );
4250 return FALSE;
4251 }
4252 return TRUE;
4253 }
4254
HAL_MVD_GetExtDispInfo(MS_U8 u8Idx,MVD_ExtDispInfo * pInfo)4255 void HAL_MVD_GetExtDispInfo(MS_U8 u8Idx, MVD_ExtDispInfo* pInfo)
4256 {
4257 pInfo->u16VSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_V_SIZE, sizeof(MS_U16));
4258 pInfo->u16HSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_H_SIZE, sizeof(MS_U16));
4259 pInfo->u16VOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_V_OFFSET, sizeof(MS_U16));
4260 pInfo->u16HOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_H_OFFSET, sizeof(MS_U16));
4261 }
4262
HAL_MVD_GetFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_FrmInfo * pInfo)4263 E_MVD_Result HAL_MVD_GetFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_FrmInfo* pInfo)
4264 {
4265 E_MVD_Result eRet = E_MVD_RET_OK;
4266 MS_U32 u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4267 if (NULL == pInfo)
4268 {
4269 MVD_DEBUGERROR(MVD_ERR("GetFrmInfo NULL pInfo!\n"));
4270 return E_MVD_RET_INVALID_PARAM;
4271 }
4272 if (NULL == u32DecFrmInfoAdd)
4273 {
4274 MVD_DEBUGERROR(MVD_ERR("GetFrmInfo NULL u32DecFrmInfoAdd!\n"));
4275 return E_MVD_RET_FAIL;
4276 }
4277 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%lx\n", __FUNCTION__, u32DecFrmInfoAdd);
4278
4279 if (E_MVD_FRMINFO_DECODE == eType)
4280 {
4281 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR);
4282 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR);
4283 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP));
4284 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L);
4285 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H);
4286 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH);
4287 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH);
4288 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT);
4289 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE);
4290 }
4291 else if (E_MVD_FRMINFO_DISPLAY == eType)
4292 {
4293 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR);
4294 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR);
4295 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP));
4296 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L);
4297 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H);
4298 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH);
4299 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH);
4300 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT);
4301 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE);
4302 }
4303
4304 else if (E_MVD_FRMINFO_NEXT_DISPLAY == eType)
4305 {
4306 if (!MVD_IsNextDispFrmRdy(u8Idx))
4307 {
4308 MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4309 return E_MVD_RET_FAIL;
4310 }
4311 pInfo->u16FrmIdx= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX);
4312 if (pInfo->u16FrmIdx == 0xFFFF)
4313 {
4314 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo no available frame!\n"));
4315 return E_MVD_RET_FAIL;
4316 }
4317 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR);
4318 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR);
4319 // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4320 pInfo->u32TimeStamp = (HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP));
4321 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_H);
4322 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH);
4323 if(HAL_MVD_IsMcuMode(u8Idx))
4324 {
4325 //Disp times //[18-17]: 1~3
4326 //Top field first //[16]: 0-> bottom first, 1-> top first
4327 //bit[15:8] = Range reduction of luma data
4328 //bit[7:0] = Range reduction of chroma data
4329 pInfo->u32ID_L = (MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV)
4330 | ((MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y) << 8)
4331 | ((MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA) << 16);
4332 if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4333 {
4334 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4335 }
4336 }
4337 else
4338 {
4339 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_L);
4340 }
4341 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_PITCH);
4342 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT);
4343 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE);
4344
4345 #if 0
4346 MVD_PRINT("NxtFrm:: Idx=0x%x, ", pInfo->u16FrmIdx);
4347 MVD_PRINT("Type=0x%x, ", pInfo->eFrmType );
4348 MVD_PRINT("Luma=0x%lx, ", pInfo->u32LumaAddr );
4349 MVD_PRINT("Chroma=0x%lx, ", pInfo->u32ChromaAddr);
4350 MVD_PRINT("Pts=%lu, ", pInfo->u32TimeStamp );
4351 MVD_PRINT("ID_H=%lu, ", pInfo->u32ID_H );
4352 MVD_PRINT("ID_L=0x%lx\n", pInfo->u32ID_L );
4353 #endif
4354 MVD_DBG_STS(MVD_PRINT("<<< drvMVD pts,idH = %lu, %lu\n", pInfo->u32TimeStamp, pInfo->u32ID_H));
4355 }
4356 else
4357 {
4358 eRet = E_MVD_RET_INVALID_PARAM;
4359 }
4360
4361 if ((pInfo->u32LumaAddr == _INIT_ADDR) || (pInfo->u32ChromaAddr== _INIT_ADDR) ||
4362 (pInfo->u16Pitch == _INIT_LEN) || (pInfo->u16Width == _INIT_LEN) ||
4363 (pInfo->u16Height== _INIT_LEN))
4364 {
4365 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo not ready!\n"));
4366 return E_MVD_RET_FAIL;
4367 }
4368
4369 if (pMVDHalContext->stMiuCfg.bHWMiuSel == MIU_SEL_0)
4370 {
4371 pInfo->u32LumaAddr = pInfo->u32LumaAddr * 8;
4372 pInfo->u32ChromaAddr = pInfo->u32ChromaAddr * 8;
4373 }
4374 else
4375 {
4376 pInfo->u32LumaAddr = pInfo->u32LumaAddr * 8 + pMVDHalContext->stMiuCfg.u32Miu1BaseAddr;
4377 pInfo->u32ChromaAddr = pInfo->u32ChromaAddr * 8 + pMVDHalContext->stMiuCfg.u32Miu1BaseAddr;
4378 }
4379
4380 //MVD_PRINT("===> Luma=0x%lx, Chroma=0x%lx\n", pInfo->u32LumaAddr, pInfo->u32ChromaAddr);
4381 return eRet;
4382 }
4383
4384
4385
HAL_MVD_SetDynScalingParam(MS_U8 u8Idx,MS_PHYADDR u32StAddr,MS_U32 u32Size)4386 E_MVD_Result HAL_MVD_SetDynScalingParam(MS_U8 u8Idx, MS_PHYADDR u32StAddr, MS_U32 u32Size)
4387 {
4388 #define SCALER_INFO_TIMEOUT 0x1000
4389 MS_U32 u32TimeOut = 0;
4390 MS_U32 u32SrcAdd = NULL;
4391 MS_U32 i;
4392 MS_U32 u32ScalerInfoAdd = GET_XCINFO_BUFFADD(u8Idx);
4393 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4394
4395 if ((u32StAddr==NULL) || (u32Size==0) || (u32Size>MVD_FW_SCALER_INFO_BUF_LEN))
4396 {
4397 MVD_DEBUGERROR(MVD_ERR("%s invalid para u32StAddr=0x%lx, u32Size=0x%lx\n",
4398 __FUNCTION__, u32StAddr, u32Size));
4399 return E_MVD_RET_INVALID_PARAM;
4400 }
4401 if (TRUE != pstMemCfg->bEnableDynScale)
4402 {
4403 MVD_DEBUGERROR(MVD_ERR("%s !bEnableDynScale\n", __FUNCTION__));
4404 return E_MVD_RET_FAIL;
4405 }
4406
4407 //copy data
4408 u32SrcAdd = HAL_MVD_PA2NonCacheSeg(u32StAddr);
4409 u32Size = ((u32Size+3)>>2)<<2;
4410 MVD_DEBUGINFO(MVD_PRINT("u32Size= 0x%lx, u32SrcAdd= 0x%lx\n", u32Size, u32SrcAdd));
4411 for (i=0; i<u32Size; i=i+4)
4412 {
4413 HAL_MVD_MemWrite4Byte(u32ScalerInfoAdd+i, *(volatile MS_U32*)(u32SrcAdd+i));
4414 MVD_DEBUGINFO(MVD_PRINT("0x%lx = 0x%lx\n", u32ScalerInfoAdd+i, HAL_MVD_MemRead4Byte(u32ScalerInfoAdd+i)));
4415 }
4416
4417 //notify f/w
4418 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4419 if (TRUE!=HAL_MVD_SetScalerInfoAddr(u8Idx, u32ScalerInfoAdd,((MS_U8*)u32SrcAdd)[0])) //Set the buffer address (MIU offset) to f/w
4420 {
4421 MVD_DEBUGERROR(MVD_ERR("%s fail to set ScalerInfoAdd\n", __FUNCTION__));
4422 return E_MVD_RET_FAIL;
4423 }
4424
4425 //check f/w already handle the data
4426 while((TRUE!=HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO)) && (u32TimeOut < SCALER_INFO_TIMEOUT))
4427 {
4428 u32TimeOut++;
4429 }
4430 if(u32TimeOut >= SCALER_INFO_TIMEOUT)
4431 {
4432 MVD_DEBUGERROR(MVD_ERR("%s timeout!!!\n", __FUNCTION__));
4433 return E_MVD_RET_FAIL;
4434 }
4435
4436 //clear ack bit
4437 HAL_MVD_ClearCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4438
4439 MVD_DEBUGINFO(MVD_PRINT("=====> %s u32TimeOut = 0x%lx\n", __FUNCTION__, u32TimeOut));
4440 return E_MVD_RET_OK;
4441 }
4442
4443 //Map driver CodecType to firmware CodecType
MVD_MapCodecType(MVD_CodecType type)4444 static MS_U8 MVD_MapCodecType(MVD_CodecType type)
4445 {
4446 MS_U8 u8type = 0xff;
4447 switch (type)
4448 {
4449 case E_MVD_CODEC_MPEG2:
4450 u8type = CODEC_MPEG2;
4451 break;
4452 case E_MVD_CODEC_MPEG4:
4453 u8type = CODEC_MPEG4;
4454 break;
4455 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
4456 u8type = CODEC_MPEG4_SHORT_VIDEO_HEADER;
4457 break;
4458 case E_MVD_CODEC_DIVX311:
4459 u8type = CODEC_DIVX311;
4460 break;
4461
4462 case E_MVD_CODEC_FLV:
4463 u8type = 0x03;
4464 break;
4465
4466 case E_MVD_CODEC_VC1_MAIN: //RCV
4467 u8type = 0x05;
4468 break;
4469
4470 case E_MVD_CODEC_VC1_ADV: //VC1
4471 u8type = 0x04;
4472 break;
4473
4474 default:
4475 break;
4476 }
4477
4478 return u8type;
4479 }
4480
4481 //Map driver SrcType to firmware SrcType
MVD_MapSrcMode(MVD_SrcMode mode)4482 static MS_U8 MVD_MapSrcMode(MVD_SrcMode mode)
4483 {
4484 MS_U8 u8mode = 0xff;
4485 switch (mode)
4486 {
4487 case E_MVD_TS_MODE:
4488 u8mode = STREAM_MODE;
4489 break;
4490 case E_MVD_FILE_MODE:
4491 u8mode = FILE_MODE;
4492 break;
4493 case E_MVD_SLQ_MODE:
4494 u8mode = SLQ_MODE;
4495 break;
4496 case E_MVD_SLQ_TBL_MODE:
4497 u8mode = SLQ_TBL_MODE;
4498 break;
4499 case E_MVD_TS_FILE_MODE:
4500 u8mode = TS_FILE_MODE;
4501 break;
4502
4503 default:
4504 break;
4505 }
4506
4507 return u8mode;
4508 }
4509
4510
MVD_CheckFrmBuffSizeMin(MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)4511 static MS_BOOL MVD_CheckFrmBuffSizeMin(MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
4512 {
4513 MS_BOOL ret = TRUE;
4514
4515 if (_IS_VC1(fwCfg->eCodecType))
4516 {
4517 MVD_DEBUGERROR(MVD_ERR("Framebuffer size(0x%lx) < (0x%x+0x%lx)!\n",
4518 memCfg->u32FBSize, (MVD_HD_FBSIZE*MVD_FBNUM_MIN), MVD_HW_BUF_TOTAL_LEN));
4519 ret = FALSE;
4520 }
4521 else if (memCfg->u32FBSize < (MVD4_MPEG_FBSIZE_SDMIN+MVD_HW_BUF_TOTAL_LEN))
4522 {
4523 MVD_DEBUGERROR(MVD_ERR("Framebuffer size(0x%lx) < (0x%x+0x%lx)\n",
4524 memCfg->u32FBSize, MVD4_MPEG_FBSIZE_SDMIN, MVD_HW_BUF_TOTAL_LEN));
4525 ret = FALSE;
4526 }
4527 return ret;
4528 }
4529
MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode,MS_U8 u8FBNum)4530 MS_U32 MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode, MS_U8 u8FBNum)
4531 {
4532 MS_U32 u32Size = 0;
4533 if (MVD3_DHD_MODE == u8FBMode)
4534 {
4535 u32Size = MVD_DHD_FBSIZE;
4536 if (MVD_FBNUM_MAX == u8FBNum)
4537 {
4538 u32Size *= MVD_FBNUM_MAX;
4539 }
4540 else if (MVD_FBNUM_MIN == u8FBNum)
4541 {
4542 u32Size *= MVD_FBNUM_MIN;
4543 }
4544 }
4545 else if (MVD3_HD_MODE == u8FBMode)
4546 {
4547 u32Size = MVD_HD_FBSIZE;
4548 if (MVD_FBNUM_MAX == u8FBNum)
4549 {
4550 u32Size *= MVD_FBNUM_MAX;
4551 }
4552 else if (MVD_FBNUM_MIN == u8FBNum)
4553 {
4554 u32Size *= MVD_FBNUM_MIN;
4555 }
4556 }
4557 else if (MVD3_SD_MODE == u8FBMode)
4558 {
4559 u32Size = MVD4_MPEG_FBSIZE_SDMIN;
4560 }
4561 return u32Size;
4562 }
4563
4564 //------------------------------------------------------------------------------
4565 /// Determine u8FBMode & u8FBNum according to the assigned FBSize
4566 //------------------------------------------------------------------------------
HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx,MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)4567 MS_BOOL HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx, MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
4568 {
4569 MS_BOOL ret = TRUE;
4570 MS_U8* pu8FBMode = &(fwCfg->u8FBMode);
4571 MS_U8* pu8FBNum = &(fwCfg->u8FBNum);
4572 MS_U32 u32AvailFrmBuffSize = memCfg->u32FBSize - MVD_HW_BUF_TOTAL_LEN;
4573
4574 ret = MDrv_MVD_AUTH_IPCheck(fwCfg->eCodecType,&(memCfg->bSupportSDModeOnly));
4575 if(ret == FALSE)
4576 {
4577 return FALSE;
4578 }
4579
4580 *pu8FBMode = 0xff;
4581
4582 #if defined(MVD_SUPPORT_SD_ONLY)
4583 *pu8FBMode = MVD3_SD_MODE;
4584 #else
4585 if(memCfg->bSupportSDModeOnly)
4586 {
4587 *pu8FBMode = MVD3_SD_MODE;
4588 }
4589 #endif //MVD_SUPPORT_SD_ONLY
4590
4591 //For SD only cases: defined(MVD_SUPPORT_SD_ONLY) and bSupportSDModeOnly
4592 if (MVD3_SD_MODE == *pu8FBMode)
4593 {
4594 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
4595
4596 //set frmBuffNum as 4
4597 *pu8FBNum = MVD_FBNUM_MIN;
4598 MVD_DEBUGINFO(MVD_PRINT("[MVD_SD_MODE] u8FBNum=%d, FBSize=0x%lx\n", *pu8FBNum, memCfg->u32FBSize));
4599 goto _GET_USED_SIZE;
4600 }
4601
4602 if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MAX))
4603 {
4604 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*5\n", __FUNCTION__, __LINE__));
4605 *pu8FBMode = MVD3_HD_MODE;
4606 *pu8FBNum = MVD_FBNUM_MAX;
4607 }
4608 else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MIN))
4609 {
4610 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*4\n", __FUNCTION__, __LINE__));
4611 *pu8FBMode = MVD3_HD_MODE;
4612 *pu8FBNum = MVD_FBNUM_MIN;
4613 }
4614 else
4615 {
4616 MVD_DEBUGINFO(MVD_PRINT("%s(%d) SD\n", __FUNCTION__, __LINE__));
4617 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
4618 if (TRUE == ret)
4619 {
4620 *pu8FBMode = MVD3_SD_MODE;
4621 *pu8FBNum = MVD_FBNUM_MIN;
4622 MVD_DEBUGINFO(MVD_PRINT("Framebuffer [SD] mode\n"));
4623 }
4624 }
4625
4626
4627 //Keep FBNum=4 for mpeg2/4, not-mstreamer/uniplayer/mcu mode.
4628 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
4629 {
4630 if (*pu8FBNum != MVD_FBNUM_DEFAULT)
4631 {
4632 *pu8FBNum = MVD_FBNUM_DEFAULT;
4633 }
4634 }
4635
4636
4637 _GET_USED_SIZE:
4638 fwCfg->u32FBUsedSize = u32AvailFrmBuffSize;
4639
4640 MVD_DEBUGINFO(MVD_PRINT("%s u8FBMode=0x%x, u8FBNum=%d, FBSize=0x%lx, used=0x%lx\n",
4641 __FUNCTION__, fwCfg->u8FBMode, fwCfg->u8FBNum, memCfg->u32FBSize, fwCfg->u32FBUsedSize));
4642 return ret;
4643 }
4644
HAL_MVD_SetCodecInfo(MS_U8 u8Idx,MVD_CodecType eCodecType,MVD_SrcMode eSrcMode,MS_U8 bDisablePESParsing)4645 MS_BOOL HAL_MVD_SetCodecInfo(MS_U8 u8Idx, MVD_CodecType eCodecType, MVD_SrcMode eSrcMode, MS_U8 bDisablePESParsing)
4646 {
4647 MVD_CmdArg stCmdArg;
4648 //MVD_PRINT("u8CodecType=0x%x\n", u8CodecType);
4649 //MVD_PRINT("eSrcMode=0x%x\n", eSrcMode);
4650 SETUP_CMDARG(stCmdArg);
4651 stCmdArg.Arg0 = MVD_MapCodecType(eCodecType);
4652 stCmdArg.Arg1 = MVD_MapSrcMode(eSrcMode);
4653 stCmdArg.Arg2 = bDisablePESParsing;
4654 //arg2 is only valid for STREAM_MODE and TS_FILE_MODE
4655 //set as 0 to enable MVD parser and parser interrupt
4656 stCmdArg.Arg3 = 0;
4657 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_SetCodecInfo: Cmd: %x, Arg0: %x, Arg1: %x. Arg2: %x\n",
4658 CMD_CODEC_INFO, stCmdArg.Arg0, stCmdArg.Arg1, stCmdArg.Arg2));
4659 SET_DECNUM(stCmdArg, u8Idx);
4660 SET_CMD_RET_FALSE(CMD_CODEC_INFO, &stCmdArg);
4661
4662 HAL_MVD_SetSrcMode(u8Idx,eSrcMode);
4663
4664 //set code offset to MVD
4665 MS_U32 u32Addr, u32Len;
4666 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FW, &u32Addr, &u32Len);
4667
4668 if (u32Len==0) MVD_PRINT("%s err: u32Len=0!\n", __FUNCTION__);
4669 MS_U32 i=0;
4670 i = u32Addr >> 3;
4671 SET_CMDARG(stCmdArg, i, u8Idx);
4672 SET_CMD_RET_FALSE(CMD_CODE_OFFSET, &stCmdArg);
4673
4674 #define _mvdAssert(x) if(!x) MVD_PRINT("%s(%d) inconsistent cfg!\n", __FUNCTION__, __LINE__);
4675 MVD_FWCfg* pCurFwCfg = HAL_MVD_GetFWCfg(u8Idx);
4676 _mvdAssert(pCurFwCfg->eCodecType == eCodecType);
4677 _mvdAssert(pCurFwCfg->eSrcMode == eSrcMode);
4678 _mvdAssert(pCurFwCfg->bDisablePESParsing == bDisablePESParsing);
4679
4680 //Refer to msAPI_VDPlayer_DecodeMPEG4.c (core\kernel\api\videoplayer)
4681 if (eSrcMode == E_MVD_SLQ_TBL_MODE)
4682 {
4683 if ((eCodecType == E_MVD_CODEC_MPEG4) ||
4684 (eCodecType == E_MVD_CODEC_DIVX311) ||
4685 (eCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER))
4686 {
4687 // Enable PackMode
4688 SETUP_CMDARG(stCmdArg);
4689 stCmdArg.Arg0 = 3;
4690 SET_DECNUM(stCmdArg, u8Idx);
4691 if (HAL_MVD_MVDCommand( CMD_PARSE_M4V_PACKMD, &stCmdArg ) == FALSE)
4692 {
4693 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_PARSE_M4V_PACKMD ) );
4694 return FALSE;
4695 }
4696
4697 // Set DIU width of rounding mode (align to 8byte)
4698 SETUP_CMDARG(stCmdArg);
4699 stCmdArg.Arg0 = 1;
4700 SET_DECNUM(stCmdArg, u8Idx);
4701 if (HAL_MVD_MVDCommand(CMD_DIU_WIDTH_ALIGN, &stCmdArg) == FALSE)
4702 {
4703 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DIU_WIDTH_ALIGN ) );
4704 return FALSE;
4705 }
4706 }
4707 }
4708
4709 //set internal buffers after setting codecinfo for V3
4710 if (!HAL_MVD_SetInternalBuffAddr(u8Idx, u32Addr, u32Len))
4711 {
4712 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr failed\n"));
4713 return FALSE;
4714 }
4715 else
4716 {
4717 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr success\n"));
4718 }
4719
4720 return TRUE;
4721 }
4722
MVD_GetBDMAType(void)4723 BDMA_CpyType MVD_GetBDMAType(void)
4724 {
4725 BDMA_CpyType bdmaCpyType = E_BDMA_CPYTYPE_MAX;
4726 if (pMVDHalContext->stMiuCfg.bHWMiuSel == MIU_SEL_1)
4727 {
4728 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_0)
4729 {
4730 bdmaCpyType = E_BDMA_SDRAM2SDRAM1;
4731 }
4732 else if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
4733 {
4734 bdmaCpyType = E_BDMA_SDRAM12SDRAM1;
4735 }
4736 else
4737 {
4738 MS_ASSERT(0);
4739 }
4740 }
4741 else if (pMVDHalContext->stMiuCfg.bHWMiuSel == MIU_SEL_0)
4742 {
4743 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_0)
4744 {
4745 bdmaCpyType = E_BDMA_SDRAM2SDRAM;
4746 }
4747 else if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
4748 {
4749 bdmaCpyType = E_BDMA_SDRAM12SDRAM;
4750 }
4751 else
4752 {
4753 MS_ASSERT(0);
4754 }
4755 }
4756 else
4757 {
4758 MS_ASSERT(0);
4759 }
4760 return bdmaCpyType;
4761 }
4762
4763 //Init static variables.
4764 //Exception: stMemCfg & stMiuCfg since they are set before calling this function.
HAL_MVD_InitVar(MS_U8 u8Idx)4765 void HAL_MVD_InitVar(MS_U8 u8Idx)
4766 {
4767 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4768 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4769 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
4770
4771 memset(pstCtrlCfg, 0, sizeof(MVD_CtrlCfg));
4772 pstCtrlCfg->eTrickMode = E_MVD_TRICK_DEC_ALL;
4773 pstCtrlCfg->eFrcMode = E_MVD_FRC_NORMAL;
4774 pstCtrlCfg->ePreSpeedType = E_MVD_SPEED_DEFAULT;
4775 pstCtrlCfg->eFileSyncMode = E_MVD_TIMESTAMP_FREERUN;
4776
4777 //determine if we need to BDMA SLQ table from DrvProcBuff to BitstreamBuff
4778 pstCtrlCfg->bSlqTblSync = ((pstMemCfg->u32DrvBufAddr < pstMemCfg->u32BSAddr) ||
4779 ((pstMemCfg->u32DrvBufAddr+pstMemCfg->u32DrvBufSize) > (pstMemCfg->u32BSAddr+pstMemCfg->u32BSSize)));
4780 MVD_DEBUGINFO(MVD_PRINT("bSlqTblSync = %x\n", pstCtrlCfg->bSlqTblSync));
4781 if (pstCtrlCfg->bSlqTblSync)
4782 {
4783 const BDMA_Info* pBDMA;
4784 pBDMA = MDrv_BDMA_GetInfo();
4785 if ((pBDMA == NULL) || (pBDMA->bInit != TRUE))
4786 {
4787 if (E_BDMA_OK != MDrv_BDMA_Init(pstMemCfg->u32Miu1BaseAddr))
4788 {
4789 MVD_PRINT("%s fail at MDrv_BDMA_Init!!!\n", __FUNCTION__);
4790 }
4791 }
4792 pstSlqTblInfo->bdmaCpyType = MVD_GetBDMAType();
4793 }
4794
4795 memset(pstSlqTblInfo, 0, sizeof(MVD_SLQTBLInfo));
4796 pstSlqTblInfo->u32LastPts = MVD_NULLPKT_PTS;
4797 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX;
4798 pstSlqTblInfo->u32PreEsWr = 0;
4799 pstSlqTblInfo->pSlqStatus = &(pMVDHalContext->_SlqStatus[u8Idx]);
4800 pstSlqTblInfo->pDrvSlqTbl = &(pMVDHalContext->_drvSlqTbl[u8Idx]);
4801 pstSlqTblInfo->pDrvEsTbl = &(pMVDHalContext->_drvEsTbl[u8Idx]);
4802 pstSlqTblInfo->pDrvDivxTbl = &(pMVDHalContext->_drvDivxTbl[u8Idx]);
4803 #if SLQ_NEW_PUSH
4804 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
4805 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
4806 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
4807 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
4808 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
4809 pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow =FALSE;
4810 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
4811 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit =FALSE;
4812 #endif
4813 }
4814
4815 //------------------------------------------------------------------------------
4816 /// Issue Stop command.
4817 //------------------------------------------------------------------------------
HAL_MVD_Stop(MS_U8 u8Idx)4818 MS_BOOL HAL_MVD_Stop(MS_U8 u8Idx)
4819 {
4820 MVD_CmdArg mvdcmd;
4821 MS_BOOL bRet = TRUE;
4822
4823 #define STOP_TIMEOUT 500 //ms
4824 MS_U32 u32StartTime = 0;
4825 u32StartTime = HAL_MVD_GetTime();
4826
4827 SETUP_CMDARG(mvdcmd);
4828 SET_DECNUM(mvdcmd, u8Idx);
4829 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_STOP);
4830
4831 if (HAL_MVD_MVDCommand(CMD_STOP, &mvdcmd) == FALSE)
4832 {
4833 MVD_DEBUGERROR(MVD_ERR("Command: 0x%x fail!!\r\n", CMD_STOP));
4834 HAL_MVD_Delayms(1);
4835 if ( HAL_MVD_TimeOut(u8Idx) == TRUE )
4836 {
4837 MVD_DEBUGERROR(MVD_ERR("*** MVD ERR: STOP TIMEOUT!!! ***\n"));
4838 }
4839 }
4840
4841 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_STOP))
4842 {
4843 if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
4844 {
4845 MVD_DEBUGERROR(printf( "Ctrl: 0x%x fail timeout!!\r\n", CMD_STOP ) );
4846 break;
4847 }
4848 }
4849
4850 pMVDHalContext->bStopped[u8Idx] = TRUE;
4851 return bRet;
4852 }
4853
HAL_MVD_DeinitHW(void)4854 MS_BOOL HAL_MVD_DeinitHW(void)
4855 {
4856 //MVD HW reset
4857 if (!HAL_MVD_RstHW())
4858 {
4859 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_Exit:MVD4ResetHW failed\n"));
4860 }
4861 else
4862 {
4863 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW success\n"));
4864 }
4865 HAL_MVD_PowerCtrl(DISABLE);
4866 return TRUE;
4867 }
4868
HAL_MVD_Exit(MS_U8 u8Idx)4869 MS_BOOL HAL_MVD_Exit(MS_U8 u8Idx)
4870 {
4871 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:start\n"));
4872
4873 HAL_MVD_SetIsUsed(u8Idx, FALSE);
4874 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = FALSE;
4875 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
4876 pMVDHalContext->u32DmxFrameRate[u8Idx] = 0;
4877 pMVDHalContext->u32DmxFrameRateBase[u8Idx] = 0;
4878
4879 return TRUE;
4880 }
4881
4882
4883 //------------------------------------------------------------------------------
4884 /// Set DivX311 stream info.
4885 /// @param divxInfo \b IN : DivX311 stream info.
4886 //------------------------------------------------------------------------------
MVD_WriteDivx311Data(MS_U8 u8Idx,FW_DIVX_INFO * divxInfo)4887 static void MVD_WriteDivx311Data(MS_U8 u8Idx, FW_DIVX_INFO *divxInfo)
4888 {
4889 MS_U32 pu8MVDSetHeaderBufStart = GET_HDR_BUFFADD(u8Idx);
4890 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_VOL_HANDLE_DONE,divxInfo->vol_handle_done);
4891 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_WIDTH,divxInfo->width);
4892 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_HEIGHT,divxInfo->height);
4893 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_COUNT,divxInfo->frame_count);
4894 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_TIME,divxInfo->frame_time);
4895 HAL_MVD_MemWrite2Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PTS_INCR,divxInfo->pts_incr);
4896 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_RATE,divxInfo->frame_rate);
4897 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_ASPECT_RATIO,divxInfo->aspect_ratio);
4898 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PROGRESSIVE_SEQUENCE,divxInfo->progressive_sequence);
4899 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG1,divxInfo->mpeg1);
4900 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PLAY_MODE,divxInfo->play_mode);
4901 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG_FRC_MODE,divxInfo->mpeg_frc_mode);
4902 return;
4903 }
4904
HAL_MVD_SetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)4905 void HAL_MVD_SetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo )
4906 {
4907 if (GET_HDR_BUFFADD(u8Idx)==0)
4908 {
4909 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_SetFrameInfo error: pu8MVDSetHeaderBufStart=NULL\n"));
4910 return;
4911 }
4912
4913 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
4914 pDivxInfo->width=pinfo->u16HorSize;
4915 pDivxInfo->height=pinfo->u16VerSize;
4916 pDivxInfo->aspect_ratio=pinfo->u8AspectRate;
4917 pDivxInfo->frame_rate = pinfo->u32FrameRate;
4918
4919 //for MM
4920 pDivxInfo->mpeg1=pinfo->u8MPEG1;
4921 pDivxInfo->pts_incr=pinfo->u16PTSInterval;
4922 pDivxInfo->play_mode=pinfo->u8PlayMode;
4923 pDivxInfo->mpeg_frc_mode=pinfo->u8FrcMode;
4924
4925 if(pinfo->u8Interlace==0)
4926 pDivxInfo->progressive_sequence=1;
4927 else
4928 pDivxInfo->progressive_sequence=0;
4929
4930 pDivxInfo->frame_count=0;
4931 pDivxInfo->frame_time=0;
4932 pDivxInfo->vol_handle_done=0;
4933 // pDivxInfo->invalidstream=0;
4934 MVD_DEBUGINFO(MVD_PRINT("set vol info,pts_incr=%d,\n",pDivxInfo->pts_incr));
4935 MVD_DEBUGINFO(MVD_PRINT("set vol info,width=%x,height=%x,frame_rate=%d,aspect_ratio=%x,\n",
4936 (unsigned int)pDivxInfo->width,(unsigned int)pDivxInfo->height,pDivxInfo->frame_rate,pDivxInfo->aspect_ratio));
4937 MVD_DEBUGINFO(MVD_PRINT("set vol info,progressive_sequence=%x,mpeg1=%x,play_mode=%x,\n",
4938 pDivxInfo->progressive_sequence,pDivxInfo->mpeg1,pDivxInfo->play_mode));
4939
4940 MVD_WriteDivx311Data(u8Idx, pDivxInfo);
4941 return;
4942 }
4943
4944
4945
4946 ///////////////////////////////////////////////////////////////////////////////
4947 /// Get Hardware Pointer of MVD CC Ring Buffer
4948 /// Return value:: The HW Pointer Address of MVD CC Ring Buffer
4949 /// @param u8CC608 \b IN
4950 /// - # TRUE for CC608 parser
4951 /// - # FALSE for CC708 parser
4952 ///////////////////////////////////////////////////////////////////////////////
HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)4953 MS_U32 HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)
4954 {
4955 #if 1
4956 MVD_CmdArg mvdcmd;
4957 MS_U32 u32CCWrPtr = 0;
4958
4959 SETUP_CMDARG(mvdcmd);
4960 mvdcmd.Arg3 = u8CC608;
4961 if (HAL_MVD_MVDCommand( CMD_RD_USER_WP, &mvdcmd ) == FALSE)
4962 {
4963 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_RD_USER_WP ) );
4964 return MVD_U32_MAX;
4965 }
4966 u32CCWrPtr = COMBU32(mvdcmd.Arg3, mvdcmd.Arg2, mvdcmd.Arg1, mvdcmd.Arg0) << 3;
4967 return u32CCWrPtr;
4968 #else
4969 MS_U32 u32MVDCC_Temp1 = 0;
4970 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
4971 {
4972 //HAL_MVD_ARGINIT();
4973 HAL_MVD_RegWriteByte(MVD_ARG5, 0);
4974 HAL_MVD_RegWriteByte(MVD_ARG4, 0);
4975 HAL_MVD_RegWriteByte(MVD_ARG3, (MS_U8)u8CC608);
4976 HAL_MVD_RegWriteByte(MVD_COMMAND, (MS_U8)(CMD_RD_USER_WP));//CMD_GET_CCBUF_HWADDR
4977
4978 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
4979 {
4980 u32MVDCC_Temp1 = 0;
4981 u32MVDCC_Temp1 = (((MS_U32)HAL_MVD_RegReadByte(MVD_ARG0)) & 0x000000FF);
4982 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG1)) & 0x000000FF) << 8);
4983 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG2)) & 0x000000FF) << 16);
4984 u32MVDCC_Temp1 = (u32MVDCC_Temp1 << 3);
4985 return (u32MVDCC_Temp1);
4986 }
4987 else
4988 {
4989 MVD_DEBUGINFO(MVD_PRINT("\nF:GHAV"));
4990 }
4991 }
4992 else
4993 {
4994 MVD_DEBUGINFO(MVD_PRINT("\nF:GHA"));
4995 }
4996
4997 return 0xffffffff;
4998 #endif
4999 }
5000
HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)5001 MS_BOOL HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)
5002 {
5003 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5004 MS_U32 u32UsrDataWr = 0;
5005 MS_BOOL bIsAvail = FALSE;
5006
5007 #if defined(MVD_SUPPORT_X4_CC)
5008 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4)>>3;
5009 #else
5010 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2)>>3;
5011 #endif
5012 if (pCtrlCfg->u32UsrDataRd == (GET_USRDATA_BUFFADD(u8Idx)+MVD3_FW_USER_DATA_BUF_LEN))
5013 {
5014 pCtrlCfg->u32UsrDataRd = GET_USRDATA_BUFFADD(u8Idx); //wrap to BufStart
5015 }
5016 bIsAvail = !(pCtrlCfg->u32UsrDataRd == u32UsrDataWr);
5017 MVD_DEBUGINFO(MVD_PRINT("IsAvail:%x rd=%lx wr=%lx\n", bIsAvail,
5018 pCtrlCfg->u32UsrDataRd, u32UsrDataWr));
5019 return bIsAvail;
5020 }
5021
5022 //------------------------------------------------------------------------------
5023 /// Get info of user data
5024 //------------------------------------------------------------------------------
HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx,MVD_UsrDataInfo * pUsrInfo)5025 MS_BOOL HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx, MVD_UsrDataInfo* pUsrInfo)
5026 {
5027 MS_U32 u32UsrData = NULL;
5028 MS_U32 u32UsrDataWr = 0;
5029 #if defined(MVD_SUPPORT_X4_CC)
5030 FW_USER_DATA_BUF_EXT stUsrDataExt;
5031 #else
5032 FW_USER_DATA_BUF stUsrDataInfo;
5033 #endif
5034 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5035
5036 if ((!pUsrInfo) || (GET_FRMINFO_BUFFADD(u8Idx)==0))
5037 {
5038 MVD_DEBUGERROR(MVD_ERR("%s: NULL ptr.\n", __FUNCTION__));
5039 return FALSE;
5040 }
5041
5042 //get write pointer
5043 #if defined(MVD_SUPPORT_X4_CC)
5044 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4)>>3;
5045 #else
5046 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2)>>3;
5047 #endif
5048 if (pCtrlCfg->u32UsrDataRd == (GET_USRDATA_BUFFADD(u8Idx)+MVD3_FW_USER_DATA_BUF_LEN))
5049 {
5050 pCtrlCfg->u32UsrDataRd = GET_USRDATA_BUFFADD(u8Idx); //wrap to BufStart
5051 }
5052 MVD_DEBUGINFO(MVD_PRINT("CC Rd=0x%lx Wr=0x%lx\n", pCtrlCfg->u32UsrDataRd, u32UsrDataWr));
5053
5054 if (pCtrlCfg->u32UsrDataRd == u32UsrDataWr)
5055 {
5056 MVD_DEBUGERROR(MVD_ERR("%s: no data? Rd=0x%lx Wr=0x%lx\n", __FUNCTION__, pCtrlCfg->u32UsrDataRd, u32UsrDataWr));
5057 return FALSE;
5058 }
5059
5060 //miuOffset --> physical add --> noncached add
5061 u32UsrData = (pMVDHalContext->stMiuCfg.bFWMiuSel==MIU_SEL_1)?(pCtrlCfg->u32UsrDataRd+pMVDHalContext->stMiuCfg.u32Miu1BaseAddr):(pCtrlCfg->u32UsrDataRd);
5062 u32UsrData = HAL_MVD_PA2NonCacheSeg(u32UsrData);
5063
5064 HAL_MVD_CPU_Sync();
5065 HAL_MVD_ReadMemory();
5066
5067 #if defined(MVD_SUPPORT_X4_CC)
5068 stUsrDataExt = *(volatile FW_USER_DATA_BUF_EXT*)u32UsrData;
5069
5070 pUsrInfo->u32Pts = stUsrDataExt.pts;
5071 pUsrInfo->u8PicStruct = stUsrDataExt.PicStruct;
5072 pUsrInfo->u8PicType = stUsrDataExt.picType;
5073 pUsrInfo->u8TopFieldFirst = stUsrDataExt.top_ff;
5074 pUsrInfo->u8RptFirstField = stUsrDataExt.rpt_ff;
5075 pUsrInfo->u16TmpRef = stUsrDataExt.tmpRef;
5076 pUsrInfo->u8ByteCnt = stUsrDataExt.userdatabytecnt;
5077 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_EXT_HDR_LEN;
5078 #else
5079 stUsrDataInfo = *(volatile FW_USER_DATA_BUF*)u32UsrData;
5080
5081 pUsrInfo->u8PicType = stUsrDataInfo.picType;
5082 pUsrInfo->u8TopFieldFirst = stUsrDataInfo.top_ff;
5083 pUsrInfo->u8RptFirstField = stUsrDataInfo.rpt_ff;
5084 pUsrInfo->u16TmpRef = stUsrDataInfo.tmpRef;
5085 pUsrInfo->u8ByteCnt = stUsrDataInfo.userdatabytecnt;
5086 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_HDR_LEN;
5087 #endif
5088 //update read pointer
5089 pCtrlCfg->u32UsrDataRd += MVD_FW_USER_DATA_PKT_LEN;
5090 #if 0
5091 MVD_PRINT("xxInfo: ");
5092 MVD_PRINT("%02d, ", pUsrInfo->u16TmpRef);
5093 MVD_PRINT("%d, ", pUsrInfo->u8PicStruct);
5094 MVD_PRINT("%d, ", pUsrInfo->u8TopFieldFirst);
5095 MVD_PRINT("0x%lx, ", pUsrInfo->u32DataBuf);
5096 MVD_PRINT("%d, ", pUsrInfo->u8ByteCnt);
5097 MVD_PRINT("%ld, ", pUsrInfo->u32Pts);
5098 MVD_PRINT("%d\n", pUsrInfo->u8PicType);
5099 #endif
5100 return TRUE;
5101 }
5102
5103
HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx,MS_U32 u32HWPtr)5104 MS_U32 HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx, MS_U32 u32HWPtr)
5105 {
5106 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5107 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5108 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5109 MS_U32 u32HWSt = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
5110 MS_U32 u32DrvPtr;
5111
5112 if ((u32HWPtr<u32HWSt) && (u32HWPtr!=0))
5113 {
5114 MVD_DEBUGERROR(MVD_ERR("Invalid u32HWPtr=0x%lx\n", u32HWPtr));
5115 return 0;
5116 }
5117 if ((pstCtrlCfg->bSlqTblSync) && (u32HWPtr!=0))
5118 {
5119 u32DrvPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd + (u32HWPtr - u32HWSt);
5120 return u32DrvPtr;
5121 }
5122 return u32HWPtr;
5123 }
5124
5125
MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx,MVD_PacketInfo * pFileEnd)5126 static void MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx, MVD_PacketInfo* pFileEnd)
5127 {
5128 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5129 MS_U32 u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
5130
5131 pFileEnd->u32StAddr = SLQ_TBL_SIZE*3;//u32EndPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5132 pFileEnd->u32Length = END_PATTERN_SIZE;
5133 pFileEnd->u32TimeStamp = MVD_NULLPKT_PTS;
5134 pFileEnd->u32ID_L = MVD_U32_MAX;
5135 pFileEnd->u32ID_H = MVD_U32_MAX;
5136 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%lx 0x%lx 0x%lx 0x%lx\n", pFileEnd->u32StAddr,
5137 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4),
5138 HAL_MVD_MemRead4Byte(u32EndPattern+8), HAL_MVD_MemRead4Byte(u32EndPattern+12)));
5139 }
5140
5141
MVD_SLQTblGetDummyPkt(MVD_PacketInfo * pDummy)5142 static void MVD_SLQTblGetDummyPkt(MVD_PacketInfo* pDummy)
5143 {
5144 //MS_U32 u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
5145
5146 pDummy->u32StAddr = SLQ_TBL_SIZE*2;//u32DummyES - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5147 pDummy->u32Length = DUMMY_SIZE;
5148 pDummy->u32TimeStamp = MVD_NULLPKT_PTS;
5149 pDummy->u32ID_L = MVD_U32_MAX;
5150 pDummy->u32ID_H = MVD_U32_MAX;
5151 #if 0
5152 MVD_PRINT("u32DummyES(0x%lx-->0x%lx, size=0x%lx)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES,
5153 pDummy->u32StAddr, pDummy->u32Length, HAL_MVD_MemRead4Byte(u32DummyES),
5154 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
5155 #endif
5156
5157 }
5158
5159
5160
HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx,MVD_PatternType ePattern)5161 MS_BOOL HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx, MVD_PatternType ePattern)
5162 {
5163 MS_U32 i;
5164 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5165
5166 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
5167 {
5168 MVD_DEBUGINFO(MVD_PRINT("SLQTbl full!(0x%lx) Cannot insert pattern any more!\n", pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5169 return FALSE;
5170 }
5171
5172 #if SLQ_NEW_PUSH
5173 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
5174 {
5175 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart)
5176 {
5177 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
5178 }
5179 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = FALSE;
5180 }
5181 #endif // #if SLQ_NEW_PUSH
5182 for (i =0; i<2; i++)
5183 { //insert dummy pattern
5184 MVD_PacketInfo stDummyPkt;
5185
5186 if (E_MVD_PATTERN_FLUSH == ePattern)
5187 {
5188 MVD_SLQTblGetDummyPkt(&stDummyPkt);
5189 }
5190 else if (E_MVD_PATTERN_FILEEND == ePattern)
5191 {
5192 MVD_SLQTblGetFileEndPkt(u8Idx, &stDummyPkt);
5193 }
5194 else
5195 {
5196 MVD_DEBUGERROR(MVD_ERR("Invalid MVD_PatternType! Won't insert pattern!\n"));
5197 return FALSE;
5198 }
5199 #if SLQ_NEW_PUSH
5200 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = TRUE;
5201 #endif
5202 //MVD_PRINT("WrPtr 0x%lx ", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5203 HAL_MVD_SLQTblSendPacket(u8Idx, &stDummyPkt);
5204 //MVD_PRINT("==> 0x%lx\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5205 HAL_MVD_SetSLQWritePtr(u8Idx, FALSE);
5206 }
5207 return TRUE;
5208 }
5209
5210
5211 #define FLAG_LAST_FRM_SHOW (MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_LAST_FRAME_SHOW, sizeof(MS_U32)))
HAL_MVD_IsDispFinish(MS_U8 u8Idx)5212 E_MVD_Result HAL_MVD_IsDispFinish(MS_U8 u8Idx)
5213 {
5214 MS_U32 u32TimeCnt;
5215 MS_U32 u32FeByteCnt = 0;
5216 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
5217 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5218 MS_U32 u32FileEndPtr = pstSlqTblInfo->u32FileEndPtr;
5219
5220 //MVD_PRINT("MDrv_MVD_IsDispFinish::");
5221 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
5222 {
5223 MVD_DEBUGERROR(MVD_ERR("%s err: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
5224 return E_MVD_RET_FAIL;
5225 }
5226
5227 //MVD_PRINT("0x%x\n", FLAG_LAST_FRM_SHOW);
5228 if ((E_MVD_SLQ_TBL_MODE == curSrcMode) && (TRUE != FLAG_LAST_FRM_SHOW))
5229 {
5230 //insert pattern when each time checking IsDispFinish
5231 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5232 {
5233 u32FeByteCnt += END_PATTERN_SIZE;
5234 }
5235
5236 if ((u32FileEndPtr == HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx))) &&
5237 (HAL_MVD_IsMcuMode(u8Idx) == FALSE) &&
5238 (HAL_MVD_IsMStreamerMode(u8Idx) == FALSE))
5239 {
5240 //insert padding pattern until timeout
5241 u32TimeCnt= HAL_MVD_GetTime();
5242 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
5243 {
5244 if (TRUE == FLAG_LAST_FRM_SHOW)
5245 {
5246 //MVD_PRINT("\nDisp finished!\n");
5247 break;
5248 }
5249 //insert file-end pattern again
5250 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5251 {
5252 u32FeByteCnt += END_PATTERN_SIZE;
5253 }
5254 }
5255 if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
5256 {
5257 MVD_DEBUGERROR(MVD_ERR("\n***** MDrv_MVD_IsDispFinish TIMEOUT!!! *****\n\n"));
5258 if (E_MVD_CODEC_VC1_MAIN == HAL_MVD_GetCodecType(u8Idx))
5259 {
5260 if ((HAL_MVD_GetPayloadLen(u8Idx) > 0x200000)
5261 && (TRUE != HAL_MVD_GotFileEndPattern(u8Idx)))
5262 {
5263 MVD_DEBUGERROR(MVD_ERR("RCV payloadLen(0x%lx) invalid!\n",
5264 HAL_MVD_GetPayloadLen(u8Idx)));
5265 }
5266 }
5267 MVD_DEBUGERROR(MVD_ERR("***** fe=%lx, rd=%lx(%lx,%lx), wr=%lx, empty=%lx, u32FeByteCnt=%lx\n",
5268 u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)),
5269 HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty, u32FeByteCnt));
5270 return E_MVD_RET_TIME_OUT;
5271 }
5272 else
5273 {
5274 return E_MVD_RET_OK;
5275 }
5276 }
5277 else
5278 {
5279 //just return fail if readPtr is not closed to file-end ptr
5280 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx(%lx), wr=%lx, empty=%lx\n", u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
5281 HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5282 return E_MVD_RET_FAIL;
5283 }
5284 }
5285
5286 if (FLAG_LAST_FRM_SHOW)
5287 {
5288 return E_MVD_RET_OK;
5289 }
5290 else
5291 {
5292 return E_MVD_RET_FAIL;
5293 }
5294 }
5295
5296 //------------------------------------------------------------------------------
5297 /// Set MVD SLQ start & end address
5298 /// @param -u32start \b IN : start address
5299 /// @param -u32end \b IN : end address
5300 //------------------------------------------------------------------------------
HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)5301 static void HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
5302 {
5303 MVD_CmdArg mvdcmd;
5304 #if 0 //test for miu0
5305 MVD_MEMCfg* pstMemCfg = NULL;
5306 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5307 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX && bSHMMiuSel!=pstMemCfg->bFWMiuSel)
5308 {
5309 u32start += MIU1_BASEADDR;
5310 u32end += MIU1_BASEADDR;
5311 }
5312 #endif
5313 if ((u32start > SLQ_ADDR_LEN) || ((u32end+1) > SLQ_ADDR_LEN))
5314 {
5315 MVD_DEBUGERROR(MVD_ERR("MDrv_MVD_SetSLQStartEnd: only support 27bit add!\n"));
5316 }
5317
5318 SET_CMDARG(mvdcmd, (u32end+1), u8Idx);
5319 if (HAL_MVD_MVDCommand( CMD_SLQ_END, &mvdcmd ) == FALSE)
5320 {
5321 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SLQ_END ) );
5322 return;
5323 }
5324
5325 SET_CMDARG(mvdcmd, u32start, u8Idx);
5326 if (HAL_MVD_MVDCommand( CMD_SLQ_START, &mvdcmd ) == FALSE)
5327 {
5328 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SLQ_START ) );
5329 return;
5330 }
5331
5332 return;
5333 }
5334
HAL_MVD_DecodeIFrame(MS_U8 u8Idx,MS_PHYADDR u32FrameBufAddr,MS_PHYADDR u32StreamBufAddr,MS_PHYADDR u32StreamBufEndAddr)5335 MS_BOOL HAL_MVD_DecodeIFrame(MS_U8 u8Idx, MS_PHYADDR u32FrameBufAddr, MS_PHYADDR u32StreamBufAddr, MS_PHYADDR u32StreamBufEndAddr )
5336 {
5337 MS_U32 u32deley = 0;
5338 MS_U32 u32time = 0;
5339 MVD_CmdArg mvdcmd;
5340 MS_U32 u32MVDFWSLQTABTmpbufAdr = GET_SLQ_BUFFADD(u8Idx);
5341
5342 MVD_DEBUGINFO(MVD_PRINT("%s offset FBAdd=0x%lx streamStart=0x%lx streamEnd=0x%lx\n",
5343 __FUNCTION__, u32FrameBufAddr, u32StreamBufAddr, u32StreamBufEndAddr));
5344
5345 HAL_MVD_SetCodecInfo(u8Idx, E_MVD_CODEC_MPEG2, E_MVD_SLQ_MODE, DISABLE_PARSER);
5346 HAL_MVD_SetFrameBuffAddr(u8Idx, u32FrameBufAddr, HAL_MVD_GetFBMode(u8Idx));
5347
5348 SETUP_CMDARG(mvdcmd);
5349 mvdcmd.Arg0 = 1;
5350 SET_DECNUM(mvdcmd, u8Idx);
5351 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
5352
5353 if (HAL_MVD_StepDecode(u8Idx) == FALSE)
5354 {
5355 MVD_DEBUGERROR( MVD_ERR( "HAL_MVD_StepDecode fail!!\r\n") );
5356 return FALSE;
5357 }
5358
5359 SETUP_CMDARG(mvdcmd);
5360 mvdcmd.Arg0 = 1;
5361 mvdcmd.Arg1 = 1;
5362 SET_DECNUM(mvdcmd, u8Idx);
5363 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
5364
5365 //set data
5366 HAL_MVD_Delayms(2);
5367
5368 HAL_MVD_CPU_Sync();
5369 HAL_MVD_FlushMemory();
5370
5371 //wait vld init success or data may lost!
5372 #define WAIT_INIT_SUCCESS_TIME 100 //100ms
5373 u32deley = HAL_MVD_GetTime();
5374 while ((HAL_MVD_GetDecodeStatus(u8Idx)==DEC_STAT_IDLE) && (u32time<WAIT_INIT_SUCCESS_TIME))
5375 {
5376 u32time = HAL_MVD_GetTime()-u32deley;
5377 }
5378 if (u32time>=WAIT_INIT_SUCCESS_TIME)
5379 {
5380 MVD_DEBUGERROR(MVD_ERR("%s: wait init_success timeout!!!\n", __FUNCTION__));
5381 }
5382 HAL_MVD_SetSLQStartEnd(u8Idx, u32StreamBufAddr, u32StreamBufEndAddr);
5383 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_SLQ_TAB_TMPBUF_ADR=%lx\n",u32MVDFWSLQTABTmpbufAdr));
5384
5385 HAL_MVD_CPU_Sync();
5386 HAL_MVD_FlushMemory();
5387 HAL_MVD_SetSLQStartEnd(u8Idx, u32MVDFWSLQTABTmpbufAdr, u32MVDFWSLQTABTmpbufAdr+MVD3_FW_SLQ_TAB_TMPBUF_LEN);
5388
5389 HAL_MVD_CPU_Sync();
5390 HAL_MVD_ReadMemory();
5391
5392 // wait decode complete
5393 #define WAIT_DECODE_DONE_TIME 33 //To decode 1 frame should take less than 33ms
5394 u32deley = HAL_MVD_GetTime();
5395 u32time = 0;
5396 while (HAL_MVD_GetPicCounter(u8Idx)<1 && (u32time<WAIT_DECODE_DONE_TIME))
5397 {
5398 u32time = HAL_MVD_GetTime()-u32deley;
5399 }
5400 if (u32time >= WAIT_DECODE_DONE_TIME)
5401 {
5402 MVD_DEBUGERROR(MVD_ERR ("MDrv_MVD_DecodeIFrame time out(du=%ld, st=%ld, now=%ld)\n", u32time, u32deley, HAL_MVD_GetTime()));
5403 MVD_DEBUGERROR(MVD_ERR("frmCnt=%ld state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx)));
5404 return FALSE;
5405 }
5406 MVD_DEBUGINFO(MVD_PRINT ("MDrv_MVD_DecodeIFrame time (%ld, %ld)\n", u32time, u32deley));
5407 //MVD_PRINT("frmCnt=%ld state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx));
5408
5409 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5410 pCtrlCfg->bDecodeIFrame = TRUE;
5411
5412 return TRUE;
5413 }
5414
5415
5416 //------------------------------------------------------------------------------
5417 /// Set bit stream buffer address to MVD
5418 /// @param -u32start \b IN : start address
5419 /// @param -u32end \b IN : end address
5420 //------------------------------------------------------------------------------
MVD_SetBitStreamAddr(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)5421 static void MVD_SetBitStreamAddr(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
5422 {
5423 MVD_CmdArg mvdcmd;
5424 MS_ASSERT((u32start%8)==0);
5425 u32start >>= 3;
5426 SET_CMDARG(mvdcmd, u32start, u8Idx);
5427 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_START, &mvdcmd ) == FALSE)
5428 {
5429 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_START ) );
5430 return;
5431 }
5432
5433 MS_ASSERT((u32end%8)==0);
5434 u32end >>= 3;
5435 SET_CMDARG(mvdcmd, u32end, u8Idx);
5436 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_END, &mvdcmd ) == FALSE)
5437 {
5438 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_END ) );
5439 return;
5440 }
5441 return;
5442 }
5443
HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32len)5444 MS_BOOL HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32len)
5445 {
5446 MS_U32 tmpAdr, tmpLen;
5447 MVD_FWCfg* pFwCfg = NULL;
5448 MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
5449 MVD_MEMCfg* pstMemCfg = NULL;
5450 MVD_SLQTBLInfo* pstSlqTblInfo = NULL;
5451 MS_U32 u32BuffStart = u32start+(MVD_FW_TASK_OFFSET*u8Idx);
5452 MS_U32 VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
5453
5454 if(VPUSHMAddr != 0)
5455 {
5456 if(VPUSHMAddr >= HAL_MIU1_BASE) // miu1
5457 {
5458 VPUSHMAddr -= (HAL_MIU1_BASE+MVD_FW_CODE_LEN);
5459 }
5460 else // miu0
5461 {
5462 VPUSHMAddr -= (MVD_FW_CODE_LEN);
5463 }
5464
5465 if(u8Idx == 0)
5466 {
5467 u32SharememoryBase[u8Idx] = VPUSHMAddr; // for main decoder
5468 }
5469 else if(u8Idx == 1)
5470 {
5471 u32SharememoryBase[u8Idx] = VPUSHMAddr + 0x20000; // VPUSHMAddr+128K bytes
5472 }
5473 }
5474
5475 if(u32SharememoryBase[u8Idx] != MVD_U32_MAX)
5476 {
5477 u32BuffStart = u32SharememoryBase[u8Idx];
5478 }
5479
5480 MVD_DEBUGINFO(printf("MVD FW shared mem start = 0x%lx\n", u32BuffStart));
5481 MVD_GetFWBuffAdd(u32BuffStart, u32len, pBuff);
5482 MVD_SetFWBuffAdd(u8Idx, pBuff);
5483
5484 tmpAdr = pBuff->u32DecFrmInfoAdd + MVD_FW_DECFRM_INFO_BUF_LEN;
5485
5486 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FB, &tmpAdr, &tmpLen);
5487 MVD_DEBUGINFO(MVD_PRINT("set MVD_FRAMEBUFFER_ADR=%lx\n",tmpAdr));
5488 HAL_MVD_SetFrameBuffAddr(u8Idx, tmpAdr, HAL_MVD_GetFBMode(u8Idx));
5489 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
5490 HAL_MVD_SetFrameBuffNum(u8Idx, pFwCfg->u8FBNum,pFwCfg->u32FBUsedSize);
5491
5492 // If VD_MHEG5(CPU) and MVD HW engine are run on different MIU,
5493 // IAP, DP, and MV buffers are allocated after FB.
5494 // The reason is that these 3 buffers are used by MVD HW engine.
5495 {
5496 tmpAdr += pFwCfg->u32FBUsedSize;
5497 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5498 if (pstMemCfg->u32FBSize < (pFwCfg->u32FBUsedSize + MVD_HW_BUF_TOTAL_LEN))
5499 {
5500 MVD_DEBUGERROR(MVD_ERR("MVD HW buffers larger than FB size!!!\n"));
5501 }
5502 MVD_DEBUGINFO(MVD_PRINT("MVD FB boundary =0x%lx\n",tmpAdr));
5503 tmpAdr = HAL_MVD_SetHWBuffer(u8Idx, tmpAdr);
5504 }
5505
5506 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_BS, &tmpAdr, &tmpLen);
5507 MVD_DEBUGINFO(MVD_PRINT("set MVD_BITSTREAM_ADR=%lx\n",tmpAdr));
5508 MVD_SetBitStreamAddr(u8Idx, tmpAdr,tmpAdr+tmpLen);
5509 pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5510 pstSlqTblInfo->u32ESBuffEnd = tmpAdr+tmpLen;
5511
5512 if((pFwCfg->stFBReduction.LumaFBReductionMode != E_MVD_FB_REDUCTION_NONE)
5513 || (pFwCfg->stFBReduction.ChromaFBReductionMode != E_MVD_FB_REDUCTION_NONE))
5514 {
5515 //for chips not support reduction mode, just ignore related config.
5516 MVD_DEBUGERROR(MVD_ERR("MVD Err: Not support FB reduction mode!!\n"));
5517 }
5518
5519 return TRUE;
5520 }
5521
5522 //------------------------------------------------------------------------------
5523 /// Issue "Decode Pause" command.
5524 //------------------------------------------------------------------------------
HAL_MVD_DecodePause(MS_U8 u8Idx)5525 void HAL_MVD_DecodePause(MS_U8 u8Idx)
5526 {
5527 MVD_CmdArg mvdcmd;
5528 SETUP_CMDARG(mvdcmd);
5529 SET_DECNUM(mvdcmd, u8Idx);
5530 if (HAL_MVD_MVDCommand(CMD_PAUSE, &mvdcmd)== FALSE)
5531 {
5532 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_PAUSE) );
5533 return;
5534 }
5535
5536 return;
5537 }
5538
5539
5540 //------------- Below functions are for MediaCodec SLQ Table --------------------
5541 #if _SLQTBL_DUMP_PTS
_SLQTbl_DumpPtsTbl(MS_U8 u8Idx,MS_U32 u32EntryStart,MS_U32 u32EntryEnd)5542 static void _SLQTbl_DumpPtsTbl(MS_U8 u8Idx, MS_U32 u32EntryStart, MS_U32 u32EntryEnd)
5543 {
5544 MS_U32 i;
5545 MS_U32 u32EsRp, u32EsStart, u32EsEnd;
5546 MS_U32 u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
5547
5548 for (i=u32EntryStart; i<u32EntryEnd; i++)
5549 {
5550 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + i*8;
5551
5552 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
5553 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
5554 MVD_PRINT("ES[%lx] Start=0x%lx End=0x%lx u32EsRp=%lx\n",
5555 i, u32EsStart, u32EsEnd, u32EsRp);
5556 }
5557
5558 MVD_PRINT("\n=======Dump PTS table========\n");
5559 MVD_PRINT("addr\t byte_cnt\t dummy_cnt\t id_low\t id_high\t time_stamp\n");
5560 for (i=u32EntryStart; i<u32EntryEnd; i++)
5561 {
5562 MVD_PRINT("0x%lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\n", u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN,
5563 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN), //byteCnt
5564 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+4), //dummyPktCnt
5565 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+8), //idLow
5566 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+12),//idHigh
5567 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+16) //pts
5568 );
5569 }
5570 MVD_PRINT("=====================================\n");
5571 }
5572 #endif
5573
5574
5575 #if SLQ_NEW_PUSH
MVD_SLQTblGetHdrPkt(MS_U8 u8Idx,MVD_PacketInfo * pDivxHdr,MVD_PacketInfo * pDivxData)5576 void MVD_SLQTblGetHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
5577 #else
5578 static void MVD_SLQTblGetDivxHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
5579 #endif
5580 {
5581 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5582 MS_U32 u32DivXPattern = pstSlqTblInfo->pDrvDivxTbl->u32WrPtr;
5583 MS_U32 u32FrmSize = pDivxData->u32Length;
5584 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
5585 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5586 #if SLQ_NEW_PUSH
5587 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
5588 {
5589 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart && pstSlqTblInfo->pSlqStatus->bSlqPicStart)
5590 {
5591 //MVD_PRINT("Show KC the SlqPushLength = 0x%lx\n",pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
5592 if (E_MVD_CODEC_DIVX311 == curCodecType)
5593 {
5594 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
5595 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , DIVX_PATTERN);
5596 }
5597 else if(E_MVD_CODEC_VC1_MAIN == curCodecType)
5598 {//rcv
5599 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, RCV_PATTERN);
5600 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
5601 }
5602 else if (E_MVD_CODEC_VC1_ADV == curCodecType)
5603 {
5604 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , VC1_PATTERN);
5605 }
5606 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
5607 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
5608 pstSlqTblInfo->pSlqStatus->bSlqFireRdy =TRUE;
5609 pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;// - 16;
5610 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
5611 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
5612 }
5613
5614 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart)
5615 {
5616 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = u32DivXPattern;
5617 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
5618 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = TRUE;
5619 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
5620 }
5621 else if(pstSlqTblInfo->pSlqStatus->bSlqPicCollect)
5622 {
5623 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
5624 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
5625 }
5626 }
5627 else
5628 {
5629 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
5630 HAL_MVD_MemWrite4Byte(u32DivXPattern +4,u32FrmSize);
5631 }
5632 #else
5633 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
5634 HAL_MVD_MemWrite4Byte(u32DivXPattern+4, u32FrmSize);
5635 #endif
5636 pDivxHdr->u32StAddr = u32DivXPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5637 pDivxHdr->u32TimeStamp = pDivxData->u32TimeStamp; //unit: ms
5638 pDivxHdr->u32ID_L = pDivxData->u32ID_L;
5639 pDivxHdr->u32ID_H = pDivxData->u32ID_H;
5640 //MVD_PRINT("u32DivXPattern(0x%lx==>0x%lx)=0x%lx 0x%lx\n", u32DivXPattern, pDivxHdr->u32StAddr,
5641 // HAL_MVD_MemRead4Byte(u32DivXPattern), HAL_MVD_MemRead4Byte(u32DivXPattern+4));
5642 if (E_MVD_CODEC_VC1_ADV == curCodecType)
5643 {
5644 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
5645 pDivxHdr->u32Length = 4;
5646 }
5647 else
5648 {
5649 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
5650 pDivxHdr->u32Length = 8;
5651 }
5652
5653 #if SLQ_NEW_PUSH
5654 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart)
5655 {
5656 if (E_MVD_CODEC_VC1_ADV == curCodecType)
5657 {
5658 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
5659 pDivxHdr->u32Length = 4;
5660 }
5661 else
5662 {
5663 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
5664 pDivxHdr->u32Length = 8;
5665 }
5666 }
5667 #endif
5668 }
5669
MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx,MVD_CodecType eType)5670 static void MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx, MVD_CodecType eType)
5671 {
5672 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5673 MS_U32 u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
5674
5675 _MVD_Memset(u32EndPattern, 0xff, END_PATTERN_SIZE);
5676
5677 if ((E_MVD_CODEC_FLV == eType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == eType))
5678 {
5679 HAL_MVD_MemWrite4Byte(u32EndPattern, FLV_PATTERN);
5680 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
5681 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
5682 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
5683 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
5684 //MVD_PRINT("##########FileEnd for FLV/SVH!, u32EndPattern=%lx\n",u32EndPattern);
5685 }
5686 else if (E_MVD_CODEC_DIVX311 == eType)
5687 {
5688 HAL_MVD_MemWrite4Byte(u32EndPattern, DIVX_PATTERN);
5689 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
5690 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
5691 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
5692 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
5693 //MVD_PRINT("##########FileEnd for DIVX311!, u32EndPattern=%lx\n",u32EndPattern);
5694 }
5695 else if ((E_MVD_CODEC_MPEG2 == eType)||(E_MVD_CODEC_MPEG4 == eType))
5696 {
5697 HAL_MVD_MemWrite4Byte(u32EndPattern, MPEG_PATTERN_0);
5698 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
5699 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2);
5700 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3);
5701 //MVD_PRINT("##########FileEnd for MPEG2/4!, u32EndPattern=%lx\n",u32EndPattern);
5702 }
5703 else
5704 {
5705 HAL_MVD_MemWrite4Byte(u32EndPattern, END_PATTERN_0);
5706 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
5707 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2); //scw
5708 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3); //scw
5709 //MVD_PRINT("##########FileEnd for VC1!, u32EndPattern=%lx\n",u32EndPattern);
5710 }
5711
5712 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%lx 0x%lx\n", u32EndPattern,
5713 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4)));
5714 }
5715
5716
MVD_SLQTblInitDummyPkt(MS_U8 u8Idx,MVD_CodecType eType)5717 static void MVD_SLQTblInitDummyPkt(MS_U8 u8Idx, MVD_CodecType eType)
5718 {
5719 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5720 MS_U32 u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
5721 MS_U32 u32DummyPattern[3];
5722 MS_U32 u32PatternSize;
5723 MS_U32 i;
5724
5725 //MVD_PRINT("eType = 0x%x\n", eType);
5726 //initial content for dummy packet
5727 _MVD_Memset(u32DummyES, 0xff, DUMMY_SIZE);
5728
5729 switch (eType)
5730 {
5731 case E_MVD_CODEC_FLV:
5732 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
5733 u32DummyPattern[0] = FLV_PATTERN;
5734 u32PatternSize = 1;
5735 break;
5736
5737 case E_MVD_CODEC_DIVX311:
5738 u32DummyPattern[0] = DIVX_PATTERN;
5739 u32PatternSize = 1;
5740 break;
5741
5742 case E_MVD_CODEC_VC1_ADV: //vc1
5743 u32DummyPattern[0] = VC1_PATTERN_0;
5744 u32DummyPattern[1] = VC1_PATTERN_1;
5745 u32DummyPattern[2] = VC1_PATTERN_2;
5746 u32PatternSize = 3;
5747 break;
5748
5749 case E_MVD_CODEC_VC1_MAIN: //rcv
5750 u32DummyPattern[0] = RCV_PATTERN_0;
5751 u32DummyPattern[1] = RCV_PATTERN_1;
5752 u32DummyPattern[2] = RCV_PATTERN_2;
5753 u32PatternSize = 3;
5754 break;
5755
5756 default:
5757 u32DummyPattern[0] = DUMMY_PATTERN;
5758 u32PatternSize = 1;
5759 break;
5760 }
5761 for (i=0; i<u32PatternSize; i++)
5762 {
5763 HAL_MVD_MemWrite4Byte(u32DummyES+i*4, u32DummyPattern[i]);
5764 }
5765 #if 0
5766 MVD_PRINT("u32DummyES(0x%lx)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES, HAL_MVD_MemRead4Byte(u32DummyES),
5767 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
5768 #endif
5769
5770 }
5771
MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST * pDrvSlqTbl,MS_U32 u32Addr)5772 static void MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST* pDrvSlqTbl, MS_U32 u32Addr)
5773 {
5774 pDrvSlqTbl->u32StAdd = u32Addr;
5775 pDrvSlqTbl->u32EndAdd = u32Addr + SLQ_TBL_SIZE;
5776 pDrvSlqTbl->u32EntryCntMax = SLQ_ENTRY_MAX;
5777
5778 //reset SLQ table read/write pointers
5779 pDrvSlqTbl->u32RdPtr = pDrvSlqTbl->u32StAdd;
5780 pDrvSlqTbl->u32WrPtr = pDrvSlqTbl->u32StAdd;
5781 pDrvSlqTbl->pu32LastEntry = &pDrvSlqTbl->u32WrPtr;
5782
5783 #if (!MVD_TURBO_INIT)
5784 //reset SLQ table
5785 _MVD_Memset(pDrvSlqTbl->u32StAdd, 0, SLQ_TBL_SIZE);
5786 #endif
5787 pDrvSlqTbl->u32Empty = SLQ_TBL_SIZE;
5788 //_SLQTbl_DumpInfo(pDrvSlqTbl);
5789 }
5790
MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS * pSlqStatus,MS_U32 u32WrPtr)5791 static void MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS* pSlqStatus, MS_U32 u32WrPtr)
5792 {
5793 #if SLQ_NEW_PUSH
5794 pSlqStatus->u32VaildWptrAddr = u32WrPtr ;
5795 pSlqStatus->bSlqPicWaitNextStart = FALSE;
5796 pSlqStatus->bSlqCtrlBit = FALSE;
5797 pSlqStatus->u32SlqPushLength = 0;
5798 pSlqStatus->bSlqPicStart = FALSE;
5799 pSlqStatus->bSlqPicCollect = FALSE;
5800 pSlqStatus->bSlqEnLastFrameShow =FALSE;
5801 pSlqStatus->bSlqFireRdy = FALSE;
5802 #endif
5803 }
5804
MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST * pDrvDivxTbl,MS_U32 u32StAdd,MS_U32 u32Val)5805 static void MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST* pDrvDivxTbl, MS_U32 u32StAdd, MS_U32 u32Val)
5806 {
5807 ///// init SLQ entries for DivX311
5808 pDrvDivxTbl->u32StAdd = u32StAdd;
5809 pDrvDivxTbl->u32EndAdd= pDrvDivxTbl->u32StAdd + SLQ_TBL_SIZE;
5810 pDrvDivxTbl->u32WrPtr = pDrvDivxTbl->u32StAdd;
5811 //pDrvDivxTbl->u32RdPtr = pDrvDivxTbl->u32StAdd;
5812 #if (!MVD_TURBO_INIT)
5813 //reset DivX311 pattern table
5814 _MVD_Memset(pDrvDivxTbl->u32StAdd, 0, u32Val);
5815 #endif
5816 }
5817
MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST * pDrvEsTbl,MS_U32 u32StAdd,MS_U32 u32Val)5818 static void MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST* pDrvEsTbl, MS_U32 u32StAdd, MS_U32 u32Val)
5819 {
5820 UNUSED(u32Val);
5821 ///// init ES table
5822 pDrvEsTbl->u32StAdd = u32StAdd;
5823 pDrvEsTbl->u32EndAdd= pDrvEsTbl->u32StAdd + ES_TBL_SIZE;
5824 pDrvEsTbl->u32WrPtr = pDrvEsTbl->u32StAdd;
5825 //reset ES table
5826 _MVD_Memset(pDrvEsTbl->u32StAdd, 0, ES_TBL_SIZE);
5827 }
5828
5829 //------------------------------------------------------------------------------------------------------------
5830 // Layout of drvProcBuffer
5831 // -----------------
5832 // drvProcBuff | SlqTbl entries | <- pstSlqTblInfo->pDrvSlqTbl->u32StAdd
5833 // | 8K bytes |
5834 // | (1024 entries) |
5835 // | |
5836 // |-----------------|
5837 // | DivX311 | <- pstSlqTblInfo->pDrvSlqTbl->u32EndAdd <- pstSlqTblInfo->pDrvDivxTbl->u32StAdd
5838 // | 8K bytes |
5839 // | (1024 entries) |
5840 // | |
5841 // |-----------------|
5842 // | Flush Patterns |... <- pstSlqTblInfo->pDrvDivxTbl->u32EndAdd <- _drvDummy.u32StAdd
5843 // | 8K bytes |
5844 // | (1024 entries) |
5845 // | |
5846 // |-----------------|
5847 // | FileEnd Pattern |... <- _drvDummy.u32EndAdd <- _drvFileEnd.u32StAdd
5848 // | 8K bytes |
5849 // | (1024 entries) |
5850 // | |
5851 // |-----------------|
5852 // | ES table |... <- _drvFileEnd.u32EndAdd <- pstSlqTblInfo->pDrvEsTbl->u32StAdd
5853 // | 8K bytes |
5854 // | (1024 entries) |
5855 // | |
5856 // |-----------------|
5857 // | |........ End of drvProcBuff
5858 //
5859 //------------------------------------------------------------------------------------------------------------
HAL_MVD_SLQTblInit(MS_U8 u8Idx)5860 MS_BOOL HAL_MVD_SLQTblInit(MS_U8 u8Idx)
5861 {
5862 MS_U32 u32Addr, u32Len;
5863 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
5864 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5865 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5866
5867 if(curCodecType == E_MVD_CODEC_UNKNOWN)
5868 {
5869 MVD_DEBUGERROR(MVD_ERR("%s: unknow codec type!\n", __FUNCTION__));
5870 return FALSE;
5871 }
5872 pstSlqTblInfo->u32DummyPktCnt = 0;//reset dummy packet counter
5873 pstSlqTblInfo->u32SlqByteCnt = 0; //reset SLQ table byte counter
5874 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
5875
5876 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_DRV, &u32Addr, &u32Len);
5877
5878 //init SLQ table attributes & reset SLQ table read/write pointers
5879 MVD_SLQTblInitDrvSlqTbl(pstSlqTblInfo->pDrvSlqTbl, u32Addr);
5880 pstSlqTblInfo->u32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
5881
5882 MVD_SLQTblInitSlqStatus(pstSlqTblInfo->pSlqStatus, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5883
5884 //set SLQ table start/end to F/W
5885 HAL_MVD_SetSLQTblBufStartEnd(u8Idx, HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr), HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr+SLQ_TBL_SIZE));
5886
5887 ///// init SLQ entries for DivX311
5888 MVD_SLQTblInitDrvDivxTbl(pstSlqTblInfo->pDrvDivxTbl, pstSlqTblInfo->pDrvSlqTbl->u32EndAdd, SLQ_TBL_SIZE);
5889
5890 ///// init flush pattern
5891 MVD_SLQTblInitDummyPkt(u8Idx, curCodecType);
5892
5893 ///// init file-end pattern
5894 MVD_SLQTblInitFileEndPkt(u8Idx, curCodecType);
5895
5896 MVD_SLQTblInitDrvEsTbl(pstSlqTblInfo->pDrvEsTbl, (pstSlqTblInfo->pDrvDivxTbl->u32EndAdd + DUMMY_SIZE*2), pstMemCfg->u32DrvBufSize);
5897
5898 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX; //reset ES read pointer
5899 pstSlqTblInfo->u32PreEsWr = 0; //reset ES write pointer
5900
5901 return TRUE;
5902 }
5903
5904
5905 #if 0
5906 static void _SLQTbl_DumpInfo(MVD_SLQ_TBL_ST* pInfo)
5907 {
5908 MVD_PRINT("str=0x%lx\n", pInfo->u32StAdd);
5909 MVD_PRINT("end=0x%lx\n", pInfo->u32EndAdd);
5910 MVD_PRINT("cnt=0x%lx\n", pInfo->u32EntryCntMax);
5911 MVD_PRINT("rd =0x%lx\n", pInfo->u32RdPtr);
5912 MVD_PRINT("wr =0x%lx\n", pInfo->u32WrPtr);
5913 return;
5914 }
5915 #endif
5916
5917 //static MS_U32 writePtrLast[MAX_DEC_NUM]; //SlqTbl debug
HAL_MVD_GetQueueVacancy(MS_U8 u8Idx,MS_BOOL bCached)5918 MS_U32 HAL_MVD_GetQueueVacancy(MS_U8 u8Idx, MS_BOOL bCached)
5919 {
5920 MS_U32 u32Empty;
5921 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5922
5923 #if 0
5924 if (MDrv_MVD_GetVldErrCount()!=0)
5925 {
5926 MVD_PRINT("QQQ wPtr= 0x%lx(0x%lx) rPtr=0x%lx(0x%lx) vldErr=0x%lx\n", writePtrLast[u8Idx], pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
5927 HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, MDrv_MVD_GetVldErrCount(u8Idx));
5928 MVD_PRINT("Previous EsRead=0x%lx EsWrite=0x%lx\n", pstSlqTblInfo->u32PreEsRd, pstSlqTblInfo->u32PreEsWr);
5929 _SLQTbl_DumpPtsTbl(u8Idx, 0x0, 0x620);
5930 while(1);
5931 }
5932 #endif
5933
5934 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32Empty;
5935 if ((TRUE == bCached) && (u32Empty > SLQTBL_CHECKVACANCY_WATERLEVEL))
5936 {
5937 //To have better performance, we only query F/W read pointer
5938 //when queue_vacancy is lower than water_level
5939 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
5940 {
5941 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
5942 }
5943 else
5944 {
5945 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
5946 }
5947
5948 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
5949 {
5950 u32Empty = SLQ_TBL_SIZE;
5951 }
5952 u32Empty -= SLQ_TBL_SAFERANGE;
5953 return (u32Empty / SLQ_ENTRY_LEN);
5954 }
5955
5956 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx));
5957 //MVD_PRINT("QV=0x%lx rd=0x%lx==>", u32Empty, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
5958 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= (pstSlqTblInfo->pDrvSlqTbl->u32StAdd+SLQ_ENTRY_LEN))
5959 {
5960 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
5961 {
5962 MVD_DEBUGERROR(MVD_ERR("%s: readPtr 0x%lx out of range: too large!\n",
5963 __FUNCTION__, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
5964 }
5965 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr -= SLQ_ENTRY_LEN;
5966 }
5967 else if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd)
5968 {
5969 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32EndAdd - SLQ_ENTRY_LEN;
5970 }
5971 else
5972 {
5973 MVD_DEBUGERROR(MVD_ERR("%s: readPtr 0x%lx out of range: too small!\n",
5974 __FUNCTION__, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
5975 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
5976 }
5977 //MVD_PRINT("0x%lx\n", pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
5978
5979 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
5980 {
5981 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
5982 }
5983 else
5984 {
5985 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
5986 }
5987
5988 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
5989 {
5990 u32Empty = SLQ_TBL_SIZE;
5991 }
5992
5993 pstSlqTblInfo->pDrvSlqTbl->u32Empty = u32Empty;
5994
5995 if (u32Empty < SLQ_TBL_SAFERANGE)
5996 {//to avoid write_pointer catch up to read_pointer
5997 u32Empty= 0;
5998 }
5999 else
6000 {
6001 u32Empty -= SLQ_TBL_SAFERANGE;
6002 }
6003
6004 //MVD_PRINT("%s r=0x%lx w=0x%lx u32Empty=0x%lx\n", __FUNCTION__,
6005 // pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32Empty);
6006 return (u32Empty / SLQ_ENTRY_LEN);
6007 }
6008
HAL_MVD_PushQueue(MS_U8 u8Idx,MVD_PacketInfo * pInfo)6009 E_MVD_Result HAL_MVD_PushQueue(MS_U8 u8Idx, MVD_PacketInfo* pInfo)
6010 {
6011 E_MVD_Result eRet=E_MVD_RET_INVALID_PARAM;
6012 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6013 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6014 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6015
6016 if (pInfo == NULL)
6017 {
6018 MVD_DEBUGERROR(MVD_ERR("PushQueue NULL pInfo\n"));
6019 return E_MVD_RET_INVALID_PARAM;
6020 }
6021
6022 if(pMVDHalContext->bAutoInsertDummyPattern[u8Idx] == TRUE)
6023 {
6024 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6025 MS_U8* temp = (MS_U8*)(MS_PA2KSEG1((MS_U32) pInfo->u32StAddr+pstMemCfg->u32BSAddr));
6026 MS_U32 i;
6027 MS_U32 u32DummyPattern[3];
6028 MS_U32 u32PatternSize;
6029
6030 switch (curCodecType)
6031 {
6032 case E_MVD_CODEC_FLV:
6033 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6034 u32DummyPattern[0] = FLV_PATTERN;
6035 u32PatternSize = 1;
6036 break;
6037
6038 case E_MVD_CODEC_DIVX311:
6039 u32DummyPattern[0] = DIVX_PATTERN;
6040 u32PatternSize = 1;
6041 break;
6042
6043 case E_MVD_CODEC_VC1_ADV: //vc1
6044 u32DummyPattern[0] = VC1_PATTERN_0;
6045 u32DummyPattern[1] = VC1_PATTERN_3;
6046 u32PatternSize = 2;
6047 break;
6048
6049 case E_MVD_CODEC_VC1_MAIN: //rcv
6050 u32DummyPattern[0] = RCV_PATTERN_3;
6051 u32DummyPattern[1] = RCV_PATTERN_1;
6052 u32DummyPattern[2] = RCV_PATTERN_3;
6053 u32PatternSize = 3;
6054 break;
6055
6056 default:
6057 u32DummyPattern[0] = DUMMY_PATTERN;
6058 u32PatternSize = 1;
6059 break;
6060 }
6061
6062
6063 for (i=0; i<u32PatternSize; i++)
6064 {
6065 temp[4*i+pInfo->u32Length] = ((u32DummyPattern[i])&0xff);
6066 temp[4*i+pInfo->u32Length+1] = ((u32DummyPattern[i]>>8)&0xff);
6067 temp[4*i+pInfo->u32Length+2] = ((u32DummyPattern[i]>>16)&0xff);
6068 temp[4*i+pInfo->u32Length+3] = ((u32DummyPattern[i]>>24)&0xff);
6069 }
6070
6071 for(i=u32PatternSize*4;i<256;i++)
6072 {
6073 temp[pInfo->u32Length+i] = 0xFF;
6074 }
6075
6076 pInfo->u32Length += 256;
6077 }
6078
6079 #if _SLQTBL_DUMP_PUSHQ
6080 {
6081 //static MS_U32 u32pqTimes[MAX_DEC_NUM]= {0, 0};
6082
6083 MVD_PRINT("Push[%lx] st=0x%lx len=0x%lx pts=0x%lx\n", pMVDHalContext->u32pqTimes[u8Idx]++,
6084 pInfo->u32StAddr, pInfo->u32Length, pInfo->u32TimeStamp);
6085 }
6086 #endif
6087
6088 #if SLQ_NEW_PUSH
6089 if((pInfo->u32StAddr & SLQ_PIC_START_FLAG) == SLQ_PIC_START_FLAG)
6090 {
6091 pInfo->u32StAddr = pInfo->u32StAddr&~SLQ_PIC_START_FLAG;
6092 pstSlqTblInfo->pSlqStatus->bSlqPicStart =TRUE;
6093 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = TRUE;
6094 }
6095 else
6096 {
6097 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
6098 }
6099 #endif
6100 //check input parameters
6101 if (pInfo->u32StAddr >= pstMemCfg->u32BSSize)
6102 {
6103 //since u32StAddr is offset, it shouldn't be larger than size.
6104 MVD_DEBUGERROR(MVD_ERR("PushQueue invalid u32StAddr=0x%lx, bsSize=0x%lx\n", pInfo->u32StAddr, pstMemCfg->u32BSSize));
6105 return E_MVD_RET_INVALID_PARAM;
6106 }
6107 else if ((pInfo->u32TimeStamp == MVD_NULLPKT_PTS) && (pInfo->u32Length==0))
6108 {
6109 // AVI NULL packet.
6110 pstSlqTblInfo->u32DummyPktCnt++;
6111 //MVD_PRINT("Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6112 return E_MVD_RET_OK;
6113 }
6114
6115 if (FALSE == (HAL_MVD_IsMStreamerMode(u8Idx) ||HAL_MVD_IsMcuMode(u8Idx)))
6116 { //Check repeat PTS for non-MStreamer/Mcu mode.
6117 //MVD_PRINT(".Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6118 if (pInfo->u32TimeStamp == pstSlqTblInfo->u32LastPts)
6119 {
6120 //MVD_PRINT("Repeat PTS!\n");
6121 if (pInfo->u32TimeStamp != MVD_NULLPKT_PTS)
6122 pInfo->u32TimeStamp = MVD_NULLPKT_PTS; //repeat PTS
6123 }
6124 else
6125 {
6126 pstSlqTblInfo->u32LastPts = pInfo->u32TimeStamp;
6127 }
6128 }
6129
6130 //check queue vacancy
6131 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty >= SLQ_TBL_SAFERANGE)
6132 { //put packets
6133 #if SLQ_NEW_PUSH
6134 if(FALSE == pMVDHalContext->stCtrlCfg[u8Idx].stDbgModeCfg.bBypassInsertStartCode)
6135 {
6136 if (E_MVD_CODEC_DIVX311 == curCodecType
6137 ||E_MVD_CODEC_VC1_MAIN == curCodecType //rcv
6138 ||E_MVD_CODEC_VC1_ADV == curCodecType)
6139 {
6140 MVD_PacketInfo stHdr;
6141 if((pstSlqTblInfo->pSlqStatus->bSlqCtrlBit) || (E_MVD_CODEC_DIVX311 == curCodecType))
6142 {
6143 MVD_SLQTblGetHdrPkt(u8Idx, &stHdr, pInfo);
6144
6145 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart||(!pstSlqTblInfo->pSlqStatus->bSlqCtrlBit))
6146 {
6147 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6148 { //to mark this packet's pts as unused.
6149 stHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6150 stHdr.u32ID_H = MVD_NULLPKT_PTS;
6151 }
6152 HAL_MVD_SLQTblSendPacket(u8Idx, &stHdr);
6153 }
6154 }
6155 }
6156 }
6157 #else
6158 if (E_MVD_CODEC_DIVX311 == curCodecType)
6159 {
6160 MVD_PacketInfo stDivxHdr;
6161 MVD_SLQTblGetDivxHdrPkt(u8Idx, &stDivxHdr, pInfo);
6162 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6163 { //to mark this packet's pts as unused.
6164 stDivxHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6165 stDivxHdr.u32ID_H = MVD_NULLPKT_PTS;
6166 }
6167 HAL_MVD_SLQTblSendPacket(u8Idx, &stDivxHdr);
6168 }
6169 #endif
6170 HAL_MVD_SLQTblSendPacket(u8Idx, pInfo);
6171 eRet=E_MVD_RET_OK;
6172 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6173 }
6174 else
6175 {
6176 MS_ASSERT(0); //shouldn't be here!
6177 MVD_DEBUGERROR(MVD_ERR("PushQueue FULL!!! empty=0x%lx\n", pstSlqTblInfo->pDrvSlqTbl->u32Empty));
6178 //Player will only push queue when queue vacancy != 0
6179 eRet=E_MVD_RET_QUEUE_FULL;
6180 }
6181
6182 if (E_MVD_RET_OK != eRet)
6183 {
6184 MVD_DEBUGERROR(MVD_ERR("%s ret = %d\n", __FUNCTION__, eRet));
6185 }
6186 return eRet;
6187 }
6188
6189
MVD_FlushTSQueue(MS_U8 u8Idx)6190 static E_MVD_Result MVD_FlushTSQueue(MS_U8 u8Idx)
6191 {
6192 if (HAL_MVD_GetLastCmd(u8Idx)!=CMD_PAUSE)
6193 {
6194 HAL_MVD_PauseDisp(u8Idx);
6195 HAL_MVD_DecodePause(u8Idx);
6196 HAL_MVD_FlushDisplayBuf(u8Idx);
6197 }
6198
6199 if(HAL_MVD_SkipData(u8Idx) == FALSE)
6200 {
6201 return E_MVD_RET_FAIL;
6202 }
6203 else
6204 {
6205 return E_MVD_RET_OK;
6206 }
6207 }
6208
6209
MVD_PatternLenIsValid(MS_U8 u8Idx,MS_U32 u32Len)6210 static MS_BOOL MVD_PatternLenIsValid(MS_U8 u8Idx, MS_U32 u32Len)
6211 {
6212 MS_U32 u32ValidLen = 0;
6213 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6214 #define MAX_VALIDLEN 0x200000 //2M
6215
6216 if (E_MVD_CODEC_VC1_MAIN != curCodecType)
6217 {
6218 return TRUE;
6219 }
6220 else
6221 {
6222 //only RCV has to check this
6223 u32ValidLen = HAL_MVD_GetPayloadLen(u8Idx);
6224 if (u32ValidLen > MAX_VALIDLEN)
6225 { //avoid the extreme large value due to error bitstream
6226 u32ValidLen = MAX_VALIDLEN;
6227 }
6228 MVD_DEBUGINFO(MVD_PRINT("(%x) ValidLen=0x%lx CurLen=0x%lx\n",
6229 (u32Len > u32ValidLen), u32ValidLen, u32Len));
6230 return (u32Len > u32ValidLen);
6231 }
6232 }
6233
MVD_FlushSlqTblQueue(MS_U8 u8Idx)6234 static E_MVD_Result MVD_FlushSlqTblQueue(MS_U8 u8Idx)
6235 {
6236 MS_U32 u32TimeCnt;
6237 MS_U32 u32PatternByteCnt = 0;
6238 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6239
6240 HAL_MVD_ResetHandShake(u8Idx,MVD_HANDSHAKE_PAUSE);
6241
6242 HAL_MVD_PauseDisp(u8Idx);
6243 HAL_MVD_DecodePause(u8Idx);
6244 HAL_MVD_FlushDisplayBuf(u8Idx);
6245
6246 u32TimeCnt = HAL_MVD_GetTime();
6247 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS) ||
6248 (TRUE != MVD_PatternLenIsValid(u8Idx, u32PatternByteCnt)))
6249 {
6250 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
6251 {
6252 MVD_DEBUGINFO(MVD_PRINT("\nPause finished!\n"));
6253 break;
6254 }
6255
6256 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
6257 {
6258 HAL_MVD_GetQueueVacancy(u8Idx, FALSE); //update pstSlqTblInfo->pDrvSlqTbl->u32Empty
6259 HAL_MVD_Delayms(1); //avoid busy query
6260 }
6261 //insert dummy pattern
6262 if (TRUE == HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FLUSH))
6263 {
6264 u32PatternByteCnt += DUMMY_SIZE*2; //2 dummy were inserted
6265 }
6266
6267 //Timeout for RCV
6268 if ((HAL_MVD_GetTime() - u32TimeCnt) > (CMD_TIMEOUT_MS*10))
6269 {
6270 MVD_DEBUGERROR(MVD_ERR("RCV timeout!!! pl=%ld, pbc=%ld, emp=%ld\n",
6271 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt,
6272 pstSlqTblInfo->pDrvSlqTbl->u32Empty));
6273 break;
6274 }
6275 }
6276 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%lu t2=%lu diff=%lu)\n", __FUNCTION__,
6277 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
6278 //if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
6279 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
6280 {
6281 MVD_DEBUGERROR(MVD_ERR("\n***** MDrv_MVD_FlushQueue PAUSE TIMEOUT!!! *****\n\n"));
6282 MVD_DEBUGERROR(MVD_ERR("ValidLen=0x%lx CurPatternLen=0x%lx\n",
6283 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt));
6284
6285 return E_MVD_RET_FAIL;
6286 }
6287
6288 //flush ES buffer & reset SLQ tbl
6289 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SLQ_RST);
6290
6291 if (HAL_MVD_SlqTblRst(u8Idx) == TRUE)
6292 {
6293 //return E_MVD_RET_OK;
6294 }
6295
6296 u32TimeCnt = HAL_MVD_GetTime();
6297 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS))
6298 {
6299 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
6300 {
6301 MVD_DEBUGINFO(MVD_PRINT("\nSlqRst finished!\n"));
6302 break;
6303 }
6304 }
6305 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%lu t2=%lu diff=%lu)\n", __FUNCTION__,
6306 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
6307 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
6308 {
6309 MVD_DEBUGERROR(MVD_ERR("\n***** MDrv_MVD_FlushQueue SlqRst TIMEOUT!!! *****\n\n"));
6310 return E_MVD_RET_FAIL;
6311 }
6312
6313 HAL_MVD_SLQTblInit(u8Idx); //reset related buffers
6314
6315 return E_MVD_RET_OK;
6316 }
6317
HAL_MVD_FlushQueue(MS_U8 u8Idx)6318 E_MVD_Result HAL_MVD_FlushQueue(MS_U8 u8Idx)
6319 {
6320 E_MVD_Result eRet = E_MVD_RET_OK;
6321 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
6322
6323 if (HAL_MVD_GetDecodeStatus(u8Idx) == E_MVD_STAT_IDLE)
6324 {
6325 return eRet;
6326 }
6327
6328 //flush ES buffer (and cmd queue if used)
6329 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
6330 {
6331 eRet = MVD_FlushSlqTblQueue(u8Idx);
6332 }
6333 else if (E_MVD_TS_FILE_MODE == curSrcMode)
6334 {
6335 eRet = MVD_FlushTSQueue(u8Idx);
6336 }
6337 if (E_MVD_RET_OK != eRet)
6338 {
6339 return eRet;
6340 }
6341
6342 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
6343 //flush display buffer
6344 if (HAL_MVD_FlushDisplayBuf(u8Idx) != TRUE)
6345 {
6346 return E_MVD_RET_FAIL;
6347 }
6348
6349 if (TRUE == HAL_MVD_SkipToIFrame(u8Idx))
6350 {
6351 return E_MVD_RET_OK;
6352 }
6353 else
6354 {
6355 return E_MVD_RET_FAIL;
6356 }
6357 }
6358
HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)6359 MS_BOOL HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)
6360 {
6361 return HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
6362 }
6363
HAL_MVD_EnableInt(MS_U8 u8Idx,MS_U32 bEn)6364 MS_BOOL HAL_MVD_EnableInt(MS_U8 u8Idx, MS_U32 bEn)
6365 {
6366 MVD_CmdArg mvdcmd;
6367 MS_U32 u32IntFlag = 0;
6368
6369 u32IntFlag = (((bEn & E_MVD_EVENT_USER_DATA) == E_MVD_EVENT_USER_DATA) ? INT_USER_DATA : 0) |
6370 (((bEn & E_MVD_EVENT_USER_DATA_DISP) == E_MVD_EVENT_USER_DATA_DISP) ? INT_USER_DATA_DISP : 0) |
6371 (((bEn & E_MVD_EVENT_PIC_FOUND) == E_MVD_EVENT_PIC_FOUND) ? INT_PIC_FOUND : 0) |
6372 (((bEn & E_MVD_EVENT_FIRST_FRAME) == E_MVD_EVENT_FIRST_FRAME) ? INT_FIRST_FRAME : 0) |
6373 (((bEn & E_MVD_EVENT_DISP_RDY) == E_MVD_EVENT_DISP_RDY) ? INT_DISP_RDY : 0) |
6374 (((bEn & E_MVD_EVENT_SEQ_FOUND) == E_MVD_EVENT_SEQ_FOUND) ? INT_SEQ_FOUND : 0)|
6375 (((bEn & E_MVD_EVENT_DEC_ONE_FRAME) == E_MVD_EVENT_DEC_ONE_FRAME) ? INT_DEC_DONE : 0)|
6376 (((bEn & E_MVD_EVENT_DEC_ERR) == E_MVD_EVENT_DEC_ERR) ? INT_DEC_ERR : 0)|
6377 (((bEn & E_MVD_EVENT_DEC_DATA_ERR) == E_MVD_EVENT_DEC_DATA_ERR) ? INT_VES_INVALID : 0)|
6378 (((bEn & E_MVD_EVENT_XC_LOW_DEALY) == E_MVD_EVENT_XC_LOW_DEALY) ? INT_XC_LOW_DELAY : 0)|
6379 (((bEn & E_MVD_EVENT_DEC_I) == E_MVD_EVENT_DEC_I) ? INT_DEC_I : 0);
6380 if (((bEn & E_MVD_EVENT_DISP_VSYNC) == E_MVD_EVENT_DISP_VSYNC) ||
6381 ((bEn & E_MVD_EVENT_UNMUTE) == E_MVD_EVENT_UNMUTE))
6382 {
6383 u32IntFlag |= INT_DISP_VSYNC;
6384 }
6385
6386 MVD_DEBUGINFO(printf("u32IntFlag = 0x%lx\n", u32IntFlag));
6387 SETUP_CMDARG(mvdcmd);
6388 mvdcmd.Arg0 = u32IntFlag & 0xff;
6389 mvdcmd.Arg1 = (u32IntFlag>>8) & 0xff;
6390 mvdcmd.Arg2 = (u32IntFlag>>16) & 0xff;
6391 SET_DECNUM(mvdcmd, u8Idx);
6392 SET_CMD_RET_FALSE(CMD_ENABLE_INT_STAT, &mvdcmd);
6393
6394 return TRUE;
6395 }
6396
HAL_MVD_EnableDispOneField(MS_U8 u8Idx,MS_BOOL bEn)6397 E_MVD_Result HAL_MVD_EnableDispOneField(MS_U8 u8Idx, MS_BOOL bEn)
6398 {
6399 MVD_CmdArg stCmdArg;
6400
6401 SETUP_CMDARG(stCmdArg);
6402 if(TRUE == bEn)
6403 {
6404 stCmdArg.Arg0 = 1;
6405 }
6406 SET_DECNUM(stCmdArg, u8Idx);
6407 if (HAL_MVD_MVDCommand(CMD_SHOW_ONE_FIELD, &stCmdArg) == FALSE)
6408 {
6409 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SHOW_ONE_FIELD ) );
6410 return E_MVD_RET_FAIL;
6411 }
6412 return E_MVD_RET_OK;
6413 }
6414
HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx,MS_U16 u16Cnt)6415 E_MVD_Result HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx, MS_U16 u16Cnt)
6416 {
6417 MVD_CmdArg stCmdArg;
6418
6419 SETUP_CMDARG(stCmdArg);
6420 //16bits and unit in vsync for mute the fd_mask
6421 stCmdArg.Arg0 = u16Cnt & 0xff;
6422 stCmdArg.Arg1 = (u16Cnt>>8) & 0xff;
6423 SET_DECNUM(stCmdArg, u8Idx);
6424 if (HAL_MVD_MVDCommand(CMD_FD_MASK_DELAY_CNT, &stCmdArg) == FALSE)
6425 {
6426 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FD_MASK_DELAY_CNT ) );
6427 return E_MVD_RET_FAIL;
6428 }
6429 return E_MVD_RET_OK;
6430 }
6431
HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx,MS_U8 u8FrameRate,MS_U8 u8Interlace)6432 E_MVD_Result HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx, MS_U8 u8FrameRate, MS_U8 u8Interlace)
6433 {
6434 MVD_CmdArg stCmdArg;
6435 if((u8Interlace != 0) && (u8Interlace != 1))
6436 {
6437 return E_MVD_RET_FAIL;
6438 }
6439 SETUP_CMDARG(stCmdArg);
6440 stCmdArg.Arg0 = u8FrameRate;
6441 stCmdArg.Arg1 = u8Interlace;
6442 SET_DECNUM(stCmdArg, u8Idx);
6443 if (HAL_MVD_MVDCommand(CMD_FRC_OUPUT, &stCmdArg) == FALSE)
6444 {
6445 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FRC_OUPUT ) );
6446 return E_MVD_RET_FAIL;
6447 }
6448 return E_MVD_RET_OK;
6449 }
6450
6451
HAL_MVD_SetFRCDropType(MS_U8 u8Idx,MS_U8 u8DropType)6452 E_MVD_Result HAL_MVD_SetFRCDropType(MS_U8 u8Idx, MS_U8 u8DropType)
6453 {
6454 MVD_CmdArg stCmdArg;
6455
6456 if((u8DropType != FRC_DROP_FRAME)
6457 && (u8DropType != FRC_DROP_FIELD))
6458 {
6459 return E_MVD_RET_FAIL;
6460 }
6461
6462 SETUP_CMDARG(stCmdArg);
6463 stCmdArg.Arg0 = u8DropType;
6464 SET_DECNUM(stCmdArg, u8Idx);
6465 if (HAL_MVD_MVDCommand(CMD_FRC_DROP_BEHAVIOR, &stCmdArg) == FALSE)
6466 {
6467 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FRC_DROP_BEHAVIOR ) );
6468 return E_MVD_RET_FAIL;
6469 }
6470 return E_MVD_RET_OK;
6471 }
6472
HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx,MS_BOOL bEnable)6473 E_MVD_Result HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx, MS_BOOL bEnable)
6474 {
6475 MVD_CmdArg stCmdArg;
6476
6477 SETUP_CMDARG(stCmdArg);
6478 stCmdArg.Arg0 = bEnable;
6479 SET_DECNUM(stCmdArg, u8Idx);
6480 if (HAL_MVD_MVDCommand(CMD_FORBID_RESOLUTION_CHANGE, &stCmdArg) == FALSE)
6481 {
6482 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_FORBID_RESOLUTION_CHANGE ) );
6483 return E_MVD_RET_FAIL;
6484 }
6485 MVD_DEBUGINFO(MVD_PRINT("MVD CMD_FORBID_RESOLUTION_CHANGE(0x%x) OK\n", bEnable));
6486
6487 return E_MVD_RET_OK;
6488 }
6489
HAL_MVD_DbgGetData(MS_U32 u32Addr,MS_U32 * u32Data)6490 E_MVD_Result HAL_MVD_DbgGetData(MS_U32 u32Addr, MS_U32* u32Data)
6491 {
6492 MVD_CmdArg mvdcmd;
6493 MS_U32 u32Val;
6494
6495 if (!u32Data)
6496 {
6497 return E_MVD_RET_INVALID_PARAM;
6498 }
6499
6500 SET_CMDARG(mvdcmd, u32Addr, 0); //FIXME
6501 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
6502 {
6503 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
6504 return E_MVD_RET_FAIL;
6505 }
6506
6507 u32Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
6508 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
6509 *u32Data = u32Val;
6510
6511 return E_MVD_RET_OK;
6512 }
6513
6514
HAL_MVD_DbgDumpBits(MS_U8 u8Idx,MS_PHYADDR u32base,MS_U32 u32size)6515 void HAL_MVD_DbgDumpBits(MS_U8 u8Idx, MS_PHYADDR u32base, MS_U32 u32size)
6516 {
6517 MVD_CmdArg mvdcmd;
6518
6519 u32base = HAL_MVD_GetMemOffset(u32base);
6520 MVD_PRINT("%s base=0x%lx size=0x%lx\n", __FUNCTION__, u32base, u32size);
6521 MS_ASSERT((u32base%8)==0);
6522 u32base >>= 3;
6523 SET_CMDARG(mvdcmd, u32base, u8Idx);
6524 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_BASE, &mvdcmd ) == FALSE)
6525 {
6526 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_BASE ) );
6527 return;
6528 }
6529
6530 MS_ASSERT((u32size%8)==0);
6531 u32size >>= 3;
6532 SET_CMDARG(mvdcmd, u32size, u8Idx);
6533 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_LENGTH, &mvdcmd ) == FALSE)
6534 {
6535 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_LENGTH ) );
6536 return;
6537 }
6538 return;
6539 }
6540
6541
HAL_MVD_GetActiveFormat(MS_U8 u8Idx)6542 MS_U8 HAL_MVD_GetActiveFormat(MS_U8 u8Idx)
6543 {
6544 MVD_CmdArg mvdcmd;
6545 MS_U8 u8Afd = 0;
6546
6547 SETUP_CMDARG(mvdcmd);
6548 SET_DECNUM(mvdcmd, u8Idx);
6549 if (HAL_MVD_MVDCommand( CMD_GET_AFD, &mvdcmd ) == FALSE)
6550 {
6551 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\r\n", CMD_GET_AFD ) );
6552 return 0xff;
6553 }
6554 u8Afd = mvdcmd.Arg0;
6555 return u8Afd;
6556 }
6557
HAL_MVD_EnableAVSync(MS_U8 u8Idx,MS_BOOL bEnable)6558 MS_BOOL HAL_MVD_EnableAVSync(MS_U8 u8Idx, MS_BOOL bEnable)
6559 {
6560 MVD_CmdArg mvdcmd;
6561 SETUP_CMDARG(mvdcmd);
6562 mvdcmd.Arg0 = bEnable;
6563 SET_DECNUM(mvdcmd, u8Idx);
6564 SET_CMD_RET_FALSE(CMD_SYNC_ON, &mvdcmd);
6565
6566 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6567 pCtrlCfg->bAVSyncOn = bEnable;
6568
6569 return TRUE;
6570 }
6571
HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx,MS_U32 u32Delay)6572 MS_BOOL HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx, MS_U32 u32Delay)
6573 {
6574 MVD_CmdArg mvdcmd;
6575 SET_CMDARG(mvdcmd, _MS_TO_90K(u32Delay), u8Idx); //u32Delay ms ==> 90k counter
6576 SET_CMD_RET_FALSE(CMD_SYNC_OFFSET, &mvdcmd);
6577 return TRUE;
6578 }
6579
HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx,MS_U32 u32Th)6580 MS_BOOL HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx, MS_U32 u32Th)
6581 {
6582 MVD_CmdArg mvdcmd;
6583
6584 if (u32Th == 0x00)
6585 {
6586 return FALSE; //invalid parameter, do nothing
6587 }
6588 if (u32Th > 0xff)
6589 {
6590 u32Th = 0xff; //set to maximum
6591 }
6592
6593 SETUP_CMDARG(mvdcmd);
6594 mvdcmd.Arg3 = u32Th;
6595 SET_DECNUM(mvdcmd, u8Idx);
6596 SET_CMD_RET_FALSE(CMD_SYN_THRESHOLD, &mvdcmd);
6597 return TRUE;
6598 }
6599
HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx,MS_U32 u32Th)6600 MS_BOOL HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx, MS_U32 u32Th)
6601 {
6602 MVD_CmdArg mvdcmd;
6603 SET_CMDARG(mvdcmd, u32Th, u8Idx);
6604 SET_CMD_RET_FALSE(CMD_AVSYNC_FREERUN_THRESHOLD, &mvdcmd);
6605 return TRUE;
6606 }
6607
HAL_MVD_ChangeAVsync(MS_U8 u8Idx,MS_BOOL bEnable,MS_U16 u16PTS)6608 MS_BOOL HAL_MVD_ChangeAVsync(MS_U8 u8Idx, MS_BOOL bEnable, MS_U16 u16PTS)
6609 {
6610 MVD_CmdArg mvdcmd;
6611
6612 u16PTS = _MS_TO_90K(u16PTS); //u16PTS ms ==> 90k counter
6613 SETUP_CMDARG(mvdcmd);
6614 mvdcmd.Arg0 = (MS_U8)bEnable;
6615 mvdcmd.Arg1 = 0;
6616 mvdcmd.Arg2 = (MS_U8)(u16PTS&0xff);
6617 mvdcmd.Arg3 = (MS_U8)((u16PTS&0xff00)>>8);
6618 SET_DECNUM(mvdcmd, u8Idx);
6619 SET_CMD_RET_FALSE(CMD_MVD_FAST_INT, &mvdcmd);
6620 return TRUE;
6621 }
6622
HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)6623 MS_BOOL HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)
6624 {
6625 MS_U32 u32IntStat = 0;
6626 MS_BOOL bRet = FALSE;
6627
6628 u32IntStat = HAL_MVD_GetIntState(u8Idx);
6629 if (u32IntStat != 0)
6630 {
6631 bRet = ((u32IntStat&INT_SYN_REP)==INT_SYN_REP) ? TRUE : FALSE;
6632 }
6633 return bRet;
6634 }
6635
HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)6636 MS_BOOL HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)
6637 {
6638 MS_U32 u32IntStat = 0;
6639 MS_BOOL bRet = FALSE;
6640
6641 u32IntStat = HAL_MVD_GetIntState(u8Idx);
6642 if (u32IntStat != 0)
6643 {
6644 bRet = ((u32IntStat&INT_SYN_SKIP)==INT_SYN_SKIP) ? TRUE : FALSE;
6645 }
6646
6647 return bRet;
6648 }
6649
HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)6650 MS_U8 HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)
6651 {
6652 #define MVD_SYNC_DONE 1
6653 if(MVD_GetSyncStat(u8Idx, 1) == MVD_SYNC_DONE)
6654 return 1;
6655 else
6656 return 0xFF;
6657 }
6658
HAL_MVD_GetDispRdy(MS_U8 u8Idx)6659 MS_U8 HAL_MVD_GetDispRdy(MS_U8 u8Idx)
6660 {
6661 if (HAL_MVD_GetPicCounter(u8Idx) > 0)
6662 {
6663 return 1;
6664 }
6665 else
6666 {
6667 return 0;
6668 }
6669 }
6670
HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)6671 MVD_DecStat HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)
6672 {
6673 MVD_CmdArg mvdcmd;
6674 MVD_DecStat stat = E_MVD_STAT_UNKNOWN;
6675
6676 SETUP_CMDARG(mvdcmd);
6677 SET_DECNUM(mvdcmd, u8Idx);
6678 if (HAL_MVD_MVDCommand(CMD_DECODE_STATUS, &mvdcmd) == FALSE)
6679 {
6680 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
6681 return E_MVD_STAT_UNKNOWN;
6682 }
6683
6684 switch(mvdcmd.Arg1)
6685 {
6686 case DEC_STAT_IDLE:
6687 stat = E_MVD_STAT_IDLE;
6688 break;
6689 case DEC_STAT_FIND_SC:
6690 stat = E_MVD_STAT_FIND_STARTCODE;
6691 break;
6692 case DEC_STAT_FIND_SPE_SC:
6693 stat = E_MVD_STAT_FIND_SPECIALCODE;
6694 break;
6695 case DEC_STAT_FIND_FRAMEBUFFER:
6696 stat = E_MVD_STAT_FIND_FRAMEBUFFER;
6697 break;
6698 case DEC_STAT_WAIT_DECODE_DONE:
6699 stat = E_MVD_STAT_WAIT_DECODEDONE;
6700 break;
6701 case DEC_STAT_DECODE_DONE:
6702 stat = E_MVD_STAT_DECODE_DONE;
6703 break;
6704 case DEC_STAT_WAIT_VDFIFO:
6705 stat = E_MVD_STAT_WAIT_VDFIFO;
6706 break;
6707 case DEC_STAT_INIT_SUCCESS:
6708 stat = E_MVD_STAT_INIT_SUCCESS;
6709 break;
6710 default:
6711 break;
6712 }
6713
6714 return stat;
6715 }
6716
HAL_MVD_GetLastCmd(MS_U8 u8Idx)6717 MS_U8 HAL_MVD_GetLastCmd(MS_U8 u8Idx)
6718 {
6719 MVD_CmdArg mvdcmd;
6720 SETUP_CMDARG(mvdcmd);
6721 SET_DECNUM(mvdcmd, u8Idx);
6722 if (HAL_MVD_MVDCommand( CMD_DECODE_STATUS, &mvdcmd ) == FALSE)
6723 {
6724 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
6725 return 0xff;
6726 }
6727
6728 return (mvdcmd.Arg0);
6729 }
6730
HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)6731 MS_U32 HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)
6732 {
6733 MVD_CmdArg mvdcmd;
6734 MS_U32 u32Cnt = 0;
6735
6736 SETUP_CMDARG(mvdcmd);
6737
6738 //To be accurate, it's "VLD byte count", instead of "parser byte count".
6739 mvdcmd.Arg0 = 0x34;
6740 mvdcmd.Arg1 = 0x2;
6741 SET_DECNUM(mvdcmd, u8Idx);
6742 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
6743 {
6744 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail!!\r\n", CMD_RD_IO ) );
6745 return 0;
6746 }
6747 u32Cnt = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
6748 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
6749
6750 //MVD_PRINT(" parser byte count = %lu byte \n", u32Cnt);
6751 return u32Cnt;
6752 }
6753
HAL_MVD_DropErrorFrame(MS_U8 u8Idx,MS_BOOL bDrop)6754 MS_BOOL HAL_MVD_DropErrorFrame(MS_U8 u8Idx, MS_BOOL bDrop)
6755 {
6756 MVD_CmdArg mvdcmd;
6757 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6758
6759 SETUP_CMDARG(mvdcmd);
6760 mvdcmd.Arg1 = (MS_U8)bDrop;
6761 mvdcmd.Arg2 = (MS_U8)pstCtrlCfg->bDropDispfrm;
6762 mvdcmd.Arg3 = (MS_U8)pstCtrlCfg->eFrcMode;
6763 SET_DECNUM(mvdcmd, u8Idx);
6764 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
6765 return TRUE;
6766 }
6767
HAL_MVD_SetDivXCfg(MS_U8 u8Idx,MS_U8 u8MvAdjust,MS_U8 u8IdctSel)6768 void HAL_MVD_SetDivXCfg(MS_U8 u8Idx, MS_U8 u8MvAdjust, MS_U8 u8IdctSel)
6769 {
6770 MVD_CmdArg stCmdArg;
6771
6772 if (FALSE == pMVDHalContext->stCtrlCfg[u8Idx].stDbgModeCfg.bBypassDivxMCPatch)
6773 {
6774 SETUP_CMDARG(stCmdArg);
6775 stCmdArg.Arg0 = u8MvAdjust;
6776 SET_DECNUM(stCmdArg, u8Idx);
6777 if (HAL_MVD_MVDCommand(CMD_DIVX_PATCH, &stCmdArg) == FALSE)
6778 {
6779 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DIVX_PATCH ) );
6780 return;
6781 }
6782 }
6783
6784 SETUP_CMDARG(stCmdArg);
6785 stCmdArg.Arg0 = u8IdctSel;
6786 SET_DECNUM(stCmdArg, u8Idx);
6787 if (HAL_MVD_MVDCommand(CMD_IDCT_SEL, &stCmdArg) == FALSE)
6788 {
6789 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_IDCT_SEL ) );
6790 return;
6791 }
6792
6793 return;
6794 }
6795
6796 #define _IsNotInStreamBuff(x) \
6797 (((x) < pstMemCfg->u32DrvBufSize) || \
6798 ((x) > pstMemCfg->u32BSSize) )
6799
6800 //------------------------------------------------------------------------------
6801 /// Get read pointer in ElementaryStream buffer for SLQ table mode
6802 /// @return -the read pointer
6803 //------------------------------------------------------------------------------
MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)6804 MS_U32 MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)
6805 {
6806 MS_U32 u32Idx;
6807 MS_U32 u32SlqRp = 0, u32SlqRp1 = 0;
6808 MS_U32 u32EsRp;
6809 MS_U32 u32EsStart;
6810 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6811 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6812 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6813
6814 u32SlqRp1 = HAL_MVD_GetSLQReadPtr(u8Idx);
6815
6816 if (u32SlqRp1 == 0)
6817 {
6818 return MVD_U32_MAX;
6819 }
6820 else
6821 {
6822 u32SlqRp = HAL_MVD_Map2DrvSlqTbl(u8Idx, u32SlqRp1);
6823 }
6824
6825 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = u32SlqRp; //update pstSlqTblInfo->pDrvSlqTbl->u32RdPtr
6826
6827 //report (readPtr-1) for HW may still use (readPtr)
6828 if (u32SlqRp > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6829 {
6830 u32Idx = ((u32SlqRp - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
6831 }
6832 else
6833 {
6834 u32Idx = SLQ_ENTRY_MAX - 1;
6835 }
6836 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
6837
6838 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
6839 #if 0
6840 MS_U32 u32EsEnd;
6841 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
6842 MVD_PRINT("GetESReadPtr ES[%lx] Start=0x%lx End=0x%lx u32EsRp=%lx u32SlqRp=%lx\n",
6843 u32Idx, HAL_MVD_MemRead4Byte(u32EsRp), u32EsEnd, u32EsRp, u32SlqRp);
6844 #endif
6845
6846 if ((_IsNotInStreamBuff(u32EsStart)) && (u32EsStart != 0))
6847 { //ESRead is not in BS buffer, so this entry is a divx or dummy pattern.
6848 //Report the last ESRead, instead of this one.
6849 if(curCodecType == E_MVD_CODEC_DIVX311)
6850 {
6851 //update last slq index es end address
6852 if(u32Idx == 0)
6853 {
6854 u32Idx = SLQ_ENTRY_MAX-1;
6855 }
6856 else
6857 {
6858 u32Idx = u32Idx-1;
6859 }
6860 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
6861 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
6862 if(_IsNotInStreamBuff(u32EsStart))
6863 {
6864 return (pstSlqTblInfo->u32PreEsRd);
6865 }
6866 }
6867 else
6868 {
6869 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsRd=0x%lx\n", u32EsStart, pstSlqTblInfo->u32PreEsRd));
6870 return (pstSlqTblInfo->u32PreEsRd);
6871 }
6872 }
6873 pstSlqTblInfo->u32PreEsRd = u32EsStart;
6874
6875 return u32EsStart;
6876 }
6877
6878 //------------------------------------------------------------------------------
6879 /// Get write pointer in ElementaryStream buffer for SLQ table mode
6880 /// @return -the read pointer
6881 //------------------------------------------------------------------------------
MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)6882 MS_U32 MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)
6883 {
6884 MS_U32 u32EsWp;
6885 MS_U32 u32EsEnd;
6886 MS_U32 u32Idx;
6887 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6888 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6889
6890 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6891 {
6892 u32Idx = ((pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
6893 }
6894 else
6895 {
6896 u32Idx = SLQ_ENTRY_MAX - 1;
6897 }
6898 u32EsWp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
6899
6900 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsWp+4);
6901 #if 0
6902 MVD_PRINT("GetESWritePtr[%lx] ES Start=0x%lx End=0x%lx u32EsWp=%lx\n",
6903 (u32EsWp - pstSlqTblInfo->pDrvEsTbl->u32StAdd)/8,
6904 HAL_MVD_MemRead4Byte(u32EsWp), u32EsEnd, u32EsWp);
6905 #endif
6906
6907 if ((_IsNotInStreamBuff(u32EsEnd)) && (u32EsEnd != 0))
6908 { //ESRead is not in BS buffer, so this entry is a divx pattern.
6909 //Report the last ESRead, instead of this one.
6910 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsWr=0x%lx\n", u32EsEnd, pstSlqTblInfo->u32PreEsWr));
6911 return (pstSlqTblInfo->u32PreEsWr);
6912 }
6913 pstSlqTblInfo->u32PreEsWr = u32EsEnd;
6914
6915 return u32EsEnd;
6916 }
6917
6918
HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)6919 MS_U32 HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)
6920 {
6921 MS_U32 u32RdPtr = 0;
6922
6923 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
6924 {
6925 MVD_CmdArg mvdcmd;
6926 SETUP_CMDARG(mvdcmd);
6927 SET_DECNUM(mvdcmd, u8Idx);
6928 if (HAL_MVD_MVDCommand( CMD_SLQ_GET_TBL_RPTR, &mvdcmd ) == FALSE)
6929 {
6930 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SLQ_GET_TBL_RPTR ) );
6931 return 0;
6932 }
6933 u32RdPtr = mvdcmd.Arg0 | (mvdcmd.Arg1<<8) | (mvdcmd.Arg2<<16) | (mvdcmd.Arg3<<24);
6934 }
6935 else
6936 {
6937 u32RdPtr = HAL_MVD_SlqTblProbeRdPtr(u8Idx);
6938 }
6939
6940 //MVD_PRINT("##### HAL_MVD_GetSLQReadPtr 0x%lx\n", readPtr);
6941
6942 if(u32RdPtr == 0)//not start decode yet,MVD return 0
6943 {
6944 u32RdPtr = 0;
6945 }
6946 else
6947 {
6948 u32RdPtr = u32RdPtr << 3;
6949 }
6950
6951 return u32RdPtr;
6952 }
6953
HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx,MS_BOOL bCheckData)6954 MS_BOOL HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx, MS_BOOL bCheckData)
6955 {
6956 MVD_CmdArg mvdcmd;
6957 MS_U32 u32WrPtr;
6958 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6959 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6960 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6961
6962 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
6963 {
6964 //check FW is init success and thus ready to update write pointer
6965 MS_U32 u32TimeCnt;
6966
6967 u32TimeCnt = HAL_MVD_GetTime();
6968 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
6969 {
6970 if (HAL_MVD_GetDecodeStatus(u8Idx) != E_MVD_STAT_IDLE)
6971 {
6972 pstSlqTblInfo->bRdyToFireCmd = TRUE;
6973 MVD_DEBUGVERBAL(MVD_PRINT("time=%ld ms, ", (HAL_MVD_GetTime() - u32TimeCnt)));
6974 break;
6975 }
6976 }
6977 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
6978 {
6979 MVD_DEBUGERROR(MVD_ERR("%s: err timeout(%ld)! stat=0x%x\n", __FUNCTION__,
6980 HAL_MVD_GetTime() - u32TimeCnt, HAL_MVD_GetDecodeStatus(u8Idx)));
6981 return FALSE;
6982 }
6983 else
6984 {
6985 MVD_DEBUGVERBAL(MVD_PRINT("%s: ready to update WrPtr.\n", __FUNCTION__));
6986 }
6987 }
6988
6989 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr < pstSlqTblInfo->pDrvSlqTbl->u32EndAdd);
6990 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
6991 #if SLQ_NEW_PUSH
6992 if((!pstSlqTblInfo->pSlqStatus->bSlqFireRdy)&&pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
6993 {
6994 MVD_DEBUGINFO(MVD_PRINT("**** pstSlqTblInfo->pSlqStatus->bSlqFireRdy is not Ready ** \n"));
6995 return FALSE;
6996 }
6997 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
6998 #endif
6999 if ((bCheckData==TRUE) && (FALSE==pstSlqTblInfo->bSlqTblHasValidData))
7000 {
7001 MVD_DEBUGINFO(MVD_PRINT("**** SlqWrPtr(0x%lx) is not update!(%x, %x) ****\n",
7002 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, bCheckData, pstSlqTblInfo->bSlqTblHasValidData));
7003 return FALSE;
7004 }
7005 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
7006
7007 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
7008 {
7009 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
7010 }
7011 else
7012 {
7013 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7014 }
7015 //MVD_PRINT("%s wPtr = 0x%lx rPtr=0x%lx\n", __FUNCTION__, *pu32WrPtr, HAL_MVD_GetSLQReadPtr(u8Idx));
7016
7017 if (pstCtrlCfg->bSlqTblSync)
7018 {
7019 //Update SLQ table, DivX311 patterns, and dummy patterns to bitstream buffer
7020 MS_U32 u32SrcOffset = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7021 MS_U32 u32SrcAdd = u32SrcOffset;
7022 MS_U32 u32DstAdd = pstMemCfg->u32BSAddr;
7023 MS_U32 u32DstOffset = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
7024 MS_U32 u32TblWr;
7025 //MVD_PRINT("===>offset(Src=0x%lx, Dst=0x%lx)", u32SrcAdd, u32DstAdd);
7026 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
7027 {
7028 u32SrcAdd = u32SrcOffset + pMVDHalContext->stMiuCfg.u32Miu1BaseAddr;
7029 }
7030 //MVD_PRINT(" PA(Src=0x%lx, Dst=0x%lx)", u32SrcAdd, u32DstAdd);
7031
7032 HAL_MVD_CPU_Sync();
7033
7034 BDMA_Result bdmaRlt;
7035
7036 bdmaRlt = MDrv_BDMA_CopyHnd(u32SrcAdd, u32DstAdd, pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType, BDMA_OPCFG_DEF);
7037
7038 if (E_BDMA_OK != bdmaRlt)
7039 {
7040 MVD_DEBUGERROR(MVD_ERR("%s MDrv_BDMA_MemCopy fail ret=%x!\n", __FUNCTION__, bdmaRlt));
7041 }
7042 MVD_DEBUGINFO(MVD_PRINT("SlqWrPtr_BDMA src=0x%lx dst=0x%lx size=0x%lx cpyType=0x%x\n",
7043 u32SrcAdd, u32DstAdd, pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType));
7044
7045 u32TblWr = u32DstOffset + (u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7046 //MVD_PRINT(" wr=0x%lx, tblWr=0x%lx\n", writePtr, u32TblWr);
7047 u32WrPtr = u32TblWr;
7048 }
7049 //MVD_PRINT("wPtr= 0x%lx(0x%lx) rPtr=0x%lx(0x%lx)\n", writePtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
7050 // HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
7051
7052
7053 //writePtrLast[u8Idx] = u32WrPtr;
7054 #if SLQ_NEW_PUSH
7055 if(!pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow && pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7056 {
7057 u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
7058 }
7059 #endif
7060 MS_ASSERT((u32WrPtr%8)==0);
7061 u32WrPtr >>= 3;
7062
7063 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7064 {
7065 SET_CMDARG(mvdcmd, u32WrPtr, u8Idx);
7066 HAL_MVD_CPU_Sync();
7067 SET_CMD_RET_FALSE(CMD_SLQ_UPDATE_TBL_WPTR, &mvdcmd);
7068 }
7069 else
7070 {
7071 HAL_MVD_SlqTblLoadWrPtr(u8Idx, u32WrPtr);
7072 if (HAL_MVD_SlqTblProbeWrPtr(u8Idx) != u32WrPtr)
7073 {
7074 MVD_DEBUGERROR(MVD_ERR("Ooops! SlqWrPtr update fail!!! 0x%lx != 0x%lx\n", HAL_MVD_SlqTblProbeWrPtr(u8Idx), u32WrPtr));
7075 return FALSE;
7076 }
7077 }
7078
7079 return TRUE;
7080 }
7081
HAL_MVD_SetOverflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7082 void HAL_MVD_SetOverflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7083 {
7084 MVD_CmdArg mvdcmd;
7085
7086 MS_ASSERT((u32Threshold%8)==0);
7087 u32Threshold >>= 3;
7088 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7089 if (HAL_MVD_MVDCommand( CMD_DMA_OVFTH, &mvdcmd ) == FALSE)
7090 {
7091 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DMA_OVFTH ) );
7092 return;
7093 }
7094 return;
7095 }
7096
7097 //------------------------------------------------------------------------------
7098 /// Set bitstream buffer underflow threshold
7099 /// @return -none
7100 //------------------------------------------------------------------------------
HAL_MVD_SetUnderflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7101 void HAL_MVD_SetUnderflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7102 {
7103 MVD_CmdArg mvdcmd;
7104
7105 MS_ASSERT((u32Threshold%8)==0);
7106 u32Threshold >>= 3;
7107 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7108 if (HAL_MVD_MVDCommand( CMD_DMA_UNFTH, &mvdcmd ) == FALSE)
7109 {
7110 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_DMA_UNFTH ) );
7111 return;
7112 }
7113 return;
7114 }
7115
HAL_MVD_GenPattern(MS_U8 u8Idx,MVD_PatternType ePattern,MS_PHYADDR u32PAddr,MS_U32 * pu32Size)7116 MS_BOOL HAL_MVD_GenPattern(MS_U8 u8Idx, MVD_PatternType ePattern, MS_PHYADDR u32PAddr, MS_U32* pu32Size)
7117 {
7118 MS_U8* pu8DummyData = NULL;
7119 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7120
7121 if ((!pu32Size) || (*pu32Size < SKIP_PATTERN_SIZE))
7122 {
7123 return FALSE;
7124 }
7125
7126 pu8DummyData = (MS_U8*) HAL_MVD_PA2NonCacheSeg(u32PAddr);
7127
7128 if(pu8DummyData == NULL)
7129 {
7130 MVD_ERR("%s %d NULL Address\n",__FILE__,__LINE__);
7131 return FALSE;
7132 }
7133
7134 switch (ePattern)
7135 {
7136 case E_MVD_PATTERN_FLUSH:
7137 #if 0
7138 *pu8DummyData = SKIP_PATTERN_0;
7139 pu8DummyData++;
7140 *pu8DummyData = SKIP_PATTERN_1;
7141 *pu32Size = SKIP_PATTERN_SIZE;
7142 #else
7143 pu8DummyData[0] = SKIP_PATTERN_0&0xff;
7144 pu8DummyData[1] = (SKIP_PATTERN_0>>8)&0xff;
7145 pu8DummyData[2] = (SKIP_PATTERN_0>>16)&0xff;
7146 pu8DummyData[3] = (SKIP_PATTERN_0>>24)&0xff;
7147
7148 pu8DummyData[4] = SKIP_PATTERN_1&0xff;
7149 pu8DummyData[5] = (SKIP_PATTERN_1>>8)&0xff;
7150 pu8DummyData[6] = (SKIP_PATTERN_1>>16)&0xff;
7151 pu8DummyData[7] = (SKIP_PATTERN_1>>24)&0xff;
7152
7153 *pu32Size = SKIP_PATTERN_SIZE;
7154 #endif
7155 break;
7156 case E_MVD_PATTERN_FILEEND:
7157 if ((E_MVD_CODEC_FLV == curCodecType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == curCodecType))
7158 {
7159 #if 0
7160 *pu8DummyData = FLV_PATTERN;
7161 pu8DummyData++;
7162 *pu8DummyData = 0xffffffff;
7163 pu8DummyData++;
7164 *pu8DummyData = END_PATTERN_1;
7165 pu8DummyData++;
7166 *pu8DummyData = END_PATTERN_2;
7167 pu8DummyData++;
7168 *pu8DummyData = END_PATTERN_3;
7169 #else
7170 pu8DummyData[0] = FLV_PATTERN&0xff;
7171 pu8DummyData[1] = (FLV_PATTERN>>8)&0xff;
7172 pu8DummyData[2] = (FLV_PATTERN>>16)&0xff;
7173 pu8DummyData[3] = (FLV_PATTERN>>24)&0xff;
7174
7175 pu8DummyData[4] = 0xffffffff&0xff;
7176 pu8DummyData[5] = (0xffffffff>>8)&0xff;
7177 pu8DummyData[6] = (0xffffffff>>16)&0xff;
7178 pu8DummyData[7] = (0xffffffff>>24)&0xff;
7179
7180 pu8DummyData[8] = END_PATTERN_1&0xff;
7181 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
7182 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
7183 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
7184
7185 pu8DummyData[12] = END_PATTERN_2&0xff;
7186 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
7187 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
7188 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
7189
7190 pu8DummyData[16] = END_PATTERN_3&0xff;
7191 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
7192 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
7193 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
7194
7195 #endif
7196
7197 }
7198 else if (E_MVD_CODEC_DIVX311 == curCodecType)
7199 {
7200 #if 0
7201 *pu8DummyData = DIVX_PATTERN;
7202 pu8DummyData++;
7203 *pu8DummyData = 0xffffffff;
7204 pu8DummyData++;
7205 *pu8DummyData = END_PATTERN_1;
7206 pu8DummyData++;
7207 *pu8DummyData = END_PATTERN_2;
7208 pu8DummyData++;
7209 *pu8DummyData = END_PATTERN_3;
7210 #else
7211 pu8DummyData[0] = DIVX_PATTERN&0xff;
7212 pu8DummyData[1] = (DIVX_PATTERN>>8)&0xff;
7213 pu8DummyData[2] = (DIVX_PATTERN>>16)&0xff;
7214 pu8DummyData[3] = (DIVX_PATTERN>>24)&0xff;
7215
7216 pu8DummyData[4] = 0xffffffff&0xff;
7217 pu8DummyData[5] = (0xffffffff>>8)&0xff;
7218 pu8DummyData[6] = (0xffffffff>>16)&0xff;
7219 pu8DummyData[7] = (0xffffffff>>24)&0xff;
7220
7221 pu8DummyData[8] = END_PATTERN_1&0xff;
7222 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
7223 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
7224 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
7225
7226 pu8DummyData[12] = END_PATTERN_2&0xff;
7227 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
7228 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
7229 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
7230
7231 pu8DummyData[16] = END_PATTERN_3&0xff;
7232 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
7233 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
7234 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
7235 #endif
7236 }
7237 else if ((E_MVD_CODEC_MPEG2 == curCodecType)||(E_MVD_CODEC_MPEG4 == curCodecType))
7238 {
7239 #if 0
7240 *pu8DummyData = MPEG_PATTERN_0;
7241 pu8DummyData++;
7242 *pu8DummyData = END_PATTERN_1;
7243 pu8DummyData++;
7244 *pu8DummyData = END_PATTERN_2;
7245 pu8DummyData++;
7246 *pu8DummyData = END_PATTERN_3;
7247 #else
7248 pu8DummyData[0] = MPEG_PATTERN_0&0xff;
7249 pu8DummyData[1] = (MPEG_PATTERN_0>>8)&0xff;
7250 pu8DummyData[2] = (MPEG_PATTERN_0>>16)&0xff;
7251 pu8DummyData[3] = (MPEG_PATTERN_0>>24)&0xff;
7252
7253 pu8DummyData[4] = END_PATTERN_1&0xff;
7254 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
7255 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
7256 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
7257
7258 pu8DummyData[8] = END_PATTERN_2&0xff;
7259 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
7260 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
7261 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
7262
7263 pu8DummyData[12] = END_PATTERN_3&0xff;
7264 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
7265 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
7266 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
7267 #endif
7268 }
7269 else
7270 {
7271 #if 0
7272 *pu8DummyData = END_PATTERN_0;
7273 pu8DummyData++;
7274 *pu8DummyData = END_PATTERN_1;
7275 pu8DummyData++;
7276 *pu8DummyData = END_PATTERN_2;
7277 pu8DummyData++;
7278 *pu8DummyData = END_PATTERN_3;
7279 #else
7280 pu8DummyData[0] = END_PATTERN_0&0xff;
7281 pu8DummyData[1] = (END_PATTERN_0>>8)&0xff;
7282 pu8DummyData[2] = (END_PATTERN_0>>16)&0xff;
7283 pu8DummyData[3] = (END_PATTERN_0>>24)&0xff;
7284
7285 pu8DummyData[4] = END_PATTERN_1&0xff;
7286 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
7287 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
7288 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
7289
7290 pu8DummyData[8] = END_PATTERN_2&0xff;
7291 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
7292 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
7293 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
7294
7295 pu8DummyData[12] = END_PATTERN_3&0xff;
7296 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
7297 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
7298 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
7299 #endif
7300 }
7301 *pu32Size = 16;
7302 break;
7303 default:
7304 break;
7305 }
7306
7307 return TRUE;
7308 }
7309
7310
7311
HAL_MVD_DbgDump(MS_U8 u8Idx)7312 void HAL_MVD_DbgDump(MS_U8 u8Idx)
7313 {
7314 MS_U32 u32VdCnt=0;
7315 //static MS_U32 u32PreVdCnt[MAX_DEC_NUM]= {0, 0};
7316 MS_U32 u32ErrCnt=0;
7317 //static MS_U32 u32PreErrCnt[MAX_DEC_NUM]= {0, 0};
7318 //static MS_BOOL b1stDump[MAX_DEC_NUM]= {TRUE, TRUE};
7319 MVD_FrmInfo stFrm = {_INIT_ADDR, _INIT_ADDR, _INIT_TIMESTAMP, _INIT_ID,
7320 _INIT_ID, _INIT_LEN, _INIT_LEN, _INIT_LEN, 0xff, E_MVD_PIC_UNKNOWN};
7321 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
7322 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7323
7324 if (pMVDHalContext->b1stDump[u8Idx])
7325 {
7326 MVD_FWCfg* pFwCfg = NULL;
7327 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
7328 MVD_PRINT("curDisablePESParsing = %d\n", pFwCfg->bDisablePESParsing);
7329 pMVDHalContext->b1stDump[u8Idx] = FALSE;
7330 }
7331
7332 u32VdCnt = HAL_MVD_GetParserByteCnt(u8Idx);
7333 u32ErrCnt= HAL_MVD_GetVldErrCount(u8Idx);
7334 MVD_PRINT("input: vfifo=%d(full=%d,empty=%d), vdCnt=%ld(%ld), vldErr=%ld(%ld); ",
7335 HAL_MVD_RegReadByte(0x1564)>>6, HAL_MVD_RegReadByte(0x1564)&0x20,
7336 HAL_MVD_RegReadByte(0x1564)&0x10, u32VdCnt, (u32VdCnt-pMVDHalContext->u32PreVdCnt[u8Idx]),
7337 u32ErrCnt, (u32ErrCnt-pMVDHalContext->u32PreErrCnt[u8Idx]));
7338 pMVDHalContext->u32PreVdCnt[u8Idx] = u32VdCnt;
7339 pMVDHalContext->u32PreErrCnt[u8Idx] = u32ErrCnt;
7340
7341 MVD_PRINT("state: fw=0x%x, lastCmd=0x%x, pc=0x%lx\n",
7342 HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx), HAL_VPU_EX_GetProgCnt());
7343 MVD_PRINT("cnt: dec=%ld, skip=%ld, drop=%ld\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetSkipPicCounter(u8Idx), 0x0UL);
7344 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE, &stFrm);
7345 MVD_PRINT("frm Dec Y=%lx UV=%lx Pitch=%x; ", stFrm.u32LumaAddr, stFrm.u32ChromaAddr, stFrm.u16Pitch);
7346 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY, &stFrm);
7347 MVD_PRINT("Disp Y=%lx UV=%lx Pitch=%x\n", stFrm.u32LumaAddr, stFrm.u32ChromaAddr, stFrm.u16Pitch);
7348 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
7349 {
7350 MVD_PRINT("fe=%lx, rd=%lx(%lx), wr=%lx, empty=%lx; ", pstSlqTblInfo->u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
7351 HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty);
7352 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", MVD_GetSlqTblESReadPtr(u8Idx), MVD_GetSlqTblESWritePtr(u8Idx));
7353 }
7354 else if (curSrcMode == E_MVD_TS_FILE_MODE)
7355 {
7356 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", HAL_MVD_GetTsFileESReadPtr(u8Idx), HAL_MVD_GetTsFileESWritePtr(u8Idx));
7357 }
7358 }
7359
7360 #ifdef MS_DEBUG
7361 #define _STRINGIFY_HAL_SID(x) \
7362 (x==E_HAL_MVD_MAIN_STREAM0)?"E_HAL_MVD_MAIN_STREAM0": \
7363 ((x==E_HAL_MVD_SUB_STREAM0)?"E_HAL_MVD_SUB_STREAM0":"E_HAL_MVD_STREAM_NONE")
MVD_DumpMVDStream(void)7364 void MVD_DumpMVDStream(void)
7365 {
7366 //if (_u8HalDbgLevel == 0) return;
7367 MS_U8 i = 0;
7368 for (i=0; i< MAX_DEC_NUM; i++)
7369 {
7370 MVD_DEBUGINFO(MVD_PRINT("[%d] eStreamId=0x%x(%s) bUsed=0x%x\n", i, pMVDHalContext->_stMVDStream[i].eStreamId,
7371 _STRINGIFY_HAL_SID(pMVDHalContext->_stMVDStream[i].eStreamId), pMVDHalContext->_stMVDStream[i].bUsed));
7372 }
7373 }
7374 #endif
HAL_MVD_Init_Share_Mem(void)7375 MS_BOOL HAL_MVD_Init_Share_Mem(void)
7376 {
7377 #if (defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS))
7378 #if !defined(SUPPORT_X_MODEL_FEATURE)
7379 MS_U32 u32ShmId;
7380 MS_U32 u32Addr;
7381 MS_U32 u32BufSize;
7382
7383
7384 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux MVD HAL",
7385 sizeof(MVD_Hal_CTX),
7386 &u32ShmId,
7387 &u32Addr,
7388 &u32BufSize,
7389 MSOS_SHM_QUERY))
7390 {
7391 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVD HAL",
7392 sizeof(MVD_Hal_CTX),
7393 &u32ShmId,
7394 &u32Addr,
7395 &u32BufSize,
7396 MSOS_SHM_CREATE))
7397 {
7398 printf("[%s]SHM allocation failed!!! use global structure instead!!!\n",__FUNCTION__);
7399 if(pMVDHalContext == NULL)
7400 {
7401 pMVDHalContext = &gMVDHalContext;
7402 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
7403 HAL_MVD_Context_Init();
7404 printf("[%s]Global structure init Success!!!\n",__FUNCTION__);
7405 }
7406 else
7407 {
7408 printf("[%s]Global structure exists!!!\n",__FUNCTION__);
7409 }
7410 //return FALSE;
7411 }
7412 else
7413 {
7414 memset((MS_U8*)u32Addr,0,sizeof(MVD_Hal_CTX));
7415 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for one process
7416 HAL_MVD_Context_Init();
7417 }
7418 }
7419 else
7420 {
7421 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for another process
7422 }
7423 #else
7424 if(pMVDHalContext == NULL)
7425 {
7426 pMVDHalContext = &gMVDHalContext;
7427 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
7428 HAL_MVD_Context_Init();
7429 }
7430 #endif
7431 OSAL_MVD_MutexInit();
7432 #else
7433 if(pMVDHalContext == NULL)
7434 {
7435 pMVDHalContext = &gMVDHalContext;
7436 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
7437 HAL_MVD_Context_Init();
7438 }
7439 #endif
7440
7441
7442 return TRUE;
7443
7444 }
7445
7446 //------------------------------------------------------------------------------
HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)7447 HAL_MVD_StreamId HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)
7448 {
7449 MS_U32 i = 0;
7450
7451 #ifdef MS_DEBUG
7452 MVD_DumpMVDStream();
7453 #endif
7454 if (eStreamType == E_HAL_MVD_MAIN_STREAM)
7455 {
7456 for (i = 0;
7457 i <
7458 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
7459 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
7460 {
7461 if ((E_HAL_MVD_MAIN_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
7462 {
7463 return pMVDHalContext->_stMVDStream[i].eStreamId;
7464 }
7465 }
7466 }
7467 else if (eStreamType == E_HAL_MVD_SUB_STREAM)
7468 {
7469 for (i = 0;
7470 i <
7471 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
7472 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
7473 {
7474 if ((E_HAL_MVD_SUB_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
7475 {
7476 return pMVDHalContext->_stMVDStream[i].eStreamId;
7477 }
7478 }
7479 }
7480
7481 return E_HAL_MVD_STREAM_NONE;
7482 }
7483
HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)7484 MS_U8 HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)
7485 {
7486 MS_U8 u8Idx = 0;
7487 switch (eSID)
7488 {
7489 case E_HAL_MVD_MAIN_STREAM0:
7490 u8Idx = 0;
7491 break;
7492 case E_HAL_MVD_SUB_STREAM0:
7493 u8Idx = 1;
7494 break;
7495 #if 0
7496 case E_HAL_MVD_SUB_STREAM1:
7497 u8Idx = 2;
7498 break;
7499 #endif
7500 default:
7501 u8Idx = 0;
7502 break;
7503 }
7504 return u8Idx;
7505 }
7506
HAL_MVD_ReleaseFdMask(MS_U8 u8Idx,MS_BOOL bRls)7507 MS_BOOL HAL_MVD_ReleaseFdMask(MS_U8 u8Idx, MS_BOOL bRls)
7508 {
7509 MVD_CmdArg mvdcmd;
7510
7511 SETUP_CMDARG(mvdcmd);
7512 mvdcmd.Arg0 = bRls; //1 to release the fd mask
7513 MVD_DEBUGINFO(MVD_PRINT("%s: release=0x%x\n", __FUNCTION__, bRls));
7514 SET_DECNUM(mvdcmd, u8Idx);
7515 SET_CMD_RET_FALSE(CMD_UPDATE_FRAME, &mvdcmd);
7516
7517 return TRUE;
7518 }
7519
HAL_MVD_ParserRstDone(MS_U8 u8Idx,MS_BOOL bEnable)7520 MS_BOOL HAL_MVD_ParserRstDone(MS_U8 u8Idx, MS_BOOL bEnable)
7521 {
7522 #define PARSER_RST_TIMEOUT 0x40000
7523 MS_U32 u32TimeOut = 0;
7524 MVD_CmdArg mvdcmd;
7525
7526 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_PARSER_RST);
7527
7528 SETUP_CMDARG(mvdcmd);
7529 mvdcmd.Arg1 = bEnable;
7530 SET_DECNUM(mvdcmd, u8Idx);
7531 SET_CMD_RET_FALSE(CMD_PTS_TBL_RESET, &mvdcmd);
7532
7533 while ((TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PARSER_RST)) && (u32TimeOut < PARSER_RST_TIMEOUT))
7534 {
7535 u32TimeOut++;
7536 }
7537 if (u32TimeOut >= PARSER_RST_TIMEOUT)
7538 {
7539 MVD_DEBUGERROR( MVD_ERR( "Ctrl: 0x%x fail timeout!!\r\n", CMD_PTS_TBL_RESET ) );
7540 return FALSE;
7541 }
7542 return TRUE;
7543 }
7544
HAL_MVD_FlushPTSBuf(MS_U8 u8Idx,MS_BOOL bEnable)7545 MS_BOOL HAL_MVD_FlushPTSBuf(MS_U8 u8Idx, MS_BOOL bEnable)
7546 {
7547 MVD_CmdArg mvdcmd;
7548
7549 SETUP_CMDARG(mvdcmd);
7550 mvdcmd.Arg0 = bEnable;
7551 if (HAL_MVD_MVDCommand( CMD_SEND_UNI_PTS, &mvdcmd ) == FALSE)
7552 {
7553 MVD_DEBUGERROR( MVD_ERR( "Command: 0x%x fail!!\r\n", CMD_SEND_UNI_PTS ) );
7554 return FALSE;
7555 }
7556 return TRUE;
7557 }
7558
7559
7560
HAL_MVD_GetSLQNum(MS_U8 u8Idx)7561 MS_U32 HAL_MVD_GetSLQNum(MS_U8 u8Idx)
7562 {
7563 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7564 MS_U32 u32RdPtr = HAL_MVD_GetSLQReadPtr(u8Idx);
7565 MS_U32 u32Diff = 0;
7566
7567 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > u32RdPtr)
7568 {
7569 u32Diff = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - u32RdPtr;
7570 }
7571 else
7572 {
7573 u32Diff = SLQ_TBL_SIZE - (u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
7574 }
7575
7576 // MVD_PRINT("slq wptr = 0x%lx, rptr = 0x%lx\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32RdPtr);
7577
7578 return (u32Diff/SLQ_ENTRY_LEN);
7579 }
7580
HAL_MVD_GetDispQNum(MS_U8 u8Idx)7581 MS_U32 HAL_MVD_GetDispQNum(MS_U8 u8Idx)
7582 {
7583 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPQ_NUM, sizeof(MS_U8));
7584 }
7585
HAL_MVD_SetAutoMute(MS_U8 u8Idx,MS_BOOL bEn)7586 MS_BOOL HAL_MVD_SetAutoMute(MS_U8 u8Idx, MS_BOOL bEn)
7587 {
7588 MVD_CmdArg mvdcmd;
7589
7590 SETUP_CMDARG(mvdcmd);
7591 mvdcmd.Arg0 = bEn; //1 to enable
7592 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
7593 SET_DECNUM(mvdcmd, u8Idx);
7594 SET_CMD_RET_FALSE(CMD_ENABLE_AUTO_MUTE, &mvdcmd);
7595
7596 return TRUE;
7597 }
7598
HAL_MVD_SetVSizeAlign(MS_U8 u8Idx,MS_BOOL bEn)7599 MS_BOOL HAL_MVD_SetVSizeAlign(MS_U8 u8Idx, MS_BOOL bEn)
7600 {
7601 MVD_CmdArg mvdcmd;
7602
7603 SETUP_CMDARG(mvdcmd);
7604 mvdcmd.Arg0 = bEn; //1 to enable VSize alignment to 4x
7605 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
7606 SET_DECNUM(mvdcmd, u8Idx);
7607 SET_CMD_RET_FALSE(CMD_FORCE_ALIGN_VSIZE, &mvdcmd);
7608
7609 return TRUE;
7610 }
7611
7612 #define MVD_HW_MAX_PIXEL (1920*1088*31000ULL) //FullHD@30p
HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize,MS_U16 u16VSize,MS_U32 u32FrmRate)7613 MS_BOOL HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate)
7614 {
7615 MVD_DEBUGINFO(MVD_PRINT("%s w:%d, h:%d, fr:%ld, MAX:%lld\n", __FUNCTION__, u16HSize, u16VSize, u32FrmRate, MVD_HW_MAX_PIXEL));
7616 return (((MS_U64)u16HSize*(MS_U64)u16VSize*(MS_U64)u32FrmRate) <= MVD_HW_MAX_PIXEL);
7617 }
7618
7619 //------------------------------------------------------------------------------
7620 /// Wait MVD generate CRC done or timeout
7621 /// @return -MVD generate CRC done or timeout
7622 //------------------------------------------------------------------------------
_HAL_MVD_CrcTimeOut(MS_U8 u8Idx)7623 MS_BOOL _HAL_MVD_CrcTimeOut(MS_U8 u8Idx)
7624 {
7625 MS_U32 i;
7626 MS_U32 u32StartTime = MsOS_GetSystemTime();
7627
7628 for ( i = 0; i < MVD_PollingTimes; i++ )
7629 {
7630 ///- wait until MVD generate CRC done or timeout
7631 if ( ( HAL_MVD_RegReadByte(MVD_CRC_CTL) & MVD_CRC_CTL_DONE ) == MVD_CRC_CTL_DONE )
7632 {
7633 return FALSE;
7634 }
7635
7636 if ((TRUE == pMVDHalContext->bStopped[u8Idx]) || ((MsOS_GetSystemTime()-u32StartTime)>1300))
7637 {
7638 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%ld)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
7639 return TRUE;
7640 }
7641
7642 }
7643 MVD_DEBUGERROR( MVD_ERR("_HAL_MVD_CrcTimeOut=%lx\n", i) );
7644 return TRUE;
7645 }
7646
HAL_MVD_GetCrcValue(MS_U8 u8Idx,MVD_CrcIn * pCrcIn,MVD_CrcOut * pCrcOut)7647 E_MVD_Result HAL_MVD_GetCrcValue(MS_U8 u8Idx, MVD_CrcIn *pCrcIn, MVD_CrcOut *pCrcOut)
7648 {
7649 E_MVD_Result eRet = E_MVD_RET_OK;
7650 MS_U32 u32tmp = 0;
7651
7652 OSAL_MVD_LockHwMutex();
7653
7654 MVD_DEBUGINFO(MVD_PRINT("%s width=0x%lx, height=0x%lx, pitch=0x%lx, luma=0x%lx, chroma=0x%lx\n",
7655 __FUNCTION__, pCrcIn->u32HSize, pCrcIn->u32VSize, pCrcIn->u32Strip, pCrcIn->u32YStartAddr, pCrcIn->u32UVStartAddr));
7656
7657 //Set generate CRC value
7658 u32tmp = ((pCrcIn->u32HSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
7659 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE, u32tmp & 0xf0);
7660 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE+1, (u32tmp >> 8) & 0x3f);
7661
7662 u32tmp = ((pCrcIn->u32VSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
7663 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE, u32tmp & 0xff);
7664 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE+1, (u32tmp >> 8) & 0xff);
7665
7666 u32tmp = (pCrcIn->u32Strip) >> 3;
7667 HAL_MVD_RegWriteByte(MVD_CRC_STRIP, u32tmp & 0xff);
7668 HAL_MVD_RegWriteByte((MVD_CRC_STRIP+1), (u32tmp >> 8) & 0xff);
7669
7670 u32tmp = (pCrcIn->u32YStartAddr) >> 3;
7671 HAL_MVD_RegWrite4Byte(MVD_CRC_Y_START, u32tmp & MVD_CRC_Y_START_LEN);
7672
7673 u32tmp = (pCrcIn->u32UVStartAddr) >> 3;
7674 HAL_MVD_RegWrite4Byte(MVD_CRC_UV_START, u32tmp & MVD_CRC_UV_START_LEN);
7675
7676 //Fire
7677 HAL_MVD_RegWriteBit(MVD_CRC_CTL, 1, MVD_CRC_CTL_FIRE);
7678
7679 //Check CRC done
7680 if ( _HAL_MVD_CrcTimeOut(u8Idx) == TRUE )
7681 {
7682 eRet = E_MVD_RET_TIME_OUT;
7683 goto _CRC_DONE;
7684 }
7685
7686 //Get CRC value
7687 pCrcOut->u32YCrc = HAL_MVD_RegReadByte(MVD_CRC_Y_L) |
7688 (HAL_MVD_RegReadByte(MVD_CRC_Y_L+1) << 8) |
7689 (HAL_MVD_RegReadByte(MVD_CRC_Y_H) <<16) |
7690 (HAL_MVD_RegReadByte(MVD_CRC_Y_H+1) <<24);
7691
7692 pCrcOut->u32UVCrc = HAL_MVD_RegReadByte(MVD_CRC_UV_L) |
7693 (HAL_MVD_RegReadByte(MVD_CRC_UV_L+1) << 8) |
7694 (HAL_MVD_RegReadByte(MVD_CRC_UV_H) <<16) |
7695 (HAL_MVD_RegReadByte(MVD_CRC_UV_H+1) <<24);
7696
7697 MVD_DEBUGINFO(MVD_PRINT("%s Y=0x%lx, UV=0x%lx\n", __FUNCTION__, pCrcOut->u32YCrc, pCrcOut->u32UVCrc));
7698
7699 _CRC_DONE:
7700 OSAL_MVD_UnlockHwMutex();
7701 return eRet;
7702 }
7703
HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx,MS_BOOL bEn)7704 MS_BOOL HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx, MS_BOOL bEn)
7705 {
7706 MVD_CmdArg mvdcmd;
7707
7708 SETUP_CMDARG(mvdcmd);
7709 mvdcmd.Arg0 = bEn;
7710 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
7711 SET_DECNUM(mvdcmd, u8Idx);
7712 SET_CMD_RET_FALSE(CMD_SUSPEND_DS, &mvdcmd);
7713
7714 return TRUE;
7715 }
7716
HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)7717 MS_U8 HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)
7718 {
7719 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_SUSPEND_DS, sizeof(MS_U8));
7720 }
7721
HAL_MVD_GetDivxVer(MS_U8 u8Idx)7722 MS_U32 HAL_MVD_GetDivxVer(MS_U8 u8Idx)
7723 {
7724 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DIVX_VER_5X, sizeof(MS_U32));
7725 }
7726
HAL_MVD_SetIdctMode(MS_U8 u8Idx,MS_U8 u8Mode)7727 MS_BOOL HAL_MVD_SetIdctMode(MS_U8 u8Idx, MS_U8 u8Mode)
7728 {
7729 MVD_CmdArg mvdcmd;
7730
7731 SETUP_CMDARG(mvdcmd);
7732 mvdcmd.Arg0 = u8Mode;
7733 SET_DECNUM(mvdcmd, u8Idx);
7734
7735 MVD_DEBUGINFO(MVD_PRINT("%s CMD_IDCT_SEL arg0=%x)\n", __FUNCTION__, u8Mode));
7736 SET_CMD_RET_FALSE(CMD_IDCT_SEL, &mvdcmd);
7737
7738 return TRUE;
7739 }
7740
7741
HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)7742 E_MVD_Result HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)
7743 {
7744 MS_U32 u32MVDClockType = 0, u32MVD2ClockType = 0;
7745
7746 MVD_DEBUGVERBAL(MVD_PRINT("mvd clock setting %d\n", eClockSpeed));
7747
7748 switch (eClockSpeed)
7749 {
7750 case E_HAL_MVD_EX_CLOCK_SPEED_HIGHEST:
7751 u32MVDClockType = CKG_MVD_172MHZ;
7752 u32MVD2ClockType = CKG_MVD2_172MHZ;
7753 break;
7754 case E_HAL_MVD_EX_CLOCK_SPEED_HIGH:
7755 u32MVDClockType = CKG_MVD_160MHZ;
7756 u32MVD2ClockType = CKG_MVD2_160MHZ;
7757 break;
7758 case E_HAL_MVD_EX_CLOCK_SPEED_MEDIUM:
7759 u32MVDClockType = CKG_MVD_144MHZ;
7760 u32MVD2ClockType = CKG_MVD2_144MHZ;
7761 break;
7762 case E_HAL_MVD_EX_CLOCK_SPEED_LOW:
7763 u32MVDClockType = CKG_MVD_123MHZ;
7764 u32MVD2ClockType = CKG_MVD2_123MHZ;
7765 break;
7766 case E_HAL_MVD_EX_CLOCK_SPEED_LOWEST:
7767 u32MVDClockType = CKG_MVD_123MHZ;
7768 u32MVD2ClockType = CKG_MVD2_123MHZ;
7769 break;
7770 case E_HAL_MVD_EX_CLOCK_SPEED_DEFAULT:
7771 u32MVDClockType = CKG_MVD_172MHZ;
7772 u32MVD2ClockType = CKG_MVD2_172MHZ;
7773 break;
7774 default:
7775 MVD_DEBUGERROR(MVD_ERR("mvd clock setting is wrong(%d)\n", eClockSpeed));
7776 return E_MVD_RET_FAIL;
7777 break;
7778 }
7779
7780 if((pMVDHalContext->_eMVDClockSpeed != eClockSpeed)
7781 && (TRUE == HAL_VPU_EX_MVDInUsed()))
7782 {
7783 MVD_DEBUGERROR(MVD_ERR("mvd or hvd is running, cannot preset mvd clock\n"));
7784 return E_MVD_RET_FAIL;
7785 }
7786
7787 pMVDHalContext->_eMVDClockSpeed = eClockSpeed;
7788 pMVDHalContext->_u32MVDClockType = u32MVDClockType;
7789 pMVDHalContext->_u32MVD2ClockType = u32MVD2ClockType;
7790
7791 return E_MVD_RET_OK;
7792 }
7793
7794
HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)7795 MS_BOOL HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)
7796 {
7797 MS_BOOL bAVSyncOn = FALSE;
7798 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7799 if (pCtrlCfg)
7800 {
7801 bAVSyncOn = pCtrlCfg->bAVSyncOn;
7802 }
7803
7804 return bAVSyncOn;
7805 }
7806
HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx,MS_U8 bEnable)7807 MS_BOOL HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx, MS_U8 bEnable)
7808 {
7809 MVD_CmdArg mvdcmd;
7810
7811 SETUP_CMDARG(mvdcmd);
7812 mvdcmd.Arg0 = bEnable;
7813 SET_DECNUM(mvdcmd, u8Idx);
7814
7815 MVD_DEBUGINFO(printf("%s CMD_PUSH_FIRST_FRAME_DISP arg0=%x)\n", __FUNCTION__, bEnable));
7816 SET_CMD_RET_FALSE(CMD_PUSH_FIRST_FRAME_DISP, &mvdcmd);
7817
7818 return TRUE;
7819 }
7820
HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)7821 E_MVD_Result HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)
7822 {
7823 MVD_CmdArg mvdcmd;
7824
7825 SETUP_CMDARG(mvdcmd);
7826 mvdcmd.Arg0 = L_WORD(u32Para); // for set the XC diff_field_number
7827 mvdcmd.Arg1 = H_WORD(u32Para); // for set XC UCNR diff field no
7828 SET_DECNUM(mvdcmd, u8Idx);
7829
7830 SET_CMD_RET_FALSE(CMD_XC_LOW_DELAY_PARA, &mvdcmd);
7831
7832 return TRUE;
7833 }
7834
HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)7835 MS_U8 HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)
7836 {
7837 return (MS_U8)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CURRENT_ES_BUFFER_STATUS, sizeof(MS_U8)));
7838 }
7839
HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx,MS_BOOL bEn,MS_U8 top_bottom)7840 MS_BOOL HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx, MS_BOOL bEn,MS_U8 top_bottom)
7841 {
7842 MVD_CmdArg mvdcmd;
7843
7844 SETUP_CMDARG(mvdcmd);
7845 mvdcmd.Arg2 = bEn;
7846 mvdcmd.Arg3 = top_bottom;
7847 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x,top_bottom=%x\n", __FUNCTION__, bEn,top_bottom));
7848 SET_DECNUM(mvdcmd, u8Idx);
7849 SET_CMD_RET_FALSE(CMD_FP_FILTER, &mvdcmd);
7850
7851 return TRUE;
7852 }
7853
7854
HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx,MS_U32 u32base,MS_BOOL bsel)7855 MS_BOOL HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx, MS_U32 u32base, MS_BOOL bsel)
7856 {
7857
7858 bSHMMiuSel= bsel;
7859 if(u32base == MVD_U32_MAX || u8Idx >= MAX_DEC_NUM)
7860 {
7861 return FALSE;
7862 }
7863 else
7864 {
7865 u32SharememoryBase[u8Idx] = u32base - MVD_FW_CODE_LEN;
7866 return TRUE;
7867 }
7868 }
7869
HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx,MS_U32 * u32base)7870 MS_BOOL HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx, MS_U32 *u32base)
7871 {
7872 *u32base=u32SharememoryBase[u8Idx];
7873 return TRUE;
7874 }
7875
HAL_MVD_Support2ndMVOPInterface(void)7876 MS_BOOL HAL_MVD_Support2ndMVOPInterface(void)
7877 {
7878 return FALSE;
7879 }
7880
7881
7882 #define CMD_CC_ENABLE_EXTERNAL_BUFFER 0xB3 //wait for fw release to remove
HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx,MS_U32 u32base,MS_U8 u8size,MS_U8 cc_type)7883 MS_BOOL HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx, MS_U32 u32base, MS_U8 u8size, MS_U8 cc_type)
7884 {
7885 MVD_CmdArg mvdcmd;
7886 MS_U32 u32cc_size=0;
7887 SETUP_CMDARG(mvdcmd);
7888 if(u8size !=0 )
7889 {
7890 mvdcmd.Arg0 = TRUE; //enable
7891 }
7892 else
7893 {
7894 mvdcmd.Arg0 = FALSE; // disable
7895 }
7896 mvdcmd.Arg1 = cc_type; //608->1,708->0
7897
7898 SET_DECNUM(mvdcmd, u8Idx);
7899 SET_CMD_RET_FALSE(CMD_CC_ENABLE_EXTERNAL_BUFFER, &mvdcmd);
7900
7901 u32base *= (1<<10); //unit is bytes
7902 u32cc_size = u8size * (1<<10); //unit is bytes
7903
7904 if (pMVDHalContext->stMiuCfg.bFWMiuSel == MIU_SEL_1)
7905 _MVD_Memset(u32base-MIU1_BASEADDR,0,u32cc_size);
7906 else
7907 _MVD_Memset(u32base,0,u32cc_size);
7908
7909 //rptr,wptr,overflow,latch 16 bytes
7910 if(cc_type==1)
7911 u32base+=16;
7912
7913 if(cc_type==0) // 708: start from 128 bytes
7914 u32base+=128;
7915
7916 _MVD_SetUserDataBufStart(u8Idx,u32base,cc_type);
7917 _MVD_SetUserDataBufSize(u8Idx,u32cc_size,cc_type);
7918 //MVD_DEBUGINFO(printf("%s: u32base=%x,u32size=%x,cc_type=%x\n", __FUNCTION__,u32base,u32size,cc_type));
7919
7920 return E_MVD_RET_OK;
7921 }
7922
HAL_MVD_GetVsyncBridgeAddr(MS_U8 u8Idx)7923 MS_U32 HAL_MVD_GetVsyncBridgeAddr(MS_U8 u8Idx)
7924 {
7925 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7926 MS_U32 CodeAddr = pMemCfg->u32FWCodeAddr;
7927 MS_U32 VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
7928 MS_U32 VsyncBridgeAddr = 0;
7929
7930 if(VPUSHMAddr != 0) // TEE project
7931 {
7932 if(VPUSHMAddr >= HAL_MIU1_BASE && CodeAddr >= HAL_MIU1_BASE) // miu1
7933 {
7934 VsyncBridgeAddr = VPUSHMAddr + VSYNC_BRIGE_SHM_OFFSET;
7935 }
7936 else if(VPUSHMAddr < HAL_MIU1_BASE && CodeAddr < HAL_MIU1_BASE) // miu0
7937 {
7938 VsyncBridgeAddr = VPUSHMAddr + VSYNC_BRIGE_SHM_OFFSET;
7939 }
7940 else
7941 {
7942 VsyncBridgeAddr = 0;
7943 MVD_DEBUGERROR(MVD_ERR("share Memeory and VDEC f/w is in different MIU,(%x,%x)\n",(unsigned int)VPUSHMAddr,(unsigned int)pMemCfg->u32FWCodeAddr));
7944 }
7945 }
7946 else // normal project
7947 {
7948 VsyncBridgeAddr = CodeAddr + VSYNC_BRIGE_SHM_START;
7949 }
7950
7951 return VsyncBridgeAddr;
7952 }
7953
7954
HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)7955 E_MVD_Result HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)
7956 {
7957 pMVDHalContext->gMVDPreCtrl[u8Idx].bHWBufferReMapping = bEnable;
7958 return E_MVD_RET_OK;
7959 }
7960
HAL_MVD_SetPrebufferSize(MS_U8 u8Idx,MS_U32 size)7961 MS_BOOL HAL_MVD_SetPrebufferSize(MS_U8 u8Idx, MS_U32 size)
7962 {
7963 MVD_CmdArg mvdcmd;
7964
7965 SETUP_CMDARG(mvdcmd);
7966 mvdcmd.Arg0 = size&0xff;
7967 mvdcmd.Arg1 = (size>>8)&0xff;
7968 mvdcmd.Arg2 = (size>>16)&0xff;
7969 mvdcmd.Arg3 = (size>>24)&0xff;
7970 SET_DECNUM(mvdcmd, u8Idx);
7971 if (HAL_MVD_MVDCommand( CMD_PREBUFFER_SIZE, &mvdcmd ) == FALSE)
7972 {
7973 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_PREBUFFER_SIZE ) );
7974 return FALSE;
7975 }
7976 return TRUE;
7977 }
7978
HAL_MVD_GetVsyncAddrOffset(void)7979 MS_U32 HAL_MVD_GetVsyncAddrOffset(void)
7980 {
7981 MS_U32 VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
7982 MS_U32 VsyncBridgeOffset = 0;
7983
7984 if(VPUSHMAddr != 0) // TEE project
7985 {
7986 VsyncBridgeOffset = VSYNC_BRIGE_SHM_OFFSET;
7987 }
7988 else // normal project
7989 {
7990 VsyncBridgeOffset = VSYNC_BRIGE_SHM_START;
7991 }
7992
7993 return VsyncBridgeOffset;
7994 }
7995
HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx,MS_U32 u32time)7996 E_MVD_Result HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx, MS_U32 u32time)
7997 {
7998 MVD_CmdArg mvdcmd;
7999 SETUP_CMDARG(mvdcmd);
8000
8001 mvdcmd.Arg0 = L_WORD(u32time); // Arg0(enable), 1 for enable, default is 0...
8002 mvdcmd.Arg1 = H_WORD(u32time); // Arg1(vop_time_incr_predict_count), 1 for predict once, 2 for twice...0xff for always guess the vop_time_incr even with the vol_header, default is 0...
8003 mvdcmd.Arg2 = L_DWORD(u32time);// Arg2(vop_time_incr_follow_vol_header), // 0 for follow vol_header...1 for bypass vol_header, default is 0...
8004 mvdcmd.Arg3 = H_DWORD(u32time);// Arg3, reserve...
8005 MVD_DEBUGINFO(printf("CMD_TIME_INCR_PREDICT=%lx\n",u32time));
8006 if (HAL_MVD_MVDCommand(CMD_TIME_INCR_PREDICT, &mvdcmd) == FALSE)
8007 {
8008 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_TIME_INCR_PREDICT ) );
8009 return E_MVD_RET_FAIL;
8010 }
8011 return E_MVD_RET_OK;
8012
8013 }
8014
HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx,MS_BOOL enable,MS_U32 u32timeout)8015 MS_BOOL HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx, MS_BOOL enable,MS_U32 u32timeout)
8016 {
8017 MVD_CmdArg mvdcmd;
8018
8019 SETUP_CMDARG(mvdcmd);
8020
8021 if(enable == TRUE)
8022 {
8023 mvdcmd.Arg0 = 2; //0:disable, 2: enable decode timeout
8024 mvdcmd.Arg1 = u32timeout&0xff;
8025 mvdcmd.Arg2 = (u32timeout>>8)&0xff;
8026 mvdcmd.Arg3 = (u32timeout>>16)&0xff;
8027 }
8028 else
8029 {
8030 mvdcmd.Arg0 = 0; //0:disable, 2: enable decode timeout
8031 }
8032
8033 SET_DECNUM(mvdcmd, u8Idx);
8034
8035 if (HAL_MVD_MVDCommand( CMD_ENABLE_VLD_TIMEOUT, &mvdcmd ) == FALSE)
8036 {
8037 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_ENABLE_VLD_TIMEOUT ) );
8038 return FALSE;
8039 }
8040
8041 return TRUE;
8042 }
8043
HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx,MS_U8 btype)8044 E_MVD_Result HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx, MS_U8 btype)
8045 {
8046 MVD_CmdArg mvdcmd;
8047 SETUP_CMDARG(mvdcmd);
8048 mvdcmd.Arg0 = btype;
8049 MVD_DEBUGINFO(printf("%s: btype=%x\n", __FUNCTION__, btype));
8050 SET_DECNUM(mvdcmd, u8Idx);
8051 if (HAL_MVD_MVDCommand(CMD_SMOOTH_REWIND, &mvdcmd) == FALSE)
8052 {
8053 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_SMOOTH_REWIND ) );
8054 return E_MVD_RET_FAIL;
8055 }
8056 return E_MVD_RET_OK;
8057 }
8058
HAL_MVD_IsAlive(MS_U8 u8Idx)8059 E_MVD_Result HAL_MVD_IsAlive(MS_U8 u8Idx)
8060 {
8061 MVD_ALIVEInfo* pAliveInfo = &(pMVDHalContext->aliveInfo[u8Idx]);
8062
8063 //check count to vertify alive
8064 if((pAliveInfo->u32decode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))))||
8065 (pAliveInfo->u32searchbuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))))||
8066 (pAliveInfo->u32searchcode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))))||
8067 (pAliveInfo->u32prebuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))))||
8068 (pAliveInfo->u32vfifobuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))))||
8069 (pAliveInfo->u32searchheader_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))))||
8070 (pAliveInfo->u32flashpattern_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)))))
8071 {
8072 pAliveInfo->u32decode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32)));
8073 pAliveInfo->u32searchbuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32)));
8074 pAliveInfo->u32searchcode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32)));
8075 pAliveInfo->u32prebuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32)));
8076 pAliveInfo->u32vfifobuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32)));
8077 pAliveInfo->u32searchheader_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32)));
8078 pAliveInfo->u32flashpattern_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)));
8079 return E_MVD_RET_OK;
8080 }
8081 else
8082 {
8083 return E_MVD_RET_FAIL;
8084 }
8085
8086 }
8087
8088
HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx,MS_U16 u16Para)8089 E_MVD_Result HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx, MS_U16 u16Para)
8090 {
8091 MVD_CmdArg mvdcmd;
8092 SETUP_CMDARG(mvdcmd);
8093 mvdcmd.Arg0 = u16Para & 0xFF; //enable or disable
8094 mvdcmd.Arg1 = u16Para >> 8; // err rate 0~100%
8095 if(mvdcmd.Arg1 >= 100)
8096 mvdcmd.Arg1 = 100;
8097
8098 SET_DECNUM(mvdcmd, u8Idx);
8099 if (HAL_MVD_MVDCommand(CMD_DECODE_ERROR_TOLERANCE, &mvdcmd) == FALSE)
8100 {
8101 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_DECODE_ERROR_TOLERANCE ) );
8102 return E_MVD_RET_FAIL;
8103 }
8104 return E_MVD_RET_OK;
8105
8106 }
8107
HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx,MS_BOOL bEnable)8108 void HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx, MS_BOOL bEnable)
8109 {
8110 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = bEnable;
8111 }
8112
HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)8113 void HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)
8114 {
8115 pMVDHalContext->bDropOnePTS[u8Idx] = TRUE;
8116 }
8117
HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx,MS_U8 u8Arg)8118 E_MVD_Result HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx, MS_U8 u8Arg)
8119 {
8120 #define STOP_TIMEOUT 500 //ms
8121 MVD_CmdArg mvdcmd;
8122 E_MVD_Result ret = E_MVD_RET_OK;
8123 MS_U32 u32StartTime;
8124 MS_U32 u32SeamlessStatus = 0;
8125 MS_U32 u32BufStart = 0;
8126 MS_U32* temp = 0;
8127
8128 if(u8Arg != 2)
8129 {
8130 // clear handshake dram
8131 u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);
8132 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.bFWMiuSel,u32BufStart,u32BufStart);
8133 temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+OFFSET_PVR_SEAMLESS_STATUS);
8134 *temp = 0;
8135 MsOS_FlushMemory();
8136 }
8137
8138 SETUP_CMDARG(mvdcmd);
8139 mvdcmd.Arg0 = u8Arg;
8140 MVD_DEBUGINFO(printf("%s: arg=%d\n", __FUNCTION__, (unsigned int)u8Arg));
8141 SET_DECNUM(mvdcmd, u8Idx);
8142
8143 if (HAL_MVD_MVDCommand(CMD_PVR_SEAMLESS_MODE, &mvdcmd) == FALSE)
8144 {
8145 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_PVR_SEAMLESS_MODE ) );
8146 return E_MVD_RET_FAIL;
8147 }
8148
8149
8150 u32StartTime = HAL_MVD_GetTime();
8151
8152 if(u8Arg == 1)
8153 {
8154 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = E_MVD_TS_FILE_MODE;
8155 while(1)
8156 {
8157 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
8158 if(u32SeamlessStatus&1) // bit0 , pause done
8159 {
8160 break;
8161 }
8162
8163 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
8164 {
8165 MVD_DEBUGERROR(printf("PVR seamless pause timeout\n" ) );
8166 ret = E_MVD_RET_FAIL;
8167 break;
8168 }
8169 }
8170 }
8171 else if(u8Arg == 2)
8172 {
8173 while(1)
8174 {
8175 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
8176 if(u32SeamlessStatus&4) // bit2, hw reset done
8177 {
8178 break;
8179 }
8180
8181 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
8182 {
8183 MVD_DEBUGERROR(printf("PVR seamless hw reset timeout\n" ) );
8184 ret = E_MVD_RET_FAIL;
8185 break;
8186 }
8187 }
8188 }
8189
8190 return ret;
8191 }
8192
HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx,MS_U8 u8Mode)8193 E_MVD_Result HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx, MS_U8 u8Mode)
8194 {
8195 MVD_CmdArg mvdcmd;
8196
8197 SETUP_CMDARG(mvdcmd);
8198 mvdcmd.Arg0 = u8Mode;
8199
8200 SET_DECNUM(mvdcmd, u8Idx);
8201
8202 MVD_DEBUGINFO(printf("%s CMD_ENABLE_LAST_FRAME_QUALIFIER arg0=%x\n", __FUNCTION__, u8Mode));
8203 if (HAL_MVD_MVDCommand(CMD_ENABLE_LAST_FRAME_QUALIFIER, &mvdcmd)== FALSE)
8204 {
8205 MVD_DEBUGERROR( printf( "Command: 0x%x fail!!\r\n", CMD_ENABLE_LAST_FRAME_QUALIFIER) );
8206 return E_MVD_RET_FAIL;
8207 }
8208
8209 return E_MVD_RET_OK;
8210 }
8211
HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)8212 void HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)
8213 {
8214 pMVDHalContext->u32DmxFrameRate[u8HalIdx] = u32Value;
8215 }
8216
HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)8217 void HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)
8218 {
8219 pMVDHalContext->u32DmxFrameRateBase[u8HalIdx] = u32Value;
8220 }
8221
8222 #endif
8223
8224