1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 // Common Definition
100 #ifdef MSOS_TYPE_LINUX_KERNEL
101 #include <linux/string.h>
102 #else
103 #include <string.h>
104 #endif
105
106 #include "MsCommon.h"
107 #include "drvMVD_EX.h"
108 #include "drvBDMA.h"
109
110 // Internal Definition
111 #include "regMVD_EX.h"
112 #include "halMVD_EX.h"
113 #include "halVPU_EX.h"
114 #include "osalMVD_EX.h"
115 #include "mvd4_interface.h" //firmware header
116 #include "asmCPU.h"
117 #include "controller.h"
118 #include "MVD_EX_Common.h"
119 #include "halCHIP.h"
120 //#include "drvCMAPool.h"
121 #include "drvCMAPool_v2.h"
122 #if defined(MSOS_TYPE_LINUX)
123 #include "msos/linux/mdrv_cma_pool_st.h"
124 #endif
125
126 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE)
127
128
129 #ifdef MSOS_TYPE_LINUX_KERNEL
130 #define VPRINTF printk
131 #elif defined(MSOS_TYPE_ECOS)
132 #define VPRINTF diag_printf
133 #else
134 #ifndef ANDROID
135 #define VPRINTF printf
136 #else
137 #include <sys/mman.h>
138 #include <cutils/ashmem.h>
139 #include <cutils/log.h>
140 #define VPRINTF ALOGD
141 #endif
142 #endif
143 //-------------------------------------------------------------------------------------------------
144 // Driver Compiler Options
145 //-------------------------------------------------------------------------------------------------
146 #define SLQ_NEW_PUSH 1
147 #define VIRTUAL_CMD_TIMEOUT 50
148 #ifdef VDEC3
149 #define v3_temp 1
150 #define v3_thinplayer 0
151 #else
152 #define v3_temp 0
153 #define v3_thinplayer 0
154 #endif
155
156 //-------------------------------------------------------------------------------------------------
157 // Local Defines
158 //-------------------------------------------------------------------------------------------------
159 #define MIU1_BASEADDR pMVDHalContext->stMiuCfg.u32Miu1BaseAddr
160 #define _PA2Offset(x) (((x)>=MIU1_BASEADDR)?(x-MIU1_BASEADDR):(x))
161
162 #ifdef MSOS_TYPE_LINUX_KERNEL
163 #include <asm/div64.h>
164 #define _90K_TO_MS_U64(x) ((x!=MVD_U64_MAX)?(do_div(x,90)):(x)) //90k counter ==> ms
165 #else
166 #define _90K_TO_MS_U64(x) ((x!=MVD_U64_MAX)?(x/=90):(x)) //90k counter ==> ms
167 #endif
168
169 #ifndef MS_ASSERT
170 #ifdef MS_DEBUG
171 #define MS_ASSERT(expr) do { \
172 if(!(expr)) \
173 MVD_PRINT("MVD assert fail %s %d!\n", __FILE__, __LINE__); \
174 } while(0)
175 #else
176 #define MS_ASSERT(expr)
177 #endif
178 #endif
179
180 #ifndef UNUSED
181 #define UNUSED(x) (void)(x)
182 #endif
183 //constant
184 #define MVD_PollingTimes 0x40000UL
185
186 #define MVD_DEBUGVERBAL(x) if (_u8HalDbgLevel>3) { (x); }
187 #define MVD_DEBUG_FWCMD(x) if (_u8HalDbgLevel>2) { (x); }
188 #define MVD_DEBUGINFO(x) if (_u8HalDbgLevel>1) { (x); }
189 #define MVD_DEBUGERROR(x) if (_u8HalDbgLevel>0) { (x); }
190 #define MVD_ERROR(x) x
191
192 #define RIU ((unsigned short volatile *) (u32RiuBaseAdd))
193 #define RIU8 ((unsigned char volatile *) (u32RiuBaseAdd))
194
195 #define MVDCPU_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL0_H) & BIT0) == BIT0)
196 #define MVDHW_ON_MIU1 ((HAL_MVD_RegReadByte(MIU0_SEL2_L) & BIT6) == BIT6)
197
198 // MVD5
199 #define SLQ_TBL_ENTRY_LEN 0x7FFFFFFF //31-bit
200
201 #define MVD_WIDTH_ALIGN_BYTE 16
202 #define MVD_WIDTH_ALIGN_MASK (MVD_WIDTH_ALIGN_BYTE - 1)
203 #define MVD_WIDTH_ALIGN_BITS 4
204
205 #define MVD_FBNUM_DEFAULT 4
206 #define MVD_FBNUM_MAX 5
207 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
208
209 #define MVD_DHD_FBSIZE 0x5FA000 //Framebuffer size minimum for Dual HD: (1920*2)*1088*1.5
210 #define MVD_HD_FBSIZE 0x2FD000 //Framebuffer size minimum for High Definition
211 #define MVD4_VC1_FBSIZE_HDMIN 0xEF1000 //5 * 1920 * 1088 * 1.5 = 14.95MB
212 #define MVD4_VC1_FBSIZE_HDMIN1 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
213 #define MVD4_VC1_FBSIZE_SDMIN 0x2F7600 //5 * 720 * 576 * 1.5 = 2.97MB
214 #define MVD4_MPEG_FBSIZE_HDMIN 0xBF4000 //4 * 1920 * 1088 * 1.5 = 11.96MB
215 #define MVD4_MPEG_FBSIZE_SDMIN 0x25F800 //4 * 720 * 576 * 1.5 = 2.38MB
216
217 #define _IS_VC1(x) ((x==E_MVD_CODEC_VC1_ADV) || (x==E_MVD_CODEC_VC1_MAIN))
218
219 #define SLQ_ENTRY_LEN 8 //8-byte per entry
220
221 #define MVD_U32_MAX 0xffffffffUL
222 #define MVD_U64_MAX 0xffffffffffffffffULL
223 #define MVD_GENERAL_MAX ((size_t)(-1))
224
225 #define MAX_ADD_28BIT 0x0fffffffUL
226
227 #define SLQ_ADDR_LEN SLQ_TBL_ENTRY_LEN //Slq address length is the same as SlqTbl
228
229 //Initial value for PTS table
230 #define _INIT_ADDR MVD_U32_MAX
231 #define _INIT_LEN 0
232 #define _INIT_TIMESTAMP MVD_U32_MAX
233 #define _INIT_ID MVD_U32_MAX
234
235 #define _MS_TO_90K(x) (x*90) //ms ==> 90k counter
236 #define _90K_TO_MS(x) ((x!=MVD_U32_MAX)?(x/90):(x)) //90k counter ==> ms
237
238
239 #define MVD_DBG_STS(x) {}
240 #define _SLQTBL_DUMP_PTS FALSE//TRUE
241 #define _SLQTBL_DUMP_PUSHQ FALSE//TRUE
242 #define _SLQTBL_DUMP_PKT FALSE//TRUE
243 #define MVD_TURBO_INIT FALSE//TRUE
244
245 #define SLQ_ENTRY_MAX 1024
246 #define SLQ_ENTRY_LEN 8 //8-byte per entry
247 #define SLQ_TBL_SIZE (SLQ_ENTRY_MAX * SLQ_ENTRY_LEN)
248 #define ES_TBL_SIZE (SLQ_ENTRY_MAX * 8) //8-byte per entry
249
250 #define MVD_FW_SLQTBL_PTS_LEN 32
251
252 #define SLQ_TBL_SAFERANGE (40*SLQ_ENTRY_LEN)
253 //this should be smaller than FW's lookup range (current it's 16 entries)
254
255 #define SLQTBL_CHECKVACANCY_WATERLEVEL (44*SLQ_ENTRY_LEN)
256
257
258 #define DIVX_PATTERN 0x63643030
259 #define FLV_PATTERN 0xffff0000
260 #define MPEG_PATTERN_0 0xC6010000 //this SC just for mpeg2/4
261 #if SLQ_NEW_PUSH
262 #define SLQ_PIC_START_FLAG 0x40000000
263 #define VC1_PATTERN 0x0D010000
264 #define RCV_PATTERN 0xFF00A55A
265 #endif
266 #define VC1_PATTERN_0 0xff010000
267 #define VC1_PATTERN_1 0x0000ffff
268 #define VC1_PATTERN_2 0xffffff01
269 #define VC1_PATTERN_3 0x0000ffee
270
271 #define RCV_PATTERN_0 0x00000000
272 #define RCV_PATTERN_1 0xffffffff
273 #define RCV_PATTERN_2 0x00000000
274 #define RCV_PATTERN_3 0xeeeeeeee
275
276 #define DUMMY_PATTERN 0xBE010000
277 #define DUMMY_SIZE 0x2000 //8K
278
279 #define END_PATTERN_0 0xFF010000
280 #define END_PATTERN_1 0xDDCCBBAA
281 #define END_PATTERN_2 0xBBAAFFEE
282 #define END_PATTERN_3 0xFFEEDDCC
283 #define END_PATTERN_SIZE 256
284
285 #define SKIP_PATTERN_0 0xc5010000
286 #define SKIP_PATTERN_1 0x270608ab
287 #define SKIP_PATTERN_SIZE 8
288
289 #define CMD_TIMEOUT_MS 500
290 #define SKIP_DATA_TIMEOUT_MS 15
291
292 //Length of internal buffers
293 #define MVD_FW_IAP_BUF_LEN (0x4000UL) // 16k
294 #define MVD_FW_DP_BUF_LEN (0x80000UL) //512k
295 #define MVD_FW_MV_BUF_LEN (0x48000UL) //288K
296 //Alignment of HW buffers start address
297 #define MVD_FW_IAP_BUF_ALIGN (0x4000UL) // 16k
298 #define MVD_FW_DP_BUF_ALIGN (0x8000UL) // 32k
299 #define MVD_FW_MV_BUF_ALIGN (0x8000UL) // 32k
300
301 //Three HW buffers are allocated after framebuffer, so we need to
302 //consider these buffers when checking the available framebuffer size/number.
303 #define MVD_HW_BUF_TOTAL_LEN (MVD_FW_IAP_BUF_LEN + MVD_FW_DP_BUF_LEN + MVD_FW_MV_BUF_LEN) //u32HWBuffTotalSize
304
305 #define MVD_FW_CODE_LEN (OFFSET_BASE)//refer to the define in mvd4_interface.h
306 #define MVD_FW_CODE_LEN_V00 (0x70000UL) //length for old layout
307 #define MVD_FW_MPOOL_START_OFFSET (0x90000UL) //576K
308 #define MVD_FW_TASK_OFFSET (0x100000UL) //1M
309
310 #define MVD3_FW_VOL_INFO_BUF_LEN (0x1000UL) // 4K
311 #define MVD3_FW_FRAME_INFO_BUF_LEN (0x1000UL) // 4K
312 #define MVD3_FW_DIVX_INFO_BUF_LEN (0x1000UL) // 4K
313 #define MVD3_FW_USER_DATA_BUF_LEN (0x4000UL) // 16K
314 #define MVD3_FW_USER_DATA_BUF_BACKUP_LEN MVD3_FW_USER_DATA_BUF_LEN // 16K
315 #define MVD3_FW_SLQ_TAB_TMPBUF_LEN (0x200UL)
316 #define MVD_FW_SLQTBL_PTS_BUF_LEN (SLQ_ENTRY_MAX*MVD_FW_SLQTBL_PTS_LEN)
317 #define MVD_FW_DYN_SCALE_BUF_LEN (0x2000UL) // 8K
318 #define MVD_FW_SCALER_INFO_BUF_LEN (0x100UL) // 256bytes reserved
319 #define MVD_FW_DECFRM_INFO_BUF_LEN (0x100UL) // 256bytes reserved
320 #define MVD_FW_VBBU_TABLE_LEN (0x2000UL) // 8K
321
322 #define MVD_FW_USER_DATA_HDR_LEN (6)
323 #define MVD_FW_USER_DATA_PKT_LEN (256)
324 #define MVD_FW_USER_DATA_EXT_HDR_LEN (16)
325 #define FW_BUFF_ALIGN (0x1000) //4k align
326
327 #define SLQ_ENTRY_MAX 1024
328 #define MVD_FW_SLQTBL_PTS_LEN 32
329 #define MVD_NULLPKT_PTS MVD_U32_MAX
330
331 #define MVD_HW_MAX_PIXEL (1920*1088*61000ULL) // FHD@60p
332
333 //Get the start address, and the next start address.
334 #define GET_FW_BUFFADD(cur, size, start) \
335 do { \
336 start = cur; \
337 cur += size; \
338 } while(0)
339
340 //Get the aligned start address, and the next start address.
341 #define GET_FW_BUFFADD_ALIGN(cur, align, size, alignStart) \
342 do { \
343 cur = (MemAlign(cur, align)); \
344 GET_FW_BUFFADD(cur, size, alignStart); \
345 } while(0)
346
347 //Init command arguments
348 #define SETUP_CMDARG(x) \
349 do { \
350 x.Arg0 = 0; \
351 x.Arg1 = 0; \
352 x.Arg2 = 0; \
353 x.Arg3 = 0; \
354 x.Arg4 = 0; \
355 x.Arg5 = 0; \
356 } while(0)
357
358 //Set command arguments
359 #define SET_CMDARG(cmd, u32val, u8Num) \
360 do { \
361 cmd.Arg0 = L_WORD(u32val); \
362 cmd.Arg1 = H_WORD(u32val); \
363 cmd.Arg2 = L_DWORD(u32val); \
364 cmd.Arg3 = H_DWORD(u32val); \
365 cmd.Arg4 = 0; \
366 cmd.Arg5 = u8Num; \
367 } while(0)
368
369 #define SET_CMD_RET_FALSE(_cmdVal, _pStcmdArg) \
370 do { \
371 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
372 { \
373 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal)); \
374 return FALSE; \
375 } \
376 } while(0)
377
378 #define SET_CMD_RET_VOID(_cmdVal, _pStcmdArg) \
379 do { \
380 if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE) \
381 { \
382 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal)); \
383 return; \
384 } \
385 } while(0)
386
387 #define HAL_MVD_InvalidBuffRetFalse(x) \
388 do { \
389 if ((x)==0) \
390 { \
391 MVD_DEBUGERROR(MVD_PRINT("%s(%d) error: NULL buffer address.\n", __FUNCTION__, __LINE__)); \
392 return FALSE; \
393 } \
394 } while(0)
395
396 #define _MVD_Memset(pDstAddr, u32value, u32Size) \
397 do { \
398 MS_U32 x = 0; \
399 for (x = 0; x < (u32Size/4); x=x+4) \
400 { \
401 HAL_MVD_Memset4Byte(pDstAddr+x,u32value); \
402 } \
403 HAL_MVD_CPU_Sync(); \
404 HAL_MVD_ReadMemory(); \
405 } while (0)
406
407 #define _MVD_MemResetBit(pDstAddr, mask_num) \
408 do{ \
409 *pDstAddr = (*pDstAddr) & (~(0x1<<mask_num)); \
410 }while(0) \
411
412
413 typedef enum
414 {
415 MVD_HKSLQ_GET_READPTR = 0,
416 MVD_HKSLQ_GET_WRITEPTR = 1,
417 MVD_HKSLQ_NONE = 2,
418 } MVD_HKSLQ_CMD;
419
420 #if SLQ_NEW_PUSH
421 typedef struct _MVD_SLQ_STATUS
422 {
423 MS_BOOL bSlqPicStart;
424 MS_BOOL bSlqPicCollect;
425 MS_BOOL bSlqPicWaitNextStart;
426 MS_BOOL bSlqFireRdy;
427 MS_BOOL bSlqCtrlBit;
428 MS_BOOL bSlqEnLastFrameShow;
429 MS_VIRT u32SlqPatternAddr;
430 MS_U32 u32SlqPushLength;
431 MS_VIRT u32VaildWptrAddr;
432 } MVD_SLQ_STATUS;
433 #endif
434
435 typedef struct _MVD_SLQ_TBL_ST
436 {
437 MS_VIRT u32StAdd;
438 MS_VIRT u32EndAdd;
439 MS_U32 u32EntryCntMax;
440
441 MS_VIRT u32RdPtr;
442 MS_VIRT u32WrPtr;
443 MS_VIRT u32Empty;
444 MS_VIRT* pu32LastEntry;
445 } MVD_SLQ_TBL_ST;
446
447 typedef struct _MVD_ALIVEInfo
448 {
449 MS_U32 u32decode_count;
450 MS_U32 u32searchbuf_count;
451 MS_U32 u32searchcode_count;
452 MS_U32 u32prebuf_count;
453 MS_U32 u32vfifobuf_count;
454 MS_U32 u32searchheader_count;
455 MS_U32 u32flashpattern_count;
456 MS_U32 u32IdleCount;
457 } MVD_ALIVEInfo;
458
459
460 typedef struct _MVD_SLQ_ES_ST
461 {
462 MS_VIRT u32StAdd;
463 MS_VIRT u32EndAdd;
464
465 MS_VIRT u32RdPtr;
466 MS_VIRT u32WrPtr;
467 } MVD_SLQ_ES_ST;
468
469 typedef struct _MVD_FWBuff
470 {
471 MS_VIRT pu8MVDGetVolBufStart;
472 MS_VIRT u32VolAdd;
473 MS_VIRT pu8MVDGetFrameInfoBufStart;
474 MS_VIRT pu8MVDSetHeaderBufStart;
475 MS_VIRT u32UserDataBuf;
476 MS_VIRT u32MVDFWSLQTABTmpbufAdr;
477 MS_VIRT u32MVDFWPtsTblAddr;
478 MS_VIRT u32DynScalingAdd;
479 MS_VIRT u32ScalerInfoAdd;
480 MS_VIRT u32DecFrmInfoAdd;
481 MS_VIRT u32VBBUTableAdd;
482 } MVD_FWBuff;
483
484 typedef enum _FW_BUFF_TYPE
485 {
486 FW_BUFF_VOLINFO,
487 FW_BUFF_FRMINFO,
488 FW_BUFF_HDR,
489 FW_BUFF_USRDATA,
490 FW_BUFF_SLQTBL,
491 FW_BUFF_FWSLQTAB,
492 FW_BUFF_PTSTBL,
493 FW_BUFF_DS,
494 FW_BUFF_XCINFO,
495 FW_BUFF_DECFRMINFO,
496 } FW_BUFF_TYPE;
497
498 typedef struct _MVD_SLQTBLInfo
499 {
500 MS_U32 u32LastPts; ///< record the last PTS to handle the repeat case
501 MS_U32 u32DummyPktCnt; ///< accumulated dummy packet counter
502 MS_U32 u32SlqByteCnt; ///< accumulated byte counter
503 MS_VIRT u32ESBuffEnd; ///< miu offset of ES buffer end, used for report TS read/write ptr.
504 MS_VIRT u32FileEndPtr; ///< write ptr of file-end
505 MS_VIRT u32PreEsRd; ///< previous ES read ptr
506 MS_VIRT u32PreEsWr; ///< previous ES write ptr
507 MS_BOOL bRdyToFireCmd; ///< TRUE after FW is ready to update write pointer
508 MS_BOOL bSlqTblHasValidData; ///< TRUE if the write ptr is not updated
509 MS_BOOL bEnSlqTblHkCtrl;
510 BDMA_CpyType bdmaCpyType;
511 MVD_SLQ_STATUS* pSlqStatus;
512 MVD_SLQ_TBL_ST* pDrvSlqTbl;
513 MVD_SLQ_ES_ST* pDrvEsTbl;
514 MVD_SLQ_ES_ST* pDrvDivxTbl;
515 } MVD_SLQTBLInfo;
516
517 //Only keep one record of MIU setting since there should be only one,
518 //even for multiple decoders.
519 typedef struct _MVDMiuCfg
520 {
521 MS_PHY u32Miu1BaseAddr;
522 MS_PHY u32Miu2BaseAddr;
523 MS_PHY u32Miu3BaseAddr;
524 MS_U8 u8FWMiuSel;
525 MS_U8 u8HWMiuSel;
526 } MVDMiuCfg;
527
528 typedef struct
529 {
530 MS_U64 u64PTS;
531 MS_U32 u32POC;
532 MS_U8 u8FrameType;
533 } MVD_PVR_Seamless_Info;
534
535 typedef enum
536 {
537 E_MVD_DEC_0 = 0,
538 E_MVD_DEC_1,
539 E_MVD_DEC_MAX
540 } MVD_DecNum;
541 #ifdef VDEC3
542 #define MAX_DEC_NUM 16
543 #else
544 #define MAX_DEC_NUM E_MVD_DEC_MAX
545 #endif
546
547 //-------------------------------------------------------------------------------------------------
548 // Local Structures
549 //-------------------------------------------------------------------------------------------------
550
551
552 //-------------------------------------------------------------------------------------------------
553 // Global Variables
554 //-------------------------------------------------------------------------------------------------
555 static MS_VIRT u32RiuBaseAdd = 0;
556 MS_U8 _u8HalDbgLevel = 0;
557 #ifdef VDEC3//#ifdef VDEC3
558 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX};
559 #else
560 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX};
561 #endif
562 static MS_U8 u8SHMMiuSel=0;
563 #if 0
564 static MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
565 static MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
566 static MVD_FWCfg stFwCfg[MAX_DEC_NUM];
567
568 // For SLQ table link
569 static MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
570 static MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
571 static MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
572 static MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
573 static MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
574 static FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
575
576 MS_BOOL bSlqTblHKCtrl = FALSE; //read/write pointer can be accessed by HK directly
577 static MS_BOOL bStopped = TRUE;
578
579 static HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM] = {
580 {E_HAL_MVD_MAIN_STREAM0, FALSE},
581 {E_HAL_MVD_SUB_STREAM0, FALSE},
582 //{E_HAL_MVD_SUB_STREAM1, FALSE},
583 };
584 static MVD_FWBuff stFWBuff[MAX_DEC_NUM];
585 #endif
586
587 #define FRM_RATE_CODE_NUM 9
588
589 typedef struct
590 {
591 MVD_MEMCfg stMemCfg[MAX_DEC_NUM];
592 MVD_CtrlCfg stCtrlCfg[MAX_DEC_NUM];
593 MVD_FWCfg stFwCfg[MAX_DEC_NUM];
594
595 // For SLQ table link
596 MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
597 MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM]; //for SLQ_NEW_PUSH
598 MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
599 MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM]; //maintain to report ES read/write ptr
600 MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM]; //header for divx311
601 FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
602
603 MS_BOOL bSlqTblHKCtrl[MAX_DEC_NUM]; //read/write pointer can be accessed by HK directly
604 MS_BOOL bStopped[MAX_DEC_NUM];
605
606 HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM];
607
608 MVD_FWBuff stFWBuff[MAX_DEC_NUM];
609
610 #if _SLQTBL_DUMP_PKT
611 MS_U32 u32SendTimes[MAX_DEC_NUM];//HAL_MVD_SLQTblSendPacket
612 #endif
613
614 MS_U32 u32pqTimes[MAX_DEC_NUM];//HAL_MVD_PushQueue
615 MS_BOOL bSetSkip[MAX_DEC_NUM];//MVD_FlushTSQueue
616
617 MS_U32 u32PreVdCnt[MAX_DEC_NUM];//HAL_MVD_DbgDump
618 MS_U32 u32PreErrCnt[MAX_DEC_NUM];
619 MS_BOOL b1stDump[MAX_DEC_NUM];
620 //pre_set
621 HAL_MVD_Pre_Ctrl gMVDPreCtrl[MAX_DEC_NUM];
622 MS_BOOL bAutoInsertDummyPattern[MAX_DEC_NUM];
623 MVDMiuCfg stMiuCfg;
624 MS_BOOL bDropOnePTS[MAX_DEC_NUM];
625 MVD_ALIVEInfo aliveInfo[MAX_DEC_NUM];
626
627 MS_U32 u32DmxFrameRate[MAX_DEC_NUM];
628 MS_U32 u32DmxFrameRateBase[MAX_DEC_NUM];
629 MS_BOOL bCMAUsed;
630
631 struct CMA_Pool_Init_Param cmaInitParam; // support two MIU
632 struct CMA_Pool_Free_Param cmaFreeParam[MAX_DEC_NUM];
633 MS_BOOL bCMATwoMIU[MAX_DEC_NUM];
634 MS_U32 u32LastAliveTime[MAX_DEC_NUM];
635 MS_BOOL bTrickPlay2xAVSync[MAX_DEC_NUM];
636 } MVD_Hal_CTX;
637
638 //global variables
639 MVD_Hal_CTX* pMVDHalContext = NULL;
640 MVD_Hal_CTX gMVDHalContext;
641 const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
642 {
643 NULL,23976,24000,25000,29976,30000,50000,59947,60000
644 };
645
646
647 #define GET_VOL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetVolBufStart
648 #define GET_VOL_BUFFADD_NONCACHE(idx) pMVDHalContext->stFWBuff[(idx)].u32VolAdd
649 #define GET_FRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDGetFrameInfoBufStart
650 #define GET_HDR_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].pu8MVDSetHeaderBufStart
651 #define GET_USRDATA_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32UserDataBuf
652 #define GET_SLQ_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWSLQTABTmpbufAdr
653 #define GET_PTSTBL_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32MVDFWPtsTblAddr
654 #define GET_DS_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DynScalingAdd
655 #define GET_XCINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32ScalerInfoAdd
656 #define GET_DECFRMINFO_BUFFADD(idx) pMVDHalContext->stFWBuff[(idx)].u32DecFrmInfoAdd
657 #define GET_VBBUTABLEADD(idx) pMVDHalContext->stFWBuff[(idx)].u32VBBUTableAdd
658
659
660
661 //-------------------------------------------------------------------------------------------------
662 // Local Variables
663 //-------------------------------------------------------------------------------------------------
664
665
666 //-------------------------------------------------------------------------------------------------
667 // Debug Functions
668 //-------------------------------------------------------------------------------------------------
669
670
671 //-------------------------------------------------------------------------------------------------
672 // Local Functions
673 //-------------------------------------------------------------------------------------------------
674
HAL_MVD_Context_Init(void)675 static void HAL_MVD_Context_Init(void)
676 {
677 #ifdef VDEC3
678 MS_U8 i;
679
680 for (i = 0; i < MAX_DEC_NUM; i++)
681 {
682 pMVDHalContext->bStopped[i] = TRUE;
683 pMVDHalContext->b1stDump[i] = TRUE;
684 pMVDHalContext->_stMVDStream[i].eStreamId = E_HAL_MVD_N_STREAM0 + i;
685 }
686 #else
687 pMVDHalContext->bStopped[0] = TRUE;
688 pMVDHalContext->bStopped[1] = TRUE;
689 pMVDHalContext->_stMVDStream[0].eStreamId = E_HAL_MVD_MAIN_STREAM0;
690 pMVDHalContext->_stMVDStream[1].eStreamId = E_HAL_MVD_SUB_STREAM0;
691
692 pMVDHalContext->b1stDump[0] = TRUE;
693 pMVDHalContext->b1stDump[1] = TRUE;
694 #endif
695 }
696
697
698
HAL_MVD_SetIsUsed(MS_U8 u8Idx,MS_BOOL bUsed)699 static void HAL_MVD_SetIsUsed(MS_U8 u8Idx, MS_BOOL bUsed)
700 {
701 pMVDHalContext->_stMVDStream[u8Idx].bUsed = bUsed;
702 }
703
704 //Given the start address & the available size for the FW buffers,
705 //return the address of each buffers.
706 //Now only support u8Size==1, 2, 4
MVD_GetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size)707 static MS_U32 MVD_GetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size)
708 {
709 MS_U32 u32Val = 0;
710 MS_VIRT u32BufStart = NULL;
711 switch (eBuffType)
712 {
713 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
714 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
715 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
716 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
717 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
718 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
719 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
720 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
721 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
722 default:
723 break;
724 }
725 if (NULL == u32BufStart)
726 {
727 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
728 __FUNCTION__, u8Idx, eBuffType, u16Offset, u8Size);
729 return 0;
730 }
731
732 if (u8Size == sizeof(MS_U8))
733 {
734 u32Val = (MS_U32)HAL_MVD_MemReadByte(u32BufStart+u16Offset);
735 }
736 else if (u8Size == sizeof(MS_U32))
737 {
738 u32Val = HAL_MVD_MemRead4Byte(u32BufStart+u16Offset);
739 }
740 else if (u8Size == sizeof(MS_U16))
741 {
742 u32Val = HAL_MVD_MemRead2Byte(u32BufStart+u16Offset);
743 }
744
745 MVD_DEBUGVERBAL(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
746 __FUNCTION__, u32Val, u8Idx, eBuffType, u16Offset, u8Size));
747 return u32Val;
748 }
749
750 #ifdef VDEC3
MVD_SetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size,MS_U32 u32Value)751 static void MVD_SetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size, MS_U32 u32Value)
752 {
753 MS_VIRT u32BufStart = NULL;
754
755 switch (eBuffType)
756 {
757 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
758 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
759 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
760 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
761 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
762 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
763 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
764 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
765 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
766 default:
767 break;
768 }
769
770 if (NULL == u32BufStart)
771 {
772 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
773 __FUNCTION__, (unsigned int)u8Idx,(unsigned int) eBuffType,(unsigned int) u16Offset,(unsigned int) u8Size,(unsigned int)u32Value);
774 }
775
776 if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
777 {
778 u32BufStart += HAL_MIU1_BASE;
779 }
780 /* else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
781 {
782 u32BufStart += HAL_MIU2_BASE;
783 }*/
784
785 if (u8Size == sizeof(MS_U8))
786 {
787 MS_U8* temp = (MS_U8*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
788 *temp = (MS_U8)u32Value;
789 }
790 else if (u8Size == sizeof(MS_U32))
791 {
792 MS_U32* temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
793 *temp = (MS_U32)u32Value;
794 }
795 else if (u8Size == sizeof(MS_U16))
796 {
797 MS_U16* temp = (MS_U16*)MsOS_PA2KSEG1(u32BufStart+u16Offset);
798 *temp = (MS_U16)u32Value;
799 }
800
801 MVD_DEBUGVERBAL(MVD_PRINT("%s: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
802 __FUNCTION__, (unsigned int)u8Idx, (unsigned int)eBuffType, (unsigned int)u16Offset, (unsigned int)u8Size,(unsigned int)u32Value));
803 }
804 #endif
805
806
807 //-------------------------------------------------------------------------------------------------
808 // Global Functions
809 //-------------------------------------------------------------------------------------------------
HAL_MVD_SetDbgLevel(MS_U8 level)810 void HAL_MVD_SetDbgLevel(MS_U8 level)
811 {
812 _u8HalDbgLevel = level;
813 return;
814 }
815
816
HAL_MVD_GetCaps(void)817 MS_U8 HAL_MVD_GetCaps(void)
818 {
819 MS_U8 caps = 0;
820
821 caps |= (MVD_SUPPORT_MPEG2|MVD_SUPPORT_MPEG4|MVD_SUPPORT_VC1);
822 return caps;
823 }
824
HAL_MVD_GetMaxPixel(MS_U32 u32Id)825 MS_U64 HAL_MVD_GetMaxPixel(MS_U32 u32Id)
826 {
827 return (MS_U64)MVD_HW_MAX_PIXEL/1000;
828 }
829
HAL_MVD_GetDrvFwVer(void)830 MS_U32 HAL_MVD_GetDrvFwVer(void)
831 {
832 return MVD_FW_VERSION;
833 }
834
835 #if 0
836 MS_U32 HAL_MVD_GetMiu1BaseAdd(void)
837 {
838 return MIU1_BASEADDR;
839 }
840 #endif
841
842 //#if defined(CHIP_MUJI)
HAL_MVD_GetMiu1BaseAdd(void)843 MS_VIRT HAL_MVD_GetMiu1BaseAdd(void)
844 {
845 return MIU1_BASEADDR;
846 }
847
HAL_MVD_GetFWSelMiu1(void)848 MS_BOOL HAL_MVD_GetFWSelMiu1(void)
849 {
850 return MVDCPU_ON_MIU1;
851 }
852 //#endif
853
854
HAL_MVD_GetFWSelMiu(void)855 MS_U8 HAL_MVD_GetFWSelMiu(void)
856 {
857 return pMVDHalContext->stMiuCfg.u8FWMiuSel;
858 }
859
860
861
HAL_MVD_MemGetMap(MS_U8 u8Idx,MS_U8 u8type,MS_VIRT * pu32addr,MS_SIZE * pu32len)862 void HAL_MVD_MemGetMap(MS_U8 u8Idx, MS_U8 u8type, MS_VIRT* pu32addr, MS_SIZE* pu32len)
863 {
864 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
865 MS_VIRT u32StartOffset;
866 MS_U8 u8MiuSel;
867
868 switch (u8type)
869 {
870 case E_MVD_MMAP_ALL:
871 case E_MVD_MMAP_FW:
872 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FWCodeAddr);
873 *pu32addr = u32StartOffset;
874 *pu32len = pstMemCfg->u32FWCodeSize;
875 break;
876 case E_MVD_MMAP_BS:
877 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32BSAddr);
878 *pu32addr = u32StartOffset;
879 *pu32len = pstMemCfg->u32BSSize;
880 break;
881 case E_MVD_MMAP_FB:
882 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FBAddr);
883 *pu32addr = u32StartOffset;
884 *pu32len = pstMemCfg->u32FBSize;
885 break;
886 case E_MVD_MMAP_DRV:
887 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32DrvBufAddr);
888 *pu32addr = u32StartOffset;
889 *pu32len = pstMemCfg->u32DrvBufSize;
890 break;
891 default:
892 break;
893 }
894
895 MVD_DEBUGINFO(MVD_PRINT("HAL_MVD_MemGetMap[%d] add=0x%lx len=0x%lx\n",u8type,(unsigned long)*pu32addr,(unsigned long)*pu32len));
896 return;
897 }
898
HAL_MVD_RegSetBase(MS_VIRT u32Base)899 void HAL_MVD_RegSetBase(MS_VIRT u32Base)
900 {
901 u32RiuBaseAdd = u32Base;
902 HAL_VPU_EX_InitRegBase(u32Base);
903 }
904
HAL_MVD_RegWriteByte(MS_VIRT u32Reg,MS_U8 u8Val)905 void HAL_MVD_RegWriteByte(MS_VIRT u32Reg, MS_U8 u8Val)
906 {
907 if ( __builtin_constant_p( u32Reg ) )
908 {
909 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val;
910 }
911 else
912 {
913 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
914 }
915 }
916
HAL_MVD_RegReadByte(MS_VIRT u32Reg)917 MS_U8 HAL_MVD_RegReadByte(MS_VIRT u32Reg)
918 {
919 return (__builtin_constant_p( u32Reg ) ?
920 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) :
921 (RIU8[(u32Reg << 1) - (u32Reg & 1)]));
922 }
923
HAL_MVD_RegWriteBit(MS_VIRT u32Reg,MS_BOOL bEnable,MS_U8 u8Mask)924 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask)
925 {
926 MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
927 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) :
928 (RIU8[u32Reg8] & ~(u8Mask));
929 }
930
HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg,MS_U8 u8Val,MS_U8 u8Msk)931 void HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg, MS_U8 u8Val, MS_U8 u8Msk)
932 {
933 MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
934 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk));
935 }
936
HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg,MS_U32 u32Val)937 void HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg, MS_U32 u32Val)
938 {
939 if ( __builtin_constant_p( u32Reg ) && !((u32Reg) & 0x01) )
940 {
941 RIU[u32Reg] = (MS_U16)(u32Val);
942 RIU[(u32Reg) + 2] = (MS_U16)((u32Val) >> 16);
943 }
944 else
945 {
946 if (u32Reg & 0x01)
947 {
948 RIU8[(u32Reg << 1) - 1] = u32Val;
949 RIU[u32Reg + 1] = (u32Val >> 8);
950 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24);
951 }
952 else
953 {
954 RIU[u32Reg] = u32Val;
955 RIU[u32Reg + 2] = (u32Val >> 16);
956 }
957 }
958 }
959
960
HAL_MVD_MemRead4Byte(MS_VIRT u32Address)961 MS_U32 HAL_MVD_MemRead4Byte(MS_VIRT u32Address)
962 {
963 volatile MS_U32 u32Val;
964 MS_ASSERT(!(u32Address & 0x03UL));
965
966 HAL_MVD_CPU_Sync();
967 HAL_MVD_ReadMemory();
968
969 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
970
971 u32Val = *(volatile MS_U32*) HAL_MVD_PA2NonCacheSeg(u32Address);
972
973 //MVD_PRINT("mvd rd 0x%lx = 0x%lx\n", u32Address, u32Val);
974 return u32Val;
975 }
976
HAL_MVD_MemRead2Byte(MS_VIRT u32Address)977 MS_U16 HAL_MVD_MemRead2Byte(MS_VIRT u32Address)
978 {
979 MS_VIRT u32ReadAddr;
980 MS_U32 u32ReadValue;
981 MS_U16 u16Value;
982 MS_U8 u8Shift;
983 u32ReadAddr = (u32Address >> 2) << 2;
984 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
985 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
986
987 u16Value = (MS_U16)(u32ReadValue >> u8Shift);
988 if(u8Shift == 24)
989 {
990 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr+4);
991 u16Value = u16Value << 8 || (MS_U16)(u32ReadValue & 0xFF);
992 }
993 return u16Value;
994 }
995
HAL_MVD_MemReadByte(MS_VIRT u32Address)996 MS_U8 HAL_MVD_MemReadByte(MS_VIRT u32Address)
997 {
998 MS_VIRT u32ReadAddr;
999 MS_U32 u32ReadValue;
1000 MS_U8 u8Value;
1001 MS_U8 u8Shift;
1002 u32ReadAddr = (u32Address >> 2) << 2;
1003 u8Shift = (MS_U8)((u32Address & 0x03) * 8);
1004 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1005 u8Value = (MS_U8)(u32ReadValue >> u8Shift);
1006
1007 return u8Value;
1008 }
1009
HAL_MVD_MemWrite4Byte(MS_VIRT u32Address,MS_U32 u32Value)1010 MS_BOOL HAL_MVD_MemWrite4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1011 {
1012
1013 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1014
1015 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1016
1017 HAL_MVD_CPU_Sync();
1018 HAL_MVD_FlushMemory();
1019
1020 return TRUE;
1021 }
1022
HAL_MVD_MemWriteByte(MS_VIRT u32Address,MS_U8 u8Value)1023 MS_BOOL HAL_MVD_MemWriteByte(MS_VIRT u32Address, MS_U8 u8Value)
1024 {
1025 MS_VIRT u32ReadAddr;
1026 MS_U32 u32ReadValue;
1027 MS_U8 u8Shift;
1028
1029 u32ReadAddr = (u32Address >> 2) << 2;
1030 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8);
1031 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1032 u32ReadValue &= ~(0xFFUL << u8Shift);
1033 u32ReadValue |= ((MS_U32)u8Value << u8Shift);
1034 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1035 return TRUE;
1036 }
1037
HAL_MVD_MemWrite2Byte(MS_VIRT u32Address,MS_U16 u16Value)1038 MS_BOOL HAL_MVD_MemWrite2Byte(MS_VIRT u32Address, MS_U16 u16Value)
1039 {
1040 MS_VIRT u32ReadAddr;
1041 MS_U32 u32ReadValue;
1042 MS_U8 u8Shift;
1043
1044 u8Shift = (MS_U8)((u32Address & 0x03UL) * 8) ;
1045 if(u8Shift < 24)
1046 {
1047 u32ReadAddr = (u32Address >> 2) << 2;
1048 u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1049 u32ReadValue &= ~(0xFFFF << u8Shift);
1050 u32ReadValue |= ((MS_U32)u16Value << u8Shift);
1051 HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1052 }
1053 else
1054 {
1055 HAL_MVD_MemWriteByte(u32Address, (MS_U8)(u16Value));
1056 HAL_MVD_MemWriteByte(u32Address+1, (MS_U8)(u16Value >> 8));
1057 }
1058 return TRUE;
1059 }
1060
1061
HAL_MVD_SetReqMask(MS_BOOL bEnMask)1062 void HAL_MVD_SetReqMask(MS_BOOL bEnMask)
1063 {
1064 HAL_VPU_EX_MIU_RW_Protect(bEnMask);
1065
1066 if (MVDHW_ON_MIU1) // miu1
1067 {
1068 HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W
1069 HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W
1070 }
1071 else // miu0
1072 {
1073 HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6); //MVD R/W
1074 HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2); //MVD bbu R/W
1075 }
1076 HAL_MVD_Delayms(1);
1077
1078 return;
1079 }
1080
HAL_MVD_Memset4Byte(MS_VIRT u32Address,MS_U32 u32Value)1081 static MS_BOOL HAL_MVD_Memset4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1082 {
1083 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1084
1085 *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1086
1087 return TRUE;
1088 }
1089
1090 //------------------------------------------------------------------------------
1091 /// Initialize MVD
1092 /// @return -result of resetting MVD hardware
1093 //------------------------------------------------------------------------------
HAL_MVD_RstHW(void)1094 MS_BOOL HAL_MVD_RstHW(void)
1095 {
1096 MS_U32 u32Time = 0;
1097
1098 #if defined(MSOS_TYPE_ECOS)
1099 if(MsOS_In_Interrupt() != TRUE)
1100 {
1101 OSAL_MVD_IntDisable();
1102 OSAL_MVD_LockHwMutex();
1103 }
1104 #else
1105 OSAL_MVD_LockHwMutex();
1106 #endif
1107
1108 HAL_MVD_SetReqMask(ENABLE);
1109
1110 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU
1111 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset
1112
1113 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD
1114 HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset
1115
1116 u32Time = HAL_MVD_GetTime();
1117 while ( ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == 0)
1118 && ((HAL_MVD_GetTime() - u32Time) < 200) );
1119
1120 #if 0 //bring up
1121 MVD_PRINT("====================>>>>MVD Ctrl status1.5a : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1122 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset
1123 HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_1);//release reset
1124 MVD_DEBUGINFO(MVD_PRINT("MVD Ctrl status : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS)));
1125 MVD_PRINT("====================>>>>MVD Ctrl status1.5b : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1126 #endif
1127
1128 HAL_MVD_SetReqMask(DISABLE);
1129
1130 #if defined(MSOS_TYPE_ECOS)
1131 if(MsOS_In_Interrupt() != TRUE)
1132 {
1133 OSAL_MVD_UnlockHwMutex();
1134 OSAL_MVD_IntEnable();
1135 }
1136 #else
1137 OSAL_MVD_UnlockHwMutex();
1138 #endif
1139
1140 return TRUE;
1141 }
1142
1143
1144 //------------------------------------------------------------------------------
1145 /// Release CPU
1146 /// @return -release CPU successfully or not
1147 //------------------------------------------------------------------------------
HAL_MVD_ReleaseFW(void)1148 MS_BOOL HAL_MVD_ReleaseFW(void)
1149 {
1150 //For dual decoder, we only release VPU if it is not released yet.
1151 if (TRUE == HAL_VPU_EX_IsRsted())
1152 {
1153 MVD_DEBUGINFO(MVD_PRINT("%s VPU_IsRsted\n", __FUNCTION__));
1154 return TRUE;
1155 }
1156
1157 HAL_VPU_EX_SwRstRelse();
1158 return TRUE;
1159 }
1160
HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)1161 MS_VIRT HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)
1162 {
1163 return MS_PA2KSEG1(u32PhyAddr);
1164 }
1165
HAL_MVD_GetTime(void)1166 MS_U32 HAL_MVD_GetTime(void)
1167 {
1168 return MsOS_GetSystemTime();
1169 }
1170
HAL_MVD_Delayms(MS_U32 u32msecs)1171 void HAL_MVD_Delayms(MS_U32 u32msecs)
1172 {
1173 MsOS_DelayTask(u32msecs);
1174 }
1175
HAL_MVD_CPU_Sync(void)1176 void HAL_MVD_CPU_Sync(void)
1177 {
1178 MAsm_CPU_Sync();
1179 }
1180
HAL_MVD_FlushMemory(void)1181 void HAL_MVD_FlushMemory(void)
1182 {
1183 MsOS_FlushMemory();
1184 }
1185
HAL_MVD_ReadMemory(void)1186 void HAL_MVD_ReadMemory(void)
1187 {
1188 MsOS_ReadMemory();
1189 }
1190
1191 //Record the memory layout from system configuration
HAL_MVD_SetMEMCfg(MS_U8 u8Idx,MVD_MEMCfg * pMEMCfg)1192 MS_BOOL HAL_MVD_SetMEMCfg(MS_U8 u8Idx, MVD_MEMCfg* pMEMCfg)
1193 {
1194 memcpy(&(pMVDHalContext->stMemCfg[u8Idx]), pMEMCfg, sizeof(MVD_MEMCfg));
1195 //record the MIU settings
1196 pMVDHalContext->stMiuCfg.u32Miu1BaseAddr = pMEMCfg->u32Miu1BaseAddr;
1197 pMVDHalContext->stMiuCfg.u32Miu2BaseAddr = pMEMCfg->u32Miu2BaseAddr;
1198 pMVDHalContext->stMiuCfg.u32Miu3BaseAddr = pMEMCfg->u32Miu3BaseAddr;
1199 pMVDHalContext->stMiuCfg.u8FWMiuSel = pMEMCfg->u8FWMiuSel;
1200 pMVDHalContext->stMiuCfg.u8HWMiuSel = pMEMCfg->u8HWMiuSel;
1201 return TRUE;
1202 }
1203
HAL_MVD_GetMEMCfg(MS_U8 u8Idx)1204 MVD_MEMCfg* HAL_MVD_GetMEMCfg(MS_U8 u8Idx)
1205 {
1206 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1207 MVD_MEMCfg* pInfo = NULL;
1208 pInfo = &(pMVDHalContext->stMemCfg[u8Idx]);
1209 return pInfo;
1210 }
1211
HAL_MVD_SetFWCfg(MS_U8 u8Idx,MVD_FWCfg * pFWCfg)1212 MS_BOOL HAL_MVD_SetFWCfg(MS_U8 u8Idx, MVD_FWCfg* pFWCfg)
1213 {
1214 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1215 memcpy(&(pMVDHalContext->stFwCfg[u8Idx]), pFWCfg, sizeof(MVD_FWCfg));
1216 memcpy(&(pMVDHalContext->stFwCfg[u8Idx].stFBReduction), &pFWCfg->stFBReduction,sizeof(MVD_FB_Reduction));
1217 return TRUE;
1218 }
1219
HAL_MVD_GetFWCfg(MS_U8 u8Idx)1220 MVD_FWCfg* HAL_MVD_GetFWCfg(MS_U8 u8Idx)
1221 {
1222 MVD_FWCfg* pInfo = NULL;
1223 //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1224 pInfo = &(pMVDHalContext->stFwCfg[u8Idx]);
1225 return pInfo;
1226 }
1227
HAL_MVD_GetFBMode(MS_U8 u8Idx)1228 MS_U8 HAL_MVD_GetFBMode(MS_U8 u8Idx)
1229 {
1230 MS_U8 u8Mode = MVD3_SD_MODE;
1231 u8Mode = pMVDHalContext->stFwCfg[u8Idx].u8FBMode;
1232 MVD_DEBUGINFO(MVD_PRINT("FBMode=0x%x\n", u8Mode));
1233 return u8Mode;
1234 }
1235
HAL_MVD_GetCodecType(MS_U8 u8Idx)1236 MVD_CodecType HAL_MVD_GetCodecType(MS_U8 u8Idx)
1237 {
1238 MVD_CodecType eCodecType = E_MVD_CODEC_UNKNOWN;
1239 eCodecType = pMVDHalContext->stFwCfg[u8Idx].eCodecType;
1240 return eCodecType;
1241 }
1242
HAL_MVD_GetSrcMode(MS_U8 u8Idx)1243 MVD_SrcMode HAL_MVD_GetSrcMode(MS_U8 u8Idx)
1244 {
1245 MVD_SrcMode eSrcMode = E_MVD_SRC_UNKNOWN;
1246 eSrcMode = pMVDHalContext->stFwCfg[u8Idx].eSrcMode;
1247 return eSrcMode;
1248 }
1249
HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)1250 MS_BOOL HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)
1251 {
1252 if(pMVDHalContext != NULL)
1253 {
1254 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = mode;
1255 return TRUE;
1256 }
1257 else
1258 {
1259 return FALSE;
1260 }
1261 }
1262
1263
HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)1264 MVD_CtrlCfg* HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)
1265 {
1266 MVD_CtrlCfg* pInfo = NULL;
1267 pInfo = &(pMVDHalContext->stCtrlCfg[u8Idx]);
1268 return pInfo;
1269 }
1270
HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)1271 MVD_SLQTBLInfo* HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)
1272 {
1273 MVD_SLQTBLInfo* pInfo = NULL;
1274 pInfo = &(pMVDHalContext->stSlqTblInfo[u8Idx]);
1275 return pInfo;
1276 }
1277
HAL_MVD_PowerCtrl(MS_BOOL bOn)1278 void HAL_MVD_PowerCtrl(MS_BOOL bOn)
1279 {
1280 #ifdef CONFIG_MSTAR_CLKM
1281 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD, bOn);
1282 #else
1283 HAL_MVD_RegWriteBit(REG_CKG_MVD_ENABLE, bOn, CKG_MVD_ENABLE_GATED);
1284 HAL_MVD_RegWriteBit(REG_CKG_MVD_ENABLE, bOn, CKG_MVD_PAS_ENABLE_GATED);
1285
1286 HAL_MVD_RegWriteByteMask(REG_CKG_MVD, CKG_MVD_288MHZ, CKG_MVD_MASK);
1287 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_GATED);
1288 HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_INVERT);
1289 #endif
1290 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_GATED);
1291 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_INVERT);
1292
1293 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_GATED);
1294 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_INVERT);
1295
1296 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_GATED);
1297 HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_INVERT);
1298
1299 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_GATED);
1300 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_INVERT);
1301
1302 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_GATED);
1303 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_INVERT);
1304
1305 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_GATED);
1306 HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_INVERT);
1307
1308 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_GATED);
1309 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_INVERT);
1310
1311 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_GATED);
1312 HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_INVERT);
1313
1314 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_GATED);
1315 HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_INVERT);
1316
1317 return;
1318 }
1319
1320 #if 0
1321 void HAL_MVD_Sleep(MS_U32 u32us)
1322 {
1323 MsOS_DelayTaskUs(u32us);
1324 }
1325 #endif
HAL_MVD_ResetHandShake(MS_U8 u8Idx,MVD_HANDSHAKE_CMD cmd)1326 void HAL_MVD_ResetHandShake(MS_U8 u8Idx, MVD_HANDSHAKE_CMD cmd)
1327 {
1328 MS_U32 u32BufAddr = GET_FRMINFO_BUFFADD(u8Idx);
1329 HAL_MVD_CPU_Sync();
1330 HAL_MVD_ReadMemory();
1331 MVD_CMD_HANDSHADE_INDEX u32CmdState;
1332 u32CmdState.value= HAL_MVD_MemRead4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX);
1333 switch (cmd)
1334 {
1335 case MVD_HANDSHAKE_PAUSE:
1336 (u32CmdState.mvdcmd_handshake_pause) = 0;
1337 break;
1338 case MVD_HANDSHAKE_SLQ_RST:
1339 (u32CmdState.mvdcmd_handshake_slq_reset) = 0;
1340 break;
1341 case MVD_HANDSHAKE_STOP:
1342 (u32CmdState.mvdcmd_handshake_stop) = 0;
1343 break;
1344 case MVD_HANDSHAKE_SKIP_DATA:
1345 (u32CmdState.mvdcmd_handshake_skip_data) = 0;
1346 break;
1347 case MVD_HANDSHAKE_SINGLE_STEP:
1348 (u32CmdState.mvdcmd_handshake_single_step) = 0;
1349 break;
1350 case MVD_HANDSHAKE_SCALER_INFO:
1351 (u32CmdState.mvdcmd_handshake_scaler_data_ready) = 0;
1352 break;
1353 case MVD_HANDSHAKE_GET_NXTDISPFRM:
1354 (u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready) = 0;
1355 break;
1356 case MVD_HANDSHAKE_PARSER_RST:
1357 (u32CmdState.mvdcmd_handshake_parser_rst) = 0;
1358 break;
1359 case MVD_HANDSHAKE_RST_CC608:
1360 (u32CmdState.mvdcmd_handshake_cc608_rst) = 0;
1361 break;
1362 case MVD_HANDSHAKE_RST_CC708:
1363 (u32CmdState.mvdcmd_handshake_cc708_rst) = 0;
1364 break;
1365 case MVD_HANDSHAKE_VIRTUAL_COMMAND:
1366 (u32CmdState.mvdcmd_handshake_virtualCommand) = 0;
1367 break;
1368 case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
1369 (u32CmdState.mvdcmd_handshake_flush) = 0;
1370 break;
1371 case MVD_HANDSHAKE_VSYNC_CONTROL:
1372 (u32CmdState.mvdcmd_handshake_vsync_control) = 0;
1373 break;
1374 default:
1375 break;
1376 }
1377 HAL_MVD_MemWrite4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX,u32CmdState.value);
1378 MsOS_FlushMemory();
1379 }
1380
1381 //------------------------------------------------------------------------------
1382 /// Wait MVD command ready or timeout
1383 /// @return -MVD command ready or timeout
1384 //------------------------------------------------------------------------------
HAL_MVD_TimeOut(MS_U8 u8Idx)1385 MS_BOOL HAL_MVD_TimeOut(MS_U8 u8Idx)
1386 {
1387 MS_U32 i;
1388 MS_U32 u32StartTime = MsOS_GetSystemTime();
1389
1390 for ( i = 0; i < MVD_PollingTimes; i++ )
1391 {
1392 ///- wait until MVD command ready or timeout
1393 if ( ( HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY ) == MVD_STATUS_READY )
1394 {
1395 return FALSE;
1396 }
1397
1398 if (/*(TRUE == pMVDHalContext->bStopped[u8Idx]) ||*/ ((MsOS_GetSystemTime()-u32StartTime)>1300))
1399 {
1400 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
1401 return TRUE;
1402 }
1403
1404 //HAL_MVD_Sleep(5);
1405 }
1406 MVD_DEBUGERROR( MVD_PRINT("MVD_TimeOut=%x\n", i) );
1407 return TRUE;
1408 }
1409
1410 //------------------------------------------------------------------------------
1411 /// Set MVD firmware command
1412 /// @param -u8cmd \b IN : MVD command
1413 /// @param -pstCmdArg \b IN : pointer to command argument
1414 //------------------------------------------------------------------------------
HAL_MVD_MVDCommand(MS_U8 u8cmd,MVD_CmdArg * pstCmdArg)1415 MS_BOOL HAL_MVD_MVDCommand ( MS_U8 u8cmd, MVD_CmdArg *pstCmdArg )
1416 {
1417 MS_BOOL bRet = TRUE;
1418 #ifdef VDEC3
1419 MS_U32 u32CmdArg;
1420 MS_U32 u32Ret = FALSE;
1421 MS_U32 u32Timeout;
1422 MS_U8 u8HalIdx = pstCmdArg->Arg5;
1423 MS_U32 u32Id = MVD_GetStreamId(u8HalIdx);
1424 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1425 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8HalIdx);
1426 CMD_QUEUE *pShm = (CMD_QUEUE *)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + VCOMMANDQ_INFO_START + u8VPUIdx*0x100000);
1427 MS_VIRT u32BufStart2 = NULL;
1428 MS_BOOL bResponse = FALSE;
1429 #endif
1430 #if defined(MSOS_TYPE_ECOS)
1431 if(MsOS_In_Interrupt() != TRUE)
1432 {
1433 OSAL_MVD_IntDisable();
1434 OSAL_MVD_LockHwMutex();
1435 }
1436 #else
1437 OSAL_MVD_LockHwMutex();
1438 #endif
1439
1440
1441 #ifdef VDEC3
1442 if(HAL_MVD_IsDisplayCommand(u8cmd) == TRUE)
1443 {
1444 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1445 {
1446 // clear handshake dram
1447 u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1448
1449 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1450
1451 MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1452
1453 *temp2 = 0;
1454
1455 MsOS_FlushMemory();
1456 }
1457
1458
1459 u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1460
1461 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1462
1463 do
1464 {
1465 u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1466
1467
1468 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1469 {
1470 bRet = FALSE;
1471 break;
1472 }
1473 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1474 {
1475 bRet = FALSE;
1476 break;
1477 }
1478 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1479
1480 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1481 {
1482 bRet = FALSE;
1483 goto _CMD_DONE;
1484 }
1485
1486
1487 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1488
1489 do
1490 {
1491 u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1492
1493 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1494 {
1495 bRet = FALSE;
1496 break;
1497 }
1498 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1499 {
1500 bRet = FALSE;
1501 break;
1502 }
1503 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1504
1505 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1506 {
1507 bRet = FALSE;
1508 goto _CMD_DONE;
1509 }
1510
1511 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1512 {
1513 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1514
1515 while(MsOS_GetSystemTime() < u32Timeout)
1516 {
1517 #if 0
1518 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1519 {
1520 bResponse = TRUE;
1521 break;
1522 }
1523 #else
1524 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1525 {
1526 bResponse = TRUE;
1527 break;
1528 }
1529 #endif
1530 }
1531
1532 if(bResponse == FALSE) // fail case
1533 {
1534 bRet = FALSE;
1535 goto _CMD_DONE;
1536 }
1537
1538 pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1539 pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1540 pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1541 pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1542 pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1543 }
1544
1545 }
1546 else if(HAL_MVD_IsNormalCommand(u8cmd) == TRUE)
1547 {
1548 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1549 {
1550 // clear handshake dram
1551 u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1552
1553 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1554
1555 MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1556
1557 *temp2 = 0;
1558
1559 MsOS_ReadMemory();
1560 MsOS_FlushMemory();
1561 }
1562
1563 u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1564
1565 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1566
1567 do
1568 {
1569 //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_ARG,u32CmdArg);
1570 u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1571
1572 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1573 {
1574 bRet = FALSE;
1575 break;
1576 }
1577 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1578 {
1579 bRet = FALSE;
1580 break;
1581 }
1582 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1583
1584
1585 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1586 {
1587 bRet = FALSE;
1588 goto _CMD_DONE;
1589 }
1590
1591
1592 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1593 do
1594 {
1595 //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_CMD,u8cmd|(pstCmdArg->Arg5<<24)|(pstCmdArg->Arg4<<16));
1596 u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1597
1598 if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1599 {
1600 bRet = FALSE;
1601 break;
1602 }
1603 else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1604 {
1605 bRet = FALSE;
1606 break;
1607 }
1608 }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1609
1610 if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1611 {
1612 bRet = FALSE;
1613 goto _CMD_DONE;
1614 }
1615
1616 if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1617 {
1618 u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1619
1620 while(MsOS_GetSystemTime() < u32Timeout)
1621 {
1622 #if 0
1623 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1624 {
1625 bResponse = TRUE;
1626 break;
1627 }
1628 #else
1629 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1630 {
1631 bResponse = TRUE;
1632 break;
1633 }
1634 #endif
1635 }
1636
1637 if(bResponse == FALSE) // fail case
1638 {
1639 bRet = FALSE;
1640 goto _CMD_DONE;
1641 }
1642
1643 pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1644 pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1645 pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1646 pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1647 pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1648 }
1649 }
1650 else
1651 #endif
1652 {
1653 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1654 {
1655 bRet = FALSE;
1656 goto _CMD_DONE;
1657 }
1658
1659 HAL_MVD_RegWriteByte(MVD_ARG0, pstCmdArg->Arg0);
1660 HAL_MVD_RegWriteByte(MVD_ARG1, pstCmdArg->Arg1);
1661 HAL_MVD_RegWriteByte(MVD_ARG2, pstCmdArg->Arg2);
1662 HAL_MVD_RegWriteByte(MVD_ARG3, pstCmdArg->Arg3);
1663 HAL_MVD_RegWriteByte(MVD_ARG4, pstCmdArg->Arg4);
1664 HAL_MVD_RegWriteByte(MVD_ARG5, pstCmdArg->Arg5);
1665 HAL_MVD_RegWriteByte(MVD_COMMAND, u8cmd);
1666 if ((CMD_GET_AFD != u8cmd) && (CMD_SLQ_GET_TBL_RPTR != u8cmd) &&
1667 (CMD_SLQ_UPDATE_TBL_WPTR != u8cmd) && (CMD_GET_NEXTDISPFRM != u8cmd) &&
1668 (CMD_DECODE_STATUS != u8cmd) && (CMD_RD_PTS != u8cmd) &&
1669 (CMD_GET_INT_STAT != u8cmd) && (CMD_RD_IO != u8cmd))
1670 {
1671 MVD_DEBUG_FWCMD(MVD_PRINT("MVD_CMD: %x; %x, %x, %x, %x, %x, %x\n", u8cmd, pstCmdArg->Arg0,
1672 pstCmdArg->Arg1, pstCmdArg->Arg2, pstCmdArg->Arg3, pstCmdArg->Arg4, pstCmdArg->Arg5));
1673 }
1674
1675 if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1676 {
1677 bRet = FALSE;
1678 goto _CMD_DONE;
1679 }
1680
1681 pstCmdArg->Arg0 = HAL_MVD_RegReadByte(MVD_ARG0);
1682 pstCmdArg->Arg1 = HAL_MVD_RegReadByte(MVD_ARG1);
1683 pstCmdArg->Arg2 = HAL_MVD_RegReadByte(MVD_ARG2);
1684 pstCmdArg->Arg3 = HAL_MVD_RegReadByte(MVD_ARG3);
1685 pstCmdArg->Arg4 = HAL_MVD_RegReadByte(MVD_ARG4);
1686 pstCmdArg->Arg5 = HAL_MVD_RegReadByte(MVD_ARG5);
1687 }
1688
1689 _CMD_DONE:
1690 #if defined(MSOS_TYPE_ECOS)
1691 if(MsOS_In_Interrupt() != TRUE)
1692 {
1693 OSAL_MVD_UnlockHwMutex();
1694 OSAL_MVD_IntEnable();
1695 }
1696 #else
1697 OSAL_MVD_UnlockHwMutex();
1698 #endif
1699
1700
1701 if (!bRet)
1702 {
1703 MVD_DEBUG_FWCMD(MVD_PRINT("%s timeout dump pc\n", __FUNCTION__));
1704 MS_U32 x=0;
1705 for (x=0; x<30; x++)
1706 MVD_DEBUG_FWCMD(MVD_PRINT("0x%x\n", HAL_VPU_EX_GetProgCnt()));
1707 MVD_DEBUG_FWCMD(MVD_PRINT("###\n"));
1708 }
1709
1710 return bRet;
1711 }
1712
HAL_MVD_SetSyncClk(MS_BOOL bEnable)1713 void HAL_MVD_SetSyncClk(MS_BOOL bEnable)
1714 {
1715 MS_ASSERT(0==bEnable);//Notice: Euclid & T3 have no sync_mode; Bit4 must be 0.
1716
1717 #if defined(MSOS_TYPE_ECOS)
1718 if(MsOS_In_Interrupt() != TRUE)
1719 {
1720 OSAL_MVD_IntDisable();
1721 OSAL_MVD_LockHwMutex();
1722 }
1723 #else
1724 OSAL_MVD_LockHwMutex();
1725 #endif
1726 HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE);
1727 #if defined(MSOS_TYPE_ECOS)
1728 if(MsOS_In_Interrupt() != TRUE)
1729 {
1730 OSAL_MVD_UnlockHwMutex();
1731 OSAL_MVD_IntEnable();
1732 }
1733 #else
1734 OSAL_MVD_UnlockHwMutex();
1735 #endif
1736
1737 return;
1738 }
1739
HAL_MVD_InitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)1740 MS_BOOL HAL_MVD_InitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)
1741 {
1742 //Set MVD Clock @ reg_CHIPTOP
1743 HAL_MVD_PowerCtrl(ENABLE);
1744 #ifdef CONFIG_MSTAR_CLKM
1745 if(eDecType == E_VPU_EX_DECODER_MVD)
1746 {
1747 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, ENABLE);
1748 }
1749 if(SourceType == E_VPU_EX_INPUT_TSP)
1750 {
1751 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, ENABLE);
1752 }
1753 #endif
1754
1755 #ifdef CONFIG_MSTAR_SRAMPD
1756 HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, ENABLE, SRAM_SD_EN_MVD);
1757 HAL_MVD_Delayms(1);
1758 #endif
1759
1760 //Set MVD Clock aync
1761 HAL_MVD_SetSyncClk(DISABLE);
1762
1763 //MVD reset
1764 if(!HAL_MVD_RstHW())
1765 {
1766 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW failed\n"));
1767 return FALSE;
1768 }
1769 else
1770 {
1771 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW success\n"));
1772 }
1773
1774 return TRUE;
1775 }
1776
1777
1778 //------------------------------------------------------------------------------
1779 /// Get MVD firmware version
1780 /// @return -firmware version
1781 //------------------------------------------------------------------------------
HAL_MVD_GetFWVer(MS_U32 u32VpuSid)1782 MS_U32 HAL_MVD_GetFWVer(MS_U32 u32VpuSid)
1783 {
1784 #if 0
1785 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_FW);
1786 #else
1787 //UNUSED(u32VpuSid);
1788 MVD_CmdArg mvdcmd;
1789
1790 SETUP_CMDARG(mvdcmd);
1791 mvdcmd.Arg5 = HAL_VPU_EX_GetTaskId(u32VpuSid);
1792 if (HAL_MVD_MVDCommand( CMD_GET_FW_VERSION, &mvdcmd ) == FALSE)
1793 {
1794 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_GET_FW_VERSION ) );
1795 return 0;
1796 }
1797 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1798 #endif
1799 }
1800
1801 //------------------------------------------------------------------------------
1802 /// Get MVD firmware interface version
1803 /// @return -firmware interface version
1804 //------------------------------------------------------------------------------
HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)1805 MS_U32 HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)
1806 {
1807 #if 0
1808 return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_IF);
1809 #else
1810 UNUSED(u32VpuSid);
1811 MVD_CmdArg mvdcmd;
1812
1813 SETUP_CMDARG(mvdcmd);
1814 if (HAL_MVD_MVDCommand( CMD_INTERFACE_VERSION, &mvdcmd ) == FALSE)
1815 {
1816 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_INTERFACE_VERSION ) );
1817 return 0;
1818 }
1819 return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1820 #endif
1821 }
1822
1823 //------------------------------------------------------------------------------
1824 /// Check MVD firmware status
1825 /// @return -firmware is ready or not
1826 //------------------------------------------------------------------------------
1827
1828 #ifdef VDEC3
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1829 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1830 {
1831 MS_U32 u32Id = MVD_GetStreamId(u32VpuSid);
1832 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1833 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u32VpuSid);
1834 MS_U32 u32TimeOut = MsOS_GetSystemTime() + 500;
1835 unsigned int* pVersion = (unsigned int*)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + OFFSET_BASE + u8VPUIdx*0x100000);
1836 MS_BOOL ret = FALSE;
1837
1838 while(MsOS_GetSystemTime() < u32TimeOut)
1839 {
1840 if(((*pVersion) == FW_VERSION) && ((*(pVersion+4)) == INTERFACE_VERSION))
1841 {
1842 ret = TRUE;
1843 break;
1844 }
1845 }
1846
1847 if (ret == FALSE)
1848 {
1849 MVD_ERROR(MVD_PRINT("MVD f/w header version is wrong,%x,%x,%x,%x\n",(*(pVersion+4)), INTERFACE_VERSION,(*pVersion), FW_VERSION));
1850 }
1851
1852 return ret;
1853 }
1854
1855 #else
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1856 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1857 {
1858 MS_U32 u32TimeOut = 2000;
1859
1860 //check firmware version consistent with header file
1861 while ((INTERFACE_VERSION != HAL_MVD_GetFWIfVer(u32VpuSid)) && (--u32TimeOut));
1862 if (u32TimeOut == 0)
1863 {
1864 MVD_ERROR(MVD_PRINT("MVD_FW_IF_Version=%lx inconsistent with header file(%x)!\n",
1865 HAL_MVD_GetFWIfVer(u32VpuSid), INTERFACE_VERSION));
1866 return FALSE;
1867 }
1868
1869 if (FW_VERSION != HAL_MVD_GetFWVer(u32VpuSid))
1870 {
1871 MVD_DEBUGINFO(MVD_PRINT("Warning! FWBinVer(%lx) != FWHdrVer(%x)\n", HAL_MVD_GetFWVer(u32VpuSid), FW_VERSION));
1872 }
1873 MVD_DEBUGINFO(MVD_PRINT("MVD version Interface = %x, FW = %x\n", INTERFACE_VERSION, FW_VERSION));
1874
1875 return TRUE;
1876 }
1877 #endif
_DumpCtrl(MS_U8 u8Idx)1878 MS_BOOL _DumpCtrl(MS_U8 u8Idx)
1879 {
1880 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1881
1882 //MVD_PRINT("u32VA=0x%lx, PA=0x%x\n", u32VA, pstMemCfg->u32FWCodeAddr);
1883 struct _ctl_info *ctl_ptr = (struct _ctl_info *)
1884 HAL_MVD_PA2NonCacheSeg(pstMemCfg->u32FWCodeAddr + CTL_INFO_ADDR);
1885 MS_U32 u32timeout = HAL_MVD_GetTime() + 1000;//u32HVDCmdTimeout;
1886
1887 HAL_MVD_ReadMemory();
1888
1889 MVD_DEBUGINFO(MVD_PRINT("version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1890 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1891
1892 while (CTL_TASK_CMDRDY != ctl_ptr->statue)
1893 {
1894 if (HAL_MVD_GetTime() > u32timeout)
1895 {
1896 MVD_DEBUGERROR(MVD_PRINT("CTRL timeout!!! %d\n", __LINE__));
1897 return FALSE;
1898 }
1899 }
1900
1901 MVD_DEBUGINFO(MVD_PRINT("Version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1902 ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1903
1904 MS_U8 i;
1905
1906 for (i = 0; i < 4; i++)
1907 {
1908 MVD_DEBUGINFO(MVD_PRINT("%s: Task %d, status=%d\n", __FUNCTION__, i, ctl_ptr->task_statue[i]));
1909 }
1910 return TRUE;
1911 }
1912
1913
MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)1914 static VPU_EX_SourceType MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)
1915 {
1916 VPU_EX_SourceType eVpuSrcType = E_VPU_EX_INPUT_NONE;
1917 switch (eSrcMode)
1918 {
1919 case E_MVD_TS_MODE:
1920 case E_MVD_TS_FILE_MODE:
1921 eVpuSrcType = E_VPU_EX_INPUT_TSP;
1922 break;
1923
1924 case E_MVD_SLQ_TBL_MODE:
1925 case E_MVD_SLQ_MODE:
1926 case E_MVD_FILE_MODE:
1927 eVpuSrcType = E_VPU_EX_INPUT_FILE;
1928 break;
1929
1930 case E_MVD_SRC_UNKNOWN:
1931 default:
1932 break;
1933 }
1934 return eVpuSrcType;
1935 }
1936
MVD_GetTaskInfo(VPU_EX_TaskInfo * pstTaskInfo,MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1937 static void MVD_GetTaskInfo(VPU_EX_TaskInfo* pstTaskInfo, MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1938 {
1939 pstTaskInfo->u32Id = (u8Idx << 8 | eVpuId);
1940 pstTaskInfo->eDecType = E_VPU_EX_DECODER_MVD;
1941 pstTaskInfo->eVpuId = eVpuId;
1942 pstTaskInfo->eSrcType = MVD_MapVpuSrcType(HAL_MVD_GetSrcMode(u8Idx));
1943 pstTaskInfo->u32HeapSize = MVD_DRAM_SIZE;
1944 }
1945
HAL_MVD_CreateTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId,MS_BOOL bShareBBU)1946 MS_BOOL HAL_MVD_CreateTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId, MS_BOOL bShareBBU)
1947 {
1948 MS_BOOL bRet = FALSE;
1949 MS_BOOL bFWdecideFB = FALSE;
1950 MVD_FWCfg* pstCfg = HAL_MVD_GetFWCfg(u8Idx);
1951 HAL_VPU_EX_SetFWReload(!(pstCfg->bNotReload));
1952
1953 MVD_DEBUGINFO(MVD_PRINT("\n\n Create Task(%x)!!!\n", u8Idx));
1954 VPU_EX_TaskInfo stTaskInfo;
1955 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
1956
1957 VPU_EX_FWCodeCfg stVpuFWCfg;
1958 VPU_EX_NDecInitPara stVpuInitPara;
1959 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1960 stVpuInitPara.pTaskInfo = &stTaskInfo;
1961 stVpuInitPara.pVLCCfg = NULL;
1962
1963 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1964 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1965 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1966 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1967 stVpuFWCfg.u32DstSize = pMemCfg->u32FWCodeSize;
1968 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
1969
1970 #ifdef VDEC3
1971 VPU_EX_FBCfg pFBCfg;
1972 stVpuInitPara.pFBCfg = &pFBCfg;
1973
1974 if(pMVDHalContext->bCMAUsed == TRUE)
1975 {
1976 stVpuInitPara.pFBCfg->u32FrameBufAddr = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_miu_start_offset;
1977 stVpuInitPara.pFBCfg->u32FrameBufSize = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_length;
1978 bFWdecideFB = TRUE;
1979
1980 }
1981 stTaskInfo.u8HalId = u8Idx;
1982 pMVDHalContext->_stMVDStream[u8Idx].u32SLQId = HAL_VPU_EX_GetBBUId(stTaskInfo.u32Id, &stTaskInfo, bShareBBU);
1983 if(pMVDHalContext->_stMVDStream[u8Idx].u32SLQId == HAL_VPU_INVALID_BBU_ID)
1984 {
1985 MVD_DEBUGINFO(MVD_PRINT("ERROR!!!MVD GetBBU Id Fail \n"));
1986 }
1987 else
1988 {
1989 bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara, bFWdecideFB, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId);
1990 }
1991
1992 if(bRet == FALSE)
1993 {
1994 if(!HAL_VPU_EX_FreeBBUId(stTaskInfo.u32Id, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId, &stTaskInfo))
1995 {
1996 MVD_DEBUGERROR(MVD_PRINT("[%s][%d]ERROR!!! Free BBU Id Fail !!!\n",__FUNCTION__,__LINE__));
1997 }
1998 }
1999 #else
2000 bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara);
2001 #endif
2002 MVD_DEBUGINFO(MVD_PRINT(" Create Task!!! bRet=%x ###\n\n", bRet));
2003 _DumpCtrl(u8Idx);
2004
2005 return bRet;
2006 }
2007
HAL_MVD_DeleteTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)2008 MS_BOOL HAL_MVD_DeleteTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
2009 {
2010 MS_BOOL bRet = FALSE;
2011 MVD_DEBUGINFO(MVD_PRINT("\n\n Delete Task(%x)!!!\n", u8Idx));
2012
2013 VPU_EX_TaskInfo stTaskInfo;
2014 MVD_GetTaskInfo(&stTaskInfo, u8Idx, eVpuId);
2015
2016 VPU_EX_FWCodeCfg stVpuFWCfg;
2017 VPU_EX_NDecInitPara stVpuInitPara;
2018 stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
2019 stVpuInitPara.pTaskInfo = &stTaskInfo;
2020
2021 MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2022 stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
2023 stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
2024 stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
2025 stVpuFWCfg.u8SrcType = pMemCfg->eFWSrcType;
2026
2027 #ifdef VDEC3
2028 if(!HAL_VPU_EX_FreeBBUId(stTaskInfo.u32Id, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId, &stTaskInfo))
2029 {
2030 MVD_DEBUGINFO(MVD_PRINT("ERROR!!! Free BBU Id Fail !!!\n"));
2031 }
2032 #endif
2033 bRet = HAL_VPU_EX_TaskDelete((MS_U32) eVpuId, &stVpuInitPara);
2034 MVD_DEBUGINFO(MVD_PRINT(" Delete Task!!! ###\n\n"));
2035 _DumpCtrl(u8Idx);
2036 return bRet;
2037 }
2038
HAL_MVD_InitFW(MS_U32 u32VpuSid)2039 MS_BOOL HAL_MVD_InitFW(MS_U32 u32VpuSid)
2040 {
2041 //to fix the timing issue of getting FWIfVer on Chakra2
2042 HAL_MVD_Delayms(1);
2043
2044 //check FW ready
2045 if ( !_MVD_Check_FW_Rdy(u32VpuSid))
2046 {
2047 MS_ASSERT(0);
2048 return FALSE;
2049 }
2050
2051 #if 0
2052 if(pMVDHalContext->_stMVDStream[0].bUsed == FALSE && pMVDHalContext->_stMVDStream[1].bUsed == FALSE) // no mvd is used
2053 {
2054 MVD_CmdArg mvdcmd;
2055 SETUP_CMDARG(mvdcmd);
2056 mvdcmd.Arg0 = 1; //reset mvd engine,if have only one mvd
2057 SET_DECNUM(mvdcmd, ((MS_U8)u32VpuSid));
2058 if (HAL_MVD_MVDCommand( CMD_SW_RESET, &mvdcmd ) == FALSE)
2059 {
2060 MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SW_RESET ) );
2061 return FALSE;
2062 }
2063 }
2064 #endif
2065 return TRUE;
2066 }
2067
2068 #define _MVD_INIT_FAIL_RET() \
2069 do { \
2070 HAL_MVD_SetIsUsed(u8HalIdx, FALSE); \
2071 return FALSE; \
2072 } while (0)
2073
2074
HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType,MS_U32 u32VpuSid,MS_BOOL bShareBBU)2075 MS_BOOL HAL_MVD_Init(MS_U8 u8HalIdx, MVD_CodecType eCodecType, MS_U32 u32VpuSid, MS_BOOL bShareBBU)
2076 {
2077 //OSAL_MVD_MutexInit();
2078 MS_BOOL no_use = FALSE;
2079 MS_BOOL ret;
2080
2081 ret = MDrv_MVD_AUTH_IPCheck(eCodecType,&no_use);
2082 if(ret == FALSE)
2083 {
2084 return FALSE;
2085 }
2086
2087 if (!HAL_MVD_CreateTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid, bShareBBU))
2088 {
2089 _MVD_INIT_FAIL_RET();
2090 }
2091
2092 pMVDHalContext->bStopped[u8HalIdx] = FALSE;
2093
2094 if (!HAL_MVD_InitFW(u8HalIdx))
2095 {
2096 MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_InitFW(%x) failed\n", __FUNCTION__, u8HalIdx));
2097 if (!HAL_MVD_DeleteTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
2098 {
2099 MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_DeleteTask failed\n", __FUNCTION__));
2100 }
2101
2102 _MVD_INIT_FAIL_RET();
2103 }
2104 else
2105 {
2106 MVD_DEBUGINFO(MVD_PRINT("%s:HAL_MVD_InitFW(%x) success\n", __FUNCTION__, u8HalIdx));
2107 }
2108
2109 HAL_MVD_SetIsUsed(u8HalIdx, TRUE);
2110
2111 return TRUE;
2112 }
2113
2114 #define _MVD_CMDRDY ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == MVD_STATUS_READY)
2115 //------------------------------------------------------------------------------
2116 /// Check if MVD command is ready
2117 /// @return TRUE or FALSE
2118 /// - TRUE, Success to process the command
2119 /// - FALSE, Failed due to timeout
2120 //------------------------------------------------------------------------------
HAL_MVD_GetCmdRdy(void)2121 MS_BOOL HAL_MVD_GetCmdRdy(void)
2122 {
2123 MS_U32 timeoutTick = 2000;
2124
2125 while ((!_MVD_CMDRDY) && ((timeoutTick--)!=0));
2126
2127 if (0 == timeoutTick)
2128 return FALSE;
2129 else
2130 return TRUE;
2131 }
2132
HAL_MVD_CheckIdle(void)2133 MS_BOOL HAL_MVD_CheckIdle(void)
2134 {
2135 MS_BOOL bIsIdle = FALSE;
2136 MVD_CmdArg mvdcmd;
2137
2138 //issue CheckIdle command
2139 SETUP_CMDARG(mvdcmd);
2140 SET_CMD_RET_FALSE(CMD_MVD_IDLE, &mvdcmd);
2141
2142 bIsIdle = (mvdcmd.Arg0 == 1);
2143 if (HAL_MVD_GetCmdRdy())
2144 {
2145 return bIsIdle;
2146 }
2147 else
2148 {
2149 return FALSE;
2150 }
2151 }
2152
2153
_MVD_SoftRstHW(void)2154 static MS_BOOL _MVD_SoftRstHW(void)
2155 {
2156 return FALSE;
2157 }
2158
2159 //------------------------------------------------------------------------------
2160 /// Soft-reset MVD
2161 /// Ref AP note p.12 HK2MVD Reset Flow
2162 /// @return TRUE or FALSE
2163 /// - TRUE, Success to soft-reset MVD
2164 /// - FALSE, Failed. Need init MVD again.
2165 //------------------------------------------------------------------------------
HAL_MVD_SoftRstHW(void)2166 MS_BOOL HAL_MVD_SoftRstHW(void)
2167 {
2168 MS_U32 timetick = 2000;
2169
2170 if (HAL_MVD_GetCmdRdy())
2171 {
2172 //idle check
2173 while ((!HAL_MVD_CheckIdle()) && ((timetick--)!=0));
2174
2175 //either MVD is idle or timeout, do ENG/SLQ reset
2176 return _MVD_SoftRstHW(); //Reset HW engine
2177 }
2178 else
2179 {
2180 return FALSE; //here means "CPU hanging"
2181 }
2182 }
2183
2184 //------------------------------------------------------------------------------
2185 /// Clean the IRQ bit (in interrupt handler should call this function while the
2186 /// interrupt has been triggered.
2187 /// @param none
2188 /// @return none
2189 /// @internal
2190 //------------------------------------------------------------------------------
HAL_MVD_ClearIRQ(void)2191 void HAL_MVD_ClearIRQ(void)
2192 {
2193 //OSAL_MVD_LockHwMutex();
2194 HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT);
2195 //OSAL_MVD_UnlockHwMutex();
2196 return;
2197 }
2198
2199 //------------------------------------------------------------------------------
2200 /// Set display speed.
2201 ///FW use (# of B frames) / (# of decode frames) < Ratio this formula to adjustment.
2202 ///Once if the ratio is 1, that means, whenever (#Bframes / #decoded) < 1, then
2203 ///FW would drop the B frame.
2204 ///In other words, once AP need to back to normal mode, AP have to set the arg0 to 0.
2205 //------------------------------------------------------------------------------
HAL_MVD_SetSpeed(MS_U8 u8Idx,MVD_SpeedType eSpeedType,MS_U8 u8Multiple)2206 MS_BOOL HAL_MVD_SetSpeed(MS_U8 u8Idx, MVD_SpeedType eSpeedType, MS_U8 u8Multiple)
2207 {
2208 MVD_CmdArg mvdcmd;
2209
2210 SETUP_CMDARG(mvdcmd);
2211
2212 if (E_MVD_SPEED_FAST == eSpeedType)
2213 mvdcmd.Arg0 = 1; //fast forward
2214 else if (E_MVD_SPEED_SLOW == eSpeedType)
2215 mvdcmd.Arg0 = 2; //slow motion
2216 else
2217 mvdcmd.Arg0 = 0; //normal speed
2218
2219 if (u8Multiple == 1)
2220 {
2221 mvdcmd.Arg0 = 0;
2222 //The only way to be NORMAL speed.
2223 }
2224
2225 mvdcmd.Arg1 = u8Multiple;
2226
2227 if(pMVDHalContext->bTrickPlay2xAVSync[u8Idx] == TRUE && eSpeedType == E_MVD_SPEED_FAST && u8Multiple == 2)
2228 {
2229 mvdcmd.Arg2 = 1;
2230 }
2231 else
2232 {
2233 mvdcmd.Arg2 = 0;
2234 }
2235
2236 SET_DECNUM(mvdcmd, u8Idx);
2237 SET_CMD_RET_FALSE(CMD_DISP_SPEED_CTRL, &mvdcmd);
2238 return TRUE;
2239 }
2240
2241 //------------------------------------------------------------------------------
2242 /// Set frame buffer address to MVD
2243 /// @param -u32addr \b IN : start address
2244 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8fbMode)2245 void HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8fbMode)
2246 {
2247 MVD_CmdArg mvdcmd;
2248 if(pMVDHalContext->bCMAUsed)
2249 {
2250 u8fbMode = MVD_CMA_MODE;
2251 }
2252
2253 if ((u32addr>>3) > MAX_ADD_28BIT)// TODO: fixme, in 64bits system, address may be more than 28 bits
2254 {
2255 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameBuffAddr: only support 28bit add!\n"));
2256 return;
2257 }
2258
2259 MS_ASSERT((u32addr%8)==0);
2260 u32addr >>= 3;
2261
2262 SETUP_CMDARG(mvdcmd);
2263 mvdcmd.Arg0 = L_WORD(u32addr);
2264 mvdcmd.Arg1 = H_WORD(u32addr);
2265 mvdcmd.Arg2 = L_DWORD(u32addr);
2266
2267 //Frame Buffer Mode Setting
2268 mvdcmd.Arg3 = u8fbMode | ((u32addr>>24)&0x0f);
2269 mvdcmd.Arg4 = u8fbMode & 0xff;
2270 MVD_DEBUGINFO(MVD_PRINT("FramebufferAdd 0x%lx, FB Mode 0x%x, arg3=0x%x\n", (unsigned long)u32addr, u8fbMode, mvdcmd.Arg3));
2271 SET_DECNUM(mvdcmd, u8Idx);
2272 if (HAL_MVD_MVDCommand( CMD_FB_BASE, &mvdcmd ) == FALSE)
2273 {
2274 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_BASE ) );
2275 return;
2276 }
2277
2278 return;
2279 }
2280
2281 //------------------------------------------------------------------------------
2282 /// Set header buffer address to MVD
2283 /// @param -u32addr \b IN : start address
2284 //------------------------------------------------------------------------------
HAL_MVD_SetHeaderBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2285 void HAL_MVD_SetHeaderBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2286 {
2287 MVD_CmdArg mvdcmd;
2288
2289 MS_ASSERT((u32addr%8)==0);
2290 u32addr >>= 3;
2291
2292 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2293 if (HAL_MVD_MVDCommand( CMD_HEADER_INFO_BUF, &mvdcmd ) == FALSE)
2294 {
2295 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_HEADER_INFO_BUF ) );
2296 }
2297 return;
2298 }
2299
2300 //------------------------------------------------------------------------------
2301 /// Set vol info buffer address to MVD
2302 /// @param -u32addr \b IN : start address
2303 //------------------------------------------------------------------------------
HAL_MVD_SetVolInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2304 void HAL_MVD_SetVolInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2305 {
2306 MVD_CmdArg mvdcmd;
2307
2308 MS_ASSERT((u32addr%8)==0);
2309 u32addr >>= 3;
2310
2311 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2312 if (HAL_MVD_MVDCommand( CMD_VOL_INFO_BUF, &mvdcmd ) == FALSE)
2313 {
2314 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VOL_INFO_BUF ) );
2315 }
2316 return;
2317 }
2318
2319 //------------------------------------------------------------------------------
2320 /// Set frame info buffer address to MVD
2321 /// @param -u32addr \b IN : start address
2322 //------------------------------------------------------------------------------
HAL_MVD_SetFrameInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2323 void HAL_MVD_SetFrameInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2324 {
2325 MVD_CmdArg mvdcmd;
2326
2327 MS_ASSERT((u32addr%8)==0);
2328 u32addr >>= 3;
2329
2330 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2331 if (HAL_MVD_MVDCommand( CMD_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
2332 {
2333 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRAME_INFO_BUF ) );
2334 }
2335 return;
2336 }
2337
2338 //------------------------------------------------------------------------------
2339 /// Set IAP buffer address to MVD
2340 /// @param -u32addr \b IN : start address
2341 //------------------------------------------------------------------------------
HAL_MVD_SetIAPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2342 void HAL_MVD_SetIAPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2343 {
2344 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2345 MVD_CmdArg mvdcmd;
2346 MS_ASSERT((u32addr%8192)==0);
2347 u32addr >>= 13;
2348
2349 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2350 mvdcmd.Arg4 = pstMemCfg->u8FBMiuSel;
2351 if (HAL_MVD_MVDCommand( CMD_IAP_BUF_START, &mvdcmd ) == FALSE)
2352 {
2353 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IAP_BUF_START ) );
2354 }
2355 return;
2356 }
2357
2358 //------------------------------------------------------------------------------
2359 /// Set Data Partition buffer address to MVD
2360 /// @param -u32addr \b IN : start address
2361 //------------------------------------------------------------------------------
HAL_MVD_SetDPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2362 void HAL_MVD_SetDPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2363 {
2364 MVD_CmdArg mvdcmd;
2365 MS_ASSERT((u32addr%8)==0);
2366 u32addr >>= 3;
2367
2368 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2369 if (HAL_MVD_MVDCommand( CMD_DP_BUF_START, &mvdcmd ) == FALSE)
2370 {
2371 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DP_BUF_START ) );
2372 }
2373 return;
2374 }
2375
2376 //------------------------------------------------------------------------------
2377 /// Set Motion Vector buffer address to MVD
2378 /// @param -u32addr \b IN : start address
2379 //------------------------------------------------------------------------------
HAL_MVD_SetMVBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2380 void HAL_MVD_SetMVBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2381 {
2382 MVD_CmdArg mvdcmd;
2383 MS_ASSERT((u32addr%2048)==0);
2384 u32addr >>= 3;
2385
2386 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2387 if (HAL_MVD_MVDCommand( CMD_MV_BUF_START, &mvdcmd ) == FALSE)
2388 {
2389 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_MV_BUF_START ) );
2390 }
2391 return;
2392 }
2393
_MVD_SetUserDataBufStart(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8arg3)2394 static void _MVD_SetUserDataBufStart(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8arg3)
2395 {
2396 MVD_CmdArg mvdcmd;
2397
2398 MS_ASSERT((u32addr%8)==0);
2399 u32addr >>= 3;
2400 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, (unsigned long)u32addr, u8arg3));
2401
2402 SETUP_CMDARG(mvdcmd);
2403 mvdcmd.Arg0 = L_WORD(u32addr);
2404 mvdcmd.Arg1 = H_WORD(u32addr);
2405 mvdcmd.Arg2 = L_DWORD(u32addr);
2406 mvdcmd.Arg4 = H_DWORD(u32addr);
2407 mvdcmd.Arg3 = u8arg3;
2408 SET_DECNUM(mvdcmd, u8Idx);
2409 if (HAL_MVD_MVDCommand( CMD_USER_BUF_START, &mvdcmd ) == FALSE)
2410 {
2411 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_START ) );
2412 return;
2413 }
2414 return;
2415 }
2416
_MVD_SetUserDataBufSize(MS_U8 u8Idx,MS_U32 u32size,MS_U8 u8arg3)2417 static void _MVD_SetUserDataBufSize(MS_U8 u8Idx, MS_U32 u32size, MS_U8 u8arg3)
2418 {
2419 MVD_CmdArg mvdcmd;
2420
2421 MS_ASSERT((u32size%8)==0);
2422 u32size >>= 3;
2423 MVD_DEBUGINFO(MVD_PRINT("%s add=0x%x arg3=0x%x\n", __FUNCTION__, u32size, u8arg3));
2424
2425 SETUP_CMDARG(mvdcmd);
2426 mvdcmd.Arg0 = L_WORD(u32size);
2427 mvdcmd.Arg1 = H_WORD(u32size);
2428 mvdcmd.Arg2 = L_DWORD(u32size);
2429 mvdcmd.Arg4 = H_DWORD(u32size);
2430 mvdcmd.Arg3 = u8arg3;
2431 if(mvdcmd.Arg3 <= 1) //mean 608 and 708 in MM RVU
2432 {
2433 mvdcmd.Arg2 = 7;//ntsc1+ntsc2+atsc
2434 mvdcmd.Arg4 = 0;
2435 }
2436 SET_DECNUM(mvdcmd, u8Idx);
2437 if (HAL_MVD_MVDCommand( CMD_USER_BUF_SIZE, &mvdcmd ) == FALSE)
2438 {
2439 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_SIZE ) );
2440 return;
2441 }
2442 return;
2443 }
2444
2445 //------------------------------------------------------------------------------
2446 /// Set user data buffer address to MVD
2447 /// @param -u32addr \b IN : start address
2448 //------------------------------------------------------------------------------
HAL_MVD_SetUserDataBuf(MS_U8 u8Idx,MS_VIRT u32addr,MS_U32 u32size)2449 void HAL_MVD_SetUserDataBuf(MS_U8 u8Idx, MS_VIRT u32addr, MS_U32 u32size)
2450 {
2451 MS_U8 u8ccType = 0;
2452
2453 MS_ASSERT((u32addr%8)==0);
2454 MS_ASSERT((u32size%8)==0);
2455 #ifdef REDLION_LINUX_KERNEL_ENVI
2456 u8ccType = 2;
2457 #elif defined(MVD_SUPPORT_X4_CC)
2458 u8ccType = 4; //display order
2459 #else
2460 u8ccType = 2;// 2 for testing 0;
2461 #endif
2462
2463 #if defined(MVD_SUPPORT_X4_CC)
2464 //set decoding buffer address
2465 _MVD_SetUserDataBufStart(u8Idx, u32addr+u32size, 3);
2466 #endif
2467
2468 //set CC output buffer address
2469 _MVD_SetUserDataBufStart(u8Idx, u32addr, u8ccType);
2470
2471 #if defined(MVD_SUPPORT_X4_CC)
2472 //set decoding buffer size
2473 _MVD_SetUserDataBufSize(u8Idx, u32size, 3);
2474 #endif
2475
2476 //set CC output buffer size
2477 _MVD_SetUserDataBufSize(u8Idx, u32size, u8ccType);
2478
2479 return;
2480 }
2481
HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)2482 void HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
2483 {
2484 MVD_CmdArg mvdcmd;
2485 MS_U32 u32val = u32end>>3;
2486 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2487
2488 SET_CMDARG(mvdcmd, u32val, u8Idx);
2489 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_END, &mvdcmd ) == FALSE)
2490 {
2491 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_END ) );
2492 return;
2493 }
2494
2495 u32val = (u32start)>>3;
2496 SET_CMDARG(mvdcmd, u32val, u8Idx);
2497 if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_START, &mvdcmd ) == FALSE)
2498 {
2499 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_START ) );
2500 return;
2501 }
2502
2503 MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx OK!!!\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2504 return;
2505 }
2506
2507 //------------------------------------------------------------------------------
2508 /// Issue StepDisplay command.
2509 /// @return -TRUE for success; FALSE for failure.
2510 //------------------------------------------------------------------------------
HAL_MVD_StepDisp(MS_U8 u8Idx)2511 MS_BOOL HAL_MVD_StepDisp(MS_U8 u8Idx)
2512 {
2513 MVD_CmdArg mvdcmd;
2514
2515 MVD_SetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8), 0);
2516
2517 SETUP_CMDARG(mvdcmd);
2518 SET_DECNUM(mvdcmd, u8Idx);
2519 SET_CMD_RET_FALSE(CMD_STEP_DISP_DECODE_ONE, &mvdcmd);
2520 if (HAL_MVD_Resume(u8Idx) == FALSE)
2521 {
2522 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2523 return FALSE;
2524 }
2525
2526 return TRUE;
2527 }
2528
2529 //------------------------------------------------------------------------------
2530 /// Get ES read address for TS file mode.
2531 /// @return ES read address
2532 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)2533 MS_VIRT HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)
2534 {
2535 MS_VIRT u32Add = 0;
2536 MVD_CmdArg mvdcmd;
2537
2538 SETUP_CMDARG(mvdcmd);
2539 mvdcmd.Arg0 = 2; //ES diff
2540 SET_DECNUM(mvdcmd, u8Idx);
2541 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2542 {
2543 //in order to latch the newest parser status
2544 //u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2545 // (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2546 }
2547 else
2548 {
2549 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2550 }
2551
2552 SETUP_CMDARG(mvdcmd);
2553 mvdcmd.Arg0 = 1;
2554 SET_DECNUM(mvdcmd, u8Idx);
2555 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2556 {
2557 u32Add = (((MS_U32)mvdcmd.Arg3) <<24) |
2558 (((MS_U32)mvdcmd.Arg2) <<16) |
2559 (((MS_U32)mvdcmd.Arg1) << 8) |
2560 (((MS_U32)mvdcmd.Arg0));
2561 }
2562 else
2563 {
2564 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2565 }
2566
2567 return (u32Add*8);
2568 }
2569
2570 //------------------------------------------------------------------------------
2571 /// Get ES write address for TS file mode.
2572 /// @return ES write address
2573 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)2574 MS_VIRT HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)
2575 {
2576 MS_VIRT u32Diff = 0;
2577 MS_VIRT u32WrPtr = 0;
2578 MVD_CmdArg mvdcmd;
2579 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2580 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2581
2582 SETUP_CMDARG(mvdcmd);
2583 mvdcmd.Arg0 = 2; //ES diff
2584 SET_DECNUM(mvdcmd, u8Idx);
2585 if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2586 {
2587 u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2588 (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2589 }
2590 else
2591 {
2592 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2593 }
2594
2595 u32WrPtr = u32Diff*8 + HAL_MVD_GetTsFileESReadPtr(u8Idx);
2596 if (u32WrPtr > pstSlqTblInfo->u32ESBuffEnd)
2597 {
2598 MVD_DEBUGINFO(MVD_PRINT("ES wrapping Wr=0x%lx ==> ", (unsigned long)u32WrPtr));
2599 u32WrPtr -= pstMemCfg->u32BSSize;
2600 MVD_DEBUGINFO(MVD_PRINT("0x%lx\n", (unsigned long)u32WrPtr));
2601 }
2602 return u32WrPtr;
2603 }
2604
2605 //------------------------------------------------------------------------------
2606 /// Enable/Disable firmware to show the last frame.
2607 /// @return -TRUE for success; FALSE for failure.
2608 //------------------------------------------------------------------------------
HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx,MS_BOOL bEnable)2609 MS_BOOL HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx, MS_BOOL bEnable)
2610 {
2611 MVD_CmdArg mvdcmd;
2612 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
2613 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2614 MS_VIRT* pu32FileEndPtr = &pstSlqTblInfo->u32FileEndPtr;
2615
2616 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
2617 {
2618 #if SLQ_NEW_PUSH
2619 if (pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
2620 {
2621 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr + SLQ_ENTRY_LEN;
2622 }
2623 #endif //
2624 //save current writePtr
2625 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
2626 {
2627 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
2628 }
2629 else
2630 {
2631 *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
2632 }
2633 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx, wr=%lx\n", (unsigned long)*pu32FileEndPtr,
2634 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr));
2635 }
2636
2637 SETUP_CMDARG(mvdcmd);
2638 mvdcmd.Arg0 = bEnable;
2639 SET_DECNUM(mvdcmd, u8Idx);
2640 SET_CMD_RET_FALSE(CMD_ENABLE_LAST_FRAME_SHOW, &mvdcmd);
2641 return TRUE;
2642 }
2643
2644
HAL_MVD_SlqTblRst(MS_U8 u8Idx)2645 MS_BOOL HAL_MVD_SlqTblRst(MS_U8 u8Idx)
2646 {
2647 MVD_CmdArg mvdcmd;
2648 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2649
2650 SETUP_CMDARG(mvdcmd);
2651 SET_DECNUM(mvdcmd, u8Idx);
2652 SET_CMD_RET_FALSE(CMD_VC1_HW_SLQ_RESET, &mvdcmd);
2653 pstSlqTblInfo->bEnSlqTblHkCtrl = FALSE;
2654 return TRUE;
2655 }
2656
HAL_MVD_SeekToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2657 MS_BOOL HAL_MVD_SeekToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2658 {
2659 MVD_CmdArg mvdcmd;
2660
2661 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2662 SET_CMD_RET_FALSE(CMD_STEP_TO_PTS, &mvdcmd);
2663
2664 if (HAL_MVD_Resume(u8Idx) == FALSE)
2665 {
2666 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2667 return FALSE;
2668 }
2669 return TRUE;
2670 }
2671
HAL_MVD_SkipToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2672 MS_BOOL HAL_MVD_SkipToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2673 {
2674 MVD_CmdArg mvdcmd;
2675
2676 SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2677 SET_CMD_RET_FALSE(CMD_SKIP_TO_PTS, &mvdcmd);
2678
2679 if (HAL_MVD_Resume(u8Idx) == FALSE)
2680 {
2681 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2682 return FALSE;
2683 }
2684 return TRUE;
2685 }
2686
HAL_MVD_TrickPlay(MS_U8 u8Idx,MVD_TrickDec trickDec,MS_U8 u8DispDuration)2687 MS_BOOL HAL_MVD_TrickPlay(MS_U8 u8Idx, MVD_TrickDec trickDec, MS_U8 u8DispDuration)
2688 {
2689 MVD_CmdArg mvdcmd;
2690 MS_U8 u8DecType;
2691
2692 switch (trickDec)
2693 {
2694 case E_MVD_TRICK_DEC_ALL:
2695 u8DecType = 0;
2696 break;
2697 case E_MVD_TRICK_DEC_I:
2698 u8DecType = 1;
2699 break;
2700 case E_MVD_TRICK_DEC_IP:
2701 u8DecType = 2;
2702 break;
2703 default:
2704 return FALSE;
2705 break;
2706 }
2707
2708 SETUP_CMDARG(mvdcmd);
2709 mvdcmd.Arg0 = u8DecType;
2710 mvdcmd.Arg1 = u8DispDuration;
2711 SET_DECNUM(mvdcmd, u8Idx);
2712 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
2713
2714 pMVDHalContext->stCtrlCfg[u8Idx].eTrickMode = trickDec;
2715 return TRUE;
2716 }
2717
HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)2718 MS_BOOL HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)
2719 {
2720 #define STOP_TIMEOUT 500 //ms
2721 MS_U32 u32StartTime = 0;
2722
2723 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND);
2724 MVD_CmdArg mvdcmd;
2725 SETUP_CMDARG(mvdcmd);
2726 SET_DECNUM(mvdcmd, u8Idx);
2727 SET_CMD_RET_FALSE(CMD_FLUSH_DISP_QUEUE, &mvdcmd);
2728
2729 u32StartTime = HAL_MVD_GetTime();
2730
2731 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND))
2732 {
2733 if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
2734 {
2735 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_FLUSH_DISP_QUEUE ) );
2736 break;
2737 }
2738 }
2739
2740 return TRUE;
2741 }
2742
2743
HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx,MVD_TIMESTAMP_TYPE eSyncMode)2744 MS_BOOL HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx, MVD_TIMESTAMP_TYPE eSyncMode)
2745 {
2746 MVD_CmdArg mvdcmd;
2747 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2748
2749 pstCtrlCfg->eFileSyncMode = eSyncMode;
2750 MVD_DEBUGINFO(MVD_PRINT("%s eSyncMode=%d\n", __FUNCTION__, eSyncMode));
2751 SETUP_CMDARG(mvdcmd);
2752 switch (eSyncMode)
2753 {
2754 case E_MVD_TIMESTAMP_PTS:
2755 case E_MVD_TIMESTAMP_PTS_RVU:
2756 mvdcmd.Arg0 = FILE_PTS_MODE;
2757 break;
2758
2759 case E_MVD_TIMESTAMP_DTS:
2760 case E_MVD_TIMESTAMP_DTS_RVU:
2761 mvdcmd.Arg0 = FILE_DTS_MODE;
2762 break;
2763 case E_MVD_TIMESTAMP_NEW_STS:
2764 mvdcmd.Arg0 = FILE_STS_MODE;
2765 break;
2766 case E_MVD_TIMESTAMP_FREERUN:
2767 default:
2768 mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
2769 break;
2770 }
2771 SET_DECNUM(mvdcmd, u8Idx);
2772 SET_CMD_RET_FALSE(CMD_ENABLE_FILE_SYNC, &mvdcmd);
2773
2774 SETUP_CMDARG(mvdcmd);
2775 switch (eSyncMode) //for set RVU mode
2776 {
2777 case E_MVD_TIMESTAMP_PTS_RVU:
2778 mvdcmd.Arg0 = FILE_PTS_MODE;
2779 break;
2780 case E_MVD_TIMESTAMP_DTS_RVU:
2781 mvdcmd.Arg0 = FILE_DTS_MODE;
2782 break;
2783 case E_MVD_TIMESTAMP_FREERUN:
2784 default:
2785 mvdcmd.Arg0 = 0xFF;
2786 break;
2787 }
2788 SET_DECNUM(mvdcmd, u8Idx);
2789 SET_CMD_RET_FALSE(CMD_RVU_EN, &mvdcmd);
2790 return TRUE;
2791 }
2792
2793
2794
2795
2796 //------------------------------------------------------------------------------
2797 /// Set the start address of PTS table used for SLQ table link mode.
2798 /// @return -TRUE for success; FALSE for failure.
2799 //------------------------------------------------------------------------------
HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx,MS_VIRT u32addr)2800 MS_BOOL HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx, MS_VIRT u32addr)
2801 {
2802 MVD_CmdArg mvdcmd;
2803
2804 MS_ASSERT((u32addr%8)==0);
2805 u32addr >>= 3;
2806
2807 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2808 SET_CMD_RET_FALSE(CMD_PTS_TBL_START, &mvdcmd);
2809 return TRUE;
2810 }
2811
HAL_MVD_SkipToIFrame(MS_U8 u8Idx)2812 MS_BOOL HAL_MVD_SkipToIFrame(MS_U8 u8Idx)
2813 {
2814 MVD_CmdArg mvdcmd;
2815 SETUP_CMDARG(mvdcmd);
2816 SET_DECNUM(mvdcmd, u8Idx);
2817 SET_CMD_RET_FALSE(CMD_START_DEC_STRICT, &mvdcmd);
2818 return TRUE;
2819 }
2820
2821 //Map driver FRC (Frame rate conversion) mode to firmware's.
HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)2822 MS_U8 HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)
2823 {
2824 MS_U8 frcMode = 0xf;
2825 switch (eFrcMode)
2826 {
2827 case E_MVD_FRC_NORMAL:
2828 frcMode = FrcNormal;
2829 break;
2830 case E_MVD_FRC_DISP_TWICE:
2831 frcMode = FrcDisplayTwice;
2832 break;
2833 case E_MVD_FRC_3_2_PULLDOWN: //film 24 -> 50i
2834 frcMode = Frc32Pulldown;
2835 break;
2836 case E_MVD_FRC_PAL_TO_NTSC:
2837 frcMode = FrcPALtoNTSC;
2838 break;
2839 case E_MVD_FRC_NTSC_TO_PAL:
2840 frcMode = FrcNTSCtoPAL;
2841 break;
2842 case E_MVD_FRC_DISP_ONEFIELD:
2843 frcMode = FrcShowOneFiled;
2844 break;
2845 default:
2846 break;
2847 }
2848 return frcMode;
2849 }
2850
HAL_MVD_DispCtrl(MS_U8 u8Idx,MS_BOOL bDecOrder,MS_BOOL bDropErr,MS_BOOL bDropDisp,MVD_FrcMode eFrcMode)2851 MS_BOOL HAL_MVD_DispCtrl(MS_U8 u8Idx, MS_BOOL bDecOrder, MS_BOOL bDropErr, MS_BOOL bDropDisp, MVD_FrcMode eFrcMode)
2852 {
2853 MVD_CmdArg mvdcmd;
2854 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2855 MS_BOOL* pbDropErrFrm = &pstCtrlCfg->bDropErrFrm;
2856
2857 SETUP_CMDARG(mvdcmd);
2858 mvdcmd.Arg0 = (MS_U8)bDecOrder;
2859 mvdcmd.Arg1 = (MS_U8)bDropErr;
2860 mvdcmd.Arg2 = (MS_U8)bDropDisp;
2861 mvdcmd.Arg3 = HAL_MVD_MapFrcMode(eFrcMode);
2862 SET_DECNUM(mvdcmd, u8Idx);
2863 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
2864
2865 pstCtrlCfg->eFrcMode = eFrcMode;
2866
2867 if (*pbDropErrFrm != bDropErr)
2868 {
2869 MVD_DEBUGINFO( MVD_PRINT("bDropErrFrm(%d) != bDropErr(%d)\n", *pbDropErrFrm, bDropErr));
2870 *pbDropErrFrm = bDropErr;
2871 }
2872 pstCtrlCfg->bDropDispfrm = bDropDisp;
2873
2874 return TRUE;
2875 }
2876
2877
HAL_MVD_SkipData(MS_U8 u8Idx)2878 MS_BOOL HAL_MVD_SkipData(MS_U8 u8Idx)
2879 {
2880 MS_U32 u32TimeCnt = 0;
2881 MVD_CmdArg mvdcmd;
2882
2883 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
2884 SETUP_CMDARG(mvdcmd);
2885 SET_DECNUM(mvdcmd, u8Idx);
2886 SET_CMD_RET_FALSE(CMD_SKIP_DATA, &mvdcmd);
2887
2888 u32TimeCnt = HAL_MVD_GetTime();
2889 while ((HAL_MVD_GetTime() - u32TimeCnt) < SKIP_DATA_TIMEOUT_MS)
2890 {
2891 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2892 {
2893 MVD_DEBUGINFO(MVD_PRINT("\nSkip data finished!\n"));
2894 break;
2895 }
2896 }
2897 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
2898 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
2899 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2900 {
2901 MVD_DEBUGINFO(MVD_PRINT("\n***** TS flush timeout *****\n\n"));
2902 return FALSE;
2903 }
2904
2905 return TRUE;
2906 }
2907
HAL_MVD_DispRepeatField(MS_U8 u8Idx,MS_BOOL bEnable)2908 MS_BOOL HAL_MVD_DispRepeatField(MS_U8 u8Idx, MS_BOOL bEnable)
2909 {
2910 MVD_CmdArg mvdcmd;
2911 SETUP_CMDARG(mvdcmd);
2912 mvdcmd.Arg0 = bEnable;
2913 SET_DECNUM(mvdcmd, u8Idx);
2914 SET_CMD_RET_FALSE(CMD_REPEAT_MODE, &mvdcmd);
2915 return TRUE;
2916 }
2917
2918 //------------------------------------------------------------------------------
2919 /// Pause display.
2920 /// @return -TRUE for success; FALSE for failure
2921 //------------------------------------------------------------------------------
HAL_MVD_PauseDisp(MS_U8 u8Idx)2922 MS_BOOL HAL_MVD_PauseDisp(MS_U8 u8Idx)
2923 {
2924 MS_BOOL bRst = TRUE;
2925 MVD_CmdArg mvdcmd;
2926
2927 SETUP_CMDARG(mvdcmd);
2928 mvdcmd.Arg0 = DISPLAY_PAUSE_ON;
2929 SET_DECNUM(mvdcmd, u8Idx);
2930 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2931 {
2932 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x(ON) fail!!\r\n", CMD_DISPLAY_PAUSE) );
2933 bRst = FALSE;
2934 }
2935 return bRst;
2936 }
2937
2938 //------------------------------------------------------------------------------
2939 /// Issue Pause command.
2940 /// @return -TRUE for success; FALSE for failure
2941 //------------------------------------------------------------------------------
HAL_MVD_Resume(MS_U8 u8Idx)2942 MS_BOOL HAL_MVD_Resume(MS_U8 u8Idx)
2943 {
2944 MS_BOOL bRst = TRUE;
2945 MVD_CmdArg mvdcmd;
2946
2947 SETUP_CMDARG(mvdcmd);
2948 mvdcmd.Arg0 = DISPLAY_PAUSE_OFF;
2949 SET_DECNUM(mvdcmd, u8Idx);
2950 if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2951 {
2952 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DISPLAY_PAUSE) );
2953 bRst = FALSE;
2954 }
2955 return bRst;
2956 }
2957
HAL_MVD_Play(MS_U8 u8Idx)2958 MS_BOOL HAL_MVD_Play(MS_U8 u8Idx)
2959 {
2960 MVD_CmdArg mvdcmd;
2961 SETUP_CMDARG(mvdcmd);
2962 mvdcmd.Arg0 = 1;
2963 SET_DECNUM(mvdcmd, u8Idx);
2964 SET_CMD_RET_FALSE(CMD_DIU_WIDTH_ALIGN, &mvdcmd);
2965
2966 SETUP_CMDARG(mvdcmd);
2967 SET_DECNUM(mvdcmd, u8Idx);
2968 SET_CMD_RET_FALSE(CMD_PLAY, &mvdcmd);
2969
2970 if (HAL_MVD_Resume(u8Idx) == FALSE)
2971 {
2972 MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2973 return FALSE;
2974 }
2975
2976 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2977 pCtrlCfg->bDecodeIFrame = FALSE;
2978
2979 return TRUE;
2980 }
2981
2982 //------------------------------------------------------------------------------
2983 /// Set base address for ScalerInfo structure to f/w
2984 /// @param -u32addr \b IN : start address (units in byte)
2985 //------------------------------------------------------------------------------
HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8Arg4)2986 MS_BOOL HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr,MS_U8 u8Arg4)
2987 {
2988 MVD_CmdArg mvdcmd;
2989
2990 MS_ASSERT((u32addr%8)==0);
2991 u32addr >>= 3;
2992
2993 SET_CMDARG(mvdcmd, u32addr, u8Idx);
2994 mvdcmd.Arg4 = u8Arg4;
2995 SET_CMD_RET_FALSE(CMD_SCALER_INFO_BASE, &mvdcmd);
2996 return TRUE;
2997 }
2998
2999 //------------------------------------------------------------------------------
3000 /// Set the dynamic scale base address
3001 /// @return -TRUE for success; FALSE for failure.
3002 //------------------------------------------------------------------------------
HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx,MS_VIRT u32addr)3003 MS_BOOL HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx, MS_VIRT u32addr)
3004 {
3005 MVD_CmdArg mvdcmd;
3006
3007 MS_ASSERT((u32addr%8)==0);
3008 u32addr >>= 3;
3009
3010 SET_CMDARG(mvdcmd, u32addr, u8Idx);
3011 SET_CMD_RET_FALSE(CMD_DYNAMIC_SCALE_BASE, &mvdcmd);
3012 return TRUE;
3013 }
3014
3015 //------------------------------------------------------------------------------
3016 /// Set virtual box width/height to F/W.
3017 /// F/W will use the same w/h as scaler to calculate scaling factor.
3018 /// @return -TRUE for success; FALSE for failure.
3019 //------------------------------------------------------------------------------
HAL_MVD_SetVirtualBox(MS_U8 u8Idx,MS_U16 u16Width,MS_U16 u16Height)3020 MS_BOOL HAL_MVD_SetVirtualBox(MS_U8 u8Idx, MS_U16 u16Width, MS_U16 u16Height)
3021 {
3022 MVD_CmdArg mvdcmd;
3023
3024 SETUP_CMDARG(mvdcmd);
3025 mvdcmd.Arg0 = L_WORD(u16Width);
3026 mvdcmd.Arg1 = H_WORD(u16Width);
3027 mvdcmd.Arg2 = L_WORD(u16Height);
3028 mvdcmd.Arg3 = H_WORD(u16Height);
3029 SET_DECNUM(mvdcmd, u8Idx);
3030 SET_CMD_RET_FALSE(CMD_DS_VIRTUAL_BOX, &mvdcmd);
3031 return TRUE;
3032 }
3033
3034 //------------------------------------------------------------------------------
3035 /// Enable VC1 dynamic scaling
3036 /// @return -TRUE for success; FALSE for failure.
3037 //------------------------------------------------------------------------------
HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)3038 MS_BOOL HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)
3039 {
3040 MVD_CmdArg mvdcmd;
3041
3042 SETUP_CMDARG(mvdcmd);
3043 mvdcmd.Arg0 = TRUE;
3044 mvdcmd.Arg1 = u8NewDS;
3045 SET_DECNUM(mvdcmd, u8Idx);
3046 SET_CMD_RET_FALSE(CMD_ENABLE_DYNAMIC_SCALE, &mvdcmd);
3047 return TRUE;
3048 }
3049
3050
3051 //------------------------------------------------------------------------------
3052 /// Set blue screen
3053 /// @return -TRUE for success; FALSE for failure.
3054 //------------------------------------------------------------------------------
HAL_MVD_SetBlueScreen(MS_U8 u8Idx,MS_BOOL bEn)3055 MS_BOOL HAL_MVD_SetBlueScreen(MS_U8 u8Idx, MS_BOOL bEn)
3056 {
3057 MVD_CmdArg mvdcmd;
3058
3059 SETUP_CMDARG(mvdcmd);
3060 mvdcmd.Arg0 = bEn; //1 -> show MVOP frame color. 0 -> normal case.
3061 SET_DECNUM(mvdcmd, u8Idx);
3062 SET_CMD_RET_FALSE(CMD_FORCE_BLUE_SCREEN, &mvdcmd);
3063 return TRUE;
3064 }
3065
3066
HAL_MVD_SetFreezeDisp(MS_U8 u8Idx,MS_BOOL bEn)3067 MS_BOOL HAL_MVD_SetFreezeDisp(MS_U8 u8Idx, MS_BOOL bEn)
3068 {
3069 MVD_CmdArg mvdcmd;
3070
3071 SETUP_CMDARG(mvdcmd);
3072 mvdcmd.Arg0 = bEn;
3073 SET_DECNUM(mvdcmd, u8Idx);
3074 SET_CMD_RET_FALSE(CMD_FREEZE_DISP, &mvdcmd);
3075 return TRUE;
3076 }
3077
3078
3079 //------------------------------------------------------------------------------
3080 /// Set base address for DecFrameInfo structure to f/w
3081 /// @param -u32addr \b IN : start address (units in byte)
3082 //------------------------------------------------------------------------------
HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr)3083 void HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr)
3084 {
3085 MVD_CmdArg mvdcmd;
3086
3087 MS_ASSERT((u32addr%8)==0);
3088 u32addr >>= 3;
3089
3090 SET_CMDARG(mvdcmd, u32addr, u8Idx);
3091 if (HAL_MVD_MVDCommand( CMD_DEC_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
3092 {
3093 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DEC_FRAME_INFO_BUF ) );
3094 }
3095 return;
3096 }
3097
3098 //Check if the task has interrupt
HAL_MVD_GetHasInt(MS_U8 u8Idx)3099 MS_BOOL HAL_MVD_GetHasInt(MS_U8 u8Idx)
3100 {
3101 MS_BOOL bHasInt = FALSE;
3102 MS_U32 u32IntCnt = 0;
3103 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3104
3105 u32IntCnt = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_CNT, sizeof(MS_U32));
3106 if (u32IntCnt != pCtrlCfg->u32IntCnt)
3107 {
3108 MVD_DEBUGINFO(MVD_PRINT("%s %d--> %d\n", __FUNCTION__, pCtrlCfg->u32IntCnt, u32IntCnt));
3109 bHasInt = TRUE;
3110 pCtrlCfg->u32IntCnt = u32IntCnt;
3111 }
3112 return bHasInt;
3113 }
3114
3115 #ifdef VDEC3
HAL_MVD_GetIntState(MS_U8 u8Idx)3116 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3117 {
3118 MS_U32 u32IntStat;
3119
3120 u32IntStat = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_STAT, sizeof(MS_U32));
3121
3122 MVD_SetFWBuffData(u8Idx,FW_BUFF_FRMINFO,OFFSET_INT_STAT,sizeof(MS_U32),0);
3123
3124 return u32IntStat;
3125 }
3126 #else
HAL_MVD_GetIntState(MS_U8 u8Idx)3127 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3128 {
3129 MS_U32 u32IntStat = 0;
3130 MVD_CmdArg mvdcmd;
3131
3132 SETUP_CMDARG(mvdcmd);
3133 SET_DECNUM(mvdcmd, u8Idx);
3134 if (HAL_MVD_MVDCommand( CMD_GET_INT_STAT, &mvdcmd ) == TRUE)
3135 {
3136 u32IntStat = (((MS_U32)mvdcmd.Arg4) << 16) |
3137 (((MS_U32)mvdcmd.Arg3) << 8) |
3138 (((MS_U32)mvdcmd.Arg2));
3139 }
3140 else
3141 {
3142 if (FALSE == pMVDHalContext->bStopped[u8Idx])
3143 {
3144 MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\n", CMD_GET_INT_STAT));
3145 }
3146 else
3147 {
3148 MVD_DEBUGINFO(MVD_PRINT("Cmd 0x%x normal timeout.\n", CMD_GET_INT_STAT));
3149 }
3150 }
3151
3152 return u32IntStat;
3153 }
3154
3155 #endif
3156
3157 ///// functions to check interrupt status /////
MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)3158 MS_BOOL MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)
3159 {
3160 return (((u32IntStat&INT_USER_DATA_DISP)==INT_USER_DATA_DISP) ? TRUE : FALSE);
3161 }
3162
MVD_IntHasUsrData(MS_U32 u32IntStat)3163 MS_BOOL MVD_IntHasUsrData(MS_U32 u32IntStat)
3164 {
3165 return (((u32IntStat&INT_USER_DATA)==INT_USER_DATA) ? TRUE : FALSE);
3166 }
3167
MVD_IntIsDispRdy(MS_U32 u32IntStat)3168 MS_BOOL MVD_IntIsDispRdy(MS_U32 u32IntStat)
3169 {
3170 return (((u32IntStat&INT_DISP_RDY)==INT_DISP_RDY) ? TRUE : FALSE);
3171 }
3172
MVD_IntHasSeqHdr(MS_U32 u32IntStat)3173 MS_BOOL MVD_IntHasSeqHdr(MS_U32 u32IntStat)
3174 {
3175 return (((u32IntStat&INT_SEQ_FOUND)==INT_SEQ_FOUND) ? TRUE : FALSE);
3176 }
3177
MVD_IntHasESDataInvalid(MS_U32 u32IntStat)3178 MS_BOOL MVD_IntHasESDataInvalid(MS_U32 u32IntStat)
3179 {
3180 return (((u32IntStat&INT_VES_VALID)==INT_VES_VALID) ? TRUE : FALSE);
3181 }
3182
MVD_IntHasDecodeErr(MS_U32 u32IntStat)3183 MS_BOOL MVD_IntHasDecodeErr(MS_U32 u32IntStat)
3184 {
3185 return (((u32IntStat&INT_DEC_ERR)==INT_DEC_ERR) ? TRUE : FALSE);
3186 }
3187 //INT_FIRST_FRAME means "1st frame be push to display queue & ready for display"
3188 //So, (1) in IPB or IP stream, that's I-frame
3189 // (2) in PB only stream, that's first P-frame
MVD_IntHas1stFrame(MS_U32 u32IntStat)3190 MS_BOOL MVD_IntHas1stFrame(MS_U32 u32IntStat)
3191 {
3192 return (((u32IntStat&INT_FIRST_FRAME)==INT_FIRST_FRAME) ? TRUE : FALSE);
3193 }
3194
3195 //INT_XC_LOW_DELAY
MVD_IntHasXcLowDelay(MS_U32 u32IntStat)3196 MS_BOOL MVD_IntHasXcLowDelay(MS_U32 u32IntStat)
3197 {
3198 //MVD_PRINT("MVD_IntHasXcLowDelay=%x \n ", u32IntStat);
3199 return (((u32IntStat&INT_XC_LOW_DELAY)==INT_XC_LOW_DELAY) ? TRUE : FALSE);
3200 }
3201
MVD_IntHasDecodeIframe(MS_U32 u32IntStat)3202 MS_BOOL MVD_IntHasDecodeIframe(MS_U32 u32IntStat)
3203 {
3204 return (((u32IntStat&INT_DEC_I)==INT_DEC_I) ? TRUE : FALSE);
3205 }
3206
3207
MVD_IntVSyncInt(MS_U32 u32IntStat)3208 MS_BOOL MVD_IntVSyncInt(MS_U32 u32IntStat)
3209 {
3210 return (((u32IntStat&INT_DISP_VSYNC)==INT_DISP_VSYNC) ? TRUE : FALSE);
3211 }
3212
MVD_IntDecOneFrmInt(MS_U32 u32IntStat)3213 MS_BOOL MVD_IntDecOneFrmInt(MS_U32 u32IntStat)
3214 {
3215 return (((u32IntStat&INT_DEC_DONE)==INT_DEC_DONE) ? TRUE : FALSE);
3216 }
3217
3218
MVD_GetSyncStat(MS_U8 u8Idx,MS_U8 u8ArgIdx)3219 static MS_U8 MVD_GetSyncStat(MS_U8 u8Idx, MS_U8 u8ArgIdx)
3220 {
3221 MS_U8 u8Val = 0xFF;
3222 MVD_CmdArg mvdcmd;
3223 SETUP_CMDARG(mvdcmd);
3224 SET_DECNUM(mvdcmd, u8Idx);
3225 if (HAL_MVD_MVDCommand( CMD_GET_SYNC_STAT, &mvdcmd ) == FALSE)
3226 {
3227 MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\r\n", CMD_GET_SYNC_STAT));
3228 return 0xFF;
3229 }
3230 MVD_DEBUGINFO(MVD_PRINT("Sync On/Off %x, Done %x, Stat %x, diff=%d\n",
3231 mvdcmd.Arg0, mvdcmd.Arg1, mvdcmd.Arg2, (int)HAL_MVD_GetPtsStcDiff(u8Idx)));
3232
3233 if (0==u8ArgIdx)
3234 {
3235 u8Val = mvdcmd.Arg0; //On/Off
3236 }
3237 else if (1==u8ArgIdx)
3238 {
3239 u8Val = mvdcmd.Arg1; //Done
3240 }
3241 else if (2==u8ArgIdx)
3242 {
3243 u8Val = mvdcmd.Arg2; //Stat
3244 }
3245 return u8Val;
3246 }
3247
3248 //------------------------------------------------------------------------------
3249 /// Report avsync status
3250 /// avsync_status=avsync_done|(avsync_skip_picture<<1)|(avsync_repeat_picture<<2),
3251 /// 0 for free run
3252 //------------------------------------------------------------------------------
HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)3253 MS_U8 HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)
3254 {
3255 return MVD_GetSyncStat(u8Idx, 2);
3256 }
3257
HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx,MS_VIRT u32WrPtr)3258 void HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx, MS_VIRT u32WrPtr)
3259 {
3260 #if 1
3261 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
3262 MVD_CmdArg mvdcmd;
3263 MS_U16 u16Val = 0;
3264
3265 if (FALSE == pstSlqTblInfo->bEnSlqTblHkCtrl)
3266 {
3267 SETUP_CMDARG(mvdcmd);
3268 mvdcmd.Arg0 = 0x10;
3269 mvdcmd.Arg1 = 0x01;
3270 SET_DECNUM(mvdcmd, u8Idx);
3271 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
3272 {
3273 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
3274 return;
3275 }
3276 u16Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8);
3277
3278 SETUP_CMDARG(mvdcmd);
3279 mvdcmd.Arg0 = 0x10;
3280 mvdcmd.Arg1 = 0x01;
3281 mvdcmd.Arg2 = u16Val & 0xff;
3282 mvdcmd.Arg3 = ((u16Val>>8 ) & 0xff) | 0x80;
3283 SET_DECNUM(mvdcmd, u8Idx);
3284 if (HAL_MVD_MVDCommand(CMD_WR_IO, &mvdcmd) == FALSE)
3285 {
3286 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_WR_IO ) );
3287 return;
3288 }
3289
3290 pstSlqTblInfo->bEnSlqTblHkCtrl = TRUE;
3291 //MVD_PRINT("@@@ OPEN HK.SLQ.CTRL!\n");
3292 }
3293 #endif
3294 #if defined(MSOS_TYPE_ECOS)
3295 if(MsOS_In_Interrupt() != TRUE)
3296 {
3297 OSAL_MVD_IntDisable();
3298 OSAL_MVD_LockHwMutex();
3299 }
3300 #else
3301 OSAL_MVD_LockHwMutex();
3302 #endif
3303
3304 HAL_MVD_RegWriteByte(MVD_SLQ_WADR0, (u32WrPtr & 0xff));
3305 HAL_MVD_RegWriteByte(MVD_SLQ_WADR1, ((u32WrPtr>>8 ) & 0xff));
3306 HAL_MVD_RegWriteByte(MVD_SLQ_WADR2, ((u32WrPtr>>16) & 0xff));
3307 HAL_MVD_RegWriteByte(MVD_SLQ_WADR3, ((u32WrPtr>>24) & 0x01));
3308 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_RELOAD);
3309 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_RELOAD);
3310
3311 #if defined(MSOS_TYPE_ECOS)
3312 if(MsOS_In_Interrupt() != TRUE)
3313 {
3314 OSAL_MVD_UnlockHwMutex();
3315 OSAL_MVD_IntEnable();
3316 }
3317 #else
3318 OSAL_MVD_UnlockHwMutex();
3319 #endif
3320 }
3321
HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)3322 static MS_VIRT HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)
3323 {
3324 MS_VIRT u32Cadr = 0;
3325 #if defined(MSOS_TYPE_ECOS)
3326 if(MsOS_In_Interrupt() != TRUE)
3327 {
3328 OSAL_MVD_IntDisable();
3329 OSAL_MVD_LockHwMutex();
3330 }
3331 #else
3332 OSAL_MVD_LockHwMutex();
3333 #endif
3334
3335 switch (eCmd)
3336 {
3337 case MVD_HKSLQ_GET_READPTR:
3338 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_RADR_PROBE);
3339 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_RADR_PROBE);
3340 break;
3341 case MVD_HKSLQ_GET_WRITEPTR:
3342 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_PROBE);
3343 HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_PROBE);
3344 break;
3345 default:
3346 break;
3347 }
3348 u32Cadr = HAL_MVD_RegReadByte(MVD_SLQ_CADR0) |
3349 (HAL_MVD_RegReadByte(MVD_SLQ_CADR1) << 8) |
3350 (HAL_MVD_RegReadByte(MVD_SLQ_CADR2) <<16) |
3351 ((HAL_MVD_RegReadByte(MVD_SLQ_CADR3) & 0x01) <<24);
3352
3353 #if defined(MSOS_TYPE_ECOS)
3354 if(MsOS_In_Interrupt() != TRUE)
3355 {
3356 OSAL_MVD_UnlockHwMutex();
3357 OSAL_MVD_IntEnable();
3358 }
3359 #else
3360 OSAL_MVD_UnlockHwMutex();
3361 #endif
3362 return u32Cadr;
3363 }
3364
HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)3365 MS_VIRT HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)
3366 {
3367 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_WRITEPTR);
3368 }
3369
HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)3370 MS_VIRT HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)
3371 {
3372 return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_READPTR);
3373 }
3374
3375 //------------------------------------------------------------------------------
3376 /// Set firmware as MStreamer mode
3377 /// @return -TRUE for success; FALSE for failure.
3378 //------------------------------------------------------------------------------
HAL_MVD_SetMStreamerMode(MS_U8 u8Idx,MS_U8 u8Mode)3379 MS_BOOL HAL_MVD_SetMStreamerMode(MS_U8 u8Idx, MS_U8 u8Mode)
3380 {
3381 MVD_CmdArg mvdcmd;
3382 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3383
3384 SETUP_CMDARG(mvdcmd);
3385 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MStreamer mode.
3386 SET_DECNUM(mvdcmd, u8Idx);
3387 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3388
3389 pstCtrlCfg->u8MstMode = u8Mode;
3390 return TRUE;
3391 }
3392
3393 //------------------------------------------------------------------------------
3394 /// Set firmware as MStreamer mode (IP clip mode)
3395 /// @return -TRUE for success; FALSE for failure.
3396 //------------------------------------------------------------------------------
HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx,MS_U8 u8Mode)3397 MS_BOOL HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx, MS_U8 u8Mode)
3398 {
3399 MVD_CmdArg mvdcmd;
3400 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3401
3402 SETUP_CMDARG(mvdcmd);
3403 mvdcmd.Arg0 = pstCtrlCfg->u8MstMode;
3404 mvdcmd.Arg1 = u8Mode;//a u8Mode; //1: clip mode, 0:normal mode.
3405 SET_DECNUM(mvdcmd, u8Idx);
3406 SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3407 return TRUE;
3408
3409 }
3410
HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)3411 MS_BOOL HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)
3412 {
3413 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3414 return (MST_MODE_TRUE == pstCtrlCfg->u8MstMode);
3415 }
3416
HAL_MVD_FrameOpt(MS_U8 u8Idx,MS_U8 u8FrmIdx,MVD_FrmOpt eOpt)3417 MS_BOOL HAL_MVD_FrameOpt(MS_U8 u8Idx, MS_U8 u8FrmIdx, MVD_FrmOpt eOpt)
3418 {
3419 MVD_CmdArg mvdcmd;
3420
3421 SETUP_CMDARG(mvdcmd);
3422 mvdcmd.Arg0 = u8FrmIdx;
3423 mvdcmd.Arg1 = eOpt; // 0 = Flip, 1 = Release.
3424 MVD_DEBUGINFO(MVD_PRINT("FLIP_RELEASE_FRAME: idx=0x%x, opt=0x%x\n", u8FrmIdx, eOpt));
3425 SET_DECNUM(mvdcmd, u8Idx);
3426 SET_CMD_RET_FALSE(CMD_FLIP_RELEASE_FRAME, &mvdcmd);
3427
3428 return TRUE;
3429 }
3430
3431 //------------------------------------------------------------------------------
3432 /// Set firmware dynamic allocate FrameBuffer, now support MCU mode only
3433 /// @return -TRUE for success; FALSE for failure.
3434 //------------------------------------------------------------------------------
_MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)3435 MS_BOOL _MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)
3436 {
3437 MVD_CmdArg mvdcmd;
3438
3439 SETUP_CMDARG(mvdcmd);
3440 mvdcmd.Arg0 = 1-bEnable; //Arg0 : 0(enable) , 1(disable)
3441 SET_DECNUM(mvdcmd, u8Idx);
3442 if (HAL_MVD_MVDCommand( CMD_FIXED_FRAME_BUFFER, &mvdcmd ) == FALSE)
3443 {
3444 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FIXED_FRAME_BUFFER ) );
3445 return FALSE;
3446 }
3447
3448 return TRUE;
3449 }
3450
3451 //------------------------------------------------------------------------------
3452 /// Set firmware as MCU mode
3453 /// @return -TRUE for success; FALSE for failure.
3454 //------------------------------------------------------------------------------
HAL_MVD_SetMcuMode(MS_U8 u8Idx,MS_U8 u8Mode)3455 MS_BOOL HAL_MVD_SetMcuMode(MS_U8 u8Idx, MS_U8 u8Mode)
3456 {
3457 MVD_CmdArg mvdcmd;
3458 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3459
3460 SETUP_CMDARG(mvdcmd);
3461 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MCU
3462 SET_DECNUM(mvdcmd, u8Idx);
3463 SET_CMD_RET_FALSE(CMD_SET_MCU_MODE, &mvdcmd);
3464
3465 pstCtrlCfg->u8McuMode = u8Mode;
3466
3467 return TRUE;
3468 }
3469
HAL_MVD_IsMcuMode(MS_U8 u8Idx)3470 MS_BOOL HAL_MVD_IsMcuMode(MS_U8 u8Idx)
3471 {
3472 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3473 return (TRUE == pstCtrlCfg->u8McuMode);
3474 }
3475
3476 //------------------------------------------------------------------------------
3477 /// Set firmware as ForceInterlace mode
3478 /// @return -TRUE for success; FALSE for failure.
3479 //------------------------------------------------------------------------------
HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx,MS_U8 u8Mode)3480 MS_BOOL HAL_MVD_ForceInterlaceMode(MS_U8 u8Idx, MS_U8 u8Mode)
3481 {
3482 MVD_CmdArg mvdcmd;
3483
3484 SETUP_CMDARG(mvdcmd);
3485 mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable
3486 mvdcmd.Arg1 = 0;
3487 SET_DECNUM(mvdcmd, u8Idx);
3488 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
3489
3490 return TRUE;
3491 }
3492
3493 //------------------------------------------------------------------------------
3494 /// Set firmware as Progressive mode
3495 /// @return -TRUE for success; FALSE for failure.
3496 //------------------------------------------------------------------------------
HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx,MS_U8 u8Mode)3497 MS_BOOL HAL_MVD_ForceProgressiveMode(MS_U8 u8Idx, MS_U8 u8Mode)
3498 {
3499 MVD_CmdArg mvdcmd;
3500
3501 SETUP_CMDARG(mvdcmd);
3502 mvdcmd.Arg0 = 0;
3503 mvdcmd.Arg1 = u8Mode; //1: enable, 0:disable
3504 SET_DECNUM(mvdcmd, u8Idx);
3505 SET_CMD_RET_FALSE(CMD_VC1_FORCE_INTLACE_DISP, &mvdcmd);
3506
3507 return TRUE;
3508 }
3509
3510 //------------------------------------------------------------------------------
3511 /// Inform firwmare that PTS is updated.
3512 /// @return -TRUE for success; FALSE for failure.
3513 //------------------------------------------------------------------------------
HAL_MVD_UpdatePts(MS_U8 u8Idx)3514 MS_BOOL HAL_MVD_UpdatePts(MS_U8 u8Idx)
3515 {
3516 MVD_CmdArg mvdcmd;
3517
3518 SETUP_CMDARG(mvdcmd);
3519 SET_DECNUM(mvdcmd, u8Idx);
3520 SET_CMD_RET_FALSE(CMD_SEND_UNI_PTS, &mvdcmd);
3521
3522 return TRUE;
3523 }
3524
3525
HAL_MVD_FrameCapture(MS_U8 u8Idx,MS_U8 u8FrmIdx,MS_BOOL bEnable)3526 MS_BOOL HAL_MVD_FrameCapture(MS_U8 u8Idx, MS_U8 u8FrmIdx, MS_BOOL bEnable)
3527 {
3528 MVD_CmdArg mvdcmd;
3529
3530 SETUP_CMDARG(mvdcmd);
3531 mvdcmd.Arg0 = bEnable; //0 or 1 to enable/disable the freeze function
3532 mvdcmd.Arg2 = u8FrmIdx; //specify the freezed frame index
3533 MVD_DEBUGINFO(MVD_PRINT("CAPTURE_FRAME: idx=0x%x, enable=0x%x\n", u8FrmIdx, bEnable));
3534 SET_DECNUM(mvdcmd, u8Idx);
3535 SET_CMD_RET_FALSE(CMD_ENABLE_FREEZE_PIC, &mvdcmd);
3536
3537 return TRUE;
3538 }
3539
3540 //------------------------------------------------------------------------------
3541 /// Set HW buffers' start address to MVD FW
3542 /// Return (the end address - 1)
3543 /// @param -u32Addr \b IN : start address (MIU offset)
3544 //------------------------------------------------------------------------------
HAL_MVD_SetHWBuffer(MS_U8 u8Idx,MS_VIRT u32Add)3545 MS_VIRT HAL_MVD_SetHWBuffer(MS_U8 u8Idx, MS_VIRT u32Add)
3546 {
3547 MS_VIRT tmpAdr;
3548
3549 MVD_DEBUGINFO(MVD_PRINT("====> %s u32Add = 0x%lx\n", __FUNCTION__, (unsigned long)u32Add));
3550 tmpAdr = (MemAlign(u32Add, MVD_FW_IAP_BUF_ALIGN));
3551 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_IAP_BUF_ADR =%lx\n",(unsigned long)tmpAdr));
3552 HAL_MVD_SetIAPBufferAddr(u8Idx, tmpAdr);
3553 tmpAdr += MVD_FW_IAP_BUF_LEN;
3554
3555 tmpAdr = (MemAlign(tmpAdr, MVD_FW_DP_BUF_ALIGN));
3556 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_DP_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3557 HAL_MVD_SetDPBufferAddr(u8Idx, tmpAdr);
3558 tmpAdr += MVD_FW_DP_BUF_LEN;
3559
3560 tmpAdr = (MemAlign(tmpAdr, MVD_FW_MV_BUF_ALIGN));
3561 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_MV_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3562 HAL_MVD_SetMVBufferAddr(u8Idx, tmpAdr);
3563 tmpAdr += MVD_FW_MV_BUF_LEN;
3564 MVD_DEBUGINFO(MVD_PRINT("====> %s End of HW buffers = 0x%lx\n", __FUNCTION__, (unsigned long)tmpAdr));
3565
3566 return tmpAdr;
3567 }
3568
3569 //------------------------------------------------------------------------------
3570 /// Set the number of framebuffer
3571 /// @param -u8FrmNum \b IN : the number of framebuffer
3572 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx,MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)3573 void HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx, MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)
3574 {
3575 #define MVD_FBNUM_DEFAULT 4
3576 #define MVD_FBNUM_MIN MVD_FBNUM_DEFAULT
3577
3578 MVD_CmdArg mvdcmd;
3579
3580 MVD_DEBUGINFO(MVD_PRINT("%s u8FrmNum = %d\n", __FUNCTION__, u8FrmNum));
3581 if (u8FrmNum < MVD_FBNUM_MIN)
3582 {
3583 MVD_DEBUGINFO(MVD_PRINT("%s set u8FrmNum as %d instead of %d!\n",
3584 __FUNCTION__, MVD_FBNUM_MIN, u8FrmNum));
3585 u8FrmNum = MVD_FBNUM_MIN;
3586 }
3587 SETUP_CMDARG(mvdcmd);
3588 mvdcmd.Arg0 = u8FrmNum;
3589 mvdcmd.Arg1 = u32FBUsedSize&0xff;
3590 mvdcmd.Arg2 = (u32FBUsedSize>>8)&0xff;
3591 mvdcmd.Arg3 = (u32FBUsedSize>>16)&0xff;
3592 mvdcmd.Arg4 = (u32FBUsedSize>>24)&0xff;
3593 SET_DECNUM(mvdcmd, u8Idx);
3594 if (HAL_MVD_MVDCommand( CMD_FB_NUM, &mvdcmd ) == FALSE)
3595 {
3596 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_NUM ) );
3597 return;
3598 }
3599 return;
3600 }
3601
MVD_WriteFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u16Offset,MS_U8 u8Size,MS_U32 u32Val)3602 static MS_BOOL MVD_WriteFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u16Offset, MS_U8 u8Size, MS_U32 u32Val)
3603 {
3604 MS_BOOL bRet = FALSE;
3605 MS_VIRT u32BufStart = NULL;
3606 switch (eBuffType)
3607 {
3608 case FW_BUFF_VOLINFO: u32BufStart = GET_VOL_BUFFADD(u8Idx); break;
3609 case FW_BUFF_FRMINFO: u32BufStart = GET_FRMINFO_BUFFADD(u8Idx); break;
3610 case FW_BUFF_HDR: u32BufStart = GET_HDR_BUFFADD(u8Idx); break;
3611 case FW_BUFF_USRDATA: u32BufStart = GET_USRDATA_BUFFADD(u8Idx); break;
3612 case FW_BUFF_FWSLQTAB: u32BufStart = GET_SLQ_BUFFADD(u8Idx); break;
3613 case FW_BUFF_PTSTBL: u32BufStart = GET_PTSTBL_BUFFADD(u8Idx); break;
3614 case FW_BUFF_DS: u32BufStart = GET_DS_BUFFADD(u8Idx); break;
3615 case FW_BUFF_XCINFO: u32BufStart = GET_XCINFO_BUFFADD(u8Idx); break;
3616 case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
3617 default:
3618 break;
3619 }
3620 if (NULL == u32BufStart)
3621 {
3622 MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3623 __FUNCTION__, u8Idx, eBuffType, u16Offset, u8Size);
3624 return bRet;
3625 }
3626
3627 if (u8Size == sizeof(MS_U8))
3628 {
3629 bRet = HAL_MVD_MemWriteByte(u32BufStart+u16Offset, (MS_U8)u32Val);
3630 }
3631 else if (u8Size == sizeof(MS_U32))
3632 {
3633 bRet = HAL_MVD_MemWrite4Byte(u32BufStart+u16Offset, u32Val);
3634 }
3635
3636 MVD_DEBUGINFO(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3637 __FUNCTION__, u32Val, u8Idx, eBuffType, u16Offset, u8Size));
3638 return bRet;
3639 }
3640
3641 //================== Vol Info ==================//
HAL_MVD_GetBitsRate(MS_U8 u8Idx)3642 MS_U32 HAL_MVD_GetBitsRate(MS_U8 u8Idx)
3643 {
3644 //Ref 13818-2, this flag is unit of 400 bits/sec
3645 return MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_BIT_RATE, sizeof(MS_U32))*400;
3646 }
3647
HAL_MVD_GetVideoRange(MS_U8 u8Idx)3648 MS_U8 HAL_MVD_GetVideoRange(MS_U8 u8Idx)
3649 {
3650 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_VIDEO_RANGE, sizeof(MS_U8));
3651 }
3652
HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)3653 MS_BOOL HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)
3654 {
3655 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_LOW_DELAY, sizeof(MS_U8));
3656 }
3657
HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)3658 MS_BOOL HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)
3659 {
3660 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_MPEG_FRC_MODE, sizeof(MS_U8));
3661 }
3662
HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)3663 MS_BOOL HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)
3664 {
3665 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_DS_ENABLE, sizeof(MS_U8));
3666 }
3667
HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)3668 MS_BOOL HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)
3669 {
3670 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_FIRST_DISPLAY, sizeof(MS_U8));
3671 }
3672
3673
3674 //================== FrameInfo ==================//
HAL_MVD_GetPicCounter(MS_U8 u8Idx)3675 MS_U32 HAL_MVD_GetPicCounter(MS_U8 u8Idx)
3676 {
3677 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FRAME_COUNT, sizeof(MS_U32));
3678 }
3679
HAL_MVD_IsSeqHeaderFound(MS_U8 u8Idx)3680 MS_U8 HAL_MVD_IsSeqHeaderFound(MS_U8 u8Idx)
3681 {
3682 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEQ_FOUND, sizeof(MS_U8));
3683 }
3684
HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)3685 MS_U32 HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)
3686 {
3687 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SKIP_FRAME_COUNT, sizeof(MS_U32));
3688 }
3689
HAL_MVD_GetPicType(MS_U8 u8Idx)3690 MVD_PicType HAL_MVD_GetPicType(MS_U8 u8Idx)
3691 {
3692 MS_U32 picType = 0xff;
3693 MVD_PicType ret = E_MVD_PIC_UNKNOWN;
3694
3695 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3696 {
3697 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3698 return E_MVD_PIC_UNKNOWN;
3699 }
3700 picType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PICTURE_TYPE, sizeof(MS_U32));
3701 switch (picType)
3702 {
3703 case 0:
3704 ret = E_MVD_PIC_I;
3705 break;
3706 case 1:
3707 ret = E_MVD_PIC_P;
3708 break;
3709 case 2:
3710 ret = E_MVD_PIC_B;
3711 break;
3712 default:
3713 break;
3714 }
3715 return ret;
3716 }
3717
HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)3718 MS_S32 HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)
3719 {
3720 return (MS_S32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PTS_STC, sizeof(MS_S32));
3721 }
3722
HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)3723 MS_U8 HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)
3724 {
3725 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FB_INDEX, sizeof(MS_U8));
3726 }
3727
HAL_MVD_GetVldErrCount(MS_U8 u8Idx)3728 MS_U32 HAL_MVD_GetVldErrCount(MS_U8 u8Idx)
3729 {
3730 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VLD_ERR_COUNT, sizeof(MS_U32));
3731 }
3732
HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)3733 MS_BOOL HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)
3734 {
3735 return !(MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INVALIDSTREAM, sizeof(MS_U8));
3736 }
3737
HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)3738 MS_U8 HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)
3739 {
3740 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FIRST_I_FOUND, sizeof(MS_U8));
3741 }
3742
3743 //------------------------------------------------------------------------------
3744 /// Set PTS base to MVD F/W
3745 /// @param -u32pts \b IN : pts unit in 90k counter
3746 //------------------------------------------------------------------------------
HAL_MVD_SetPTSBase(MS_U8 u8Idx,MS_U32 u32pts)3747 void HAL_MVD_SetPTSBase(MS_U8 u8Idx, MS_U32 u32pts)
3748 {
3749 MVD_CmdArg mvdcmd;
3750
3751 SET_CMDARG(mvdcmd, u32pts, u8Idx);
3752 if (HAL_MVD_MVDCommand( CMD_PTS_BASE, &mvdcmd ) == FALSE)
3753 {
3754 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_BASE ) );
3755 }
3756 return;
3757 }
3758
HAL_MVD_GetPTS(MS_U8 u8Idx)3759 MS_U32 HAL_MVD_GetPTS(MS_U8 u8Idx)
3760 {
3761 MS_U32 u32PTS = 0;
3762
3763 u32PTS = (MS_U32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3764 u32PTS = _90K_TO_MS(u32PTS);
3765 return u32PTS;
3766 }
3767
HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)3768 MS_U64 HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)
3769 {
3770 MS_U64 u64PTS = 0;
3771 MS_U64 u32_high32_PTS = 0;
3772 MS_U64 u32_low32_PTS = 0;
3773
3774 if(eType==E_MVD_PTS_DISP)
3775 {
3776 u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3777 u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS_MSB, sizeof(MS_U32));
3778 }
3779 else if(eType==E_MVD_PTS_PRE_PAS)
3780 {
3781 u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_LOW, sizeof(MS_U32));
3782 u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_HIGH, sizeof(MS_U32));
3783 }
3784
3785 u64PTS = (u32_high32_PTS<<32)|u32_low32_PTS;
3786 _90K_TO_MS_U64(u64PTS);
3787 return u64PTS;
3788 }
3789
HAL_MVD_GetNextPTS(MS_U8 u8Idx)3790 MS_U32 HAL_MVD_GetNextPTS(MS_U8 u8Idx)
3791 {
3792 return (MS_U32)_90K_TO_MS(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_NEXT_PTS, sizeof(MS_U32)));
3793 }
3794
HAL_MVD_GetChromaFormat(MS_U8 u8Idx)3795 MS_U32 HAL_MVD_GetChromaFormat(MS_U8 u8Idx)
3796 {
3797 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CHROMA_FORMAT, sizeof(MS_U8));
3798 }
3799
HAL_MVD_GetGOPCount(MS_U8 u8Idx)3800 MS_U32 HAL_MVD_GetGOPCount(MS_U8 u8Idx)
3801 {
3802 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_I_FCNT, sizeof(MS_U32))
3803 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_P_FCNT, sizeof(MS_U32))
3804 + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_B_FCNT, sizeof(MS_U32));
3805 }
3806
HAL_MVD_GetColorFormat(MS_U8 u8Idx)3807 MS_U8 HAL_MVD_GetColorFormat(MS_U8 u8Idx)
3808 {
3809 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3810 {
3811 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3812 return 0xff;
3813 }
3814
3815 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VIDEO_FORMAT, sizeof(MS_U8));
3816 }
3817
HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)3818 MS_U8 HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)
3819 {
3820 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3821 {
3822 MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3823 return 0xff;
3824 }
3825
3826 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MATRIX_COEF, sizeof(MS_U8));
3827 }
3828
HAL_MVD_StepDecode(MS_U8 u8Idx)3829 MS_BOOL HAL_MVD_StepDecode(MS_U8 u8Idx)
3830 {
3831 MVD_CmdArg mvdcmd;
3832 SETUP_CMDARG(mvdcmd);
3833 SET_DECNUM(mvdcmd, u8Idx);
3834 SET_CMD_RET_FALSE(CMD_SINGLE_STEP, &mvdcmd);
3835
3836 if (HAL_MVD_Resume(u8Idx) == FALSE)
3837 {
3838 MVD_DEBUGERROR(MVD_PRINT("Command: HAL_MVD_Resume fail!!\r\n"));
3839 return FALSE;
3840 }
3841
3842 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3843 if (pCtrlCfg)
3844 {
3845 pCtrlCfg->bStepDecode = TRUE;
3846 }
3847
3848 return TRUE;
3849 }
3850
HAL_MVD_IsStepDispDone(MS_U8 u8Idx)3851 MS_BOOL HAL_MVD_IsStepDispDone(MS_U8 u8Idx)
3852 {
3853 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8));
3854 }
3855
HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)3856 MS_BOOL HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)
3857 {
3858 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_TO_PTS_DONE, sizeof(MS_U8));
3859 }
3860
3861 //Only for RCV.
HAL_MVD_GetPayloadLen(MS_U8 u8Idx)3862 MS_U32 HAL_MVD_GetPayloadLen(MS_U8 u8Idx)
3863 {
3864 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_RCV_PAYLOAD_LENGTH, sizeof(MS_U32));
3865 }
3866
3867 //Only for RCV.
HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)3868 MS_BOOL HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)
3869 {
3870 return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MEET_FILE_END_SC, sizeof(MS_U8));
3871 }
3872
HAL_MVD_IsCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3873 MS_BOOL HAL_MVD_IsCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3874 {
3875 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3876 MS_BOOL bCmdRdy = FALSE;
3877
3878 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3879
3880 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3881 MVD_DEBUGINFO(MVD_PRINT("u32CmdState.value = 0x%x\n", u32CmdState.value));
3882 switch (eCmd)
3883 {
3884 case MVD_HANDSHAKE_PAUSE:
3885 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_pause);
3886 break;
3887 case MVD_HANDSHAKE_SLQ_RST:
3888 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_slq_reset);
3889 break;
3890 case MVD_HANDSHAKE_STOP:
3891 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_stop);
3892 break;
3893 case MVD_HANDSHAKE_SKIP_DATA:
3894 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_skip_data);
3895 break;
3896 case MVD_HANDSHAKE_SINGLE_STEP:
3897 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_single_step);
3898 break;
3899 case MVD_HANDSHAKE_SCALER_INFO:
3900 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_scaler_data_ready);
3901 break;
3902 case MVD_HANDSHAKE_GET_NXTDISPFRM:
3903 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready);
3904 break;
3905 case MVD_HANDSHAKE_PARSER_RST:
3906 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_parser_rst);
3907 break;
3908 case MVD_HANDSHAKE_RST_CC608:
3909 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc608_rst);
3910 break;
3911 case MVD_HANDSHAKE_RST_CC708:
3912 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc708_rst);
3913 break;
3914 case MVD_HANDSHAKE_VIRTUAL_COMMAND:
3915 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_virtualCommand);
3916 break;
3917 case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
3918 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_flush);
3919 break;
3920 case MVD_HANDSHAKE_VSYNC_CONTROL:
3921 bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_vsync_control);
3922 break;
3923 default:
3924 bCmdRdy = FALSE;
3925 break;
3926 }
3927 return bCmdRdy;
3928 }
3929
HAL_MVD_ClearCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3930 MS_BOOL HAL_MVD_ClearCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3931 {
3932 MVD_CMD_HANDSHADE_INDEX u32CmdState;
3933
3934 HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3935
3936 u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3937 MVD_DEBUGINFO(MVD_PRINT("before CLR u32CmdState.value = 0x%x\n", u32CmdState.value));
3938 switch (eCmd)
3939 {
3940 case MVD_HANDSHAKE_SCALER_INFO:
3941 u32CmdState.mvdcmd_handshake_scaler_data_ready = 0;
3942 break;
3943 default:
3944 break;
3945 }
3946
3947 //write the value back: may it overwrite the value that f/w is supposed to write?
3948 MVD_WriteFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32), u32CmdState.value);
3949 MVD_DEBUGINFO(MVD_PRINT("after CLR u32CmdState.value = 0x%x\n",
3950 MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32))));
3951 return TRUE;
3952 }
3953
3954
HAL_MVD_GetTimeCode(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_TimeCode * pInfo)3955 MS_BOOL HAL_MVD_GetTimeCode(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_TimeCode* pInfo)
3956 {
3957 MS_BOOL bRet = FALSE;
3958 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3959 if (NULL == pInfo)
3960 {
3961 return FALSE;
3962 }
3963
3964 HAL_MVD_InvalidBuffRetFalse(pu8MVDGetFrameInfoBufStart);
3965
3966 if (E_MVD_FRMINFO_DECODE == eType)
3967 {
3968 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS);
3969 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES);
3970 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS);
3971 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES);
3972 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG);
3973 }
3974 else if (E_MVD_FRMINFO_DISPLAY == eType)
3975 {
3976 pInfo->u8TimeCodeHr = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS_DISP);
3977 pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES_DISP);
3978 pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS_DISP);
3979 pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES_DISP);
3980 pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG_DISP);
3981 }
3982 else
3983 {
3984 bRet = FALSE;
3985 }
3986
3987 return bRet;
3988 }
3989
HAL_MVD_GetDispCnt(MS_U8 u8Idx)3990 MS_U32 HAL_MVD_GetDispCnt(MS_U8 u8Idx)
3991 {
3992 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPLAYED_CNT, sizeof(MS_U32));
3993 }
3994
HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)3995 MS_U32 HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)
3996 {
3997 #ifdef OFFSET_CUR_MIN_TSP_DATA_SIZE
3998 return MVD_GetFWBuffData(u8HalIdx, FW_BUFF_FRMINFO, OFFSET_CUR_MIN_TSP_DATA_SIZE, sizeof(MS_U32));
3999 #else
4000 return 0x400;
4001 #endif
4002 }
4003
HAL_MVD_GetDropCnt(MS_U8 u8Idx)4004 MS_U32 HAL_MVD_GetDropCnt(MS_U8 u8Idx)
4005 {
4006 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DROP_FRAME_COUNT, sizeof(MS_U32));
4007 }
4008
HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)4009 MS_U32 HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)
4010 {
4011 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
4012
4013 if(pu8MVDGetFrameInfoBufStart==0)
4014 {
4015 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState error: pu8MVDGetFrameInfoBufStart=NULL\n"));
4016 return 0;
4017 }
4018
4019 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState()=%x,%x,%x,%x,%x\n",
4020 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT)),
4021 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE)),
4022 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_DIFF_FIELD_NO)),
4023 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT_LATCH)),
4024 (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_FRAME_COUNT))));
4025
4026 return HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE);
4027 }
4028
4029 //Get ErrStatus when ErrCode==ErrShape
MVD_GetErrShapeStat(MS_U32 u32errStat)4030 static MVD_ErrStatus MVD_GetErrShapeStat(MS_U32 u32errStat)
4031 {
4032 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
4033 switch (u32errStat)
4034 {
4035 case 0:
4036 st = E_MVD_ERR_SHAPE_RECTANGULAR;
4037 break;
4038 case 1:
4039 st = E_MVD_ERR_SHAPE_BINARY;
4040 break;
4041 case 2:
4042 st = E_MVD_ERR_SHAPE_BINARY_ONLY;
4043 break;
4044 case 3:
4045 st = E_MVD_ERR_SHAPE_GRAYSCALE;
4046 break;
4047 default:
4048 break;
4049 }
4050 return st;
4051 }
4052
4053 //Get ErrStatus when ErrCode==ErrSprite
MVD_GetErrSpriteStat(MS_U32 u32errStat)4054 static MVD_ErrStatus MVD_GetErrSpriteStat(MS_U32 u32errStat)
4055 {
4056 MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
4057 switch (u32errStat)
4058 {
4059 case 0:
4060 st = E_MVD_ERR_USED_SPRITE_UNUSED;
4061 break;
4062 case 1:
4063 st = E_MVD_ERR_USED_SPRITE_STATIC;
4064 break;
4065 case 2:
4066 st = E_MVD_ERR_USED_SPRITE_GMC;
4067 break;
4068 case 3:
4069 st = E_MVD_ERR_USED_SPRITE_RESERVED;
4070 break;
4071 default:
4072 break;
4073 }
4074 return st;
4075 }
4076
HAL_MVD_GetErrInfo(MS_U8 u8Idx,MVD_ErrCode * errCode,MVD_ErrStatus * errStatus)4077 void HAL_MVD_GetErrInfo(MS_U8 u8Idx, MVD_ErrCode *errCode, MVD_ErrStatus *errStatus)
4078 {
4079 MS_U32 errorCode = E_MVD_ERR_UNKNOWN;
4080 MS_U32 errorStatus = E_MVD_ERR_STATUS_UNKOWN;
4081 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
4082
4083 if(pu8MVDGetFrameInfoBufStart==0)
4084 {
4085 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetErrInfo error!\n"));
4086 return;
4087 }
4088
4089 errorCode = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_CODE);
4090 errorStatus = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_STATUS);
4091
4092 switch (errorCode)
4093 {
4094 case VOL_SHAPE:
4095 *errCode = E_MVD_ERR_SHAPE;
4096 *errStatus = MVD_GetErrShapeStat(errorStatus);
4097 break;
4098 case VOL_USED_SPRITE:
4099 *errCode = E_MVD_ERR_USED_SPRITE;
4100 *errStatus = MVD_GetErrSpriteStat(errorStatus);
4101 break;
4102 case VOL_NOT_8_BIT:
4103 *errCode = E_MVD_ERR_NOT_8_BIT;
4104 *errStatus = E_MVD_ERR_STATUS_NONE;
4105 break;
4106 case VOL_NERPRED_ENABLE:
4107 *errCode = E_MVD_ERR_NERPRED_ENABLE;
4108 *errStatus = E_MVD_ERR_STATUS_NONE;
4109 break;
4110 case VOL_REDUCED_RES_ENABLE:
4111 *errCode = E_MVD_ERR_REDUCED_RES_ENABLE;
4112 *errStatus = E_MVD_ERR_STATUS_NONE;
4113 break;
4114 case VOL_SCALABILITY:
4115 *errCode = E_MVD_ERR_SCALABILITY;
4116 *errStatus = E_MVD_ERR_STATUS_NONE;
4117 break;
4118 case VOL_H263_ERROR:
4119 *errCode = E_MVD_ERR_H263_ERROR;
4120 *errStatus = E_MVD_ERR_STATUS_NONE;
4121 break;
4122 case VOL_RES_NOT_SUPPORT:
4123 *errCode = E_MVD_ERR_RES_NOT_SUPPORT;
4124 *errStatus = E_MVD_ERR_STATUS_NONE;
4125 break;
4126 case VOL_MPEG4_NOT_SUPPORT:
4127 *errCode = E_MVD_ERR_MPEG4_NOT_SUPPORT;
4128 *errStatus = E_MVD_ERR_STATUS_NONE;
4129 break;
4130 case VOL_PROFILE_NOT_SUPPORT:
4131 *errCode = E_MVD_ERR_PROFILE_NOT_SUPPORT;
4132 *errStatus = E_MVD_ERR_STATUS_NONE;
4133 break;
4134 case VOL_RCV_ERROR_OCCUR:
4135 *errCode = E_MVD_ERR_RCV_ERROR_OCCUR;
4136 *errStatus = E_MVD_ERR_STATUS_NONE;
4137 break;
4138 case VOL_OTHER:
4139 *errCode = E_MVD_ERR_OTHER;
4140 *errStatus = E_MVD_ERR_STATUS_NONE;
4141 break;
4142 default:
4143 *errCode = E_MVD_ERR_UNKNOWN;
4144 *errStatus = E_MVD_ERR_STATUS_UNKOWN;
4145 break;
4146 }
4147
4148 return;
4149 }
4150
4151 //take care MIU1 address
HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)4152 MS_PHY HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)
4153 {
4154 if (u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu2BaseAddr)
4155 {
4156 return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu2BaseAddr);
4157 }
4158 else if(u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu1BaseAddr)
4159 {
4160 return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu1BaseAddr);
4161 }
4162 else
4163 {
4164 return u32PhyAdd;
4165 }
4166 }
4167
4168
HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx,MVD_PacketInfo * pstVideoPKT)4169 MS_BOOL HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx, MVD_PacketInfo *pstVideoPKT)
4170 {
4171 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
4172 MS_VIRT u32EsLast;
4173 MS_VIRT* u32LastEntry = &pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
4174 MS_VIRT* pu32EsNew = &pstSlqTblInfo->pDrvEsTbl->u32WrPtr;
4175 MS_U32 u32EntryWord = 0;
4176 MS_U32 u32Index = 0;
4177 MS_U32 u32Pts;
4178 MS_VIRT u32MVDFWPtsTblAddr = NULL;
4179 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4180
4181 MS_U32 u32ESStart=0;
4182 MS_U32 u32ESEnd=0;
4183 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4184
4185
4186 #if _SLQTBL_DUMP_PKT
4187 // static MS_U32 u32SendTimes[MAX_DEC_NUM]= {0, 0};
4188
4189 MVD_PRINT("Pkt[%x] st=0x%x len=0x%x pts=0x%x id_l=0x%x id_h=0x%x\n", u32SendTimes[u8Idx]++,
4190 pstVideoPKT->u32StAddr, pstVideoPKT->u32Length, pstVideoPKT->u32TimeStamp,
4191 pstVideoPKT->u32ID_L, pstVideoPKT->u32ID_H);
4192 #endif
4193
4194 #ifdef VDEC3
4195 if(pstCtrlCfg->u8McuMode == FALSE)
4196 #endif
4197 {
4198 u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
4199 MS_ASSERT(u32MVDFWPtsTblAddr != NULL);
4200 if (u32MVDFWPtsTblAddr)
4201 {
4202 MS_VIRT u32PtsTblEntryAddr = 0;
4203 //so far, this is the only place that driver will write f/w 1M area after init.
4204 u32Index = (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/8;
4205 if(HAL_MVD_IsMcuMode(u8Idx) == FALSE)
4206 {
4207 if (pstVideoPKT->u32TimeStamp != MVD_NULLPKT_PTS)
4208 {
4209 u32Pts = _MS_TO_90K(pstVideoPKT->u32TimeStamp);
4210 }
4211 else
4212 {
4213 u32Pts = MVD_NULLPKT_PTS;
4214 }
4215 }
4216 else
4217 {
4218 u32Pts = pstVideoPKT->u32TimeStamp;
4219 }
4220 u32PtsTblEntryAddr = u32MVDFWPtsTblAddr+u32Index*MVD_FW_SLQTBL_PTS_LEN;
4221 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+4, pstSlqTblInfo->u32DummyPktCnt); //dummyPktCnt
4222 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+8, pstVideoPKT->u32ID_L); //idLow
4223 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+12, pstVideoPKT->u32ID_H); //idHigh
4224 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+16, u32Pts); //PTS
4225 HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr, (pstSlqTblInfo->u32SlqByteCnt)&0xffffff); //byteCnt
4226 //MVD_PRINT("PTS=0x%x(%x), idx=0x%x add=0x%x\n", pstVideoPKT->u32TimeStamp,
4227 // HAL_MVD_MemRead4Byte(u32PtsTblEntryAddr+16),
4228 // u32Index, u32PtsTblEntryAddr+16);
4229
4230 if ((HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
4231 && (pstCtrlCfg->eFileSyncMode == E_MVD_TIMESTAMP_STS))
4232 {
4233 if(pMVDHalContext->bDropOnePTS[u8Idx] == FALSE)
4234 {
4235 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12, pstVideoPKT->u32ID_H); //idHigh
4236 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16, pstVideoPKT->u32TimeStamp); //PTS
4237
4238 MVD_DBG_STS(MVD_PRINT(">>> drvMVD pts,idH = %lu, %lu\n", HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16),
4239 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12)));
4240 if (((MVD_NULLPKT_PTS == pstVideoPKT->u32ID_H) && (MVD_NULLPKT_PTS == pstVideoPKT->u32TimeStamp)) == FALSE)
4241 { //Only update PTS to firmware when pts field is valid.
4242 //Plz refer to MDrv_MVD_PushQueue if (u8MstMode == MST_MODE_TRUE) {}
4243 HAL_MVD_UpdatePts(u8Idx); //for uniplayer or MCU mode
4244 }
4245 }
4246
4247 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
4248 }
4249 }
4250 #if _SLQTBL_DUMP_PTS
4251 if (u32Index == 0x177)
4252 {
4253 _SLQTbl_DumpPtsTbl(u8Idx, 0, 0x179);
4254 }
4255 #endif
4256 }
4257 pstSlqTblInfo->u32SlqByteCnt += pstVideoPKT->u32Length;
4258
4259 //update SLQ tbl entry
4260 //u32EsLast = (pstVideoPKT->u32StAddr)+pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4261 u32EsLast = (pstVideoPKT->u32StAddr)+HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
4262 HAL_MVD_MemWrite4Byte(*pu32EsNew, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4263 u32ESStart = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4264
4265 u32EsLast += pstVideoPKT->u32Length; //update ES write pointer
4266 //Notice: This is for MVD HW, so no need to minus one.
4267 HAL_MVD_MemWrite4Byte((*pu32EsNew)+4, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4268 u32ESEnd = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4269
4270 *pu32EsNew += 8;
4271 if (*pu32EsNew >= pstSlqTblInfo->pDrvEsTbl->u32EndAdd)
4272 { //wrap to the beginning of the table
4273 MVD_DEBUGINFO(MVD_PRINT("...ES wrapping to the beginning!\n"));
4274 *pu32EsNew = pstSlqTblInfo->pDrvEsTbl->u32StAdd;
4275 }
4276
4277 //MVD_PRINT("===>[%x] u32ESStart=0x%x u32ESEnd=0x%x u32EsLast=0x%x\n",
4278 // pMVDHalContext->u32SendTimes[u8Idx]++, u32ESStart, u32ESEnd, u32EsLast);
4279
4280 u32EntryWord = u32ESEnd;
4281 HAL_MVD_MemWrite4Byte(*u32LastEntry, u32EntryWord);
4282 //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry));
4283 //MVD_PRINT("===> u32EntryWord0=0x%x\n", u32EntryWord);
4284
4285 u32EntryWord = u32ESStart;
4286 HAL_MVD_MemWrite4Byte((*u32LastEntry)+4, u32EntryWord);
4287 //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry)+4);
4288 //MVD_PRINT("===> u32EntryWord1=0x%x\n", u32EntryWord);
4289
4290 *u32LastEntry += 8;
4291 if (*u32LastEntry >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
4292 { //wrap to the beginning of the table
4293 MVD_DEBUGINFO(MVD_PRINT("...wrapping to the beginning!\n"));
4294 *u32LastEntry = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4295 //also wrap DivX311 pattern table
4296 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
4297 }
4298
4299 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty)
4300 {
4301 pstSlqTblInfo->pDrvSlqTbl->u32Empty -= SLQ_ENTRY_LEN;
4302 }
4303
4304 return TRUE;
4305 }
4306
4307 //Table of frame rate code for MPEG-2
4308 #if 0
4309 #define FRM_RATE_CODE_NUM 9
4310 static const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
4311 {
4312 NULL,23976,24000,25000,29976,30000,50000,59947,60000
4313 };
4314 #endif
MVD_GCD(MS_U32 u32A,MS_U32 u32B)4315 static MS_U32 MVD_GCD(MS_U32 u32A, MS_U32 u32B)
4316 {
4317 MS_S32 i;
4318 MS_U32 x[4]; /* need x[0], x[1], x[i-1] */
4319
4320 if (u32A > u32B)
4321 {
4322 x[0] = u32A; x[1] = u32B;
4323 }
4324 else
4325 {
4326 x[0] = u32B; x[1] = u32A;
4327 }
4328
4329 i = 1;
4330
4331 #define w(x) (((x)<4)?(x):(2+((x)&1)))
4332
4333 while( x[w(i)] != 0 )
4334 {
4335 x[w(i+1)] = x[w(i-1)] % x[w(i)];
4336 i++;
4337 }
4338
4339 return x[w(i-1)];
4340
4341 #undef w
4342 }
HAL_MVD_GetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)4343 void HAL_MVD_GetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo)
4344 {
4345 FW_VOL_INFO gvolInfo;
4346 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
4347 MS_VIRT temp = 0;
4348 MS_U32 u32DAR_Width=0,u32DAR_Height=0,u32PAR_Width=0,u32PAR_Height=0,u32GCD=0;
4349 MS_U32 u32Vertical_Size=0, u32Horizontal_Size=0;
4350 //13818-2 page 38 Table 6-3
4351 MS_U8 u8DARTable[5][2] = { {1,1}, {1,1}, {4,3}, {16,9}, {221,100} };
4352 MS_U32 pu8MVDGetVolBufStart = NULL;
4353 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4354
4355 pu8MVDGetVolBufStart = GET_VOL_BUFFADD(u8Idx);
4356 if (pu8MVDGetVolBufStart == NULL)
4357 {
4358 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetFrameInfo error: pu8MVDGetVolBufStart=NULL\n"));
4359 return;
4360 }
4361
4362 HAL_MVD_CPU_Sync();
4363 HAL_MVD_ReadMemory();
4364
4365 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8Idx),temp);
4366
4367 gvolInfo = (*(volatile FW_VOL_INFO*)(HAL_MVD_PA2NonCacheSeg(temp)));
4368
4369 pinfo->u16HorSize = (MS_U16) gvolInfo.width;
4370 pinfo->u16VerSize = (MS_U16) gvolInfo.height;
4371 pinfo->u16par_width = (MS_U16) gvolInfo.par_width;
4372 pinfo->u16par_height = (MS_U16) gvolInfo.par_height;
4373 pinfo->u8AspectRate = gvolInfo.aspect_ratio;
4374
4375 pinfo->u16CropBottom = gvolInfo.CropBottom;
4376 pinfo->u16CropTop = 0;
4377 pinfo->u16CropLeft = 0;
4378
4379 if (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK)
4380 {
4381 //Notice: Firmware and driver have to be consistent for this part,
4382 // otherwise the pitch will not match and video is noisy.
4383 pinfo->u16CropRight = MVD_WIDTH_ALIGN_BYTE - (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK);
4384 pinfo->u16HorSize = ((pinfo->u16HorSize >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4385 }
4386 else
4387 {
4388 pinfo->u16CropRight = 0;
4389 }
4390
4391 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
4392 if ((curCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER) ||
4393 (curCodecType == E_MVD_CODEC_DIVX311) || (curCodecType == E_MVD_CODEC_FLV))
4394 {
4395 pinfo->u8Interlace= FALSE; //divx311/flv/svh just has progressive mode
4396 MS_ASSERT(gvolInfo.progressive_sequence == 1); //FW will init it as 1
4397 }
4398 else
4399 {
4400 if (gvolInfo.progressive_sequence == 0)
4401 {
4402 pinfo->u8Interlace=1;
4403 }
4404 else
4405 {
4406 pinfo->u8Interlace=0;
4407 }
4408 }
4409
4410 ///Calculate PAR info
4411 if (pinfo->u16par_width == 0 || pinfo->u16par_height == 0)
4412 {
4413 if ((pinfo->u8AspectRate > 0) && (pinfo->u8AspectRate < 5 ))
4414 {
4415 if (pinfo->u8AspectRate == 1)
4416 { //SAR=1.0 square sample
4417 u32DAR_Width = (MS_U32)pinfo->u16HorSize;
4418 u32DAR_Height = (MS_U32)pinfo->u16VerSize;
4419 pinfo->u16par_width = 1;
4420 pinfo->u16par_height = 1;
4421 }
4422 else
4423 {
4424 u32DAR_Width = (MS_U32)u8DARTable[pinfo->u8AspectRate][0];
4425 u32DAR_Height = (MS_U32)u8DARTable[pinfo->u8AspectRate][1];
4426 u32Vertical_Size = (MS_U32)pinfo->u16VerSize;
4427 u32Horizontal_Size = (MS_U32)(pinfo->u16HorSize - pinfo->u16CropRight);
4428 u32PAR_Width = u32DAR_Width * u32Vertical_Size;
4429 u32PAR_Height = u32DAR_Height * u32Horizontal_Size;
4430 u32GCD = MVD_GCD(u32PAR_Width, u32PAR_Height);
4431 if (0 == u32GCD)
4432 {
4433 pinfo->u16HorSize = 0xFFFF;
4434 pinfo->u16VerSize = 0xFFFF;
4435
4436 return;
4437 }
4438 else
4439 {
4440 pinfo->u16par_width = (MS_U16) (u32PAR_Width / u32GCD);
4441 pinfo->u16par_height = (MS_U16) (u32PAR_Height / u32GCD);
4442 MVD_DEBUGVERBAL(MVD_PRINT("u32PAR_Width:%d,u32PAR_Height:%d,GCD:%d\n",u32PAR_Width,u32PAR_Height,u32GCD));
4443 }
4444 }
4445 }
4446 else
4447 {
4448 //set to 0 to indicate it's abnormal
4449 u32DAR_Width = 0;
4450 u32DAR_Height = 0;
4451 pinfo->u16par_width = 0;
4452 pinfo->u16par_height = 0;
4453 }
4454 MVD_DEBUGVERBAL(MVD_PRINT("u32DAR_Width:%d,u32DAR_Height%d\n",u32DAR_Width,u32DAR_Height));
4455 }
4456 MVD_DEBUGVERBAL(MVD_PRINT("pinfo->u16par_width:%d, pinfo->u16par_height:%d\n",pinfo->u16par_width, pinfo->u16par_height));
4457
4458 if (curCodecType == E_MVD_CODEC_MPEG2)
4459 {
4460 if (gvolInfo.frame_rate < FRM_RATE_CODE_NUM)
4461 {
4462 pinfo->u32FrameRate = stFrameRateCode[gvolInfo.frame_rate];
4463 }
4464 else
4465 {
4466 pinfo->u32FrameRate = 0;
4467 }
4468 }
4469 else if ((curCodecType == E_MVD_CODEC_VC1_ADV) || (curCodecType == E_MVD_CODEC_VC1_MAIN))
4470 {
4471 if ((gvolInfo.vc1_frame_rate != 0) && (gvolInfo.vc1_frame_rate != MVD_U32_MAX))
4472 {
4473 pinfo->u32FrameRate = gvolInfo.vc1_frame_rate;
4474 }
4475 else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
4476 {
4477 pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx] * 1000) / pMVDHalContext->u32DmxFrameRateBase[u8Idx];
4478 }
4479 else
4480 {
4481 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4482 }
4483
4484 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vc1_frameRate=%d\n", pinfo->u32FrameRate));
4485 }
4486 else if (curCodecType == E_MVD_CODEC_MPEG4)
4487 {
4488 if (pDivxInfo->frame_rate != 0)
4489 {
4490 pinfo->u32FrameRate = pDivxInfo->frame_rate;
4491 //report framerate specified in MDrv_MVD_SetFrameInfo(), which is usually obtained from container
4492 }
4493 else if (gvolInfo.frame_rate != 0)
4494 {
4495 pinfo->u32FrameRate = gvolInfo.frame_rate; //report framerate from f/w
4496 }
4497 else if ((gvolInfo.fixed_vop_time_incr != 0) && (gvolInfo.vol_time_incr_res != 0))
4498 {
4499 pinfo->u32FrameRate = (gvolInfo.vol_time_incr_res * 1000) / gvolInfo.fixed_vop_time_incr;
4500 //calculate framerate according to vol header
4501 }
4502 else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
4503 {
4504 pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx] * 1000) / pMVDHalContext->u32DmxFrameRateBase[u8Idx];
4505 }
4506 else
4507 {
4508 pinfo->u32FrameRate = 60000; //set default frame rate according to chip capability
4509 }
4510 MVD_DEBUGVERBAL(MVD_PRINT("MVD: vol_time_incr_res=%d, fixed_vop_time_incr=%d\n", gvolInfo.vol_time_incr_res, gvolInfo.fixed_vop_time_incr));
4511 }
4512 else
4513 {
4514 if (gvolInfo.frame_rate != 0)
4515 {
4516 pinfo->u32FrameRate = gvolInfo.frame_rate;
4517 }
4518 else
4519 {
4520 pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4521 }
4522 }
4523 MVD_DEBUGVERBAL(MVD_PRINT("===> MVD: frameRate=%d curCodecType=0x%x\n", pinfo->u32FrameRate, curCodecType));
4524
4525 //for MM
4526 pinfo->u8MPEG1=gvolInfo.mpeg1;
4527 pinfo->u16PTSInterval=gvolInfo.pts_incr;
4528 pinfo->u8PlayMode=gvolInfo.play_mode;
4529 pinfo->u8FrcMode=gvolInfo.mpeg_frc_mode;
4530
4531 //for dynamic scaling
4532 pinfo->bEnableMIUSel = (MS_BOOL)pMVDHalContext->stMiuCfg.u8FWMiuSel;
4533
4534 if(pMVDHalContext->stMiuCfg.u8FWMiuSel >= E_CHIP_MIU_2)
4535 {
4536 MVD_DEBUGERROR(MVD_PRINT("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",pMVDHalContext->stMiuCfg.u8FWMiuSel));
4537 }
4538
4539 if (pstMemCfg->bEnableDynScale)
4540 {
4541 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_DS_BUFFADD(u8Idx),pinfo->u32DynScalingAddr);
4542
4543 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4544 pinfo->u8DynScalingDepth= pCtrlCfg->u8DynScalingDepth;
4545 pinfo->u32DynScalingBufSize= gvolInfo.DSbufsize;
4546 }
4547 else
4548 {
4549 pinfo->u32DynScalingAddr= NULL;
4550 pinfo->u8DynScalingDepth= 0;
4551 pinfo->u32DynScalingBufSize= 0;
4552 }
4553
4554 return;
4555 }
4556
MVD_RstFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType)4557 E_MVD_Result MVD_RstFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType)
4558 {
4559 E_MVD_Result eRet = E_MVD_RET_OK;
4560 MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4561 if (NULL == u32DecFrmInfoAdd)
4562 {
4563 return E_MVD_RET_FAIL;
4564 }
4565
4566 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4567 if (E_MVD_FRMINFO_DECODE == eType)
4568 {
4569 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR), _INIT_ADDR);
4570 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR), _INIT_ADDR);
4571 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP), _INIT_TIMESTAMP);
4572 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L), _INIT_ID);
4573 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H), _INIT_ID);
4574 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH), _INIT_LEN);
4575 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH), _INIT_LEN);
4576 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT), _INIT_LEN);
4577 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE), 0xff);
4578 }
4579 else if (E_MVD_FRMINFO_DISPLAY == eType)
4580 {
4581 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR), _INIT_ADDR);
4582 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR), _INIT_ADDR);
4583 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP), _INIT_TIMESTAMP);
4584 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L), _INIT_ID);
4585 HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H), _INIT_ID);
4586 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH), _INIT_LEN);
4587 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH), _INIT_LEN);
4588 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT), _INIT_LEN);
4589 HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE), 0xff);
4590 }
4591 else
4592 {
4593 eRet = E_MVD_RET_INVALID_PARAM;
4594 }
4595
4596 return eRet;
4597 }
4598
4599 //Given the start address & the available size for the FW buffers,
4600 //Calculate the start address of each buffers.
MVD_GetFWBuffAdd(MS_VIRT u32Start,MS_U32 u32AvailLen,MVD_FWBuff * pBuff)4601 static MS_BOOL MVD_GetFWBuffAdd(MS_VIRT u32Start, MS_U32 u32AvailLen, MVD_FWBuff* pBuff)
4602 {
4603 MS_VIRT tmpAdr = u32Start;
4604
4605 if(pBuff == NULL)
4606 {
4607 MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4608 return FALSE;
4609 }
4610 tmpAdr += MVD_FW_CODE_LEN;
4611 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_VOL_INFO_BUF_LEN, pBuff->pu8MVDGetVolBufStart);
4612 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_FRAME_INFO_BUF_LEN, pBuff->pu8MVDGetFrameInfoBufStart);
4613 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_DIVX_INFO_BUF_LEN, pBuff->pu8MVDSetHeaderBufStart);
4614 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN,
4615 (MVD3_FW_USER_DATA_BUF_LEN+MVD3_FW_USER_DATA_BUF_BACKUP_LEN), pBuff->u32UserDataBuf);
4616 //MVD3_FW_USER_DATA_BUF_BACKUP_LEN is used as CC decoding buffer for MVD_SUPPORT_X4_CC
4617
4618 GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_SLQ_TAB_TMPBUF_LEN, pBuff->u32MVDFWSLQTABTmpbufAdr);
4619 GET_FW_BUFFADD(tmpAdr, MVD_FW_SLQTBL_PTS_BUF_LEN, pBuff->u32MVDFWPtsTblAddr);
4620 GET_FW_BUFFADD(tmpAdr, MVD_FW_DYN_SCALE_BUF_LEN, pBuff->u32DynScalingAdd);
4621 GET_FW_BUFFADD(tmpAdr, MVD_FW_SCALER_INFO_BUF_LEN, pBuff->u32ScalerInfoAdd);
4622 GET_FW_BUFFADD(tmpAdr, MVD_FW_DECFRM_INFO_BUF_LEN, pBuff->u32DecFrmInfoAdd);
4623 GET_FW_BUFFADD(tmpAdr, MVD_FW_VBBU_TABLE_LEN, pBuff->u32VBBUTableAdd);
4624
4625
4626 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetVolBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetVolBufStart));
4627 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetFrameInfoBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetFrameInfoBufStart));
4628 MVD_DEBUGINFO(MVD_PRINT("set pu8MVDSetHeaderBufStart=%lx\n", (unsigned long)pBuff->pu8MVDSetHeaderBufStart));
4629 MVD_DEBUGINFO(MVD_PRINT("u32UserDataBuf start=%lx\n", (unsigned long)pBuff->u32UserDataBuf));
4630 MVD_DEBUGINFO(MVD_PRINT("u32MVDFWSLQTABTmpbufAdr start=%lx\n", (unsigned long)pBuff->u32MVDFWSLQTABTmpbufAdr));
4631 MVD_DEBUGINFO(MVD_PRINT("PtsTblAddr start=%lx\n", (unsigned long)pBuff->u32MVDFWPtsTblAddr));
4632 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAdd start=%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4633 MVD_DEBUGINFO(MVD_PRINT("ScalerInfo start=%lx end=%lx\n",
4634 (unsigned long)pBuff->u32ScalerInfoAdd, (pBuff->u32ScalerInfoAdd+MVD_FW_SCALER_INFO_BUF_LEN)));
4635 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx end=%lx\n",
4636 (unsigned long)pBuff->u32DecFrmInfoAdd, (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN)));
4637
4638 MS_U32 u32ShMemBoundary = (MVD_FW_CODE_LEN==MVD_FW_CODE_LEN_V00) ? MVD_FW_MPOOL_START_OFFSET : MVD_FW_TASK_OFFSET;
4639 #if v3_temp
4640
4641 if ((pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start) > u32ShMemBoundary)
4642 {
4643 //shared memory should not overlap with FW memory pool.
4644 MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%lx out of memory boundary!\n", __FUNCTION__,
4645 (pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start)));
4646 return FALSE;
4647 }
4648 #else
4649 if ((pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start) > u32ShMemBoundary)
4650 {
4651 //shared memory should not overlap with FW memory pool.
4652 MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%x out of memory boundary!\n", __FUNCTION__,
4653 (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start)));
4654 return FALSE;
4655 }
4656 #endif
4657
4658 return TRUE;
4659 }
4660
4661 //Set buffer address to f/w
4662 //Init the memory erea if necessary
MVD_SetFWBuffAdd(MS_U8 u8Idx,MVD_FWBuff * pBuff)4663 static MS_BOOL MVD_SetFWBuffAdd(MS_U8 u8Idx, MVD_FWBuff* pBuff)
4664 {
4665 MS_U32 i;
4666 MVD_SrcMode curSrcMode = E_MVD_SRC_UNKNOWN;
4667 MVD_MEMCfg* pstMemCfg = NULL;
4668 MVD_CtrlCfg* pCtrlCfg = NULL;
4669
4670 if(pBuff == NULL)
4671 {
4672 MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4673 return FALSE;
4674 }
4675
4676 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4677
4678 MVD_DEBUGINFO(MVD_PRINT("\nMIU is (shm,hw,fw)=(%x,%x,%x)\n",u8SHMMiuSel,pstMemCfg->u8HWMiuSel,pstMemCfg->u8FWMiuSel));
4679
4680 curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
4681
4682 HAL_MVD_SetVolInfoBufferAddr(u8Idx, pBuff->pu8MVDGetVolBufStart);
4683 _MVD_Memset(pBuff->pu8MVDGetVolBufStart, 0, MVD3_FW_VOL_INFO_BUF_LEN);
4684
4685 pBuff->u32VolAdd = pBuff->pu8MVDGetVolBufStart;
4686
4687 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pBuff->u32VolAdd,pBuff->u32VolAdd);
4688
4689 pBuff->u32VolAdd = HAL_MVD_PA2NonCacheSeg(pBuff->u32VolAdd);
4690 MVD_DEBUGINFO(MVD_PRINT("gvolInfo = 0x%lx, volBuf=0x%lx\n", (unsigned long)pBuff->u32VolAdd, (unsigned long)pBuff->pu8MVDGetVolBufStart));
4691
4692 HAL_MVD_SetFrameInfoBufferAddr(u8Idx, pBuff->pu8MVDGetFrameInfoBufStart);
4693 _MVD_Memset(pBuff->pu8MVDGetFrameInfoBufStart, 0, MVD3_FW_FRAME_INFO_BUF_LEN);
4694
4695 HAL_MVD_SetHeaderBufferAddr(u8Idx, pBuff->pu8MVDSetHeaderBufStart);
4696 HAL_MVD_SetUserDataBuf(u8Idx, pBuff->u32UserDataBuf, MVD3_FW_USER_DATA_BUF_LEN);
4697 pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4698 pCtrlCfg->u32UsrDataRd = pBuff->u32UserDataBuf;
4699
4700
4701 if((curSrcMode != E_MVD_TS_FILE_MODE)
4702 && (curSrcMode != E_MVD_TS_MODE))
4703 {
4704 _MVD_Memset(pBuff->u32MVDFWSLQTABTmpbufAdr, 0, MVD3_FW_SLQ_TAB_TMPBUF_LEN);
4705 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr, 0xBE010000UL);
4706 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr+4, 0x000000FAUL);
4707
4708 HAL_MVD_SetPtsTblAddr(u8Idx, pBuff->u32MVDFWPtsTblAddr);
4709 for (i=0; i<MVD_FW_SLQTBL_PTS_BUF_LEN; i+=MVD_FW_SLQTBL_PTS_LEN)
4710 {
4711 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i, 0); //byteCnt
4712 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+4, 0); //dummyPktCnt
4713 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+8, 0); //idLow
4714 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+12, 0); //idHigh
4715
4716 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+16, MVD_NULLPKT_PTS); //PTS
4717 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+20, 0); //reserved0
4718 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+24, 0); //reserved1
4719 HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+28, 0); //reserved2
4720 }
4721 //MS_ASSERT((u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)<=(u32start+u32len));
4722 MVD_DEBUGINFO(MVD_PRINT("PTS tbl start=%lx end=%lx\n",
4723 (unsigned long)pBuff->u32MVDFWPtsTblAddr, (unsigned long)(pBuff->u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)));
4724
4725 pBuff->u32VBBUTableAdd = VBBU_TABLE_START+u8Idx*0x100000;
4726 }
4727
4728 if (pstMemCfg->bEnableDynScale)
4729 {
4730 HAL_MVD_SetDynamicScaleAddr(u8Idx, pBuff->u32DynScalingAdd);
4731 HAL_MVD_EnableDynamicScale(u8Idx,0); //default old DS style
4732 pCtrlCfg->u8DynScalingDepth = 32; //HAL_MVD_GetDynamicScaleDepth
4733 MVD_DEBUGINFO(MVD_PRINT("u8EnableMIUSel = 0x%x\n", pMVDHalContext->stMiuCfg.u8FWMiuSel));
4734 MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAddr= 0x%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4735 MVD_DEBUGINFO(MVD_PRINT("u8DynScalingDepth= 0x%x\n", pCtrlCfg->u8DynScalingDepth));
4736 }
4737 MVD_DEBUGINFO(MVD_PRINT("DynScaling start=%lx end=%lx\n",
4738 (unsigned long)pBuff->u32DynScalingAdd, (unsigned long)(pBuff->u32DynScalingAdd+MVD_FW_DYN_SCALE_BUF_LEN)));
4739
4740 HAL_MVD_SetDecFrmInfoAddr(u8Idx, pBuff->u32DecFrmInfoAdd);
4741
4742 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
4743 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY);
4744 MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx\n", (unsigned long)pBuff->u32DecFrmInfoAdd));
4745
4746 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
4747 {
4748 HAL_MVD_SLQTblInit(u8Idx);
4749 }
4750
4751 return TRUE;
4752 }
4753
4754 #ifdef VDEC3
4755 #else
MVD_IsNextDispFrmRdy(MS_U8 u8Idx)4756 static MS_BOOL MVD_IsNextDispFrmRdy(MS_U8 u8Idx)
4757 {
4758 #define NXT_DISP_TIMEOUT 20000//0x20
4759 MS_U32 u32TimeOut = 0;
4760 MVD_CmdArg mvdcmd;
4761
4762 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM);
4763 SETUP_CMDARG(mvdcmd);
4764 SET_DECNUM(mvdcmd, u8Idx);
4765 SET_CMD_RET_FALSE(CMD_GET_NEXTDISPFRM, &mvdcmd);
4766
4767 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM) && (u32TimeOut < NXT_DISP_TIMEOUT))
4768 {
4769 u32TimeOut++;
4770 }
4771 if(u32TimeOut >= NXT_DISP_TIMEOUT)
4772 {
4773 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_NEXTDISPFRM ) );
4774 return FALSE;
4775 }
4776 return TRUE;
4777 }
4778 #endif
4779
HAL_MVD_GetExtDispInfo(MS_U8 u8Idx,MVD_ExtDispInfo * pInfo)4780 void HAL_MVD_GetExtDispInfo(MS_U8 u8Idx, MVD_ExtDispInfo* pInfo)
4781 {
4782 pInfo->u16VSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_V_SIZE, sizeof(MS_U16));
4783 pInfo->u16HSize = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_H_SIZE, sizeof(MS_U16));
4784 pInfo->u16VOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_V_OFFSET, sizeof(MS_U16));
4785 pInfo->u16HOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_H_OFFSET, sizeof(MS_U16));
4786 }
4787
HAL_MVD_GetFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_FrmInfo * pInfo)4788 E_MVD_Result HAL_MVD_GetFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_FrmInfo* pInfo)
4789 {
4790 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
4791 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
4792 E_MVD_Result eRet = E_MVD_RET_OK;
4793 MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4794 #if v3_temp
4795 MVD_MEMCfg* pstMemCfg = NULL;
4796 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4797 #endif
4798 if (NULL == pInfo)
4799 {
4800 MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL pInfo!\n"));
4801 return E_MVD_RET_INVALID_PARAM;
4802 }
4803 if (NULL == u32DecFrmInfoAdd)
4804 {
4805 MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL u32DecFrmInfoAdd!\n"));
4806 return E_MVD_RET_FAIL;
4807 }
4808 //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4809
4810 if (E_MVD_FRMINFO_DECODE == eType)
4811 {
4812 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR);
4813 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR);
4814 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP));
4815 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L);
4816 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H);
4817 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH);
4818 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH);
4819 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT);
4820 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE);
4821 }
4822 else if (E_MVD_FRMINFO_DISPLAY == eType)
4823 {
4824 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR);
4825 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR);
4826 pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP));
4827 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L);
4828 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H);
4829 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH);
4830 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH);
4831 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT);
4832 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE);
4833 }
4834
4835 else if (E_MVD_FRMINFO_NEXT_DISPLAY == eType)
4836 {
4837 #if v3_temp
4838 DISPQ_IN_DRAM* pTemp = (DISPQ_IN_DRAM*)(MS_PA2KSEG1(pstMemCfg->u32FWCodeAddr+DISP_QUEUE_START+ u8VPUIdx*0x100000));
4839 if (pTemp->dispQ_rd == pTemp->dispQ_wr)
4840 {
4841 MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4842 return E_MVD_RET_FAIL;
4843 }
4844 pInfo->u16FrmIdx = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispFrameIdx;
4845
4846 pInfo->u32LumaAddr = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispLumaAddr;
4847
4848 pInfo->u32ChromaAddr= pTemp->disp_info[pTemp->dispQ_rd].u32NextDispChromaAddr;
4849 // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4850 pInfo->u32TimeStamp = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispTimeStamp;
4851
4852 pInfo->u32ID_H = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispID_H;
4853
4854 pInfo->u16Width = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispWidth;
4855
4856 if(HAL_MVD_IsMcuMode(u8Idx))
4857 {
4858 //bit[19-20] Picture format,
4859 //bit[18-17] Disp times, 1~3
4860 //bit[16] Top field first , 0-> bottom first, 1-> top first
4861 //bit[15:8] Range reduction of luma data
4862 //bit[7:0] Range reduction of chroma data
4863 pInfo->u32ID_L = (MS_U32)pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_UV
4864 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_Y << 8)
4865 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u16ExtData << 16)
4866 | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8Progressive << 19);
4867
4868 if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4869 {
4870 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4871 }
4872 }
4873 else
4874 {
4875 pInfo->u32ID_L = pTemp->disp_info[pTemp->dispQ_rd].u32DispID_L;
4876 }
4877 pInfo->u16Pitch = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispPitch;
4878 pInfo->u16Height= pTemp->disp_info[pTemp->dispQ_rd].u16NextDispHeight;
4879 pInfo->eFrmType = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispeFrameType;
4880
4881 pTemp->bUsedByOutside[pInfo->u16FrmIdx]++;
4882
4883 pTemp->dispQ_rd = (pTemp->dispQ_rd+1)%DISPQ_SIZE;
4884 MsOS_FlushMemory();
4885 #else
4886 if (!MVD_IsNextDispFrmRdy(u8Idx))
4887 {
4888 MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4889 return E_MVD_RET_FAIL;
4890 }
4891 pInfo->u16FrmIdx= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX);
4892 if (pInfo->u16FrmIdx == 0xFFFF)
4893 {
4894 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo no available frame!\n"));
4895 return E_MVD_RET_FAIL;
4896 }
4897 pInfo->u32LumaAddr = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR);
4898 pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR);
4899 // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4900 pInfo->u32TimeStamp = (HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP));
4901 pInfo->u32ID_H = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_H);
4902 pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH);
4903 if(HAL_MVD_IsMcuMode(u8Idx))
4904 {
4905 //bit[18-17] Disp times, 1~3
4906 //bit[16] Top field first , 0-> bottom first, 1-> top first
4907 //bit[15:8] Range reduction of luma data
4908 //bit[7:0] Range reduction of chroma data
4909 pInfo->u32ID_L = (MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV)
4910 | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y) << 8)
4911 | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA) << 16);
4912 if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4913 {
4914 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4915 }
4916 }
4917 else
4918 {
4919 pInfo->u32ID_L = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_L);
4920 }
4921 pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_PITCH);
4922 pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT);
4923 pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE);
4924 #endif
4925 #if 0
4926 MVD_PRINT("NxtFrm:: Idx=0x%x, ", pInfo->u16FrmIdx);
4927 MVD_PRINT("Type=0x%x, ", pInfo->eFrmType );
4928 MVD_PRINT("Luma=0x%x, ", pInfo->u32LumaAddr );
4929 MVD_PRINT("Chroma=0x%x, ", pInfo->u32ChromaAddr);
4930 MVD_PRINT("Pts=%lu, ", pInfo->u32TimeStamp );
4931 MVD_PRINT("ID_H=%lu, ", pInfo->u32ID_H );
4932 MVD_PRINT("ID_L=0x%x\n", pInfo->u32ID_L );
4933 #endif
4934 MVD_DBG_STS(MVD_PRINT("<<< drvMVD pts,idH = %lu, %lu\n", pInfo->u32TimeStamp, pInfo->u32ID_H));
4935 }
4936 else
4937 {
4938 eRet = E_MVD_RET_INVALID_PARAM;
4939 }
4940
4941 if ((pInfo->u32LumaAddr == _INIT_ADDR) || (pInfo->u32ChromaAddr== _INIT_ADDR) ||
4942 (pInfo->u16Pitch == _INIT_LEN) || (pInfo->u16Width == _INIT_LEN) ||
4943 (pInfo->u16Height== _INIT_LEN))
4944 {
4945 MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo not ready!\n"));
4946 return E_MVD_RET_FAIL;
4947 }
4948
4949 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,(pInfo->u32LumaAddr * 8),pInfo->u32LumaAddr);
4950 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,(pInfo->u32ChromaAddr * 8),pInfo->u32ChromaAddr);
4951
4952 //MVD_PRINT("===> Luma=0x%x, Chroma=0x%x\n", pInfo->u32LumaAddr, pInfo->u32ChromaAddr);
4953 return eRet;
4954 }
4955
4956
4957
HAL_MVD_SetDynScalingParam(MS_U8 u8Idx,MS_PHY u32StAddr,MS_SIZE u32Size)4958 E_MVD_Result HAL_MVD_SetDynScalingParam(MS_U8 u8Idx, MS_PHY u32StAddr, MS_SIZE u32Size)
4959 {
4960 #define SCALER_INFO_TIMEOUT 0x1000
4961 MS_U32 u32TimeOut = 0;
4962 MS_VIRT u32SrcAdd = NULL;
4963 MS_U32 i;
4964 MS_VIRT u32ScalerInfoAdd = GET_XCINFO_BUFFADD(u8Idx);
4965 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4966
4967 if ((u32StAddr==NULL) || (u32Size==0) || (u32Size>MVD_FW_SCALER_INFO_BUF_LEN))
4968 {
4969 MVD_DEBUGERROR(MVD_PRINT("%s invalid para u32StAddr=0x%lx, u32Size=0x%lx\n",
4970 __FUNCTION__, (unsigned long)u32StAddr, (unsigned long)u32Size));
4971 return E_MVD_RET_INVALID_PARAM;
4972 }
4973 if (TRUE != pstMemCfg->bEnableDynScale)
4974 {
4975 MVD_DEBUGERROR(MVD_PRINT("%s !bEnableDynScale\n", __FUNCTION__));
4976 return E_MVD_RET_FAIL;
4977 }
4978
4979 //copy data
4980 u32SrcAdd = HAL_MVD_PA2NonCacheSeg(u32StAddr);
4981 u32Size = ((u32Size+3)>>2)<<2;
4982 MVD_DEBUGINFO(MVD_PRINT("u32Size= 0x%lx, u32SrcAdd= 0x%lx\n", (unsigned long)u32Size, (unsigned long)u32SrcAdd));
4983 for (i=0; i<u32Size; i=i+4)
4984 {
4985 HAL_MVD_MemWrite4Byte(u32ScalerInfoAdd+i, *(volatile MS_U32*)(u32SrcAdd+i));
4986 MVD_DEBUGINFO(MVD_PRINT("0x%lx = 0x%x\n", (unsigned long)(u32ScalerInfoAdd+i), HAL_MVD_MemRead4Byte(u32ScalerInfoAdd+i)));
4987 }
4988
4989 //notify f/w
4990 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4991 if (TRUE!=HAL_MVD_SetScalerInfoAddr(u8Idx, u32ScalerInfoAdd,((MS_U8*)u32SrcAdd)[0])) //Set the buffer address (MIU offset) to f/w
4992 {
4993 MVD_DEBUGERROR(MVD_PRINT("%s fail to set ScalerInfoAdd\n", __FUNCTION__));
4994 return E_MVD_RET_FAIL;
4995 }
4996
4997 //check f/w already handle the data
4998 while((TRUE!=HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO)) && (u32TimeOut < SCALER_INFO_TIMEOUT))
4999 {
5000 u32TimeOut++;
5001 }
5002 if(u32TimeOut >= SCALER_INFO_TIMEOUT)
5003 {
5004 MVD_DEBUGERROR(MVD_PRINT("%s timeout!!!\n", __FUNCTION__));
5005 return E_MVD_RET_FAIL;
5006 }
5007
5008 //clear ack bit
5009 HAL_MVD_ClearCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
5010
5011 MVD_DEBUGINFO(MVD_PRINT("=====> %s u32TimeOut = 0x%x\n", __FUNCTION__, u32TimeOut));
5012 return E_MVD_RET_OK;
5013 }
5014
5015 //Map driver CodecType to firmware CodecType
MVD_MapCodecType(MVD_CodecType type)5016 static MS_U8 MVD_MapCodecType(MVD_CodecType type)
5017 {
5018 MS_U8 u8type = 0xff;
5019 switch (type)
5020 {
5021 case E_MVD_CODEC_MPEG2:
5022 u8type = CODEC_MPEG2;
5023 break;
5024 case E_MVD_CODEC_MPEG4:
5025 u8type = CODEC_MPEG4;
5026 break;
5027 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
5028 u8type = CODEC_MPEG4_SHORT_VIDEO_HEADER;
5029 break;
5030 case E_MVD_CODEC_DIVX311:
5031 u8type = CODEC_DIVX311;
5032 break;
5033
5034 case E_MVD_CODEC_FLV:
5035 u8type = 0x03;
5036 break;
5037
5038 case E_MVD_CODEC_VC1_MAIN: //RCV
5039 u8type = 0x05;
5040 break;
5041
5042 case E_MVD_CODEC_VC1_ADV: //VC1
5043 u8type = 0x04;
5044 break;
5045
5046 default:
5047 break;
5048 }
5049
5050 return u8type;
5051 }
5052
5053 //Map driver SrcType to firmware SrcType
MVD_MapSrcMode(MVD_SrcMode mode)5054 static MS_U8 MVD_MapSrcMode(MVD_SrcMode mode)
5055 {
5056 MS_U8 u8mode = 0xff;
5057 switch (mode)
5058 {
5059 case E_MVD_TS_MODE:
5060 u8mode = STREAM_MODE;
5061 break;
5062 case E_MVD_FILE_MODE:
5063 u8mode = FILE_MODE;
5064 break;
5065 case E_MVD_SLQ_MODE:
5066 u8mode = SLQ_MODE;
5067 break;
5068 case E_MVD_SLQ_TBL_MODE:
5069 u8mode = SLQ_TBL_MODE;
5070 break;
5071 case E_MVD_TS_FILE_MODE:
5072 u8mode = TS_FILE_MODE;
5073 break;
5074
5075 default:
5076 break;
5077 }
5078
5079 return u8mode;
5080 }
5081
5082
MVD_CheckFrmBuffSizeMin(MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)5083 static MS_BOOL MVD_CheckFrmBuffSizeMin(MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
5084 {
5085 MS_BOOL ret = TRUE;
5086
5087 if (_IS_VC1(fwCfg->eCodecType))
5088 {
5089 MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)!\n",
5090 (unsigned long)memCfg->u32FBSize, (MVD_HD_FBSIZE*MVD_FBNUM_MIN), MVD_HW_BUF_TOTAL_LEN));
5091 ret = FALSE;
5092 }
5093 else if (memCfg->u32FBSize < (MVD4_MPEG_FBSIZE_SDMIN+MVD_HW_BUF_TOTAL_LEN))
5094 {
5095 MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)\n",
5096 (unsigned long)memCfg->u32FBSize, MVD4_MPEG_FBSIZE_SDMIN, MVD_HW_BUF_TOTAL_LEN));
5097 ret = FALSE;
5098 }
5099 return ret;
5100 }
5101
MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode,MS_U8 u8FBNum)5102 MS_U32 MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode, MS_U8 u8FBNum)
5103 {
5104 MS_U32 u32Size = 0;
5105 if (MVD3_DHD_MODE == u8FBMode)
5106 {
5107 u32Size = MVD_DHD_FBSIZE;
5108 if (MVD_FBNUM_MAX == u8FBNum)
5109 {
5110 u32Size *= MVD_FBNUM_MAX;
5111 }
5112 else if (MVD_FBNUM_MIN == u8FBNum)
5113 {
5114 u32Size *= MVD_FBNUM_MIN;
5115 }
5116 }
5117 else if (MVD3_HD_MODE == u8FBMode)
5118 {
5119 u32Size = MVD_HD_FBSIZE;
5120 if (MVD_FBNUM_MAX == u8FBNum)
5121 {
5122 u32Size *= MVD_FBNUM_MAX;
5123 }
5124 else if (MVD_FBNUM_MIN == u8FBNum)
5125 {
5126 u32Size *= MVD_FBNUM_MIN;
5127 }
5128 }
5129 else if (MVD3_SD_MODE == u8FBMode)
5130 {
5131 u32Size = MVD4_MPEG_FBSIZE_SDMIN;
5132 }
5133 return u32Size;
5134 }
5135
5136 //------------------------------------------------------------------------------
5137 /// Determine u8FBMode & u8FBNum according to the assigned FBSize
5138 //------------------------------------------------------------------------------
HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx,MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)5139 MS_BOOL HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx, MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
5140 {
5141 MS_BOOL ret = TRUE;
5142 MS_U8* pu8FBMode = &(fwCfg->u8FBMode);
5143 MS_U8* pu8FBNum = &(fwCfg->u8FBNum);
5144 MS_U32 u32AvailFrmBuffSize = memCfg->u32FBSize - MVD_HW_BUF_TOTAL_LEN;
5145
5146 ret = MDrv_MVD_AUTH_IPCheck(fwCfg->eCodecType,&(memCfg->bSupportSDModeOnly));
5147 if(ret == FALSE)
5148 {
5149 return FALSE;
5150 }
5151
5152 *pu8FBMode = 0xff;
5153
5154 #if defined(MVD_SUPPORT_SD_ONLY)
5155 *pu8FBMode = MVD3_SD_MODE;
5156 #else
5157 if(memCfg->bSupportSDModeOnly)
5158 {
5159 *pu8FBMode = MVD3_SD_MODE;
5160 }
5161 #endif //MVD_SUPPORT_SD_ONLY
5162
5163 //For SD only cases: defined(MVD_SUPPORT_SD_ONLY) and bSupportSDModeOnly
5164 if (MVD3_SD_MODE == *pu8FBMode)
5165 {
5166 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5167
5168 //set frmBuffNum as 4
5169 *pu8FBNum = MVD_FBNUM_MIN;
5170 MVD_DEBUGINFO(MVD_PRINT("[MVD_SD_MODE] u8FBNum=%d, FBSize=0x%lx\n", *pu8FBNum, (unsigned long)memCfg->u32FBSize));
5171 goto _GET_USED_SIZE;
5172 }
5173
5174 if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MAX))
5175 {
5176 MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*5\n", __FUNCTION__, __LINE__));
5177 //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5178 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5179 {
5180 *pu8FBMode = MVD3_DHD_MODE;
5181 }
5182 else
5183 {
5184 *pu8FBMode = MVD3_DHD_MODE_MIN;
5185 }
5186 *pu8FBNum = MVD_FBNUM_MAX;
5187 }
5188 else if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MIN))
5189 {
5190 MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*4\n", __FUNCTION__, __LINE__));
5191 //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5192 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5193 {
5194 *pu8FBMode = MVD3_DHD_MODE;
5195 }
5196 else
5197 {
5198 *pu8FBMode = MVD3_DHD_MODE_MIN;
5199 }
5200 *pu8FBNum = MVD_FBNUM_MIN;
5201 }
5202 else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MAX))
5203 {
5204 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*5\n", __FUNCTION__, __LINE__));
5205 *pu8FBMode = MVD3_HD_MODE;
5206 *pu8FBNum = MVD_FBNUM_MAX;
5207 }
5208 else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MIN))
5209 {
5210 MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*4\n", __FUNCTION__, __LINE__));
5211 *pu8FBMode = MVD3_HD_MODE;
5212 *pu8FBNum = MVD_FBNUM_MIN;
5213 }
5214 else
5215 {
5216 MVD_DEBUGINFO(MVD_PRINT("%s(%d) SD\n", __FUNCTION__, __LINE__));
5217 ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5218 if (TRUE == ret)
5219 {
5220 *pu8FBMode = MVD3_SD_MODE;
5221 *pu8FBNum = MVD_FBNUM_MIN;
5222 MVD_DEBUGINFO(MVD_PRINT("Framebuffer [SD] mode\n"));
5223 }
5224 }
5225
5226
5227 //Keep FBNum=4 for mpeg2/4, not-mstreamer/uniplayer/mcu mode.
5228 if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5229 {
5230 if (*pu8FBNum != MVD_FBNUM_DEFAULT)
5231 {
5232 *pu8FBNum = MVD_FBNUM_DEFAULT;
5233 }
5234 }
5235
5236 _GET_USED_SIZE:
5237 fwCfg->u32FBUsedSize = u32AvailFrmBuffSize;
5238
5239 MVD_DEBUGINFO(MVD_PRINT("%s u8FBMode=0x%x, u8FBNum=%d, FBSize=0x%lx, used=0x%lx\n",
5240 __FUNCTION__, fwCfg->u8FBMode, fwCfg->u8FBNum, (unsigned long)memCfg->u32FBSize, (unsigned long)fwCfg->u32FBUsedSize));
5241 return ret;
5242 }
5243
HAL_MVD_SetCodecInfo(MS_U8 u8Idx,MVD_CodecType eCodecType,MVD_SrcMode eSrcMode,MS_U8 bDisablePESParsing)5244 MS_BOOL HAL_MVD_SetCodecInfo(MS_U8 u8Idx, MVD_CodecType eCodecType, MVD_SrcMode eSrcMode, MS_U8 bDisablePESParsing)
5245 {
5246 MVD_CmdArg stCmdArg;
5247 //MVD_PRINT("u8CodecType=0x%x\n", u8CodecType);
5248 //MVD_PRINT("eSrcMode=0x%x\n", eSrcMode);
5249 SETUP_CMDARG(stCmdArg);
5250 stCmdArg.Arg0 = MVD_MapCodecType(eCodecType);
5251 stCmdArg.Arg1 = MVD_MapSrcMode(eSrcMode);
5252 stCmdArg.Arg2 = bDisablePESParsing;
5253 //arg2 is only valid for STREAM_MODE and TS_FILE_MODE
5254 //set as 0 to enable MVD parser and parser interrupt
5255 stCmdArg.Arg3 = 0;
5256 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_SetCodecInfo: Cmd: %x, Arg0: %x, Arg1: %x. Arg2: %x\n",
5257 CMD_CODEC_INFO, stCmdArg.Arg0, stCmdArg.Arg1, stCmdArg.Arg2));
5258 SET_DECNUM(stCmdArg, u8Idx);
5259 SET_CMD_RET_FALSE(CMD_CODEC_INFO, &stCmdArg);
5260
5261 HAL_MVD_SetSrcMode(u8Idx,eSrcMode);
5262
5263 //set code offset to MVD
5264 MS_VIRT u32Addr, u32Len;
5265 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FW, &u32Addr, &u32Len);
5266
5267 if (u32Len==0) MVD_PRINT("%s err: u32Len=0!\n", __FUNCTION__);
5268 MS_U32 i=0;
5269 i = u32Addr >> 3;
5270 SET_CMDARG(stCmdArg, i, u8Idx);
5271 SET_CMD_RET_FALSE(CMD_CODE_OFFSET, &stCmdArg);
5272
5273 #define _mvdAssert(x) if(!x) MVD_PRINT("%s(%d) inconsistent cfg!\n", __FUNCTION__, __LINE__);
5274 MVD_FWCfg* pCurFwCfg = HAL_MVD_GetFWCfg(u8Idx);
5275 _mvdAssert(pCurFwCfg->eCodecType == eCodecType);
5276 _mvdAssert(pCurFwCfg->eSrcMode == eSrcMode);
5277 _mvdAssert(pCurFwCfg->bDisablePESParsing == bDisablePESParsing);
5278
5279 //Refer to msAPI_VDPlayer_DecodeMPEG4.c (core\kernel\api\videoplayer)
5280 if (eSrcMode == E_MVD_SLQ_TBL_MODE)
5281 {
5282 if ((eCodecType == E_MVD_CODEC_MPEG4) ||
5283 (eCodecType == E_MVD_CODEC_DIVX311) ||
5284 (eCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER))
5285 {
5286 // Enable PackMode
5287 SETUP_CMDARG(stCmdArg);
5288 stCmdArg.Arg0 = 3;
5289 SET_DECNUM(stCmdArg, u8Idx);
5290 if (HAL_MVD_MVDCommand( CMD_PARSE_M4V_PACKMD, &stCmdArg ) == FALSE)
5291 {
5292 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PARSE_M4V_PACKMD ) );
5293 return FALSE;
5294 }
5295
5296 // Set DIU width of rounding mode (align to 8byte)
5297 SETUP_CMDARG(stCmdArg);
5298 stCmdArg.Arg0 = 1;
5299 SET_DECNUM(stCmdArg, u8Idx);
5300 if (HAL_MVD_MVDCommand(CMD_DIU_WIDTH_ALIGN, &stCmdArg) == FALSE)
5301 {
5302 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIU_WIDTH_ALIGN ) );
5303 return FALSE;
5304 }
5305 }
5306 }
5307
5308 //set internal buffers after setting codecinfo for V3
5309 if (!HAL_MVD_SetInternalBuffAddr(u8Idx, u32Addr, u32Len))
5310 {
5311 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr failed\n"));
5312 return FALSE;
5313 }
5314 else
5315 {
5316 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr success\n"));
5317 }
5318
5319 return TRUE;
5320 }
5321
MVD_GetBDMAType(void)5322 BDMA_CpyType MVD_GetBDMAType(void)
5323 {
5324 BDMA_CpyType bdmaCpyType = E_BDMA_CPYTYPE_MAX;
5325
5326 if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_0)
5327 {
5328 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5329 {
5330 bdmaCpyType = E_BDMA_SDRAM2SDRAM;
5331 }
5332 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5333 {
5334 bdmaCpyType = E_BDMA_SDRAM2SDRAM1;
5335 }
5336 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5337 {
5338 bdmaCpyType = E_BDMA_SDRAM2SDRAM2;
5339 }
5340 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5341 {
5342 bdmaCpyType = E_BDMA_SDRAM2SDRAM3;
5343 }
5344 else
5345 {
5346 MS_ASSERT(0);
5347 }
5348 }
5349 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
5350 {
5351 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5352 {
5353 bdmaCpyType = E_BDMA_SDRAM12SDRAM;
5354 }
5355 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5356 {
5357 bdmaCpyType = E_BDMA_SDRAM12SDRAM1;
5358 }
5359 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5360 {
5361 bdmaCpyType = E_BDMA_SDRAM12SDRAM2;
5362 }
5363 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5364 {
5365 bdmaCpyType = E_BDMA_SDRAM12SDRAM3;
5366 }
5367 else
5368 {
5369 MS_ASSERT(0);
5370 }
5371 }
5372 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
5373 {
5374 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5375 {
5376 bdmaCpyType = E_BDMA_SDRAM22SDRAM;
5377 }
5378 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5379 {
5380 bdmaCpyType = E_BDMA_SDRAM22SDRAM1;
5381 }
5382 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5383 {
5384 bdmaCpyType = E_BDMA_SDRAM22SDRAM2;
5385 }
5386 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5387 {
5388 bdmaCpyType = E_BDMA_SDRAM22SDRAM3;
5389 }
5390 else
5391 {
5392 MS_ASSERT(0);
5393 }
5394 }
5395 else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_3)
5396 {
5397 if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5398 {
5399 bdmaCpyType = E_BDMA_SDRAM32SDRAM;
5400 }
5401 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5402 {
5403 bdmaCpyType = E_BDMA_SDRAM32SDRAM1;
5404 }
5405 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5406 {
5407 bdmaCpyType = E_BDMA_SDRAM32SDRAM2;
5408 }
5409 else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5410 {
5411 bdmaCpyType = E_BDMA_SDRAM32SDRAM3;
5412 }
5413 else
5414 {
5415 MS_ASSERT(0);
5416 }
5417 }
5418 else
5419 {
5420 MS_ASSERT(0);
5421 }
5422
5423 return bdmaCpyType;
5424 }
5425
5426 //Init static variables.
5427 //Exception: stMemCfg & stMiuCfg since they are set before calling this function.
HAL_MVD_InitVar(MS_U8 u8Idx)5428 void HAL_MVD_InitVar(MS_U8 u8Idx)
5429 {
5430 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5431 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5432
5433 memset(pstCtrlCfg, 0, sizeof(MVD_CtrlCfg));
5434 pstCtrlCfg->eTrickMode = E_MVD_TRICK_DEC_ALL;
5435 pstCtrlCfg->eFrcMode = E_MVD_FRC_NORMAL;
5436 pstCtrlCfg->ePreSpeedType = E_MVD_SPEED_DEFAULT;
5437 pstCtrlCfg->eFileSyncMode = E_MVD_TIMESTAMP_FREERUN;
5438
5439 //determine if we need to BDMA SLQ table from DrvProcBuff to BitstreamBuff
5440 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
5441 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5442 pstCtrlCfg->bSlqTblSync = ((pstMemCfg->u32DrvBufAddr < pstMemCfg->u32BSAddr) ||
5443 ((pstMemCfg->u32DrvBufAddr+pstMemCfg->u32DrvBufSize) > (pstMemCfg->u32BSAddr+pstMemCfg->u32BSSize)));
5444 MVD_DEBUGINFO(MVD_PRINT("bSlqTblSync = %x\n", pstCtrlCfg->bSlqTblSync));
5445 if (pstCtrlCfg->bSlqTblSync)
5446 {
5447 const BDMA_Info* pBDMA;
5448 pBDMA = MDrv_BDMA_GetInfo();
5449 if ((pBDMA == NULL) || (pBDMA->bInit != TRUE))
5450 {
5451 if (E_BDMA_OK != MDrv_BDMA_Init(pstMemCfg->u32Miu1BaseAddr))
5452 {
5453 MVD_PRINT("%s fail at MDrv_BDMA_Init!!!\n", __FUNCTION__);
5454 }
5455 }
5456 pstSlqTblInfo->bdmaCpyType = MVD_GetBDMAType();
5457 }
5458 #else
5459 pstCtrlCfg->bSlqTblSync = 0;
5460 #endif
5461 memset(pstSlqTblInfo, 0, sizeof(MVD_SLQTBLInfo));
5462 pstSlqTblInfo->u32LastPts = MVD_NULLPKT_PTS;
5463 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX;
5464 pstSlqTblInfo->u32PreEsWr = 0;
5465 pstSlqTblInfo->pSlqStatus = &(pMVDHalContext->_SlqStatus[u8Idx]);
5466 pstSlqTblInfo->pDrvSlqTbl = &(pMVDHalContext->_drvSlqTbl[u8Idx]);
5467 pstSlqTblInfo->pDrvEsTbl = &(pMVDHalContext->_drvEsTbl[u8Idx]);
5468 pstSlqTblInfo->pDrvDivxTbl = &(pMVDHalContext->_drvDivxTbl[u8Idx]);
5469 #if SLQ_NEW_PUSH
5470 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
5471 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
5472 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
5473 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
5474 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
5475 pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow =FALSE;
5476 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
5477 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit =FALSE;
5478 #endif
5479 }
5480
5481 //------------------------------------------------------------------------------
5482 /// Issue Stop command.
5483 //------------------------------------------------------------------------------
HAL_MVD_Stop(MS_U8 u8Idx)5484 MS_BOOL HAL_MVD_Stop(MS_U8 u8Idx)
5485 {
5486 MVD_CmdArg mvdcmd;
5487 MS_BOOL bRet = TRUE;
5488
5489 #define STOP_TIMEOUT 500 //ms
5490 MS_U32 u32StartTime = 0;
5491 u32StartTime = HAL_MVD_GetTime();
5492
5493 SETUP_CMDARG(mvdcmd);
5494 SET_DECNUM(mvdcmd, u8Idx);
5495 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_STOP);
5496
5497 if (HAL_MVD_MVDCommand(CMD_STOP, &mvdcmd) == FALSE)
5498 {
5499 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", CMD_STOP));
5500 HAL_MVD_Delayms(1);
5501 if ( HAL_MVD_TimeOut(u8Idx) == TRUE )
5502 {
5503 MVD_DEBUGERROR(MVD_PRINT("*** MVD ERR: STOP TIMEOUT!!! ***\n"));
5504 }
5505 }
5506
5507 while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_STOP))
5508 {
5509 if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
5510 {
5511 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_STOP ) );
5512 break;
5513 }
5514 }
5515
5516 pMVDHalContext->bStopped[u8Idx] = TRUE;
5517 return bRet;
5518 }
5519
HAL_MVD_DeinitHW(VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)5520 MS_BOOL HAL_MVD_DeinitHW(VPU_EX_SourceType SourceType, VPU_EX_DecoderType eDecType)
5521 {
5522 //MVD HW reset
5523 if (!HAL_MVD_RstHW())
5524 {
5525 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW failed\n"));
5526 }
5527 else
5528 {
5529 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW success\n"));
5530 }
5531 HAL_MVD_PowerCtrl(DISABLE);
5532 #ifdef CONFIG_MSTAR_CLKM
5533 if(eDecType == E_VPU_EX_DECODER_MVD)
5534 {
5535 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, DISABLE);
5536 }
5537 if(SourceType == E_VPU_EX_INPUT_TSP)
5538 {
5539 HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, DISABLE);
5540 }
5541 #endif
5542
5543 #ifdef CONFIG_MSTAR_SRAMPD
5544 HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, DISABLE, SRAM_SD_EN_MVD);
5545 HAL_MVD_Delayms(1);
5546 #endif
5547 return TRUE;
5548 }
5549
HAL_MVD_Exit(MS_U8 u8Idx)5550 MS_BOOL HAL_MVD_Exit(MS_U8 u8Idx)
5551 {
5552 MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:start\n"));
5553
5554 HAL_MVD_SetIsUsed(u8Idx, FALSE);
5555 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = FALSE;
5556 pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
5557 pMVDHalContext->u32DmxFrameRate[u8Idx] = 0;
5558 pMVDHalContext->u32DmxFrameRateBase[u8Idx] = 0;
5559 pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = FALSE;
5560
5561 return TRUE;
5562 }
5563
5564
5565 //------------------------------------------------------------------------------
5566 /// Set DivX311 stream info.
5567 /// @param divxInfo \b IN : DivX311 stream info.
5568 //------------------------------------------------------------------------------
MVD_WriteDivx311Data(MS_U8 u8Idx,FW_DIVX_INFO * divxInfo)5569 static void MVD_WriteDivx311Data(MS_U8 u8Idx, FW_DIVX_INFO *divxInfo)
5570 {
5571 MS_VIRT pu8MVDSetHeaderBufStart = GET_HDR_BUFFADD(u8Idx);
5572 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_VOL_HANDLE_DONE,divxInfo->vol_handle_done);
5573 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_WIDTH,divxInfo->width);
5574 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_HEIGHT,divxInfo->height);
5575 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_COUNT,divxInfo->frame_count);
5576 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_TIME,divxInfo->frame_time);
5577 HAL_MVD_MemWrite2Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PTS_INCR,divxInfo->pts_incr);
5578 HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_RATE,divxInfo->frame_rate);
5579 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_ASPECT_RATIO,divxInfo->aspect_ratio);
5580 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PROGRESSIVE_SEQUENCE,divxInfo->progressive_sequence);
5581 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG1,divxInfo->mpeg1);
5582 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PLAY_MODE,divxInfo->play_mode);
5583 HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG_FRC_MODE,divxInfo->mpeg_frc_mode);
5584 return;
5585 }
5586
HAL_MVD_SetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)5587 void HAL_MVD_SetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo )
5588 {
5589 if (GET_HDR_BUFFADD(u8Idx)==0)
5590 {
5591 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameInfo error: pu8MVDSetHeaderBufStart=NULL\n"));
5592 return;
5593 }
5594
5595 FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
5596 pDivxInfo->width=pinfo->u16HorSize;
5597 pDivxInfo->height=pinfo->u16VerSize;
5598 pDivxInfo->aspect_ratio=pinfo->u8AspectRate;
5599 pDivxInfo->frame_rate = pinfo->u32FrameRate;
5600
5601 //for MM
5602 pDivxInfo->mpeg1=pinfo->u8MPEG1;
5603 pDivxInfo->pts_incr=pinfo->u16PTSInterval;
5604 pDivxInfo->play_mode=pinfo->u8PlayMode;
5605 pDivxInfo->mpeg_frc_mode=pinfo->u8FrcMode;
5606
5607 if(pinfo->u8Interlace==0)
5608 pDivxInfo->progressive_sequence=1;
5609 else
5610 pDivxInfo->progressive_sequence=0;
5611
5612 pDivxInfo->frame_count=0;
5613 pDivxInfo->frame_time=0;
5614 pDivxInfo->vol_handle_done=0;
5615 // pDivxInfo->invalidstream=0;
5616 MVD_DEBUGINFO(MVD_PRINT("set vol info,pts_incr=%d,\n",pDivxInfo->pts_incr));
5617 MVD_DEBUGINFO(MVD_PRINT("set vol info,width=%x,height=%x,frame_rate=%d,aspect_ratio=%x,\n",
5618 (unsigned int)pDivxInfo->width,(unsigned int)pDivxInfo->height,pDivxInfo->frame_rate,pDivxInfo->aspect_ratio));
5619 MVD_DEBUGINFO(MVD_PRINT("set vol info,progressive_sequence=%x,mpeg1=%x,play_mode=%x,\n",
5620 pDivxInfo->progressive_sequence,pDivxInfo->mpeg1,pDivxInfo->play_mode));
5621
5622 MVD_WriteDivx311Data(u8Idx, pDivxInfo);
5623 return;
5624 }
5625
5626
5627
5628 ///////////////////////////////////////////////////////////////////////////////
5629 /// Get Hardware Pointer of MVD CC Ring Buffer
5630 /// Return value:: The HW Pointer Address of MVD CC Ring Buffer
5631 /// @param u8CC608 \b IN
5632 /// - # TRUE for CC608 parser
5633 /// - # FALSE for CC708 parser
5634 ///////////////////////////////////////////////////////////////////////////////
HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)5635 MS_VIRT HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)
5636 {
5637 #if 1
5638 MVD_CmdArg mvdcmd;
5639 MS_VIRT u32CCWrPtr = 0;
5640
5641 SETUP_CMDARG(mvdcmd);
5642 mvdcmd.Arg3 = u8CC608;
5643 if (HAL_MVD_MVDCommand( CMD_RD_USER_WP, &mvdcmd ) == FALSE)
5644 {
5645 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_USER_WP ) );
5646 return MVD_U32_MAX;
5647 }
5648 u32CCWrPtr = COMBU32(mvdcmd.Arg3, mvdcmd.Arg2, mvdcmd.Arg1, mvdcmd.Arg0);
5649 return u32CCWrPtr;
5650 #else
5651 MS_U32 u32MVDCC_Temp1 = 0;
5652 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5653 {
5654 //HAL_MVD_ARGINIT();
5655 HAL_MVD_RegWriteByte(MVD_ARG5, 0);
5656 HAL_MVD_RegWriteByte(MVD_ARG4, 0);
5657 HAL_MVD_RegWriteByte(MVD_ARG3, (MS_U8)u8CC608);
5658 HAL_MVD_RegWriteByte(MVD_COMMAND, (MS_U8)(CMD_RD_USER_WP));//CMD_GET_CCBUF_HWADDR
5659
5660 if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5661 {
5662 u32MVDCC_Temp1 = 0;
5663 u32MVDCC_Temp1 = (((MS_U32)HAL_MVD_RegReadByte(MVD_ARG0)) & 0x000000FF);
5664 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG1)) & 0x000000FF) << 8);
5665 u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG2)) & 0x000000FF) << 16);
5666 u32MVDCC_Temp1 = (u32MVDCC_Temp1 << 3);
5667 return (u32MVDCC_Temp1);
5668 }
5669 else
5670 {
5671 MVD_DEBUGINFO(MVD_PRINT("\nF:GHAV"));
5672 }
5673 }
5674 else
5675 {
5676 MVD_DEBUGINFO(MVD_PRINT("\nF:GHA"));
5677 }
5678
5679 return 0xffffffff;
5680 #endif
5681 }
5682
HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)5683 MS_BOOL HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)
5684 {
5685 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5686 MS_VIRT u32UsrDataWr = 0;
5687 MS_BOOL bIsAvail = FALSE;
5688
5689 #if defined(MVD_SUPPORT_X4_CC)
5690 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4);
5691 #else
5692 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2);
5693 #endif
5694 bIsAvail = !(pCtrlCfg->u32UsrDataRd == u32UsrDataWr);
5695 MVD_DEBUGINFO(MVD_PRINT("IsAvail:%x rd=%lx wr=%lx\n", bIsAvail,
5696 (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5697 return bIsAvail;
5698 }
5699
5700 //------------------------------------------------------------------------------
5701 /// Get info of user data
5702 //------------------------------------------------------------------------------
HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx,MVD_UsrDataInfo * pUsrInfo)5703 MS_BOOL HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx, MVD_UsrDataInfo* pUsrInfo)
5704 {
5705 MS_VIRT u32UsrData = NULL;
5706 MS_VIRT u32UsrDataWr = 0;
5707 #if defined(MVD_SUPPORT_X4_CC)
5708 FW_USER_DATA_BUF_EXT stUsrDataExt;
5709 #else
5710 FW_USER_DATA_BUF stUsrDataInfo;
5711 #endif
5712 volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5713
5714 if ((!pUsrInfo) || (GET_FRMINFO_BUFFADD(u8Idx)==0))
5715 {
5716 MVD_DEBUGERROR(MVD_PRINT("%s: NULL ptr.\n", __FUNCTION__));
5717 return FALSE;
5718 }
5719
5720 //get write pointer
5721 #if defined(MVD_SUPPORT_X4_CC)
5722 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4);
5723 #else
5724 u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2);
5725 #endif
5726 if (pCtrlCfg->u32UsrDataRd == (GET_USRDATA_BUFFADD(u8Idx)+MVD3_FW_USER_DATA_BUF_LEN))
5727 {
5728 pCtrlCfg->u32UsrDataRd = GET_USRDATA_BUFFADD(u8Idx); //wrap to BufStart
5729 }
5730 MVD_DEBUGINFO(MVD_PRINT("CC Rd=0x%lx Wr=0x%lx\n", (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5731
5732 if (pCtrlCfg->u32UsrDataRd == u32UsrDataWr)
5733 {
5734 MVD_DEBUGERROR(MVD_PRINT("%s: no data? Rd=0x%lx Wr=0x%lx\n", __FUNCTION__, (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5735 return FALSE;
5736 }
5737
5738 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pCtrlCfg->u32UsrDataRd,u32UsrData);
5739
5740 u32UsrData = HAL_MVD_PA2NonCacheSeg(u32UsrData);
5741
5742 HAL_MVD_CPU_Sync();
5743 HAL_MVD_ReadMemory();
5744
5745 #if defined(MVD_SUPPORT_X4_CC)
5746 stUsrDataExt = *(volatile FW_USER_DATA_BUF_EXT*)u32UsrData;
5747
5748 pUsrInfo->u32Pts = stUsrDataExt.pts;
5749 pUsrInfo->u8PicStruct = stUsrDataExt.PicStruct;
5750 pUsrInfo->u8PicType = stUsrDataExt.picType;
5751 pUsrInfo->u8TopFieldFirst = stUsrDataExt.top_ff;
5752 pUsrInfo->u8RptFirstField = stUsrDataExt.rpt_ff;
5753 pUsrInfo->u16TmpRef = stUsrDataExt.tmpRef;
5754 pUsrInfo->u8ByteCnt = stUsrDataExt.userdatabytecnt;
5755 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_EXT_HDR_LEN;
5756 #else
5757 stUsrDataInfo = *(volatile FW_USER_DATA_BUF*)u32UsrData;
5758
5759 pUsrInfo->u8PicType = stUsrDataInfo.picType;
5760 pUsrInfo->u8TopFieldFirst = stUsrDataInfo.top_ff;
5761 pUsrInfo->u8RptFirstField = stUsrDataInfo.rpt_ff;
5762 pUsrInfo->u16TmpRef = stUsrDataInfo.tmpRef;
5763 pUsrInfo->u8ByteCnt = stUsrDataInfo.userdatabytecnt;
5764 pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_HDR_LEN;
5765 #endif
5766 //update read pointer
5767 pCtrlCfg->u32UsrDataRd += MVD_FW_USER_DATA_PKT_LEN;
5768 #if 0
5769 MVD_PRINT("xxInfo: ");
5770 MVD_PRINT("%02d, ", pUsrInfo->u16TmpRef);
5771 MVD_PRINT("%d, ", pUsrInfo->u8PicStruct);
5772 MVD_PRINT("%d, ", pUsrInfo->u8TopFieldFirst);
5773 MVD_PRINT("0x%x, ", pUsrInfo->u32DataBuf);
5774 MVD_PRINT("%d, ", pUsrInfo->u8ByteCnt);
5775 MVD_PRINT("%ld, ", pUsrInfo->u32Pts);
5776 MVD_PRINT("%d\n", pUsrInfo->u8PicType);
5777 #endif
5778 return TRUE;
5779 }
5780
5781
HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx,MS_VIRT u32HWPtr)5782 MS_VIRT HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx, MS_VIRT u32HWPtr)
5783 {
5784 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5785 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5786 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5787 MS_VIRT u32HWSt = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
5788 MS_VIRT u32DrvPtr;
5789
5790 if ((u32HWPtr<u32HWSt) && (u32HWPtr!=0))
5791 {
5792 MVD_DEBUGERROR(MVD_PRINT("Invalid u32HWPtr=0x%lx\n", (unsigned long)u32HWPtr));
5793 return 0;
5794 }
5795 if ((pstCtrlCfg->bSlqTblSync) && (u32HWPtr!=0))
5796 {
5797 u32DrvPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd + (u32HWPtr - u32HWSt);
5798 return u32DrvPtr;
5799 }
5800 return u32HWPtr;
5801 }
5802
5803
MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx,MVD_PacketInfo * pFileEnd)5804 static void MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx, MVD_PacketInfo* pFileEnd)
5805 {
5806 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5807 MS_VIRT u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
5808
5809 pFileEnd->u32StAddr = SLQ_TBL_SIZE*3;//u32EndPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5810 pFileEnd->u32Length = END_PATTERN_SIZE;
5811 pFileEnd->u32TimeStamp = MVD_NULLPKT_PTS;
5812 pFileEnd->u32ID_L = MVD_U32_MAX;
5813 pFileEnd->u32ID_H = MVD_U32_MAX;
5814 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x 0x%x 0x%x\n", (unsigned long)pFileEnd->u32StAddr,
5815 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4),
5816 HAL_MVD_MemRead4Byte(u32EndPattern+8), HAL_MVD_MemRead4Byte(u32EndPattern+12)));
5817 }
5818
5819
MVD_SLQTblGetDummyPkt(MVD_PacketInfo * pDummy)5820 static void MVD_SLQTblGetDummyPkt(MVD_PacketInfo* pDummy)
5821 {
5822 //MS_U32 u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
5823
5824 pDummy->u32StAddr = SLQ_TBL_SIZE*2;//u32DummyES - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5825 pDummy->u32Length = DUMMY_SIZE;
5826 pDummy->u32TimeStamp = MVD_NULLPKT_PTS;
5827 pDummy->u32ID_L = MVD_U32_MAX;
5828 pDummy->u32ID_H = MVD_U32_MAX;
5829 #if 0
5830 MVD_PRINT("u32DummyES(0x%x-->0x%x, size=0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES,
5831 pDummy->u32StAddr, pDummy->u32Length, HAL_MVD_MemRead4Byte(u32DummyES),
5832 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
5833 #endif
5834
5835 }
5836
5837
HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx,MVD_PatternType ePattern)5838 MS_BOOL HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx, MVD_PatternType ePattern)
5839 {
5840 MS_U32 i;
5841 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5842
5843 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
5844 {
5845 MVD_DEBUGINFO(MVD_PRINT("SLQTbl full!(0x%lx) Cannot insert pattern any more!\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5846 return FALSE;
5847 }
5848
5849 #if SLQ_NEW_PUSH
5850 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
5851 {
5852 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart)
5853 {
5854 pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
5855 }
5856 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = FALSE;
5857 }
5858 #endif // #if SLQ_NEW_PUSH
5859 for (i =0; i<2; i++)
5860 { //insert dummy pattern
5861 MVD_PacketInfo stDummyPkt;
5862
5863 if (E_MVD_PATTERN_FLUSH == ePattern)
5864 {
5865 MVD_SLQTblGetDummyPkt(&stDummyPkt);
5866 }
5867 else if (E_MVD_PATTERN_FILEEND == ePattern)
5868 {
5869 MVD_SLQTblGetFileEndPkt(u8Idx, &stDummyPkt);
5870 }
5871 else
5872 {
5873 MVD_DEBUGERROR(MVD_PRINT("Invalid MVD_PatternType! Won't insert pattern!\n"));
5874 return FALSE;
5875 }
5876 #if SLQ_NEW_PUSH
5877 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = TRUE;
5878 #endif
5879 //MVD_PRINT("WrPtr 0x%x ", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5880 HAL_MVD_SLQTblSendPacket(u8Idx, &stDummyPkt);
5881 //MVD_PRINT("==> 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5882 HAL_MVD_SetSLQWritePtr(u8Idx, FALSE);
5883 }
5884 return TRUE;
5885 }
5886
5887
5888 #define FLAG_LAST_FRM_SHOW (MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_LAST_FRAME_SHOW, sizeof(MS_U32)))
HAL_MVD_IsDispFinish(MS_U8 u8Idx)5889 E_MVD_Result HAL_MVD_IsDispFinish(MS_U8 u8Idx)
5890 {
5891 MS_U32 u32TimeCnt;
5892 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
5893 MS_U32 u32FeByteCnt = 0;
5894 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5895 MS_VIRT u32FileEndPtr = pstSlqTblInfo->u32FileEndPtr;
5896 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
5897 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
5898 #ifdef VDEC3
5899 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
5900 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5901 #endif
5902
5903 //MVD_PRINT("MDrv_MVD_IsDispFinish::");
5904 if (GET_FRMINFO_BUFFADD(u8Idx)==0)
5905 {
5906 MVD_DEBUGERROR(MVD_PRINT("%s err: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
5907 return E_MVD_RET_FAIL;
5908 }
5909
5910 //MVD_PRINT("0x%x\n", FLAG_LAST_FRM_SHOW);
5911 if ((E_MVD_SLQ_TBL_MODE == curSrcMode) && (TRUE != FLAG_LAST_FRM_SHOW))
5912 {
5913 //insert pattern when each time checking IsDispFinish
5914 #ifdef VDEC3
5915 if(pstCtrlCfg->u8McuMode == TRUE)
5916 {
5917 u32TimeCnt= HAL_MVD_GetTime();
5918 while ((HAL_MVD_GetTime() - u32TimeCnt) < 20) // timeout 20 ms
5919 {
5920 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
5921 {
5922 HAL_VPU_EX_PacketInfo stVpuPkt;
5923 MVD_PacketInfo stDummyPkt;
5924 MVD_SLQTblGetFileEndPkt(u8Idx,&stDummyPkt);
5925
5926 stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
5927 stVpuPkt.u32Length = stDummyPkt.u32Length;
5928 stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
5929 //If in display queue mode
5930 stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
5931 stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
5932 stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
5933
5934 HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
5935 }
5936
5937 if (TRUE == FLAG_LAST_FRM_SHOW)
5938 {
5939 break;
5940 }
5941 }
5942
5943 if (TRUE != FLAG_LAST_FRM_SHOW)
5944 {
5945 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_IsDispFinish TIMEOUT\n"));
5946 return E_MVD_RET_TIME_OUT;
5947 }
5948 else
5949 {
5950 return E_MVD_RET_OK;
5951 }
5952 }
5953 else
5954 #endif
5955 {
5956 //insert pattern when each time checking IsDispFinish
5957 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5958 {
5959 u32FeByteCnt += END_PATTERN_SIZE;
5960 }
5961
5962 if ((u32FileEndPtr == HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx))) &&
5963 (HAL_MVD_IsMcuMode(u8Idx) == FALSE) &&
5964 (HAL_MVD_IsMStreamerMode(u8Idx) == FALSE))
5965 {
5966 //insert padding pattern until timeout
5967 u32TimeCnt= HAL_MVD_GetTime();
5968 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
5969 {
5970 if (TRUE == FLAG_LAST_FRM_SHOW)
5971 {
5972 //MVD_PRINT("\nDisp finished!\n");
5973 break;
5974 }
5975 //insert file-end pattern again
5976 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5977 {
5978 u32FeByteCnt += END_PATTERN_SIZE;
5979 }
5980 }
5981 if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
5982 {
5983 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_IsDispFinish TIMEOUT!!! *****\n\n"));
5984 if (E_MVD_CODEC_VC1_MAIN == HAL_MVD_GetCodecType(u8Idx))
5985 {
5986 if ((HAL_MVD_GetPayloadLen(u8Idx) > 0x200000)
5987 && (TRUE != HAL_MVD_GotFileEndPattern(u8Idx)))
5988 {
5989 MVD_DEBUGERROR(MVD_PRINT("RCV payloadLen(0x%x) invalid!\n",
5990 HAL_MVD_GetPayloadLen(u8Idx)));
5991 }
5992 }
5993 MVD_DEBUGERROR(MVD_PRINT("***** fe=%lx, rd=%lx(%lx,%lx), wr=%lx, empty=%lx, u32FeByteCnt=%x\n",
5994 (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)),
5995 (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty, u32FeByteCnt));
5996 return E_MVD_RET_TIME_OUT;
5997 }
5998 else
5999 {
6000 return E_MVD_RET_OK;
6001 }
6002 }
6003 else
6004 {
6005 //just return fail if readPtr is not closed to file-end ptr
6006 MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx(%lx), wr=%lx, empty=%lx\n", (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
6007 (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx)), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
6008 return E_MVD_RET_FAIL;
6009 }
6010 }
6011 }
6012
6013 if (FLAG_LAST_FRM_SHOW)
6014 {
6015 return E_MVD_RET_OK;
6016 }
6017 else
6018 {
6019 return E_MVD_RET_FAIL;
6020 }
6021 }
6022
6023 //------------------------------------------------------------------------------
6024 /// Set MVD SLQ start & end address
6025 /// @param -u32start \b IN : start address
6026 /// @param -u32end \b IN : end address
6027 //------------------------------------------------------------------------------
HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)6028 static void HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
6029 {
6030 MVD_CmdArg mvdcmd;
6031
6032 if ((u32start > SLQ_ADDR_LEN) || ((u32end+1) > SLQ_ADDR_LEN))
6033 {
6034 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetSLQStartEnd: only support 27bit add!\n"));
6035 }
6036
6037 SET_CMDARG(mvdcmd, (u32end+1), u8Idx);
6038 if (HAL_MVD_MVDCommand( CMD_SLQ_END, &mvdcmd ) == FALSE)
6039 {
6040 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_END ) );
6041 return;
6042 }
6043
6044 SET_CMDARG(mvdcmd, u32start, u8Idx);
6045 if (HAL_MVD_MVDCommand( CMD_SLQ_START, &mvdcmd ) == FALSE)
6046 {
6047 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_START ) );
6048 return;
6049 }
6050
6051 return;
6052 }
6053
HAL_MVD_DecodeIFrame(MS_U8 u8Idx,MS_PHY u32FrameBufAddr,MS_PHY u32StreamBufAddr,MS_PHY u32StreamBufEndAddr)6054 MS_BOOL HAL_MVD_DecodeIFrame(MS_U8 u8Idx, MS_PHY u32FrameBufAddr, MS_PHY u32StreamBufAddr, MS_PHY u32StreamBufEndAddr )
6055 {
6056 MS_U32 u32deley = 0;
6057 MS_U32 u32time = 0;
6058 MVD_CmdArg mvdcmd;
6059 MS_VIRT u32MVDFWSLQTABTmpbufAdr = GET_SLQ_BUFFADD(u8Idx);
6060
6061 MVD_DEBUGINFO(MVD_PRINT("%s offset FBAdd=0x%lx streamStart=0x%lx streamEnd=0x%lx\n",
6062 __FUNCTION__, (unsigned long)u32FrameBufAddr, (unsigned long)u32StreamBufAddr, (unsigned long)u32StreamBufEndAddr));
6063
6064 HAL_MVD_SetCodecInfo(u8Idx, E_MVD_CODEC_MPEG2, E_MVD_SLQ_MODE, DISABLE_PARSER);
6065 HAL_MVD_SetFrameBuffAddr(u8Idx, u32FrameBufAddr, HAL_MVD_GetFBMode(u8Idx));
6066
6067 SETUP_CMDARG(mvdcmd);
6068 mvdcmd.Arg0 = 1;
6069 SET_DECNUM(mvdcmd, u8Idx);
6070 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
6071
6072 if (HAL_MVD_StepDecode(u8Idx) == FALSE)
6073 {
6074 MVD_DEBUGERROR( MVD_PRINT( "HAL_MVD_StepDecode fail!!\r\n") );
6075 return FALSE;
6076 }
6077
6078 SETUP_CMDARG(mvdcmd);
6079 mvdcmd.Arg0 = 1;
6080 mvdcmd.Arg1 = 1;
6081 SET_DECNUM(mvdcmd, u8Idx);
6082 SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
6083
6084 //set data
6085 HAL_MVD_Delayms(2);
6086
6087 HAL_MVD_CPU_Sync();
6088 HAL_MVD_FlushMemory();
6089
6090 //wait vld init success or data may lost!
6091 #define WAIT_INIT_SUCCESS_TIME 100 //100ms
6092 u32deley = HAL_MVD_GetTime();
6093 while ((HAL_MVD_GetDecodeStatus(u8Idx)==DEC_STAT_IDLE) && (u32time<WAIT_INIT_SUCCESS_TIME))
6094 {
6095 u32time = HAL_MVD_GetTime()-u32deley;
6096 }
6097 if (u32time>=WAIT_INIT_SUCCESS_TIME)
6098 {
6099 MVD_DEBUGERROR(MVD_PRINT("%s: wait init_success timeout!!!\n", __FUNCTION__));
6100 }
6101 HAL_MVD_SetSLQStartEnd(u8Idx, u32StreamBufAddr, u32StreamBufEndAddr);
6102 MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_SLQ_TAB_TMPBUF_ADR=%lx\n",(unsigned long)u32MVDFWSLQTABTmpbufAdr));
6103
6104 HAL_MVD_CPU_Sync();
6105 HAL_MVD_FlushMemory();
6106 HAL_MVD_SetSLQStartEnd(u8Idx, u32MVDFWSLQTABTmpbufAdr, u32MVDFWSLQTABTmpbufAdr+MVD3_FW_SLQ_TAB_TMPBUF_LEN);
6107
6108 HAL_MVD_CPU_Sync();
6109 HAL_MVD_ReadMemory();
6110
6111 // wait decode complete
6112 #define WAIT_DECODE_DONE_TIME 33 //To decode 1 frame should take less than 33ms
6113 u32deley = HAL_MVD_GetTime();
6114 u32time = 0;
6115 while (HAL_MVD_GetPicCounter(u8Idx)<1 && (u32time<WAIT_DECODE_DONE_TIME))
6116 {
6117 u32time = HAL_MVD_GetTime()-u32deley;
6118 }
6119 if (u32time >= WAIT_DECODE_DONE_TIME)
6120 {
6121 MVD_DEBUGERROR(MVD_PRINT ("MDrv_MVD_DecodeIFrame time out(du=%d, st=%d, now=%d)\n", u32time, u32deley, HAL_MVD_GetTime()));
6122 MVD_DEBUGERROR(MVD_PRINT("frmCnt=%d state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx)));
6123 return FALSE;
6124 }
6125 MVD_DEBUGINFO(MVD_PRINT ("MDrv_MVD_DecodeIFrame time (%d, %d)\n", u32time, u32deley));
6126 //MVD_PRINT("frmCnt=%ld state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx));
6127
6128 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6129 pCtrlCfg->bDecodeIFrame = TRUE;
6130
6131 return TRUE;
6132 }
6133
6134
6135 //------------------------------------------------------------------------------
6136 /// Set bit stream buffer address to MVD
6137 /// @param -u32start \b IN : start address
6138 /// @param -u32end \b IN : end address
6139 //------------------------------------------------------------------------------
MVD_SetBitStreamAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)6140 static void MVD_SetBitStreamAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
6141 {
6142 MVD_CmdArg mvdcmd;
6143 MS_ASSERT((u32start%8)==0);
6144 u32start >>= 3;
6145 SET_CMDARG(mvdcmd, u32start, u8Idx);
6146 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_START, &mvdcmd ) == FALSE)
6147 {
6148 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_START ) );
6149 return;
6150 }
6151
6152 MS_ASSERT((u32end%8)==0);
6153 u32end >>= 3;
6154 SET_CMDARG(mvdcmd, u32end, u8Idx);
6155 if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_END, &mvdcmd ) == FALSE)
6156 {
6157 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_END ) );
6158 return;
6159 }
6160 return;
6161 }
6162
HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_U32 u32len)6163 MS_BOOL HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_U32 u32len)
6164 {
6165 MS_VIRT tmpAdr, tmpLen;
6166 MVD_FWCfg* pFwCfg = NULL;
6167 MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
6168 MVD_MEMCfg* pstMemCfg = NULL;
6169 MVD_SLQTBLInfo* pstSlqTblInfo = NULL;
6170 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6171 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6172 MS_VIRT u32BuffStart = u32start+(MVD_FW_TASK_OFFSET*u8VPUIdx);
6173 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
6174 MS_VIRT u32StartOffset;
6175 MS_U8 u8MiuSel;
6176
6177 if(VPUSHMAddr != 0)
6178 {
6179 _phy_to_miu_offset(u8MiuSel, u32StartOffset, VPUSHMAddr);
6180
6181 u32StartOffset -= MVD_FW_CODE_LEN;
6182
6183 if(u8Idx == 0)
6184 {
6185 u32BuffStart = u32StartOffset; // for main decoder
6186 }
6187 else if(u8Idx == 1)
6188 {
6189 u32BuffStart = u32StartOffset + 0x20000; // VPUSHMAddr+128K bytes
6190 }
6191 }
6192
6193 MVD_DEBUGINFO(MVD_PRINT("MVD FW shared mem start = 0x%lx\n", (unsigned long)u32BuffStart));
6194 MVD_GetFWBuffAdd(u32BuffStart, u32len, pBuff);
6195 MVD_SetFWBuffAdd(u8Idx, pBuff);
6196
6197 tmpAdr = pBuff->u32DecFrmInfoAdd + MVD_FW_DECFRM_INFO_BUF_LEN;
6198
6199 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FB, &tmpAdr, &tmpLen);
6200 MVD_DEBUGINFO(MVD_PRINT("set MVD_FRAMEBUFFER_ADR=%lx\n",(unsigned long)tmpAdr));
6201 HAL_MVD_SetFrameBuffAddr(u8Idx, tmpAdr, HAL_MVD_GetFBMode(u8Idx));
6202 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
6203 HAL_MVD_SetFrameBuffNum(u8Idx, pFwCfg->u8FBNum,pFwCfg->u32FBUsedSize);
6204
6205 // If VD_MHEG5(CPU) and MVD HW engine are run on different MIU,
6206 // IAP, DP, and MV buffers are allocated after FB.
6207 // The reason is that these 3 buffers are used by MVD HW engine.
6208 if(pMVDHalContext->bCMAUsed == FALSE)
6209 {
6210 tmpAdr += pFwCfg->u32FBUsedSize;
6211 pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6212 if (pstMemCfg->u32FBSize < (pFwCfg->u32FBUsedSize + MVD_HW_BUF_TOTAL_LEN))
6213 {
6214 MVD_DEBUGERROR(MVD_PRINT("MVD HW buffers larger than FB size!!!\n"));
6215 }
6216 MVD_DEBUGINFO(MVD_PRINT("MVD FB boundary =0x%lx\n",(unsigned long)tmpAdr));
6217 tmpAdr = HAL_MVD_SetHWBuffer(u8Idx, tmpAdr);
6218 }
6219
6220 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_BS, &tmpAdr, &tmpLen);
6221 MVD_DEBUGINFO(MVD_PRINT("set MVD_BITSTREAM_ADR=%lx\n",(unsigned long)tmpAdr));
6222 MVD_SetBitStreamAddr(u8Idx, tmpAdr,tmpAdr+tmpLen);
6223 pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6224 pstSlqTblInfo->u32ESBuffEnd = tmpAdr+tmpLen;
6225
6226 if((pFwCfg->stFBReduction.LumaFBReductionMode != E_MVD_FB_REDUCTION_NONE)
6227 || (pFwCfg->stFBReduction.ChromaFBReductionMode != E_MVD_FB_REDUCTION_NONE))
6228 {
6229 //for chips not support reduction mode, just ignore related config.
6230 MVD_DEBUGERROR(MVD_PRINT("MVD Err: Not support FB reduction mode!!\n"));
6231 }
6232
6233 return TRUE;
6234 }
6235
6236 //------------------------------------------------------------------------------
6237 /// Issue "Decode Pause" command.
6238 //------------------------------------------------------------------------------
HAL_MVD_DecodePause(MS_U8 u8Idx)6239 void HAL_MVD_DecodePause(MS_U8 u8Idx)
6240 {
6241 MVD_CmdArg mvdcmd;
6242 SETUP_CMDARG(mvdcmd);
6243 SET_DECNUM(mvdcmd, u8Idx);
6244 if (HAL_MVD_MVDCommand(CMD_PAUSE, &mvdcmd)== FALSE)
6245 {
6246 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PAUSE) );
6247 return;
6248 }
6249
6250 return;
6251 }
6252
6253
6254 //------------- Below functions are for MediaCodec SLQ Table --------------------
6255 #if _SLQTBL_DUMP_PTS
_SLQTbl_DumpPtsTbl(MS_U8 u8Idx,MS_U32 u32EntryStart,MS_U32 u32EntryEnd)6256 static void _SLQTbl_DumpPtsTbl(MS_U8 u8Idx, MS_U32 u32EntryStart, MS_U32 u32EntryEnd)
6257 {
6258 MS_U32 i;
6259 MS_VIRT u32EsRp, u32EsStart, u32EsEnd;
6260 MS_VIRT u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
6261
6262 for (i=u32EntryStart; i<u32EntryEnd; i++)
6263 {
6264 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + i*8;
6265
6266 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
6267 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
6268 MVD_PRINT("ES[%x] Start=0x%x End=0x%x u32EsRp=%x\n",
6269 i, u32EsStart, u32EsEnd, u32EsRp);
6270 }
6271
6272 MVD_PRINT("\n=======Dump PTS table========\n");
6273 MVD_PRINT("addr\t byte_cnt\t dummy_cnt\t id_low\t id_high\t time_stamp\n");
6274 for (i=u32EntryStart; i<u32EntryEnd; i++)
6275 {
6276 MVD_PRINT("0x%x\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\n", u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN,
6277 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN), //byteCnt
6278 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+4), //dummyPktCnt
6279 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+8), //idLow
6280 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+12),//idHigh
6281 HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+16) //pts
6282 );
6283 }
6284 MVD_PRINT("=====================================\n");
6285 }
6286 #endif
6287
6288
6289 #if SLQ_NEW_PUSH
MVD_SLQTblGetHdrPkt(MS_U8 u8Idx,MVD_PacketInfo * pDivxHdr,MVD_PacketInfo * pDivxData)6290 void MVD_SLQTblGetHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6291 #else
6292 static void MVD_SLQTblGetDivxHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6293 #endif
6294 {
6295 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6296 MS_VIRT u32DivXPattern = pstSlqTblInfo->pDrvDivxTbl->u32WrPtr;
6297 MS_U32 u32FrmSize = pDivxData->u32Length;
6298 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6299 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6300 #ifdef VDEC3
6301 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6302 #endif
6303 #if SLQ_NEW_PUSH
6304 if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit && pstCtrlCfg->u8McuMode == FALSE)
6305 {
6306 if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart && pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6307 {
6308 //MVD_PRINT("Show KC the SlqPushLength = 0x%x\n",pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6309 if (E_MVD_CODEC_DIVX311 == curCodecType)
6310 {
6311 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6312 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , DIVX_PATTERN);
6313 }
6314 else if(E_MVD_CODEC_VC1_MAIN == curCodecType)
6315 {//rcv
6316 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, RCV_PATTERN);
6317 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6318 }
6319 else if (E_MVD_CODEC_VC1_ADV == curCodecType)
6320 {
6321 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , VC1_PATTERN);
6322 }
6323 pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
6324 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
6325 pstSlqTblInfo->pSlqStatus->bSlqFireRdy =TRUE;
6326 pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;// - 16;
6327 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
6328 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
6329 }
6330
6331 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6332 {
6333 pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = u32DivXPattern;
6334 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6335 pstSlqTblInfo->pSlqStatus->bSlqPicCollect = TRUE;
6336 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6337 }
6338 else if(pstSlqTblInfo->pSlqStatus->bSlqPicCollect)
6339 {
6340 pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6341 pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6342 }
6343 }
6344 else
6345 {
6346 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6347 HAL_MVD_MemWrite4Byte(u32DivXPattern +4,u32FrmSize);
6348 }
6349 #else
6350 HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6351 HAL_MVD_MemWrite4Byte(u32DivXPattern+4, u32FrmSize);
6352 #endif
6353 pDivxHdr->u32StAddr = u32DivXPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
6354 pDivxHdr->u32TimeStamp = pDivxData->u32TimeStamp; //unit: ms
6355 pDivxHdr->u32ID_L = pDivxData->u32ID_L;
6356 pDivxHdr->u32ID_H = pDivxData->u32ID_H;
6357 //MVD_PRINT("u32DivXPattern(0x%x==>0x%x)=0x%x 0x%x\n", u32DivXPattern, pDivxHdr->u32StAddr,
6358 // HAL_MVD_MemRead4Byte(u32DivXPattern), HAL_MVD_MemRead4Byte(u32DivXPattern+4));
6359 if (E_MVD_CODEC_VC1_ADV == curCodecType)
6360 {
6361 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6362 pDivxHdr->u32Length = 4;
6363 }
6364 else
6365 {
6366 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6367 if(pstCtrlCfg->u8McuMode == TRUE)
6368 {
6369 pDivxHdr->u32Length = 64;
6370 if (pstSlqTblInfo->pDrvDivxTbl->u32WrPtr >= pstSlqTblInfo->pDrvDivxTbl->u32EndAdd)
6371 {
6372 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
6373 }
6374 }
6375 else
6376 {
6377 pDivxHdr->u32Length = 8;
6378 }
6379 }
6380
6381 #if SLQ_NEW_PUSH
6382 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart && pstCtrlCfg->u8McuMode == FALSE)
6383 {
6384 if (E_MVD_CODEC_VC1_ADV == curCodecType)
6385 {
6386 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6387 pDivxHdr->u32Length = 4;
6388 }
6389 else
6390 {
6391 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6392 pDivxHdr->u32Length = 8;
6393 }
6394 }
6395 #endif
6396 }
6397
MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx,MVD_CodecType eType)6398 static void MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx, MVD_CodecType eType)
6399 {
6400 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6401 MS_PHY u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
6402 MS_PHY temp = 0;
6403
6404 #if 0
6405 _MVD_Memset(u32EndPattern, 0xff, END_PATTERN_SIZE);
6406 #else
6407 //_miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32EndPattern,temp);
6408 temp = u32EndPattern+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6409 memset((void*)(MS_PA2KSEG1(temp)),0xff,END_PATTERN_SIZE);
6410 MsOS_FlushMemory();
6411 MsOS_ReadMemory();
6412 #endif
6413
6414 if ((E_MVD_CODEC_FLV == eType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == eType))
6415 {
6416 HAL_MVD_MemWrite4Byte(u32EndPattern, FLV_PATTERN);
6417 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6418 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6419 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6420 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6421 //MVD_PRINT("##########FileEnd for FLV/SVH!, u32EndPattern=%x\n",u32EndPattern);
6422 }
6423 else if (E_MVD_CODEC_DIVX311 == eType)
6424 {
6425 HAL_MVD_MemWrite4Byte(u32EndPattern, DIVX_PATTERN);
6426 HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6427 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6428 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6429 HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6430 //MVD_PRINT("##########FileEnd for DIVX311!, u32EndPattern=%x\n",u32EndPattern);
6431 }
6432 else if ((E_MVD_CODEC_MPEG2 == eType)||(E_MVD_CODEC_MPEG4 == eType))
6433 {
6434 HAL_MVD_MemWrite4Byte(u32EndPattern, MPEG_PATTERN_0);
6435 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6436 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2);
6437 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3);
6438 //MVD_PRINT("##########FileEnd for MPEG2/4!, u32EndPattern=%x\n",u32EndPattern);
6439 }
6440 else
6441 {
6442 HAL_MVD_MemWrite4Byte(u32EndPattern, END_PATTERN_0);
6443 HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6444 HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2); //scw
6445 HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3); //scw
6446 //MVD_PRINT("##########FileEnd for VC1!, u32EndPattern=%x\n",u32EndPattern);
6447 }
6448
6449 MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x\n", (unsigned long)u32EndPattern,
6450 HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4)));
6451 }
6452
6453
MVD_SLQTblInitDummyPkt(MS_U8 u8Idx,MVD_CodecType eType)6454 static void MVD_SLQTblInitDummyPkt(MS_U8 u8Idx, MVD_CodecType eType)
6455 {
6456 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6457 MS_PHY u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
6458 MS_U32 u32DummyPattern[3];
6459 MS_U32 u32PatternSize;
6460 MS_U32 i;
6461 MS_PHY temp = 0;
6462
6463 //MVD_PRINT("eType = 0x%x\n", eType);
6464 //initial content for dummy packet
6465 #if 0
6466 _MVD_Memset(u32DummyES, 0xff, DUMMY_SIZE);
6467 #else
6468 temp = u32DummyES+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6469 memset((void*)(MS_PA2KSEG1(temp)),0xff,DUMMY_SIZE);
6470 MsOS_FlushMemory();
6471 MsOS_ReadMemory();
6472 #endif
6473
6474 switch (eType)
6475 {
6476 case E_MVD_CODEC_FLV:
6477 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6478 u32DummyPattern[0] = FLV_PATTERN;
6479 u32PatternSize = 1;
6480 break;
6481
6482 case E_MVD_CODEC_DIVX311:
6483 u32DummyPattern[0] = DIVX_PATTERN;
6484 u32PatternSize = 1;
6485 break;
6486
6487 case E_MVD_CODEC_VC1_ADV: //vc1
6488 u32DummyPattern[0] = VC1_PATTERN_0;
6489 u32DummyPattern[1] = VC1_PATTERN_1;
6490 u32DummyPattern[2] = VC1_PATTERN_2;
6491 u32PatternSize = 3;
6492 break;
6493
6494 case E_MVD_CODEC_VC1_MAIN: //rcv
6495 u32DummyPattern[0] = RCV_PATTERN_0;
6496 u32DummyPattern[1] = RCV_PATTERN_1;
6497 u32DummyPattern[2] = RCV_PATTERN_2;
6498 u32PatternSize = 3;
6499 break;
6500
6501 default:
6502 u32DummyPattern[0] = DUMMY_PATTERN;
6503 u32PatternSize = 1;
6504 break;
6505 }
6506 for (i=0; i<u32PatternSize; i++)
6507 {
6508 HAL_MVD_MemWrite4Byte(u32DummyES+i*4, u32DummyPattern[i]);
6509 }
6510 #if 0
6511 MVD_PRINT("u32DummyES(0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES, HAL_MVD_MemRead4Byte(u32DummyES),
6512 HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
6513 #endif
6514
6515 }
6516
MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST * pDrvSlqTbl,MS_U32 u32Addr)6517 static void MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST* pDrvSlqTbl, MS_U32 u32Addr)
6518 {
6519 MS_PHY temp = 0;
6520 pDrvSlqTbl->u32StAdd = u32Addr;
6521 pDrvSlqTbl->u32EndAdd = u32Addr + SLQ_TBL_SIZE;
6522 pDrvSlqTbl->u32EntryCntMax = SLQ_ENTRY_MAX;
6523
6524 //reset SLQ table read/write pointers
6525 pDrvSlqTbl->u32RdPtr = pDrvSlqTbl->u32StAdd;
6526 pDrvSlqTbl->u32WrPtr = pDrvSlqTbl->u32StAdd;
6527 pDrvSlqTbl->pu32LastEntry = &pDrvSlqTbl->u32WrPtr;
6528
6529 #if (!MVD_TURBO_INIT)
6530 //reset SLQ table
6531 #if 0
6532 _MVD_Memset(pDrvSlqTbl->u32StAdd, 0, SLQ_TBL_SIZE);
6533 #else
6534 temp = pDrvSlqTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6535 memset((void*)(MS_PA2KSEG1(temp)),0,SLQ_TBL_SIZE);
6536 MsOS_FlushMemory();
6537 MsOS_ReadMemory();
6538 #endif
6539 #endif
6540 pDrvSlqTbl->u32Empty = SLQ_TBL_SIZE;
6541 //_SLQTbl_DumpInfo(pDrvSlqTbl);
6542 }
6543
MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS * pSlqStatus,MS_VIRT u32WrPtr)6544 static void MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS* pSlqStatus, MS_VIRT u32WrPtr)
6545 {
6546 #if SLQ_NEW_PUSH
6547 pSlqStatus->u32VaildWptrAddr = u32WrPtr ;
6548 pSlqStatus->bSlqPicWaitNextStart = FALSE;
6549 pSlqStatus->bSlqCtrlBit = FALSE;
6550 pSlqStatus->u32SlqPushLength = 0;
6551 pSlqStatus->bSlqPicStart = FALSE;
6552 pSlqStatus->bSlqPicCollect = FALSE;
6553 pSlqStatus->bSlqEnLastFrameShow =FALSE;
6554 pSlqStatus->bSlqFireRdy = FALSE;
6555 #endif
6556 }
6557
MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST * pDrvDivxTbl,MS_U32 u32StAdd,MS_U32 u32Val)6558 static void MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST* pDrvDivxTbl, MS_U32 u32StAdd, MS_U32 u32Val)
6559 {
6560 MS_PHY temp = 0;
6561 ///// init SLQ entries for DivX311
6562 pDrvDivxTbl->u32StAdd = u32StAdd;
6563 pDrvDivxTbl->u32EndAdd= pDrvDivxTbl->u32StAdd + SLQ_TBL_SIZE;
6564 pDrvDivxTbl->u32WrPtr = pDrvDivxTbl->u32StAdd;
6565 //pDrvDivxTbl->u32RdPtr = pDrvDivxTbl->u32StAdd;
6566 #if (!MVD_TURBO_INIT)
6567 //reset DivX311 pattern table
6568 #if 0
6569 _MVD_Memset(pDrvDivxTbl->u32StAdd, 0, u32Val);
6570 #else
6571 temp = pDrvDivxTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6572 memset((void*)(MS_PA2KSEG1(temp)),0,u32Val);
6573 MsOS_FlushMemory();
6574 MsOS_ReadMemory();
6575 #endif
6576 #endif
6577 }
6578
MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST * pDrvEsTbl,MS_U32 u32StAdd,MS_U32 u32Val)6579 static void MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST* pDrvEsTbl, MS_U32 u32StAdd, MS_U32 u32Val)
6580 {
6581 UNUSED(u32Val);
6582 MS_PHY temp = 0;
6583 ///// init ES table
6584 pDrvEsTbl->u32StAdd = u32StAdd;
6585 pDrvEsTbl->u32EndAdd= pDrvEsTbl->u32StAdd + ES_TBL_SIZE;
6586 pDrvEsTbl->u32WrPtr = pDrvEsTbl->u32StAdd;
6587 //reset ES table
6588 #if 0
6589 _MVD_Memset(pDrvEsTbl->u32StAdd, 0, ES_TBL_SIZE);
6590 #else
6591 temp = pDrvEsTbl->u32StAdd+pMVDHalContext->stMiuCfg.u8FWMiuSel*HAL_MIU1_BASE;
6592 memset((void*)(MS_PA2KSEG1(temp)),0,ES_TBL_SIZE);
6593 MsOS_FlushMemory();
6594 MsOS_ReadMemory();
6595 #endif
6596 }
6597
6598 //------------------------------------------------------------------------------------------------------------
6599 // Layout of drvProcBuffer
6600 // -----------------
6601 // drvProcBuff | SlqTbl entries | <- pstSlqTblInfo->pDrvSlqTbl->u32StAdd
6602 // | 8K bytes |
6603 // | (1024 entries) |
6604 // | |
6605 // |-----------------|
6606 // | DivX311 | <- pstSlqTblInfo->pDrvSlqTbl->u32EndAdd <- pstSlqTblInfo->pDrvDivxTbl->u32StAdd
6607 // | 8K bytes |
6608 // | (1024 entries) |
6609 // | |
6610 // |-----------------|
6611 // | Flush Patterns |... <- pstSlqTblInfo->pDrvDivxTbl->u32EndAdd <- _drvDummy.u32StAdd
6612 // | 8K bytes |
6613 // | (1024 entries) |
6614 // | |
6615 // |-----------------|
6616 // | FileEnd Pattern |... <- _drvDummy.u32EndAdd <- _drvFileEnd.u32StAdd
6617 // | 8K bytes |
6618 // | (1024 entries) |
6619 // | |
6620 // |-----------------|
6621 // | ES table |... <- _drvFileEnd.u32EndAdd <- pstSlqTblInfo->pDrvEsTbl->u32StAdd
6622 // | 8K bytes |
6623 // | (1024 entries) |
6624 // | |
6625 // |-----------------|
6626 // | |........ End of drvProcBuff
6627 //
6628 //------------------------------------------------------------------------------------------------------------
HAL_MVD_SLQTblInit(MS_U8 u8Idx)6629 MS_BOOL HAL_MVD_SLQTblInit(MS_U8 u8Idx)
6630 {
6631 MS_VIRT u32Addr, u32Len;
6632 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6633 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6634 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6635
6636 if(curCodecType == E_MVD_CODEC_UNKNOWN)
6637 {
6638 MVD_DEBUGERROR(MVD_PRINT("%s: unknow codec type!\n", __FUNCTION__));
6639 return FALSE;
6640 }
6641 pstSlqTblInfo->u32DummyPktCnt = 0;//reset dummy packet counter
6642 pstSlqTblInfo->u32SlqByteCnt = 0; //reset SLQ table byte counter
6643 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
6644
6645 HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_DRV, &u32Addr, &u32Len);
6646
6647 //init SLQ table attributes & reset SLQ table read/write pointers
6648 MVD_SLQTblInitDrvSlqTbl(pstSlqTblInfo->pDrvSlqTbl, u32Addr);
6649 pstSlqTblInfo->u32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6650
6651 MVD_SLQTblInitSlqStatus(pstSlqTblInfo->pSlqStatus, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
6652
6653 //set SLQ table start/end to F/W
6654 HAL_MVD_SetSLQTblBufStartEnd(u8Idx, HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr), HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr+SLQ_TBL_SIZE));
6655
6656 ///// init SLQ entries for DivX311
6657 MVD_SLQTblInitDrvDivxTbl(pstSlqTblInfo->pDrvDivxTbl, pstSlqTblInfo->pDrvSlqTbl->u32EndAdd, SLQ_TBL_SIZE);
6658
6659 ///// init flush pattern
6660 MVD_SLQTblInitDummyPkt(u8Idx, curCodecType);
6661
6662 ///// init file-end pattern
6663 MVD_SLQTblInitFileEndPkt(u8Idx, curCodecType);
6664
6665 MVD_SLQTblInitDrvEsTbl(pstSlqTblInfo->pDrvEsTbl, (pstSlqTblInfo->pDrvDivxTbl->u32EndAdd + DUMMY_SIZE*2), pstMemCfg->u32DrvBufSize);
6666
6667 pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX; //reset ES read pointer
6668 pstSlqTblInfo->u32PreEsWr = 0; //reset ES write pointer
6669
6670 return TRUE;
6671 }
6672
6673
6674 #if 0
6675 static void _SLQTbl_DumpInfo(MVD_SLQ_TBL_ST* pInfo)
6676 {
6677 MVD_PRINT("str=0x%x\n", pInfo->u32StAdd);
6678 MVD_PRINT("end=0x%x\n", pInfo->u32EndAdd);
6679 MVD_PRINT("cnt=0x%x\n", pInfo->u32EntryCntMax);
6680 MVD_PRINT("rd =0x%x\n", pInfo->u32RdPtr);
6681 MVD_PRINT("wr =0x%x\n", pInfo->u32WrPtr);
6682 return;
6683 }
6684 #endif
6685
6686
HAL_MVD_GetQueueVacancy(MS_U8 u8Idx,MS_BOOL bCached)6687 MS_U32 HAL_MVD_GetQueueVacancy(MS_U8 u8Idx, MS_BOOL bCached)
6688 {
6689 MS_U32 u32Empty;
6690 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6691
6692 #if 0
6693 if (MDrv_MVD_GetVldErrCount()!=0)
6694 {
6695 MVD_PRINT("QQQ wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x) vldErr=0x%x\n", writePtrLast[u8Idx], pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
6696 HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, MDrv_MVD_GetVldErrCount(u8Idx));
6697 MVD_PRINT("Previous EsRead=0x%x EsWrite=0x%x\n", pstSlqTblInfo->u32PreEsRd, pstSlqTblInfo->u32PreEsWr);
6698 _SLQTbl_DumpPtsTbl(u8Idx, 0x0, 0x620);
6699 while(1);
6700 }
6701 #endif
6702
6703 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32Empty;
6704 if ((TRUE == bCached) && (u32Empty > SLQTBL_CHECKVACANCY_WATERLEVEL))
6705 {
6706 //To have better performance, we only query F/W read pointer
6707 //when queue_vacancy is lower than water_level
6708 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6709 {
6710 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6711 }
6712 else
6713 {
6714 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6715 }
6716
6717 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6718 {
6719 u32Empty = SLQ_TBL_SIZE;
6720 }
6721 u32Empty -= SLQ_TBL_SAFERANGE;
6722 return (u32Empty / SLQ_ENTRY_LEN);
6723 }
6724
6725 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx));
6726 //MVD_PRINT("QV=0x%x rd=0x%x==>", u32Empty, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6727 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= (pstSlqTblInfo->pDrvSlqTbl->u32StAdd+SLQ_ENTRY_LEN))
6728 {
6729 if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
6730 {
6731 MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too large!\n",
6732 __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6733 }
6734 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr -= SLQ_ENTRY_LEN;
6735 }
6736 else if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd)
6737 {
6738 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32EndAdd - SLQ_ENTRY_LEN;
6739 }
6740 else
6741 {
6742 MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too small!\n",
6743 __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6744 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6745 }
6746 //MVD_PRINT("0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6747
6748 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6749 {
6750 u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6751 }
6752 else
6753 {
6754 u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6755 }
6756
6757 if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6758 {
6759 u32Empty = SLQ_TBL_SIZE;
6760 }
6761
6762 pstSlqTblInfo->pDrvSlqTbl->u32Empty = u32Empty;
6763
6764 if (u32Empty < SLQ_TBL_SAFERANGE)
6765 {//to avoid write_pointer catch up to read_pointer
6766 u32Empty= 0;
6767 }
6768 else
6769 {
6770 u32Empty -= SLQ_TBL_SAFERANGE;
6771 }
6772
6773 //MVD_PRINT("%s r=0x%x w=0x%x u32Empty=0x%x\n", __FUNCTION__,
6774 // pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32Empty);
6775 return (u32Empty / SLQ_ENTRY_LEN);
6776 }
6777
HAL_MVD_PushQueue(MS_U8 u8Idx,MVD_PacketInfo * pInfo)6778 E_MVD_Result HAL_MVD_PushQueue(MS_U8 u8Idx, MVD_PacketInfo* pInfo)
6779 {
6780 E_MVD_Result eRet=E_MVD_RET_INVALID_PARAM;
6781 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6782 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6783 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6784 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6785 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6786 #ifdef VDEC3
6787 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
6788 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6789 #endif
6790 if (pInfo == NULL)
6791 {
6792 MVD_DEBUGERROR(MVD_PRINT("PushQueue NULL pInfo\n"));
6793 return E_MVD_RET_INVALID_PARAM;
6794 }
6795
6796 #ifndef VDEC3
6797 if(pMVDHalContext->bAutoInsertDummyPattern[u8Idx] == TRUE)
6798 #else
6799 if(pstCtrlCfg->u8McuMode == TRUE)
6800 #endif
6801 {
6802 MS_U8* temp = (MS_U8*)(MS_PA2KSEG1( (MS_PHY)(pInfo->u32StAddr)+pstMemCfg->u32BSAddr));
6803 MS_U32 i;
6804 MS_U32 u32DummyPattern[3];
6805 MS_U32 u32PatternSize;
6806
6807 switch (curCodecType)
6808 {
6809 case E_MVD_CODEC_FLV:
6810 case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6811 u32DummyPattern[0] = FLV_PATTERN;
6812 u32PatternSize = 1;
6813 break;
6814
6815 case E_MVD_CODEC_DIVX311:
6816 u32DummyPattern[0] = DIVX_PATTERN;
6817 u32PatternSize = 1;
6818 break;
6819
6820 case E_MVD_CODEC_VC1_ADV: //vc1
6821 u32DummyPattern[0] = VC1_PATTERN_0;
6822 u32DummyPattern[1] = VC1_PATTERN_3;
6823 u32PatternSize = 2;
6824 break;
6825 case E_MVD_CODEC_VC1_MAIN: //rcv
6826 u32DummyPattern[0] = RCV_PATTERN_3;
6827 u32DummyPattern[1] = RCV_PATTERN_1;
6828 u32DummyPattern[2] = RCV_PATTERN_3;
6829 u32PatternSize = 3;
6830 break;
6831
6832 default:
6833 u32DummyPattern[0] = DUMMY_PATTERN;
6834 u32DummyPattern[1] = DUMMY_PATTERN;
6835 u32PatternSize = 2;
6836 break;
6837 }
6838
6839
6840 for (i=0; i<u32PatternSize; i++)
6841 {
6842 temp[4*i+pInfo->u32Length] = ((u32DummyPattern[i])&0xff);
6843 temp[4*i+pInfo->u32Length+1] = ((u32DummyPattern[i]>>8)&0xff);
6844 temp[4*i+pInfo->u32Length+2] = ((u32DummyPattern[i]>>16)&0xff);
6845 temp[4*i+pInfo->u32Length+3] = ((u32DummyPattern[i]>>24)&0xff);
6846 }
6847
6848 for(i=u32PatternSize*4;i<256;i++)
6849 {
6850 temp[pInfo->u32Length+i] = 0xFF;
6851 }
6852
6853 pInfo->u32Length += 256;
6854 }
6855
6856
6857 #if _SLQTBL_DUMP_PUSHQ
6858 {
6859 //static MS_U32 u32pqTimes[MAX_DEC_NUM]= {0, 0};
6860
6861 MVD_PRINT("Push[%x] st=0x%x len=0x%x pts=0x%x\n", pMVDHalContext->u32pqTimes[u8Idx]++,
6862 pInfo->u32StAddr, pInfo->u32Length, pInfo->u32TimeStamp);
6863 }
6864 #endif
6865
6866 #if SLQ_NEW_PUSH
6867 if((pInfo->u32StAddr & SLQ_PIC_START_FLAG) == SLQ_PIC_START_FLAG)
6868 {
6869 pInfo->u32StAddr = pInfo->u32StAddr&~SLQ_PIC_START_FLAG;
6870 pstSlqTblInfo->pSlqStatus->bSlqPicStart =TRUE;
6871 pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = TRUE;
6872 }
6873 else
6874 {
6875 pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
6876 }
6877 #endif
6878 //check input parameters
6879 if (pInfo->u32StAddr >= pstMemCfg->u32BSSize)
6880 {
6881 //since u32StAddr is offset, it shouldn't be larger than size.
6882 MVD_DEBUGERROR(MVD_PRINT("PushQueue invalid u32StAddr=0x%lx, bsSize=0x%lx\n", (unsigned long)pInfo->u32StAddr, (unsigned long)pstMemCfg->u32BSSize));
6883 return E_MVD_RET_INVALID_PARAM;
6884 }
6885 else if ((pInfo->u32TimeStamp == MVD_NULLPKT_PTS) && (pInfo->u32Length==0))
6886 {
6887 // AVI NULL packet.
6888 pstSlqTblInfo->u32DummyPktCnt++;
6889 //MVD_PRINT("Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6890 return E_MVD_RET_OK;
6891 }
6892
6893 if (FALSE == (HAL_MVD_IsMStreamerMode(u8Idx) ||HAL_MVD_IsMcuMode(u8Idx)))
6894 { //Check repeat PTS for non-MStreamer/Mcu mode.
6895 //MVD_PRINT(".Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6896 if (pInfo->u32TimeStamp == pstSlqTblInfo->u32LastPts)
6897 {
6898 //MVD_PRINT("Repeat PTS!\n");
6899 if (pInfo->u32TimeStamp != MVD_NULLPKT_PTS)
6900 pInfo->u32TimeStamp = MVD_NULLPKT_PTS; //repeat PTS
6901 }
6902 else
6903 {
6904 pstSlqTblInfo->u32LastPts = pInfo->u32TimeStamp;
6905 }
6906 }
6907
6908 //check queue vacancy
6909 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty >= SLQ_TBL_SAFERANGE)
6910 { //put packets
6911 #if SLQ_NEW_PUSH
6912 if (E_MVD_CODEC_DIVX311 == curCodecType
6913 ||E_MVD_CODEC_VC1_MAIN == curCodecType //rcv
6914 ||E_MVD_CODEC_VC1_ADV == curCodecType)
6915 {
6916 MVD_PacketInfo stHdr;
6917 if((pstSlqTblInfo->pSlqStatus->bSlqCtrlBit) || (E_MVD_CODEC_DIVX311 == curCodecType))
6918 {
6919 MVD_SLQTblGetHdrPkt(u8Idx, &stHdr, pInfo);
6920
6921 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart||(!pstSlqTblInfo->pSlqStatus->bSlqCtrlBit))
6922 {
6923 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6924 { //to mark this packet's pts as unused.
6925 stHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6926 stHdr.u32ID_H = MVD_NULLPKT_PTS;
6927 }
6928 #ifdef VDEC3
6929 if(pstCtrlCfg->u8McuMode == TRUE)
6930 {
6931 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 1)
6932 {
6933 HAL_VPU_EX_PacketInfo stVpuPkt;
6934
6935 stVpuPkt.u32Offset = stHdr.u32StAddr;
6936 stVpuPkt.u32Length = stHdr.u32Length;
6937 stVpuPkt.u64TimeStamp = (MS_U64)stHdr.u32TimeStamp;
6938 //If in display queue mode
6939 stVpuPkt.u64TimeStamp |= ((MS_U64)stHdr.u32ID_H << 32);
6940 stVpuPkt.u32ID_H = stHdr.u32ID_H;
6941 stVpuPkt.u32ID_L = stHdr.u32ID_L;
6942
6943 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6944 eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6945 }
6946 else
6947 {
6948 return E_MVD_RET_FAIL;
6949 }
6950 }
6951 else
6952 #endif
6953 {
6954 HAL_MVD_SLQTblSendPacket(u8Idx, &stHdr);
6955 }
6956 }
6957 }
6958 }
6959 #else
6960 if (E_MVD_CODEC_DIVX311 == curCodecType)
6961 {
6962 MVD_PacketInfo stDivxHdr;
6963 MVD_SLQTblGetDivxHdrPkt(u8Idx, &stDivxHdr, pInfo);
6964 if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6965 { //to mark this packet's pts as unused.
6966 stDivxHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6967 stDivxHdr.u32ID_H = MVD_NULLPKT_PTS;
6968 }
6969 HAL_MVD_SLQTblSendPacket(u8Idx, &stDivxHdr);
6970 }
6971 #endif
6972
6973 #ifdef VDEC3
6974 if(pstCtrlCfg->u8McuMode == TRUE)
6975 {
6976 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
6977 {
6978 HAL_VPU_EX_PacketInfo stVpuPkt;
6979
6980 stVpuPkt.u32Offset = pInfo->u32StAddr;
6981 stVpuPkt.u32Length = pInfo->u32Length;
6982 stVpuPkt.u64TimeStamp = (MS_U64)pInfo->u32TimeStamp;
6983 //If in display queue mode
6984 stVpuPkt.u64TimeStamp |= ((MS_U64)pInfo->u32ID_H << 32);
6985 stVpuPkt.u32ID_H = pInfo->u32ID_H;
6986 stVpuPkt.u32ID_L = pInfo->u32ID_L;
6987
6988 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6989 eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6990 //VPRINTF("[%d]%s[%d],ret=%d,u32StAddr %x,u32Length %d,u32TimeStamp %d\n",u8Idx,__FUNCTION__,__LINE__,eRet,(unsigned int)pInfo->u32StAddr,(unsigned int)pInfo->u32Length,(unsigned int)pInfo->u32TimeStamp);
6991 return eRet;
6992 }
6993 else
6994 {
6995 return E_MVD_RET_FAIL;
6996 }
6997 }
6998 else
6999 #endif
7000 {
7001 HAL_MVD_SLQTblSendPacket(u8Idx, pInfo);
7002 eRet=E_MVD_RET_OK;
7003 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
7004 }
7005 }
7006 else
7007 {
7008 MS_ASSERT(0); //shouldn't be here!
7009 MVD_DEBUGERROR(MVD_PRINT("PushQueue FULL!!! empty=0x%lx\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
7010 //Player will only push queue when queue vacancy != 0
7011 eRet=E_MVD_RET_QUEUE_FULL;
7012 }
7013
7014 if (E_MVD_RET_OK != eRet)
7015 {
7016 MVD_DEBUGERROR(MVD_PRINT("%s ret = %d\n", __FUNCTION__, eRet));
7017 }
7018 return eRet;
7019 }
7020
7021
MVD_FlushTSQueue(MS_U8 u8Idx)7022 static E_MVD_Result MVD_FlushTSQueue(MS_U8 u8Idx)
7023 {
7024 if (HAL_MVD_GetLastCmd(u8Idx)!=CMD_PAUSE)
7025 {
7026 HAL_MVD_PauseDisp(u8Idx);
7027 HAL_MVD_DecodePause(u8Idx);
7028 HAL_MVD_FlushDisplayBuf(u8Idx);
7029 }
7030
7031 if(HAL_MVD_SkipData(u8Idx) == FALSE)
7032 {
7033 return E_MVD_RET_FAIL;
7034 }
7035 else
7036 {
7037 return E_MVD_RET_OK;
7038 }
7039 }
7040
7041
MVD_PatternLenIsValid(MS_U8 u8Idx,MS_U32 u32Len)7042 static MS_BOOL MVD_PatternLenIsValid(MS_U8 u8Idx, MS_U32 u32Len)
7043 {
7044 MS_U32 u32ValidLen = 0;
7045 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7046 #define MAX_VALIDLEN 0x200000 //2M
7047
7048 if (E_MVD_CODEC_VC1_MAIN != curCodecType)
7049 {
7050 return TRUE;
7051 }
7052 else
7053 {
7054 //only RCV has to check this
7055 u32ValidLen = HAL_MVD_GetPayloadLen(u8Idx);
7056 if (u32ValidLen > MAX_VALIDLEN)
7057 { //avoid the extreme large value due to error bitstream
7058 u32ValidLen = MAX_VALIDLEN;
7059 }
7060 MVD_DEBUGINFO(MVD_PRINT("(%x) ValidLen=0x%x CurLen=0x%x\n",
7061 (u32Len > u32ValidLen), u32ValidLen, u32Len));
7062 return (u32Len > u32ValidLen);
7063 }
7064 }
7065
MVD_FlushSlqTblQueue(MS_U8 u8Idx)7066 static E_MVD_Result MVD_FlushSlqTblQueue(MS_U8 u8Idx)
7067 {
7068 MS_U32 u32TimeCnt;
7069 MS_U32 u32PatternByteCnt = 0;
7070 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7071 MS_U32 u32Id = MVD_GetStreamId(u8Idx);
7072 MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
7073 #ifdef VDEC3
7074 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7075 MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
7076 #endif
7077 HAL_MVD_ResetHandShake(u8Idx,MVD_HANDSHAKE_PAUSE);
7078 HAL_MVD_PauseDisp(u8Idx);
7079 HAL_MVD_DecodePause(u8Idx);
7080 HAL_MVD_FlushDisplayBuf(u8Idx);
7081
7082 u32TimeCnt = HAL_MVD_GetTime();
7083 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS) ||
7084 (TRUE != MVD_PatternLenIsValid(u8Idx, u32PatternByteCnt)))
7085 {
7086 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
7087 {
7088 MVD_DEBUGINFO(MVD_PRINT("\nPause finished!\n"));
7089 break;
7090 }
7091
7092 #ifdef VDEC3
7093 if(pstCtrlCfg->u8McuMode == TRUE)
7094 {
7095 if(HAL_VPU_EX_GetVBBUVacancy(u32VBBUAddr) > 0)
7096 {
7097 HAL_VPU_EX_PacketInfo stVpuPkt;
7098 MVD_PacketInfo stDummyPkt;
7099 MVD_SLQTblGetDummyPkt(&stDummyPkt);
7100
7101 stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
7102 stVpuPkt.u32Length = stDummyPkt.u32Length;
7103 stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
7104 //If in display queue mode
7105 stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
7106 stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
7107 stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
7108
7109 HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
7110 }
7111 }
7112 else
7113 #endif
7114 {
7115 if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
7116 {
7117 HAL_MVD_GetQueueVacancy(u8Idx, FALSE); //update pstSlqTblInfo->pDrvSlqTbl->u32Empty
7118 HAL_MVD_Delayms(1); //avoid busy query
7119 }
7120 //insert dummy pattern
7121 if (TRUE == HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FLUSH))
7122 {
7123 u32PatternByteCnt += DUMMY_SIZE*2; //2 dummy were inserted
7124 }
7125 }
7126
7127
7128 //Timeout for RCV
7129 if ((HAL_MVD_GetTime() - u32TimeCnt) > (CMD_TIMEOUT_MS*10))
7130 {
7131 MVD_DEBUGERROR(MVD_PRINT("RCV timeout!!! pl=%d, pbc=%d, emp=%ld\n",
7132 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt,
7133 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
7134 break;
7135 }
7136 }
7137 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7138 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7139 //if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
7140 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
7141 {
7142 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue PAUSE TIMEOUT!!! *****\n\n"));
7143 MVD_DEBUGERROR(MVD_PRINT("ValidLen=0x%x CurPatternLen=0x%x\n",
7144 HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt));
7145
7146 return E_MVD_RET_FAIL;
7147 }
7148
7149 //flush ES buffer & reset SLQ tbl
7150 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SLQ_RST);
7151 if (HAL_MVD_SlqTblRst(u8Idx) == TRUE)
7152 {
7153 //return E_MVD_RET_OK;
7154 }
7155
7156 u32TimeCnt = HAL_MVD_GetTime();
7157 while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS))
7158 {
7159 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7160 {
7161 MVD_DEBUGINFO(MVD_PRINT("\nSlqRst finished!\n"));
7162 break;
7163 }
7164 }
7165 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7166 u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7167 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7168 {
7169 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue SlqRst TIMEOUT!!! *****\n\n"));
7170 return E_MVD_RET_FAIL;
7171 }
7172
7173 HAL_MVD_SLQTblInit(u8Idx); //reset related buffers
7174
7175 return E_MVD_RET_OK;
7176 }
7177
HAL_MVD_FlushQueue(MS_U8 u8Idx)7178 E_MVD_Result HAL_MVD_FlushQueue(MS_U8 u8Idx)
7179 {
7180 E_MVD_Result eRet = E_MVD_RET_OK;
7181 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
7182
7183 if (HAL_MVD_GetDecodeStatus(u8Idx) == E_MVD_STAT_IDLE)
7184 {
7185 return eRet;
7186 }
7187
7188 //flush ES buffer (and cmd queue if used)
7189 if (E_MVD_SLQ_TBL_MODE == curSrcMode)
7190 {
7191 eRet = MVD_FlushSlqTblQueue(u8Idx);
7192 }
7193 else if (E_MVD_TS_FILE_MODE == curSrcMode)
7194 {
7195 eRet = MVD_FlushTSQueue(u8Idx);
7196 }
7197 if (E_MVD_RET_OK != eRet)
7198 {
7199 return eRet;
7200 }
7201
7202 MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
7203 //flush display buffer
7204
7205 if (HAL_MVD_FlushDisplayBuf(u8Idx) != TRUE)
7206 {
7207 return E_MVD_RET_FAIL;
7208 }
7209
7210 if (TRUE == HAL_MVD_SkipToIFrame(u8Idx))
7211 {
7212 return E_MVD_RET_OK;
7213 }
7214 else
7215 {
7216 return E_MVD_RET_FAIL;
7217 }
7218 }
7219
HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)7220 MS_BOOL HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)
7221 {
7222 return HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
7223 }
7224
HAL_MVD_EnableInt(MS_U8 u8Idx,MS_U32 bEn)7225 MS_BOOL HAL_MVD_EnableInt(MS_U8 u8Idx, MS_U32 bEn)
7226 {
7227 MVD_CmdArg mvdcmd;
7228 MS_U32 u32IntFlag = 0;
7229
7230 u32IntFlag = (((bEn & E_MVD_EVENT_USER_DATA) == E_MVD_EVENT_USER_DATA) ? INT_USER_DATA : 0) |
7231 (((bEn & E_MVD_EVENT_USER_DATA_DISP) == E_MVD_EVENT_USER_DATA_DISP) ? INT_USER_DATA_DISP : 0) |
7232 (((bEn & E_MVD_EVENT_PIC_FOUND) == E_MVD_EVENT_PIC_FOUND) ? INT_PIC_FOUND : 0) |
7233 (((bEn & E_MVD_EVENT_FIRST_FRAME) == E_MVD_EVENT_FIRST_FRAME) ? INT_FIRST_FRAME : 0) |
7234 (((bEn & E_MVD_EVENT_DISP_RDY) == E_MVD_EVENT_DISP_RDY) ? INT_DISP_RDY : 0) |
7235 (((bEn & E_MVD_EVENT_SEQ_FOUND) == E_MVD_EVENT_SEQ_FOUND) ? INT_SEQ_FOUND : 0)|
7236 (((bEn & E_MVD_EVENT_DEC_ONE_FRAME) == E_MVD_EVENT_DEC_ONE_FRAME) ? INT_DEC_DONE : 0)|
7237 (((bEn & E_MVD_EVENT_DEC_ERR) == E_MVD_EVENT_DEC_ERR) ? INT_DEC_ERR : 0)|
7238 (((bEn & E_MVD_EVENT_DEC_DATA_ERR) == E_MVD_EVENT_DEC_DATA_ERR) ? INT_VES_INVALID : 0)|
7239 (((bEn & E_MVD_EVENT_XC_LOW_DEALY) == E_MVD_EVENT_XC_LOW_DEALY) ? INT_XC_LOW_DELAY : 0)|
7240 (((bEn & E_MVD_EVENT_DEC_I) == E_MVD_EVENT_DEC_I) ? INT_DEC_I : 0);
7241 if (((bEn & E_MVD_EVENT_DISP_VSYNC) == E_MVD_EVENT_DISP_VSYNC) ||
7242 ((bEn & E_MVD_EVENT_UNMUTE) == E_MVD_EVENT_UNMUTE))
7243 {
7244 u32IntFlag |= INT_DISP_VSYNC;
7245 }
7246
7247 MVD_DEBUGINFO(MVD_PRINT("u32IntFlag = 0x%x\n", u32IntFlag));
7248 SETUP_CMDARG(mvdcmd);
7249 mvdcmd.Arg0 = u32IntFlag & 0xff;
7250 mvdcmd.Arg1 = (u32IntFlag>>8) & 0xff;
7251 mvdcmd.Arg2 = (u32IntFlag>>16) & 0xff;
7252 SET_DECNUM(mvdcmd, u8Idx);
7253 SET_CMD_RET_FALSE(CMD_ENABLE_INT_STAT, &mvdcmd);
7254
7255 return TRUE;
7256 }
7257
HAL_MVD_EnablePTSDetector(MS_U8 u8Idx,MS_BOOL bEn)7258 E_MVD_Result HAL_MVD_EnablePTSDetector(MS_U8 u8Idx, MS_BOOL bEn)
7259 {
7260 MVD_CmdArg stCmdArg;
7261
7262 SETUP_CMDARG(stCmdArg);
7263 if(TRUE == bEn)
7264 {
7265 stCmdArg.Arg0 = 1;
7266 }
7267 SET_DECNUM(stCmdArg, u8Idx);
7268 if (HAL_MVD_MVDCommand(CMD_PTS_DETECTOR_EN, &stCmdArg) == FALSE)
7269 {
7270 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7271 return E_MVD_RET_FAIL;
7272 }
7273 return E_MVD_RET_OK;
7274 }
7275
HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx,MS_BOOL bEn)7276 E_MVD_Result HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx, MS_BOOL bEn)
7277 {
7278 MVD_CmdArg stCmdArg;
7279
7280 SETUP_CMDARG(stCmdArg);
7281 if(TRUE == bEn)
7282 {
7283 stCmdArg.Arg0 = 1;
7284 }
7285 SET_DECNUM(stCmdArg, u8Idx);
7286 if (HAL_MVD_MVDCommand(CMD_DISABLE_PATCH_PBFRAME, &stCmdArg) == FALSE)
7287 {
7288 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7289 return E_MVD_RET_FAIL;
7290 }
7291 return E_MVD_RET_OK;
7292 }
7293
HAL_MVD_EnableDispOneField(MS_U8 u8Idx,MS_BOOL bEn)7294 E_MVD_Result HAL_MVD_EnableDispOneField(MS_U8 u8Idx, MS_BOOL bEn)
7295 {
7296 MVD_CmdArg stCmdArg;
7297
7298 SETUP_CMDARG(stCmdArg);
7299 if(TRUE == bEn)
7300 {
7301 stCmdArg.Arg0 = 1;
7302 }
7303 SET_DECNUM(stCmdArg, u8Idx);
7304 if (HAL_MVD_MVDCommand(CMD_SHOW_ONE_FIELD, &stCmdArg) == FALSE)
7305 {
7306 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SHOW_ONE_FIELD ) );
7307 return E_MVD_RET_FAIL;
7308 }
7309 return E_MVD_RET_OK;
7310 }
7311
HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx,MS_U16 u16Cnt)7312 E_MVD_Result HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx, MS_U16 u16Cnt)
7313 {
7314 MVD_CmdArg stCmdArg;
7315
7316 SETUP_CMDARG(stCmdArg);
7317 //16bits and unit in vsync for mute the fd_mask
7318 stCmdArg.Arg0 = u16Cnt & 0xff;
7319 stCmdArg.Arg1 = (u16Cnt>>8) & 0xff;
7320 SET_DECNUM(stCmdArg, u8Idx);
7321 if (HAL_MVD_MVDCommand(CMD_FD_MASK_DELAY_CNT, &stCmdArg) == FALSE)
7322 {
7323 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FD_MASK_DELAY_CNT ) );
7324 return E_MVD_RET_FAIL;
7325 }
7326 return E_MVD_RET_OK;
7327 }
7328
HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx,MS_U8 u8FrameRate,MS_U8 u8Interlace)7329 E_MVD_Result HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx, MS_U8 u8FrameRate, MS_U8 u8Interlace)
7330 {
7331 MVD_CmdArg stCmdArg;
7332 if((u8Interlace != 0) && (u8Interlace != 1))
7333 {
7334 return E_MVD_RET_FAIL;
7335 }
7336 SETUP_CMDARG(stCmdArg);
7337 stCmdArg.Arg0 = u8FrameRate;
7338 stCmdArg.Arg1 = u8Interlace;
7339 SET_DECNUM(stCmdArg, u8Idx);
7340 if (HAL_MVD_MVDCommand(CMD_FRC_OUPUT, &stCmdArg) == FALSE)
7341 {
7342 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_OUPUT ) );
7343 return E_MVD_RET_FAIL;
7344 }
7345 return E_MVD_RET_OK;
7346 }
7347
7348
HAL_MVD_SetFRCDropType(MS_U8 u8Idx,MS_U8 u8DropType)7349 E_MVD_Result HAL_MVD_SetFRCDropType(MS_U8 u8Idx, MS_U8 u8DropType)
7350 {
7351 MVD_CmdArg stCmdArg;
7352
7353 if((u8DropType != FRC_DROP_FRAME)
7354 && (u8DropType != FRC_DROP_FIELD))
7355 {
7356 return E_MVD_RET_FAIL;
7357 }
7358
7359 SETUP_CMDARG(stCmdArg);
7360 stCmdArg.Arg0 = u8DropType;
7361 SET_DECNUM(stCmdArg, u8Idx);
7362 if (HAL_MVD_MVDCommand(CMD_FRC_DROP_BEHAVIOR, &stCmdArg) == FALSE)
7363 {
7364 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_DROP_BEHAVIOR ) );
7365 return E_MVD_RET_FAIL;
7366 }
7367 return E_MVD_RET_OK;
7368 }
7369
HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx,MS_BOOL bEnable)7370 E_MVD_Result HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx, MS_BOOL bEnable)
7371 {
7372 MVD_CmdArg stCmdArg;
7373
7374 SETUP_CMDARG(stCmdArg);
7375 stCmdArg.Arg0 = bEnable;
7376 SET_DECNUM(stCmdArg, u8Idx);
7377 if (HAL_MVD_MVDCommand(CMD_FORBID_RESOLUTION_CHANGE, &stCmdArg) == FALSE)
7378 {
7379 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FORBID_RESOLUTION_CHANGE ) );
7380 return E_MVD_RET_FAIL;
7381 }
7382 MVD_DEBUGINFO(MVD_PRINT("MVD CMD_FORBID_RESOLUTION_CHANGE(0x%x) OK\n", bEnable));
7383
7384 return E_MVD_RET_OK;
7385 }
7386
HAL_MVD_DbgGetData(MS_VIRT u32Addr,MS_U32 * u32Data)7387 E_MVD_Result HAL_MVD_DbgGetData(MS_VIRT u32Addr, MS_U32* u32Data)
7388 {
7389 MVD_CmdArg mvdcmd;
7390 MS_U32 u32Val;
7391
7392 if (!u32Data)
7393 {
7394 return E_MVD_RET_INVALID_PARAM;
7395 }
7396
7397 SET_CMDARG(mvdcmd, u32Addr, 0); //FIXME
7398 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7399 {
7400 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
7401 return E_MVD_RET_FAIL;
7402 }
7403
7404 u32Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7405 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7406 *u32Data = u32Val;
7407
7408 return E_MVD_RET_OK;
7409 }
7410
7411
HAL_MVD_DbgDumpBits(MS_U8 u8Idx,MS_PHY u32base,MS_U32 u32size)7412 void HAL_MVD_DbgDumpBits(MS_U8 u8Idx, MS_PHY u32base, MS_U32 u32size)
7413 {
7414 MVD_CmdArg mvdcmd;
7415
7416 u32base = HAL_MVD_GetMemOffset(u32base);
7417 MVD_PRINT("%s base=0x%lx size=0x%x\n", __FUNCTION__, (unsigned long)u32base, u32size);
7418 MS_ASSERT((u32base%8)==0);
7419 u32base >>= 3;
7420 SET_CMDARG(mvdcmd, u32base, u8Idx);
7421 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_BASE, &mvdcmd ) == FALSE)
7422 {
7423 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_BASE ) );
7424 return;
7425 }
7426
7427 MS_ASSERT((u32size%8)==0);
7428 u32size >>= 3;
7429 SET_CMDARG(mvdcmd, u32size, u8Idx);
7430 if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_LENGTH, &mvdcmd ) == FALSE)
7431 {
7432 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_LENGTH ) );
7433 return;
7434 }
7435 return;
7436 }
7437
7438
HAL_MVD_GetActiveFormat(MS_U8 u8Idx)7439 MS_U8 HAL_MVD_GetActiveFormat(MS_U8 u8Idx)
7440 {
7441 MVD_CmdArg mvdcmd;
7442 MS_U8 u8Afd = 0;
7443
7444 SETUP_CMDARG(mvdcmd);
7445 SET_DECNUM(mvdcmd, u8Idx);
7446 if (HAL_MVD_MVDCommand( CMD_GET_AFD, &mvdcmd ) == FALSE)
7447 {
7448 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_AFD ) );
7449 return 0xff;
7450 }
7451 u8Afd = mvdcmd.Arg0;
7452 return u8Afd;
7453 }
7454
HAL_MVD_EnableAVSync(MS_U8 u8Idx,MS_BOOL bEnable)7455 MS_BOOL HAL_MVD_EnableAVSync(MS_U8 u8Idx, MS_BOOL bEnable)
7456 {
7457 MVD_CmdArg mvdcmd;
7458 SETUP_CMDARG(mvdcmd);
7459 mvdcmd.Arg0 = bEnable;
7460 SET_DECNUM(mvdcmd, u8Idx);
7461 SET_CMD_RET_FALSE(CMD_SYNC_ON, &mvdcmd);
7462
7463 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7464 pCtrlCfg->bAVSyncOn = bEnable;
7465
7466 return TRUE;
7467 }
7468
HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx,MS_U32 u32Delay)7469 MS_BOOL HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx, MS_U32 u32Delay)
7470 {
7471 MVD_CmdArg mvdcmd;
7472 SET_CMDARG(mvdcmd, _MS_TO_90K(u32Delay), u8Idx); //u32Delay ms ==> 90k counter
7473 SET_CMD_RET_FALSE(CMD_SYNC_OFFSET, &mvdcmd);
7474 return TRUE;
7475 }
7476
HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx,MS_U32 u32Th)7477 MS_BOOL HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7478 {
7479 MVD_CmdArg mvdcmd;
7480
7481 if (u32Th == 0x00)
7482 {
7483 return FALSE; //invalid parameter, do nothing
7484 }
7485 if (u32Th > 0xff)
7486 {
7487 u32Th = 0xff; //set to maximum
7488 }
7489
7490 SETUP_CMDARG(mvdcmd);
7491 mvdcmd.Arg3 = u32Th;
7492 SET_DECNUM(mvdcmd, u8Idx);
7493 SET_CMD_RET_FALSE(CMD_SYN_THRESHOLD, &mvdcmd);
7494 return TRUE;
7495 }
7496
HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx,MS_U32 u32Th)7497 MS_BOOL HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7498 {
7499 MVD_CmdArg mvdcmd;
7500 SET_CMDARG(mvdcmd, u32Th, u8Idx);
7501 SET_CMD_RET_FALSE(CMD_AVSYNC_FREERUN_THRESHOLD, &mvdcmd);
7502 return TRUE;
7503 }
7504
HAL_MVD_ChangeAVsync(MS_U8 u8Idx,MS_BOOL bEnable,MS_U16 u16PTS)7505 MS_BOOL HAL_MVD_ChangeAVsync(MS_U8 u8Idx, MS_BOOL bEnable, MS_U16 u16PTS)
7506 {
7507 MVD_CmdArg mvdcmd;
7508
7509 u16PTS = _MS_TO_90K(u16PTS); //u16PTS ms ==> 90k counter
7510 SETUP_CMDARG(mvdcmd);
7511 mvdcmd.Arg0 = (MS_U8)bEnable;
7512 mvdcmd.Arg1 = 0;
7513 mvdcmd.Arg2 = (MS_U8)(u16PTS&0xff);
7514 mvdcmd.Arg3 = (MS_U8)((u16PTS&0xff00)>>8);
7515 SET_DECNUM(mvdcmd, u8Idx);
7516 SET_CMD_RET_FALSE(CMD_MVD_FAST_INT, &mvdcmd);
7517 return TRUE;
7518 }
7519
HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)7520 MS_BOOL HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)
7521 {
7522 MS_U32 u32IntStat = 0;
7523 MS_BOOL bRet = FALSE;
7524
7525 u32IntStat = HAL_MVD_GetIntState(u8Idx);
7526 if (u32IntStat != 0)
7527 {
7528 bRet = ((u32IntStat&INT_SYN_REP)==INT_SYN_REP) ? TRUE : FALSE;
7529 }
7530 return bRet;
7531 }
7532
HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)7533 MS_BOOL HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)
7534 {
7535 MS_U32 u32IntStat = 0;
7536 MS_BOOL bRet = FALSE;
7537
7538 u32IntStat = HAL_MVD_GetIntState(u8Idx);
7539 if (u32IntStat != 0)
7540 {
7541 bRet = ((u32IntStat&INT_SYN_SKIP)==INT_SYN_SKIP) ? TRUE : FALSE;
7542 }
7543
7544 return bRet;
7545 }
7546
HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)7547 MS_U8 HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)
7548 {
7549 #define MVD_SYNC_DONE 1
7550 if(MVD_GetSyncStat(u8Idx, 1) == MVD_SYNC_DONE)
7551 return 1;
7552 else
7553 return 0xFF;
7554 }
7555
HAL_MVD_GetDispRdy(MS_U8 u8Idx)7556 MS_U8 HAL_MVD_GetDispRdy(MS_U8 u8Idx)
7557 {
7558 //if (HAL_MVD_GetPicCounter(u8Idx) > 0)
7559 if(HAL_MVD_IsSeqHeaderFound(u8Idx))
7560 {
7561 return 1;
7562 }
7563 else
7564 {
7565 return 0;
7566 }
7567 }
7568
HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)7569 MVD_DecStat HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)
7570 {
7571 MVD_CmdArg mvdcmd;
7572 MVD_DecStat stat = E_MVD_STAT_UNKNOWN;
7573
7574 SETUP_CMDARG(mvdcmd);
7575 SET_DECNUM(mvdcmd, u8Idx);
7576 if (HAL_MVD_MVDCommand(CMD_DECODE_STATUS, &mvdcmd) == FALSE)
7577 {
7578 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7579 return E_MVD_STAT_UNKNOWN;
7580 }
7581
7582 switch(mvdcmd.Arg1)
7583 {
7584 case DEC_STAT_IDLE:
7585 stat = E_MVD_STAT_IDLE;
7586 break;
7587 case DEC_STAT_FIND_SC:
7588 stat = E_MVD_STAT_FIND_STARTCODE;
7589 break;
7590 case DEC_STAT_FIND_SPE_SC:
7591 stat = E_MVD_STAT_FIND_SPECIALCODE;
7592 break;
7593 case DEC_STAT_FIND_FRAMEBUFFER:
7594 stat = E_MVD_STAT_FIND_FRAMEBUFFER;
7595 break;
7596 case DEC_STAT_WAIT_DECODE_DONE:
7597 stat = E_MVD_STAT_WAIT_DECODEDONE;
7598 break;
7599 case DEC_STAT_DECODE_DONE:
7600 stat = E_MVD_STAT_DECODE_DONE;
7601 break;
7602 case DEC_STAT_WAIT_VDFIFO:
7603 stat = E_MVD_STAT_WAIT_VDFIFO;
7604 break;
7605 case DEC_STAT_INIT_SUCCESS:
7606 stat = E_MVD_STAT_INIT_SUCCESS;
7607 break;
7608 default:
7609 break;
7610 }
7611
7612 return stat;
7613 }
7614
HAL_MVD_GetLastCmd(MS_U8 u8Idx)7615 MS_U8 HAL_MVD_GetLastCmd(MS_U8 u8Idx)
7616 {
7617 MVD_CmdArg mvdcmd;
7618 SETUP_CMDARG(mvdcmd);
7619 SET_DECNUM(mvdcmd, u8Idx);
7620 if (HAL_MVD_MVDCommand( CMD_DECODE_STATUS, &mvdcmd ) == FALSE)
7621 {
7622 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7623 return 0xff;
7624 }
7625
7626 return (mvdcmd.Arg0);
7627 }
7628
HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)7629 MS_U32 HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)
7630 {
7631 MVD_CmdArg mvdcmd;
7632 MS_U32 u32Cnt = 0;
7633
7634 SETUP_CMDARG(mvdcmd);
7635
7636 //To be accurate, it's "VLD byte count", instead of "parser byte count".
7637 mvdcmd.Arg0 = 0x34;
7638 mvdcmd.Arg1 = 0x2;
7639 SET_DECNUM(mvdcmd, u8Idx);
7640 if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7641 {
7642 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_RD_IO ) );
7643 return 0;
7644 }
7645 u32Cnt = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7646 (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7647
7648 //MVD_PRINT(" parser byte count = %lu byte \n", u32Cnt);
7649 return u32Cnt;
7650 }
7651
HAL_MVD_DropErrorFrame(MS_U8 u8Idx,MS_BOOL bDrop)7652 MS_BOOL HAL_MVD_DropErrorFrame(MS_U8 u8Idx, MS_BOOL bDrop)
7653 {
7654 MVD_CmdArg mvdcmd;
7655 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7656
7657 SETUP_CMDARG(mvdcmd);
7658 mvdcmd.Arg1 = (MS_U8)bDrop;
7659 mvdcmd.Arg2 = (MS_U8)pstCtrlCfg->bDropDispfrm;
7660 mvdcmd.Arg3 = (MS_U8)pstCtrlCfg->eFrcMode;
7661 SET_DECNUM(mvdcmd, u8Idx);
7662 SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
7663 return TRUE;
7664 }
7665
HAL_MVD_SetDivXCfg(MS_U8 u8Idx,MS_U8 u8MvAdjust,MS_U8 u8IdctSel)7666 void HAL_MVD_SetDivXCfg(MS_U8 u8Idx, MS_U8 u8MvAdjust, MS_U8 u8IdctSel)
7667 {
7668 MVD_CmdArg stCmdArg;
7669
7670 SETUP_CMDARG(stCmdArg);
7671 stCmdArg.Arg0 = u8MvAdjust;
7672 SET_DECNUM(stCmdArg, u8Idx);
7673 if (HAL_MVD_MVDCommand(CMD_DIVX_PATCH, &stCmdArg) == FALSE)
7674 {
7675 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIVX_PATCH ) );
7676 return;
7677 }
7678
7679 SETUP_CMDARG(stCmdArg);
7680 stCmdArg.Arg0 = u8IdctSel;
7681 SET_DECNUM(stCmdArg, u8Idx);
7682 if (HAL_MVD_MVDCommand(CMD_IDCT_SEL, &stCmdArg) == FALSE)
7683 {
7684 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IDCT_SEL ) );
7685 return;
7686 }
7687
7688 return;
7689 }
7690
7691 #define _IsNotInStreamBuff(x) \
7692 (((x) < pstMemCfg->u32DrvBufSize) || \
7693 ((x) > pstMemCfg->u32BSSize) )
7694
7695 //------------------------------------------------------------------------------
7696 /// Get read pointer in ElementaryStream buffer for SLQ table mode
7697 /// @return -the read pointer
7698 //------------------------------------------------------------------------------
MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)7699 MS_VIRT MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)
7700 {
7701 MS_U32 u32Idx;
7702 MS_U32 u32SlqRp = 0, u32SlqRp1 = 0;
7703 MS_VIRT u32EsRp;
7704 MS_VIRT u32EsStart;
7705 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7706 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7707 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7708
7709 u32SlqRp1 = HAL_MVD_GetSLQReadPtr(u8Idx);
7710
7711 if (u32SlqRp1 == 0)
7712 {
7713 return MVD_U32_MAX;
7714 }
7715 else
7716 {
7717 u32SlqRp = HAL_MVD_Map2DrvSlqTbl(u8Idx, u32SlqRp1);
7718 }
7719
7720 pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = u32SlqRp; //update pstSlqTblInfo->pDrvSlqTbl->u32RdPtr
7721
7722 //report (readPtr-1) for HW may still use (readPtr)
7723 if (u32SlqRp > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7724 {
7725 u32Idx = ((u32SlqRp - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7726 }
7727 else
7728 {
7729 u32Idx = SLQ_ENTRY_MAX - 1;
7730 }
7731 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7732
7733 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7734 #if 0
7735 MS_U32 u32EsEnd;
7736 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
7737 MVD_PRINT("GetESReadPtr ES[%x] Start=0x%x End=0x%x u32EsRp=%x u32SlqRp=%x\n",
7738 u32Idx, HAL_MVD_MemRead4Byte(u32EsRp), u32EsEnd, u32EsRp, u32SlqRp);
7739 #endif
7740
7741 if ((_IsNotInStreamBuff(u32EsStart)) && (u32EsStart != 0))
7742 { //ESRead is not in BS buffer, so this entry is a divx or dummy pattern.
7743 //Report the last ESRead, instead of this one.
7744 if(curCodecType == E_MVD_CODEC_DIVX311)
7745 {
7746 //update last slq index es end address
7747 if(u32Idx == 0)
7748 {
7749 u32Idx = SLQ_ENTRY_MAX-1;
7750 }
7751 else
7752 {
7753 u32Idx = u32Idx-1;
7754 }
7755 u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7756 u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7757 if(_IsNotInStreamBuff(u32EsStart))
7758 {
7759 return (pstSlqTblInfo->u32PreEsRd);
7760 }
7761 }
7762 else
7763 {
7764 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsRd=0x%lx\n", (unsigned long)u32EsStart, (unsigned long)pstSlqTblInfo->u32PreEsRd));
7765 return (pstSlqTblInfo->u32PreEsRd);
7766 }
7767 }
7768 pstSlqTblInfo->u32PreEsRd = u32EsStart;
7769
7770 return u32EsStart;
7771 }
7772
7773 //------------------------------------------------------------------------------
7774 /// Get write pointer in ElementaryStream buffer for SLQ table mode
7775 /// @return -the read pointer
7776 //------------------------------------------------------------------------------
MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)7777 MS_VIRT MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)
7778 {
7779 MS_VIRT u32EsWp;
7780 MS_VIRT u32EsEnd;
7781 MS_U32 u32Idx;
7782 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7783 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7784
7785 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7786 {
7787 u32Idx = ((pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7788 }
7789 else
7790 {
7791 u32Idx = SLQ_ENTRY_MAX - 1;
7792 }
7793 u32EsWp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7794
7795 u32EsEnd = HAL_MVD_MemRead4Byte(u32EsWp+4);
7796 #if 0
7797 MVD_PRINT("GetESWritePtr[%x] ES Start=0x%x End=0x%x u32EsWp=%x\n",
7798 (u32EsWp - pstSlqTblInfo->pDrvEsTbl->u32StAdd)/8,
7799 HAL_MVD_MemRead4Byte(u32EsWp), u32EsEnd, u32EsWp);
7800 #endif
7801
7802 if ((_IsNotInStreamBuff(u32EsEnd)) && (u32EsEnd != 0))
7803 { //ESRead is not in BS buffer, so this entry is a divx pattern.
7804 //Report the last ESRead, instead of this one.
7805 MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsWr=0x%lx\n", (unsigned long)u32EsEnd, (unsigned long)pstSlqTblInfo->u32PreEsWr));
7806 return (pstSlqTblInfo->u32PreEsWr);
7807 }
7808 pstSlqTblInfo->u32PreEsWr = u32EsEnd;
7809
7810 return u32EsEnd;
7811 }
7812
7813
HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)7814 MS_VIRT HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)
7815 {
7816 MS_VIRT u32RdPtr = 0;
7817
7818 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7819 {
7820 #ifndef VDEC3
7821 MVD_CmdArg mvdcmd;
7822 SETUP_CMDARG(mvdcmd);
7823 SET_DECNUM(mvdcmd, u8Idx);
7824 if (HAL_MVD_MVDCommand( CMD_SLQ_GET_TBL_RPTR, &mvdcmd ) == FALSE)
7825 {
7826 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_GET_TBL_RPTR ) );
7827 return 0;
7828 }
7829 u32RdPtr = mvdcmd.Arg0 | (mvdcmd.Arg1<<8) | (mvdcmd.Arg2<<16) | (mvdcmd.Arg3<<24);
7830 #else
7831 u32RdPtr = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SLQ_TBL_RPTR, sizeof(MS_U32));
7832 #endif
7833 }
7834 else
7835 {
7836 u32RdPtr = HAL_MVD_SlqTblProbeRdPtr(u8Idx);
7837 }
7838
7839 //MVD_PRINT("##### HAL_MVD_GetSLQReadPtr 0x%x\n", readPtr);
7840
7841 if(u32RdPtr == 0)//not start decode yet,MVD return 0
7842 {
7843 u32RdPtr = 0;
7844 }
7845 else
7846 {
7847 u32RdPtr = u32RdPtr << 3;
7848 }
7849
7850 return u32RdPtr;
7851 }
7852
7853
HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx,MS_BOOL bCheckData)7854 MS_BOOL HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx, MS_BOOL bCheckData)
7855 {
7856 MVD_CmdArg mvdcmd;
7857 MS_VIRT u32WrPtr;
7858 MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7859 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7860 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7861
7862 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7863 {
7864 //check FW is init success and thus ready to update write pointer
7865 MS_U32 u32TimeCnt;
7866
7867 u32TimeCnt = HAL_MVD_GetTime();
7868 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
7869 {
7870 if (HAL_MVD_GetDecodeStatus(u8Idx) != E_MVD_STAT_IDLE)
7871 {
7872 pstSlqTblInfo->bRdyToFireCmd = TRUE;
7873 MVD_DEBUGVERBAL(MVD_PRINT("time=0x%x ms, ", (HAL_MVD_GetTime() - u32TimeCnt)));
7874 break;
7875 }
7876 }
7877 if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7878 {
7879 MVD_DEBUGERROR(MVD_PRINT("%s: err timeout(%d)! stat=0x%x\n", __FUNCTION__,
7880 HAL_MVD_GetTime() - u32TimeCnt, HAL_MVD_GetDecodeStatus(u8Idx)));
7881 return FALSE;
7882 }
7883 else
7884 {
7885 MVD_DEBUGVERBAL(MVD_PRINT("%s: ready to update WrPtr.\n", __FUNCTION__));
7886 }
7887 }
7888
7889
7890 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr < pstSlqTblInfo->pDrvSlqTbl->u32EndAdd);
7891 MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7892 #if SLQ_NEW_PUSH
7893 if((!pstSlqTblInfo->pSlqStatus->bSlqFireRdy)&&pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7894 {
7895 MVD_DEBUGINFO(MVD_PRINT("**** pstSlqTblInfo->pSlqStatus->bSlqFireRdy is not Ready ** \n"));
7896 return FALSE;
7897 }
7898 pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
7899 #endif
7900 if ((bCheckData==TRUE) && (FALSE==pstSlqTblInfo->bSlqTblHasValidData))
7901 {
7902 MVD_DEBUGINFO(MVD_PRINT("**** SlqWrPtr(0x%lx) is not update!(%x, %x) ****\n",
7903 (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, bCheckData, pstSlqTblInfo->bSlqTblHasValidData));
7904 return FALSE;
7905 }
7906 pstSlqTblInfo->bSlqTblHasValidData = FALSE;
7907
7908 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
7909 {
7910 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
7911 }
7912 else
7913 {
7914 u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7915 }
7916
7917 if (pstCtrlCfg->bSlqTblSync)
7918 {
7919 //Update SLQ table, DivX311 patterns, and dummy patterns to bitstream buffer
7920 MS_VIRT u32SrcOffset = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7921 MS_VIRT u32SrcAdd = u32SrcOffset;
7922 MS_VIRT u32DstAdd = pstMemCfg->u32BSAddr;
7923 MS_VIRT u32DstOffset = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
7924 MS_VIRT u32TblWr;
7925
7926 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32SrcOffset,u32SrcAdd);
7927
7928
7929 HAL_MVD_CPU_Sync();
7930
7931 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
7932 BDMA_Result bdmaRlt;
7933
7934 bdmaRlt = MDrv_BDMA_CopyHnd(u32SrcAdd, u32DstAdd, pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType, BDMA_OPCFG_DEF);
7935
7936 if (E_BDMA_OK != bdmaRlt)
7937 {
7938 MVD_DEBUGERROR(MVD_PRINT("%s MDrv_BDMA_MemCopy fail ret=%x!\n", __FUNCTION__, bdmaRlt));
7939 }
7940 #endif
7941 MVD_DEBUGINFO(MVD_PRINT("SlqWrPtr_BDMA src=0x%lx dst=0x%lx size=0x%lx cpyType=0x%x\n",
7942 (unsigned long)u32SrcAdd, (unsigned long)u32DstAdd, (unsigned long)pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType));
7943
7944 u32TblWr = u32DstOffset + (u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7945
7946 u32WrPtr = u32TblWr;
7947 }
7948 //MVD_PRINT("wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x)\n", writePtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
7949 // HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
7950
7951
7952 //writePtrLast[u8Idx] = u32WrPtr;
7953 #if SLQ_NEW_PUSH
7954 if(!pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow && pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7955 {
7956 u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
7957 }
7958 #endif
7959 MS_ASSERT((u32WrPtr%8)==0);
7960 u32WrPtr >>= 3;
7961
7962 if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7963 {
7964 SET_CMDARG(mvdcmd, u32WrPtr, u8Idx);
7965 HAL_MVD_CPU_Sync();
7966 SET_CMD_RET_FALSE(CMD_SLQ_UPDATE_TBL_WPTR, &mvdcmd);
7967 }
7968 else
7969 {
7970 HAL_MVD_SlqTblLoadWrPtr(u8Idx, u32WrPtr);
7971 if (HAL_MVD_SlqTblProbeWrPtr(u8Idx) != u32WrPtr)
7972 {
7973 MVD_DEBUGERROR(MVD_PRINT("Ooops! SlqWrPtr update fail!!! 0x%lx != 0x%lx\n", (unsigned long)HAL_MVD_SlqTblProbeWrPtr(u8Idx), (unsigned long)u32WrPtr));
7974 return FALSE;
7975 }
7976 }
7977
7978 return TRUE;
7979 }
7980
HAL_MVD_SetOverflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7981 void HAL_MVD_SetOverflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7982 {
7983 MVD_CmdArg mvdcmd;
7984
7985 MS_ASSERT((u32Threshold%8)==0);
7986 u32Threshold >>= 3;
7987 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7988 if (HAL_MVD_MVDCommand( CMD_DMA_OVFTH, &mvdcmd ) == FALSE)
7989 {
7990 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_OVFTH ) );
7991 return;
7992 }
7993 return;
7994 }
7995
7996 //------------------------------------------------------------------------------
7997 /// Set bitstream buffer underflow threshold
7998 /// @return -none
7999 //------------------------------------------------------------------------------
HAL_MVD_SetUnderflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)8000 void HAL_MVD_SetUnderflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
8001 {
8002 MVD_CmdArg mvdcmd;
8003
8004 MS_ASSERT((u32Threshold%8)==0);
8005 u32Threshold >>= 3;
8006 SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
8007 if (HAL_MVD_MVDCommand( CMD_DMA_UNFTH, &mvdcmd ) == FALSE)
8008 {
8009 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_UNFTH ) );
8010 return;
8011 }
8012 return;
8013 }
8014
HAL_MVD_GenPattern(MS_U8 u8Idx,MVD_PatternType ePattern,MS_PHY u32PAddr,MS_U32 * pu32Size)8015 MS_BOOL HAL_MVD_GenPattern(MS_U8 u8Idx, MVD_PatternType ePattern, MS_PHY u32PAddr, MS_U32* pu32Size)
8016 {
8017 MS_U8* pu8DummyData = NULL;
8018 MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
8019
8020 if ((!pu32Size) || (*pu32Size < SKIP_PATTERN_SIZE))
8021 {
8022 return FALSE;
8023 }
8024
8025 pu8DummyData = (MS_U8*) HAL_MVD_PA2NonCacheSeg(u32PAddr);
8026
8027 if(pu8DummyData == NULL)
8028 {
8029 MVD_PRINT("%s %d NULL Address\n",__FILE__,__LINE__);
8030 return FALSE;
8031 }
8032
8033 switch (ePattern)
8034 {
8035 case E_MVD_PATTERN_FLUSH:
8036 #if 0
8037 *pu8DummyData = SKIP_PATTERN_0;
8038 pu8DummyData++;
8039 *pu8DummyData = SKIP_PATTERN_1;
8040 *pu32Size = SKIP_PATTERN_SIZE;
8041 #else
8042 pu8DummyData[0] = SKIP_PATTERN_0&0xff;
8043 pu8DummyData[1] = (SKIP_PATTERN_0>>8)&0xff;
8044 pu8DummyData[2] = (SKIP_PATTERN_0>>16)&0xff;
8045 pu8DummyData[3] = (SKIP_PATTERN_0>>24)&0xff;
8046
8047 pu8DummyData[4] = SKIP_PATTERN_1&0xff;
8048 pu8DummyData[5] = (SKIP_PATTERN_1>>8)&0xff;
8049 pu8DummyData[6] = (SKIP_PATTERN_1>>16)&0xff;
8050 pu8DummyData[7] = (SKIP_PATTERN_1>>24)&0xff;
8051
8052 *pu32Size = SKIP_PATTERN_SIZE;
8053 #endif
8054 break;
8055 case E_MVD_PATTERN_FILEEND:
8056 if ((E_MVD_CODEC_FLV == curCodecType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == curCodecType))
8057 {
8058 #if 0
8059 *pu8DummyData = FLV_PATTERN;
8060 pu8DummyData++;
8061 *pu8DummyData = 0xffffffff;
8062 pu8DummyData++;
8063 *pu8DummyData = END_PATTERN_1;
8064 pu8DummyData++;
8065 *pu8DummyData = END_PATTERN_2;
8066 pu8DummyData++;
8067 *pu8DummyData = END_PATTERN_3;
8068 #else
8069 pu8DummyData[0] = FLV_PATTERN&0xff;
8070 pu8DummyData[1] = (FLV_PATTERN>>8)&0xff;
8071 pu8DummyData[2] = (FLV_PATTERN>>16)&0xff;
8072 pu8DummyData[3] = (FLV_PATTERN>>24)&0xff;
8073
8074 pu8DummyData[4] = 0xffffffff&0xff;
8075 pu8DummyData[5] = (0xffffffff>>8)&0xff;
8076 pu8DummyData[6] = (0xffffffff>>16)&0xff;
8077 pu8DummyData[7] = (0xffffffff>>24)&0xff;
8078
8079 pu8DummyData[8] = END_PATTERN_1&0xff;
8080 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
8081 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
8082 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
8083
8084 pu8DummyData[12] = END_PATTERN_2&0xff;
8085 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
8086 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
8087 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
8088
8089 pu8DummyData[16] = END_PATTERN_3&0xff;
8090 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
8091 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
8092 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
8093
8094 #endif
8095
8096 }
8097 else if (E_MVD_CODEC_DIVX311 == curCodecType)
8098 {
8099 #if 0
8100 *pu8DummyData = DIVX_PATTERN;
8101 pu8DummyData++;
8102 *pu8DummyData = 0xffffffff;
8103 pu8DummyData++;
8104 *pu8DummyData = END_PATTERN_1;
8105 pu8DummyData++;
8106 *pu8DummyData = END_PATTERN_2;
8107 pu8DummyData++;
8108 *pu8DummyData = END_PATTERN_3;
8109 #else
8110 pu8DummyData[0] = DIVX_PATTERN&0xff;
8111 pu8DummyData[1] = (DIVX_PATTERN>>8)&0xff;
8112 pu8DummyData[2] = (DIVX_PATTERN>>16)&0xff;
8113 pu8DummyData[3] = (DIVX_PATTERN>>24)&0xff;
8114
8115 pu8DummyData[4] = 0xffffffff&0xff;
8116 pu8DummyData[5] = (0xffffffff>>8)&0xff;
8117 pu8DummyData[6] = (0xffffffff>>16)&0xff;
8118 pu8DummyData[7] = (0xffffffff>>24)&0xff;
8119
8120 pu8DummyData[8] = END_PATTERN_1&0xff;
8121 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
8122 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
8123 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
8124
8125 pu8DummyData[12] = END_PATTERN_2&0xff;
8126 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
8127 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
8128 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
8129
8130 pu8DummyData[16] = END_PATTERN_3&0xff;
8131 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
8132 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
8133 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
8134 #endif
8135 }
8136 else if ((E_MVD_CODEC_MPEG2 == curCodecType)||(E_MVD_CODEC_MPEG4 == curCodecType))
8137 {
8138 #if 0
8139 *pu8DummyData = MPEG_PATTERN_0;
8140 pu8DummyData++;
8141 *pu8DummyData = END_PATTERN_1;
8142 pu8DummyData++;
8143 *pu8DummyData = END_PATTERN_2;
8144 pu8DummyData++;
8145 *pu8DummyData = END_PATTERN_3;
8146 #else
8147 pu8DummyData[0] = MPEG_PATTERN_0&0xff;
8148 pu8DummyData[1] = (MPEG_PATTERN_0>>8)&0xff;
8149 pu8DummyData[2] = (MPEG_PATTERN_0>>16)&0xff;
8150 pu8DummyData[3] = (MPEG_PATTERN_0>>24)&0xff;
8151
8152 pu8DummyData[4] = END_PATTERN_1&0xff;
8153 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8154 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8155 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8156
8157 pu8DummyData[8] = END_PATTERN_2&0xff;
8158 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8159 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8160 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8161
8162 pu8DummyData[12] = END_PATTERN_3&0xff;
8163 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8164 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8165 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8166 #endif
8167 }
8168 else
8169 {
8170 #if 0
8171 *pu8DummyData = END_PATTERN_0;
8172 pu8DummyData++;
8173 *pu8DummyData = END_PATTERN_1;
8174 pu8DummyData++;
8175 *pu8DummyData = END_PATTERN_2;
8176 pu8DummyData++;
8177 *pu8DummyData = END_PATTERN_3;
8178 #else
8179 pu8DummyData[0] = END_PATTERN_0&0xff;
8180 pu8DummyData[1] = (END_PATTERN_0>>8)&0xff;
8181 pu8DummyData[2] = (END_PATTERN_0>>16)&0xff;
8182 pu8DummyData[3] = (END_PATTERN_0>>24)&0xff;
8183
8184 pu8DummyData[4] = END_PATTERN_1&0xff;
8185 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8186 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8187 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8188
8189 pu8DummyData[8] = END_PATTERN_2&0xff;
8190 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8191 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8192 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8193
8194 pu8DummyData[12] = END_PATTERN_3&0xff;
8195 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8196 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8197 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8198 #endif
8199 }
8200 *pu32Size = 16;
8201 break;
8202 default:
8203 break;
8204 }
8205
8206 return TRUE;
8207 }
8208
8209
8210
HAL_MVD_DbgDump(MS_U8 u8Idx)8211 void HAL_MVD_DbgDump(MS_U8 u8Idx)
8212 {
8213 MS_U32 u32VdCnt=0;
8214 //static MS_U32 u32PreVdCnt[MAX_DEC_NUM]= {0, 0};
8215 MS_U32 u32ErrCnt=0;
8216 //static MS_U32 u32PreErrCnt[MAX_DEC_NUM]= {0, 0};
8217 //static MS_BOOL b1stDump[MAX_DEC_NUM]= {TRUE, TRUE};
8218 MVD_FrmInfo stFrm = {_INIT_ADDR, _INIT_ADDR, _INIT_TIMESTAMP, _INIT_ID,
8219 _INIT_ID, _INIT_LEN, _INIT_LEN, _INIT_LEN, 0xff, E_MVD_PIC_UNKNOWN};
8220 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
8221 #ifndef VDEC3
8222 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8223 #endif
8224 if (pMVDHalContext->b1stDump[u8Idx])
8225 {
8226 MVD_FWCfg* pFwCfg = NULL;
8227 pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
8228 MVD_PRINT("curDisablePESParsing = %d\n", pFwCfg->bDisablePESParsing);
8229 pMVDHalContext->b1stDump[u8Idx] = FALSE;
8230 }
8231
8232 u32VdCnt = HAL_MVD_GetParserByteCnt(u8Idx);
8233 u32ErrCnt= HAL_MVD_GetVldErrCount(u8Idx);
8234 MVD_PRINT("input: vfifo=%d(full=%d,empty=%d), vdCnt=%d(%d), vldErr=%d(%d); ",
8235 HAL_MVD_RegReadByte(0x1564)>>6, HAL_MVD_RegReadByte(0x1564)&0x20,
8236 HAL_MVD_RegReadByte(0x1564)&0x10, u32VdCnt, (u32VdCnt-pMVDHalContext->u32PreVdCnt[u8Idx]),
8237 u32ErrCnt, (u32ErrCnt-pMVDHalContext->u32PreErrCnt[u8Idx]));
8238 pMVDHalContext->u32PreVdCnt[u8Idx] = u32VdCnt;
8239 pMVDHalContext->u32PreErrCnt[u8Idx] = u32ErrCnt;
8240
8241 MVD_PRINT("state: fw=0x%x, lastCmd=0x%x, pc=0x%x\n",
8242 HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx), HAL_VPU_EX_GetProgCnt());
8243 MVD_PRINT("cnt: dec=%d, skip=%d, drop=%ld\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetSkipPicCounter(u8Idx), 0x0UL);
8244 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE, &stFrm);
8245 MVD_PRINT("frm Dec Y=%lx UV=%lx Pitch=%x; ", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8246 HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY, &stFrm);
8247 MVD_PRINT("Disp Y=%lx UV=%lx Pitch=%x\n", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8248 if (curSrcMode == E_MVD_SLQ_TBL_MODE)
8249 {
8250 #ifndef VDEC3
8251 MVD_PRINT("fe=%x, rd=%x(%x), wr=%x, empty=%x; ", pstSlqTblInfo->u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
8252 HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty);
8253
8254 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)MVD_GetSlqTblESReadPtr(u8Idx), (unsigned long)MVD_GetSlqTblESWritePtr(u8Idx));
8255 #endif
8256 }
8257 else if (curSrcMode == E_MVD_TS_FILE_MODE)
8258 {
8259 MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)HAL_MVD_GetTsFileESReadPtr(u8Idx), (unsigned long)HAL_MVD_GetTsFileESWritePtr(u8Idx));
8260 }
8261 }
8262
8263 #ifdef MS_DEBUG
8264 #define _STRINGIFY_HAL_SID(x) \
8265 (x==E_HAL_MVD_MAIN_STREAM0)?"E_HAL_MVD_MAIN_STREAM0": \
8266 ((x==E_HAL_MVD_SUB_STREAM0)?"E_HAL_MVD_SUB_STREAM0":"E_HAL_MVD_STREAM_NONE")
MVD_DumpMVDStream(void)8267 void MVD_DumpMVDStream(void)
8268 {
8269 //if (_u8HalDbgLevel == 0) return;
8270 MS_U8 i = 0;
8271 for (i=0; i< MAX_DEC_NUM; i++)
8272 {
8273 MVD_DEBUGINFO(MVD_PRINT("[%d] eStreamId=0x%x(%s) bUsed=0x%x\n", i, pMVDHalContext->_stMVDStream[i].eStreamId,
8274 _STRINGIFY_HAL_SID(pMVDHalContext->_stMVDStream[i].eStreamId), pMVDHalContext->_stMVDStream[i].bUsed));
8275 }
8276 }
8277 #endif
HAL_MVD_Init_Share_Mem(void)8278 MS_BOOL HAL_MVD_Init_Share_Mem(void)
8279 {
8280 #if (defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS) || defined(MSOS_TYPE_LINUX_KERNEL))
8281 #if !defined(SUPPORT_X_MODEL_FEATURE)
8282 MS_U32 u32ShmId;
8283 MS_VIRT u32Addr;
8284 MS_U32 u32BufSize;
8285
8286
8287 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux MVD HAL",
8288 sizeof(MVD_Hal_CTX),
8289 &u32ShmId,
8290 &u32Addr,
8291 &u32BufSize,
8292 MSOS_SHM_QUERY))
8293 {
8294 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVD HAL",
8295 sizeof(MVD_Hal_CTX),
8296 &u32ShmId,
8297 &u32Addr,
8298 &u32BufSize,
8299 MSOS_SHM_CREATE))
8300 {
8301 MVD_PRINT("[%s]SHM allocation failed!!! use global structure instead!!!\n",__FUNCTION__);
8302 if(pMVDHalContext == NULL)
8303 {
8304 pMVDHalContext = &gMVDHalContext;
8305 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8306 HAL_MVD_Context_Init();
8307 MVD_PRINT("[%s]Global structure init Success!!!\n",__FUNCTION__);
8308 }
8309 else
8310 {
8311 MVD_PRINT("[%s]Global structure exists!!!\n",__FUNCTION__);
8312 }
8313 //return FALSE;
8314 }
8315 else
8316 {
8317 memset((MS_U8*)u32Addr,0,sizeof(MVD_Hal_CTX));
8318 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for one process
8319 HAL_MVD_Context_Init();
8320 }
8321 }
8322 else
8323 {
8324 pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for another process
8325 }
8326 #else
8327 if(pMVDHalContext == NULL)
8328 {
8329 pMVDHalContext = &gMVDHalContext;
8330 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8331 HAL_MVD_Context_Init();
8332 }
8333 #endif
8334 OSAL_MVD_MutexInit();
8335 #else
8336 if(pMVDHalContext == NULL)
8337 {
8338 pMVDHalContext = &gMVDHalContext;
8339 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8340 HAL_MVD_Context_Init();
8341 }
8342 #endif
8343
8344
8345 return TRUE;
8346
8347 }
8348
8349 //------------------------------------------------------------------------------
HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)8350 HAL_MVD_StreamId HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)
8351 {
8352 MS_U32 i = 0;
8353
8354 #ifdef MS_DEBUG
8355 MVD_DumpMVDStream();
8356 #endif
8357 if (eStreamType == E_HAL_MVD_MAIN_STREAM)
8358 {
8359 for (i = 0;
8360 i <
8361 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8362 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8363 {
8364 if ((E_HAL_MVD_MAIN_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8365 {
8366 return pMVDHalContext->_stMVDStream[i].eStreamId;
8367 }
8368 }
8369 }
8370 else if (eStreamType == E_HAL_MVD_SUB_STREAM)
8371 {
8372 for (i = 0;
8373 i <
8374 ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8375 (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8376 {
8377 if ((E_HAL_MVD_SUB_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8378 {
8379 return pMVDHalContext->_stMVDStream[i].eStreamId;
8380 }
8381 }
8382 }
8383 #ifdef VDEC3
8384 else if ((eStreamType >= E_HAL_MVD_N_STREAM) && (eStreamType < E_HAL_MVD_N_STREAM + MAX_DEC_NUM))
8385 {
8386 i = eStreamType - E_HAL_MVD_N_STREAM;
8387 if (!pMVDHalContext->_stMVDStream[i].bUsed)
8388 {
8389 return pMVDHalContext->_stMVDStream[i].eStreamId;
8390 }
8391 }
8392 #endif
8393
8394 return E_HAL_MVD_STREAM_NONE;
8395 }
8396
HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)8397 MS_U8 HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)
8398 {
8399 #ifdef VDEC3
8400 return eSID - E_HAL_MVD_N_STREAM_BASE;
8401 #else
8402 MS_U8 u8Idx = 0;
8403 switch (eSID)
8404 {
8405 case E_HAL_MVD_MAIN_STREAM0:
8406 u8Idx = 0;
8407 break;
8408 case E_HAL_MVD_SUB_STREAM0:
8409 u8Idx = 1;
8410 break;
8411 #if 0
8412 case E_HAL_MVD_SUB_STREAM1:
8413 u8Idx = 2;
8414 break;
8415 #endif
8416 default:
8417 u8Idx = 0;
8418 break;
8419 }
8420 return u8Idx;
8421 #endif
8422 }
8423
HAL_MVD_ReleaseFdMask(MS_U8 u8Idx,MS_BOOL bRls)8424 MS_BOOL HAL_MVD_ReleaseFdMask(MS_U8 u8Idx, MS_BOOL bRls)
8425 {
8426 MVD_CmdArg mvdcmd;
8427
8428 SETUP_CMDARG(mvdcmd);
8429 mvdcmd.Arg0 = bRls; //1 to release the fd mask
8430 MVD_DEBUGINFO(MVD_PRINT("%s: release=0x%x\n", __FUNCTION__, bRls));
8431 SET_DECNUM(mvdcmd, u8Idx);
8432 SET_CMD_RET_FALSE(CMD_UPDATE_FRAME, &mvdcmd);
8433
8434 return TRUE;
8435 }
8436
HAL_MVD_ParserRstDone(MS_U8 u8Idx,MS_BOOL bEnable)8437 MS_BOOL HAL_MVD_ParserRstDone(MS_U8 u8Idx, MS_BOOL bEnable)
8438 {
8439 #define PARSER_RST_TIMEOUT 0x40000
8440 MS_U32 u32TimeOut = 0;
8441 MVD_CmdArg mvdcmd;
8442
8443 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_PARSER_RST);
8444 SETUP_CMDARG(mvdcmd);
8445 mvdcmd.Arg1 = bEnable;
8446 SET_DECNUM(mvdcmd, u8Idx);
8447 SET_CMD_RET_FALSE(CMD_PTS_TBL_RESET, &mvdcmd);
8448
8449 while ((TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PARSER_RST)) && (u32TimeOut < PARSER_RST_TIMEOUT))
8450 {
8451 u32TimeOut++;
8452 }
8453 if (u32TimeOut >= PARSER_RST_TIMEOUT)
8454 {
8455 MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_PTS_TBL_RESET ) );
8456 return FALSE;
8457 }
8458 return TRUE;
8459 }
8460
HAL_MVD_FlushPTSBuf(MS_U8 u8Idx,MS_BOOL bEnable)8461 MS_BOOL HAL_MVD_FlushPTSBuf(MS_U8 u8Idx, MS_BOOL bEnable)
8462 {
8463 #ifdef VDEC3
8464 MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8465
8466 if(pstCtrlCfg->u8McuMode == FALSE)
8467 #endif
8468 {
8469 MVD_CmdArg mvdcmd;
8470 SETUP_CMDARG(mvdcmd);
8471 mvdcmd.Arg0 = bEnable;
8472 if (HAL_MVD_MVDCommand( CMD_SEND_UNI_PTS, &mvdcmd ) == FALSE)
8473 {
8474 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SEND_UNI_PTS ) );
8475 return FALSE;
8476 }
8477 }
8478 return TRUE;
8479 }
8480
8481
HAL_MVD_GetSLQNum(MS_U8 u8Idx)8482 MS_U32 HAL_MVD_GetSLQNum(MS_U8 u8Idx)
8483 {
8484 MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8485 MS_VIRT u32RdPtr = HAL_MVD_GetSLQReadPtr(u8Idx);
8486 MS_VIRT u32Diff = 0;
8487
8488 if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= u32RdPtr)
8489 {
8490 u32Diff = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - u32RdPtr;
8491 }
8492 else
8493 {
8494 u32Diff = SLQ_TBL_SIZE - (u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
8495 }
8496
8497 // MVD_PRINT("slq wptr = 0x%x, rptr = 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32RdPtr);
8498
8499 return (u32Diff/SLQ_ENTRY_LEN);
8500 }
8501
8502
HAL_MVD_GetDispQNum(MS_U8 u8Idx)8503 MS_U32 HAL_MVD_GetDispQNum(MS_U8 u8Idx)
8504 {
8505 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPQ_NUM, sizeof(MS_U8));
8506 }
HAL_MVD_SetAutoMute(MS_U8 u8Idx,MS_BOOL bEn)8507 MS_BOOL HAL_MVD_SetAutoMute(MS_U8 u8Idx, MS_BOOL bEn)
8508 {
8509 MVD_CmdArg mvdcmd;
8510
8511 SETUP_CMDARG(mvdcmd);
8512 mvdcmd.Arg0 = bEn; //1 to enable
8513 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8514 SET_DECNUM(mvdcmd, u8Idx);
8515 SET_CMD_RET_FALSE(CMD_ENABLE_AUTO_MUTE, &mvdcmd);
8516
8517 return TRUE;
8518 }
8519
HAL_MVD_SetVSizeAlign(MS_U8 u8Idx,MS_BOOL bEn)8520 MS_BOOL HAL_MVD_SetVSizeAlign(MS_U8 u8Idx, MS_BOOL bEn)
8521 {
8522 MVD_CmdArg mvdcmd;
8523
8524 SETUP_CMDARG(mvdcmd);
8525 mvdcmd.Arg0 = bEn; //1 to enable VSize alignment to 4x
8526 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8527 SET_DECNUM(mvdcmd, u8Idx);
8528 SET_CMD_RET_FALSE(CMD_FORCE_ALIGN_VSIZE, &mvdcmd);
8529
8530 return TRUE;
8531 }
8532
HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize,MS_U16 u16VSize,MS_U32 u32FrmRate)8533 MS_BOOL HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate)
8534 {
8535 MVD_DEBUGINFO(MVD_PRINT("%s w:%d, h:%d, fr:%d, MAX:%lld\n", __FUNCTION__, u16HSize, u16VSize, u32FrmRate, MVD_HW_MAX_PIXEL));
8536 return (((MS_U64)u16HSize*(MS_U64)u16VSize*(MS_U64)u32FrmRate) <= MVD_HW_MAX_PIXEL);
8537 }
8538
HAL_MVD_GetColorInfo(MS_U8 u8Idx,MVD_Color_Info * pstColorInfo)8539 MS_BOOL HAL_MVD_GetColorInfo(MS_U8 u8Idx, MVD_Color_Info* pstColorInfo)
8540 {
8541 MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
8542
8543 if((pu8MVDGetFrameInfoBufStart==0) || (pstColorInfo==0))
8544 {
8545 MVD_DEBUGERROR(MVD_PRINT("HAL_MVD_GetColorInfo error: pu8MVDGetFrameInfoBufStart=NULL\n"));
8546 return FALSE;
8547 }
8548
8549 pstColorInfo->bColor_Descript = (MS_BOOL)(HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_DESCRIPT));
8550
8551 if(pstColorInfo->bColor_Descript)
8552 {
8553 pstColorInfo->u8Color_Primaries = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_PRIMARIES);
8554 pstColorInfo->u8Transfer_Char = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TRANSFER_CHAR);
8555 pstColorInfo->u8Matrix_Coef = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_MATRIX_COEF);
8556 }
8557 return TRUE;
8558
8559 }
8560
8561
8562 //------------------------------------------------------------------------------
8563 /// Wait MVD generate CRC done or timeout
8564 /// @return -MVD generate CRC done or timeout
8565 //------------------------------------------------------------------------------
_HAL_MVD_CrcTimeOut(MS_U8 u8Idx)8566 MS_BOOL _HAL_MVD_CrcTimeOut(MS_U8 u8Idx)
8567 {
8568 MS_U32 i;
8569 MS_U32 u32StartTime = MsOS_GetSystemTime();
8570
8571 for ( i = 0; i < MVD_PollingTimes; i++ )
8572 {
8573 ///- wait until MVD generate CRC done or timeout
8574 if ( ( HAL_MVD_RegReadByte(MVD_CRC_CTL) & MVD_CRC_CTL_DONE ) == MVD_CRC_CTL_DONE )
8575 {
8576 return FALSE;
8577 }
8578
8579 if ((TRUE == pMVDHalContext->bStopped[u8Idx]) || ((MsOS_GetSystemTime()-u32StartTime)>1300))
8580 {
8581 MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
8582 return TRUE;
8583 }
8584
8585 }
8586 MVD_DEBUGERROR( MVD_PRINT("_HAL_MVD_CrcTimeOut=%x\n", i) );
8587 return TRUE;
8588 }
8589
HAL_MVD_GetCrcValue(MS_U8 u8Idx,MVD_CrcIn * pCrcIn,MVD_CrcOut * pCrcOut)8590 E_MVD_Result HAL_MVD_GetCrcValue(MS_U8 u8Idx, MVD_CrcIn *pCrcIn, MVD_CrcOut *pCrcOut)
8591 {
8592 E_MVD_Result eRet = E_MVD_RET_OK;
8593 MS_U32 u32tmp = 0;
8594
8595 #if defined(MSOS_TYPE_ECOS)
8596 if(MsOS_In_Interrupt() != TRUE)
8597 {
8598 OSAL_MVD_IntDisable();
8599 OSAL_MVD_LockHwMutex();
8600 }
8601 #else
8602 OSAL_MVD_LockHwMutex();
8603 #endif
8604
8605 MVD_DEBUGINFO(MVD_PRINT("%s width=0x%x, height=0x%x, pitch=0x%x, luma=0x%lx, chroma=0x%lx\n",
8606 __FUNCTION__, pCrcIn->u32HSize, pCrcIn->u32VSize, pCrcIn->u32Strip, (unsigned long)pCrcIn->u32YStartAddr, (unsigned long)pCrcIn->u32UVStartAddr));
8607
8608 //Set generate CRC value
8609 u32tmp = ((pCrcIn->u32HSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8610 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE, u32tmp & 0xf0);
8611 HAL_MVD_RegWriteByte(MVD_CRC_HSIZE+1, (u32tmp >> 8) & 0x3f);
8612
8613 u32tmp = ((pCrcIn->u32VSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8614 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE, u32tmp & 0xff);
8615 HAL_MVD_RegWriteByte(MVD_CRC_VSIZE+1, (u32tmp >> 8) & 0xff);
8616
8617 u32tmp = (pCrcIn->u32Strip) >> 3;
8618 HAL_MVD_RegWriteByte(MVD_CRC_STRIP, u32tmp & 0xff);
8619 HAL_MVD_RegWriteByte((MVD_CRC_STRIP+1), (u32tmp >> 8) & 0xff);
8620
8621 u32tmp = (pCrcIn->u32YStartAddr) >> 3;
8622 HAL_MVD_RegWrite4Byte(MVD_CRC_Y_START, u32tmp & MVD_CRC_Y_START_LEN);
8623
8624 u32tmp = (pCrcIn->u32UVStartAddr) >> 3;
8625 HAL_MVD_RegWrite4Byte(MVD_CRC_UV_START, u32tmp & MVD_CRC_UV_START_LEN);
8626
8627 //Fire
8628 HAL_MVD_RegWriteBit(MVD_CRC_CTL, 1, MVD_CRC_CTL_FIRE);
8629
8630 //Check CRC done
8631 if ( _HAL_MVD_CrcTimeOut(u8Idx) == TRUE )
8632 {
8633 eRet = E_MVD_RET_TIME_OUT;
8634 goto _CRC_DONE;
8635 }
8636
8637 //Get CRC value
8638 pCrcOut->u32YCrc = HAL_MVD_RegReadByte(MVD_CRC_Y_L) |
8639 (HAL_MVD_RegReadByte(MVD_CRC_Y_L+1) << 8) |
8640 (HAL_MVD_RegReadByte(MVD_CRC_Y_H) <<16) |
8641 (HAL_MVD_RegReadByte(MVD_CRC_Y_H+1) <<24);
8642
8643 pCrcOut->u32UVCrc = HAL_MVD_RegReadByte(MVD_CRC_UV_L) |
8644 (HAL_MVD_RegReadByte(MVD_CRC_UV_L+1) << 8) |
8645 (HAL_MVD_RegReadByte(MVD_CRC_UV_H) <<16) |
8646 (HAL_MVD_RegReadByte(MVD_CRC_UV_H+1) <<24);
8647
8648 MVD_DEBUGINFO(MVD_PRINT("%s Y=0x%x, UV=0x%x\n", __FUNCTION__, pCrcOut->u32YCrc, pCrcOut->u32UVCrc));
8649
8650 _CRC_DONE:
8651 #if defined(MSOS_TYPE_ECOS)
8652 if(MsOS_In_Interrupt() != TRUE)
8653 {
8654 OSAL_MVD_UnlockHwMutex();
8655 OSAL_MVD_IntEnable();
8656 }
8657 #else
8658 OSAL_MVD_UnlockHwMutex();
8659 #endif
8660 return eRet;
8661 }
8662
8663
HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx,MS_BOOL bEn)8664 MS_BOOL HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx, MS_BOOL bEn)
8665 {
8666 MVD_CmdArg mvdcmd;
8667
8668 SETUP_CMDARG(mvdcmd);
8669 mvdcmd.Arg0 = bEn;
8670 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8671 SET_DECNUM(mvdcmd, u8Idx);
8672 SET_CMD_RET_FALSE(CMD_SUSPEND_DS, &mvdcmd);
8673
8674 return TRUE;
8675 }
8676
HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)8677 MS_U8 HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)
8678 {
8679 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_SUSPEND_DS, sizeof(MS_U8));
8680 }
8681
HAL_MVD_GetStereoType(MS_U8 u8Idx)8682 MS_U8 HAL_MVD_GetStereoType(MS_U8 u8Idx)
8683 {
8684 return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_STEREO_TYPE, sizeof(MS_U8));
8685 }
8686
HAL_MVD_GetDivxVer(MS_U8 u8Idx)8687 MS_U32 HAL_MVD_GetDivxVer(MS_U8 u8Idx)
8688 {
8689 return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DIVX_VER_5X, sizeof(MS_U32));
8690 }
8691
HAL_MVD_SetIdctMode(MS_U8 u8Idx,MS_U8 u8Mode)8692 MS_BOOL HAL_MVD_SetIdctMode(MS_U8 u8Idx, MS_U8 u8Mode)
8693 {
8694 MVD_CmdArg mvdcmd;
8695
8696 SETUP_CMDARG(mvdcmd);
8697 mvdcmd.Arg0 = u8Mode;
8698 SET_DECNUM(mvdcmd, u8Idx);
8699
8700 MVD_DEBUGINFO(MVD_PRINT("%s CMD_IDCT_SEL arg0=%x)\n", __FUNCTION__, u8Mode));
8701 SET_CMD_RET_FALSE(CMD_IDCT_SEL, &mvdcmd);
8702
8703 return TRUE;
8704 }
8705
HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)8706 E_MVD_Result HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)
8707 {
8708 UNUSED(eClockSpeed);
8709 MVD_PRINT("This chip does not support mvd clock presetting~\n");
8710 return E_MVD_RET_FAIL;
8711 }
8712
HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)8713 MS_BOOL HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)
8714 {
8715 MS_BOOL bAVSyncOn = FALSE;
8716 MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8717 if (pCtrlCfg)
8718 {
8719 bAVSyncOn = pCtrlCfg->bAVSyncOn;
8720 }
8721
8722 return bAVSyncOn;
8723 }
8724
HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx,MS_VIRT u32VPUAddr,MS_VIRT u32DrvAddr)8725 MS_BOOL HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx, MS_VIRT u32VPUAddr, MS_VIRT u32DrvAddr)
8726 {
8727 MS_BOOL bRet = TRUE;
8728 MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
8729
8730 pBuff->u32DynScalingAdd = u32DrvAddr;
8731 bRet = HAL_MVD_SetDynamicScaleAddr(u8Idx, u32VPUAddr);
8732 return bRet;
8733 }
8734
HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx,MS_U8 bEnable)8735 MS_BOOL HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx, MS_U8 bEnable)
8736 {
8737 MVD_CmdArg mvdcmd;
8738
8739 SETUP_CMDARG(mvdcmd);
8740 mvdcmd.Arg0 = bEnable;
8741 SET_DECNUM(mvdcmd, u8Idx);
8742
8743 MVD_DEBUGINFO(MVD_PRINT("%s CMD_PUSH_FIRST_FRAME_DISP arg0=%x)\n", __FUNCTION__, bEnable));
8744 SET_CMD_RET_FALSE(CMD_PUSH_FIRST_FRAME_DISP, &mvdcmd);
8745
8746 return TRUE;
8747 }
8748
HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)8749 E_MVD_Result HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)
8750 {
8751 MVD_CmdArg mvdcmd;
8752
8753 SETUP_CMDARG(mvdcmd);
8754 mvdcmd.Arg0 = L_WORD(u32Para); // for set the XC diff_field_number
8755 mvdcmd.Arg1 = H_WORD(u32Para); // for set XC UCNR diff field no
8756 SET_DECNUM(mvdcmd, u8Idx);
8757
8758 SET_CMD_RET_FALSE(CMD_XC_LOW_DELAY_PARA, &mvdcmd);
8759
8760 return TRUE;
8761 }
8762
HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)8763 MS_U8 HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)
8764 {
8765 return (MS_U8)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CURRENT_ES_BUFFER_STATUS, sizeof(MS_U8)));
8766 }
8767
HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx,MS_BOOL bEn,MS_U8 top_bottom)8768 MS_BOOL HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx, MS_BOOL bEn,MS_U8 top_bottom)
8769 {
8770 MVD_CmdArg mvdcmd;
8771
8772 SETUP_CMDARG(mvdcmd);
8773 mvdcmd.Arg2 = bEn;
8774 mvdcmd.Arg3 = top_bottom;
8775 MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x,top_bottom=%x\n", __FUNCTION__, bEn,top_bottom));
8776 SET_DECNUM(mvdcmd, u8Idx);
8777 SET_CMD_RET_FALSE(CMD_FP_FILTER, &mvdcmd);
8778
8779 return TRUE;
8780 }
8781
8782
HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8sel)8783 MS_BOOL HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8sel)
8784 {
8785 u8SHMMiuSel = u8sel;
8786 u32SharememoryBase[u8Idx] = u32base - MVD_FW_CODE_LEN;
8787 return TRUE;
8788 }
8789
HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx,MS_VIRT * u32base)8790 MS_BOOL HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx, MS_VIRT *u32base)
8791 {
8792 *u32base=u32SharememoryBase[u8Idx];
8793 return TRUE;
8794 }
8795
HAL_MVD_Support2ndMVOPInterface(void)8796 MS_BOOL HAL_MVD_Support2ndMVOPInterface(void)
8797 {
8798 return TRUE;
8799 }
8800
HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8size,MS_U8 cc_type)8801 MS_BOOL HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8size, MS_U8 cc_type)
8802 {
8803 MVD_CmdArg mvdcmd;
8804 MS_U32 u32cc_size=0;
8805 MS_VIRT u32StartOffset;
8806 MS_U8 u8MiuSel;
8807
8808 SETUP_CMDARG(mvdcmd);
8809 if (u8size !=0)
8810 {
8811 mvdcmd.Arg0 = TRUE; //enable
8812 }
8813 else
8814 {
8815 mvdcmd.Arg0 = FALSE; //disable
8816 }
8817 mvdcmd.Arg1 = cc_type; //608->1,708->0
8818
8819 SET_DECNUM(mvdcmd, u8Idx);
8820 SET_CMD_RET_FALSE(CMD_CC_ENABLE_EXTERNAL_BUFFER, &mvdcmd);
8821
8822 if (u8size ==0)
8823 {
8824 SET_CMD_RET_FALSE(CMD_CLOSE_CC, &mvdcmd);
8825 return E_MVD_RET_OK;
8826 }
8827
8828 u32base *= (1<<10); //unit is bytes
8829 u32cc_size = u8size * (1<<10); //unit is bytes
8830
8831
8832 MS_U32 *pu32ReadPtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base));
8833 MS_U32 *pu32WritePtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)));
8834 MS_U32 *pu32LatchOverflow = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*2));
8835 MS_U32 *pu32CpuBaseAddr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*3));
8836
8837 //rptr,wptr,overflow,latch 16 bytes
8838 if(cc_type==1)
8839 {
8840 u32base += (4*sizeof(MS_U32));
8841 u32cc_size -= (4*sizeof(MS_U32));
8842 }
8843
8844 if(cc_type==0) // 708: start from 128 bytes
8845 {
8846 u32base += 128;
8847 u32cc_size -= 128;
8848 }
8849
8850 *pu32ReadPtr = *pu32WritePtr = u32base;
8851 *pu32LatchOverflow = 0;
8852 *pu32CpuBaseAddr = HAL_MVD_GetMEMCfg(u8Idx)->u32FWBinAddr;
8853
8854 _phy_to_miu_offset(u8MiuSel, u32StartOffset, u32base);
8855 _MVD_SetUserDataBufStart(u8Idx,u32StartOffset,cc_type);
8856 _MVD_SetUserDataBufSize(u8Idx,u32cc_size,cc_type);
8857 //MVD_DEBUGINFO(MVD_PRINT("%s: u32base=%x,u32size=%x,cc_type=%x\n", __FUNCTION__,u32base,u32cc_size,cc_type));
8858
8859 return E_MVD_RET_OK;
8860 }
8861
HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void * param)8862 MS_BOOL HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void* param)
8863 {
8864
8865 MVD_PVR_Seamless_Info* temp = (MVD_PVR_Seamless_Info*)param;
8866
8867 temp->u64PTS = ((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTS, sizeof(MS_U32))) |
8868 (((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTSHIGH, sizeof(MS_U8)))<<32);
8869
8870 temp->u32POC = 0xFF; // not support in mvd
8871 temp->u8FrameType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETFRAMETYPE, sizeof(MS_U8));
8872
8873 return TRUE;
8874 }
8875
HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)8876 E_MVD_Result HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)
8877 {
8878 pMVDHalContext->gMVDPreCtrl[u8Idx].bHWBufferReMapping = bEnable;
8879 return E_MVD_RET_OK;
8880 }
8881
HAL_MVD_SetPrebufferSize(MS_U8 u8Idx,MS_U32 size)8882 MS_BOOL HAL_MVD_SetPrebufferSize(MS_U8 u8Idx, MS_U32 size)
8883 {
8884 MVD_CmdArg mvdcmd;
8885
8886 SETUP_CMDARG(mvdcmd);
8887 mvdcmd.Arg0 = size&0xff;
8888 mvdcmd.Arg1 = (size>>8)&0xff;
8889 mvdcmd.Arg2 = (size>>16)&0xff;
8890 mvdcmd.Arg3 = (size>>24)&0xff;
8891 SET_DECNUM(mvdcmd, u8Idx);
8892 if (HAL_MVD_MVDCommand( CMD_PREBUFFER_SIZE, &mvdcmd ) == FALSE)
8893 {
8894 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PREBUFFER_SIZE ) );
8895 return FALSE;
8896 }
8897 return TRUE;
8898 }
8899
HAL_MVD_GetVsyncAddrOffset(void)8900 MS_VIRT HAL_MVD_GetVsyncAddrOffset(void)
8901 {
8902 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8903 MS_VIRT VsyncBridgeOffset = 0;
8904
8905 if(VPUSHMAddr != 0) // TEE project
8906 {
8907 VsyncBridgeOffset = VSYNC_BRIDGE_OFFSET;
8908 }
8909 else // normal project
8910 {
8911 VsyncBridgeOffset = COMMON_AREA_START + VSYNC_BRIDGE_OFFSET;
8912 }
8913
8914 return VsyncBridgeOffset;
8915 }
8916
HAL_MVD_GetVsyncExtAddrOffset(void)8917 MS_VIRT HAL_MVD_GetVsyncExtAddrOffset(void)
8918 {
8919 MS_VIRT VsyncBridgeExtOffset = 0;
8920 MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8921
8922 if(VPUSHMAddr != 0) // TEE project
8923 {
8924 VsyncBridgeExtOffset = VSYNC_BRIDGE_EXT_OFFSET;
8925 }
8926 else // normal project
8927 {
8928 VsyncBridgeExtOffset = COMMON_AREA_START + VSYNC_BRIDGE_EXT_OFFSET;
8929 }
8930
8931 return VsyncBridgeExtOffset;
8932 }
8933
HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx,MS_U32 u32time)8934 E_MVD_Result HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx, MS_U32 u32time)
8935 {
8936 MVD_CmdArg mvdcmd;
8937 SETUP_CMDARG(mvdcmd);
8938
8939 mvdcmd.Arg0 = L_WORD(u32time); // Arg0(enable), 1 for enable, default is 0...
8940 mvdcmd.Arg1 = H_WORD(u32time); // Arg1(vop_time_incr_predict_count), 1 for predict once, 2 for twice...0xff for always guess the vop_time_incr even with the vol_header, default is 0...
8941 mvdcmd.Arg2 = L_DWORD(u32time);// Arg2(vop_time_incr_follow_vol_header), // 0 for follow vol_header...1 for bypass vol_header, default is 0...
8942 mvdcmd.Arg3 = H_DWORD(u32time);// Arg3, reserve...
8943 MVD_DEBUGINFO(MVD_PRINT("CMD_TIME_INCR_PREDICT=%x\n",u32time));
8944 if (HAL_MVD_MVDCommand(CMD_TIME_INCR_PREDICT, &mvdcmd) == FALSE)
8945 {
8946 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_TIME_INCR_PREDICT ) );
8947 return E_MVD_RET_FAIL;
8948 }
8949 return E_MVD_RET_OK;
8950
8951 }
8952
HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx,MS_BOOL enable,MS_U32 u32timeout)8953 MS_BOOL HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx, MS_BOOL enable,MS_U32 u32timeout)
8954 {
8955 MVD_CmdArg mvdcmd;
8956
8957 SETUP_CMDARG(mvdcmd);
8958
8959 if(enable == TRUE)
8960 {
8961 mvdcmd.Arg0 = 2; //0:disable, 2: enable decode timeout
8962 mvdcmd.Arg1 = u32timeout&0xff;
8963 mvdcmd.Arg2 = (u32timeout>>8)&0xff;
8964 mvdcmd.Arg3 = (u32timeout>>16)&0xff;
8965 }
8966 else
8967 {
8968 mvdcmd.Arg0 = 0; //0:disable, 2: enable decode timeout
8969 }
8970
8971 SET_DECNUM(mvdcmd, u8Idx);
8972
8973 if (HAL_MVD_MVDCommand( CMD_ENABLE_VLD_TIMEOUT, &mvdcmd ) == FALSE)
8974 {
8975 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_VLD_TIMEOUT ) );
8976 return FALSE;
8977 }
8978
8979 return TRUE;
8980 }
8981
HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx,MS_U8 btype)8982 E_MVD_Result HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx, MS_U8 btype)
8983 {
8984 MVD_CmdArg mvdcmd;
8985 SETUP_CMDARG(mvdcmd);
8986 mvdcmd.Arg0 = btype;
8987 MVD_DEBUGINFO(MVD_PRINT("%s: btype=%x\n", __FUNCTION__, btype));
8988 SET_DECNUM(mvdcmd, u8Idx);
8989 if (HAL_MVD_MVDCommand(CMD_SMOOTH_REWIND, &mvdcmd) == FALSE)
8990 {
8991 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SMOOTH_REWIND ) );
8992 return E_MVD_RET_FAIL;
8993 }
8994 return E_MVD_RET_OK;
8995 }
8996
HAL_MVD_IsAlive(MS_U8 u8Idx)8997 E_MVD_Result HAL_MVD_IsAlive(MS_U8 u8Idx)
8998 {
8999 MVD_ALIVEInfo* pAliveInfo = &(pMVDHalContext->aliveInfo[u8Idx]);
9000 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
9001
9002 if (E_MVD_SLQ_TBL_MODE == curSrcMode || E_MVD_TS_FILE_MODE == curSrcMode)
9003 {
9004 if(pMVDHalContext->u32LastAliveTime[u8Idx] == 0 || ((MsOS_GetSystemTime()-pMVDHalContext->u32LastAliveTime[u8Idx]) < 500))
9005 {
9006
9007 if(pMVDHalContext->u32LastAliveTime[u8Idx] == 0 )
9008 {
9009 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9010 }
9011 return E_MVD_RET_OK;
9012 }
9013 }
9014
9015 #if 0
9016 MVD_PRINT("[%d]%d,%d,%d,%d,%d,%d,%d,%d\n",__FUNCTION__,
9017 (MS_U32)MsOS_GetSystemTime(),
9018 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))),
9019 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))),
9020 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))),
9021 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))),
9022 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))),
9023 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))),
9024 (MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32))));
9025 #endif
9026
9027 //check count to vertify alive
9028 if((pAliveInfo->u32decode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))))||
9029 (pAliveInfo->u32searchbuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))))||
9030 (pAliveInfo->u32searchcode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))))||
9031 (pAliveInfo->u32prebuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))))||
9032 (pAliveInfo->u32vfifobuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))))||
9033 (pAliveInfo->u32searchheader_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))))||
9034 (pAliveInfo->u32flashpattern_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32))))||
9035 (pAliveInfo->u32IdleCount!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_IDLE_COUNT, sizeof(MS_U32)))))
9036 {
9037 pAliveInfo->u32decode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32)));
9038 pAliveInfo->u32searchbuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32)));
9039 pAliveInfo->u32searchcode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32)));
9040 pAliveInfo->u32prebuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32)));
9041 pAliveInfo->u32vfifobuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32)));
9042 pAliveInfo->u32searchheader_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32)));
9043 pAliveInfo->u32flashpattern_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)));
9044 pAliveInfo->u32IdleCount=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_IDLE_COUNT, sizeof(MS_U32)));
9045 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9046 return E_MVD_RET_OK;
9047 }
9048 else
9049 {
9050 pMVDHalContext->u32LastAliveTime[u8Idx] = MsOS_GetSystemTime();
9051 return E_MVD_RET_FAIL;
9052 }
9053
9054 }
9055
HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx,MS_U16 u16Para)9056 E_MVD_Result HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx, MS_U16 u16Para)
9057 {
9058 MVD_CmdArg mvdcmd;
9059 SETUP_CMDARG(mvdcmd);
9060 mvdcmd.Arg0 = u16Para & 0xFF; //enable or disable
9061 mvdcmd.Arg1 = u16Para >> 8; // err rate 0~100%
9062 if(mvdcmd.Arg1 >= 100)
9063 mvdcmd.Arg1 = 100;
9064
9065 SET_DECNUM(mvdcmd, u8Idx);
9066 if (HAL_MVD_MVDCommand(CMD_DECODE_ERROR_TOLERANCE, &mvdcmd) == FALSE)
9067 {
9068 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_ERROR_TOLERANCE ) );
9069 return E_MVD_RET_FAIL;
9070 }
9071 return E_MVD_RET_OK;
9072
9073 }
9074
HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx,MS_BOOL bEnable)9075 void HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx, MS_BOOL bEnable)
9076 {
9077 pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = bEnable;
9078 }
9079
HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)9080 void HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)
9081 {
9082 pMVDHalContext->bDropOnePTS[u8Idx] = TRUE;
9083 }
9084
HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx,MS_U8 u8Arg)9085 E_MVD_Result HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx, MS_U8 u8Arg)
9086 {
9087 #define STOP_TIMEOUT 500 //ms
9088 MVD_CmdArg mvdcmd;
9089 E_MVD_Result ret = E_MVD_RET_OK;
9090 MS_U32 u32StartTime;
9091 MS_U32 u32SeamlessStatus = 0;
9092 MS_U32 u32BufStart = 0;
9093 MS_U32* temp = 0;
9094
9095 if(u8Arg != 2)
9096 {
9097 // clear handshake dram
9098 u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);
9099 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart,u32BufStart);
9100 temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+OFFSET_PVR_SEAMLESS_STATUS);
9101 *temp = 0;
9102 MsOS_FlushMemory();
9103 }
9104
9105 SETUP_CMDARG(mvdcmd);
9106 mvdcmd.Arg0 = u8Arg;
9107 MVD_DEBUGINFO(MVD_PRINT("%s: arg=%d\n", __FUNCTION__, (unsigned int)u8Arg));
9108 SET_DECNUM(mvdcmd, u8Idx);
9109
9110 if (HAL_MVD_MVDCommand(CMD_PVR_SEAMLESS_MODE, &mvdcmd) == FALSE)
9111 {
9112 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PVR_SEAMLESS_MODE ) );
9113 return E_MVD_RET_FAIL;
9114 }
9115
9116
9117 u32StartTime = HAL_MVD_GetTime();
9118
9119 if(u8Arg == 1)
9120 {
9121 pMVDHalContext->stFwCfg[u8Idx].eSrcMode = E_MVD_TS_FILE_MODE;
9122 while(1)
9123 {
9124 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
9125 if(u32SeamlessStatus&1) // bit0 , pause done
9126 {
9127 break;
9128 }
9129
9130 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
9131 {
9132 MVD_DEBUGERROR(MVD_PRINT("PVR seamless pause timeout\n" ) );
9133 ret = E_MVD_RET_FAIL;
9134 break;
9135 }
9136 }
9137 }
9138 else if(u8Arg == 2)
9139 {
9140 while(1)
9141 {
9142 u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
9143 if(u32SeamlessStatus&4) // bit2, hw reset done
9144 {
9145 break;
9146 }
9147
9148 if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
9149 {
9150 MVD_DEBUGERROR(MVD_PRINT("PVR seamless hw reset timeout\n" ) );
9151 ret = E_MVD_RET_FAIL;
9152 break;
9153 }
9154 }
9155 }
9156
9157 return ret;
9158 }
9159
HAL_MVD_SetDVXCShmAddr(MS_U8 u8Idx,MS_PHY u32FWBaseAddr,MS_PHY u32DVXCShmAddr)9160 E_MVD_Result HAL_MVD_SetDVXCShmAddr(MS_U8 u8Idx, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr)
9161 {
9162 E_MVD_Result ret = E_MVD_RET_OK;
9163
9164 MS_U8 u8XCShmMiuSel;
9165 MS_U32 u32XCShmStartOffset;
9166 MS_U8 u8FWBaseMiuSel;
9167 MS_U32 u32FWBaseOffset;
9168 MVD_CmdArg mvdcmd;
9169 MS_U32 u32temp = 0;
9170
9171 _phy_to_miu_offset(u8FWBaseMiuSel, u32FWBaseOffset, u32FWBaseAddr);
9172 _phy_to_miu_offset(u8XCShmMiuSel, u32XCShmStartOffset, u32DVXCShmAddr);
9173
9174 if (u8FWBaseMiuSel != u8XCShmMiuSel)
9175 {
9176 MVD_DEBUGERROR(MVD_PRINT("[ERROR] XC share memory and VDEC Code base MIU selections are different\n"));
9177 return E_MVD_RET_FAIL;
9178 }
9179
9180 u32temp = u32XCShmStartOffset - u32FWBaseOffset;
9181
9182 SETUP_CMDARG(mvdcmd);
9183
9184 mvdcmd.Arg0 = L_WORD(u32temp);
9185 mvdcmd.Arg1 = H_WORD(u32temp);
9186 mvdcmd.Arg2 = L_DWORD(u32temp);
9187 mvdcmd.Arg3 = H_DWORD(u32temp);
9188
9189 MVD_DEBUGINFO(MVD_PRINT("%s: arg=%x\n", __FUNCTION__, (unsigned int)u32temp));
9190
9191 SET_DECNUM(mvdcmd, u8Idx);
9192
9193 if (HAL_MVD_MVDCommand(CMD_SET_DV_XC_SHM_ADDR, &mvdcmd) == FALSE)
9194 {
9195 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SET_DV_XC_SHM_ADDR ) );
9196 return E_MVD_RET_FAIL;
9197 }
9198
9199 return ret;
9200 }
9201
9202
HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx,MS_U8 u8Mode)9203 E_MVD_Result HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx, MS_U8 u8Mode)
9204 {
9205 MVD_CmdArg mvdcmd;
9206
9207 SETUP_CMDARG(mvdcmd);
9208 mvdcmd.Arg0 = u8Mode;
9209
9210 SET_DECNUM(mvdcmd, u8Idx);
9211
9212 MVD_DEBUGINFO(MVD_PRINT("%s CMD_ENABLE_LAST_FRAME_QUALIFIER arg0=%x\n", __FUNCTION__, u8Mode));
9213 if (HAL_MVD_MVDCommand(CMD_ENABLE_LAST_FRAME_QUALIFIER, &mvdcmd)== FALSE)
9214 {
9215 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_LAST_FRAME_QUALIFIER) );
9216 return E_MVD_RET_FAIL;
9217 }
9218
9219 return E_MVD_RET_OK;
9220 }
HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx,MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)9221 E_MVD_Result HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx, MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)
9222 {
9223 MVD_CmdArg mvdcmd;
9224 SETUP_CMDARG(mvdcmd);
9225
9226 mvdcmd.Arg0 = u8RepeatPeriod;
9227
9228 SET_DECNUM(mvdcmd, u8Idx);
9229 if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_REPEAT, &mvdcmd) == FALSE)
9230 {
9231 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_REPEAT ) );
9232 return E_MVD_RET_FAIL;
9233 }
9234
9235
9236 mvdcmd.Arg0 = u8DropPeriod;
9237
9238 SET_DECNUM(mvdcmd, u8Idx);
9239 if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_SKIP, &mvdcmd) == FALSE)
9240 {
9241 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_SKIP ) );
9242 return E_MVD_RET_FAIL;
9243 }
9244
9245
9246 return E_MVD_RET_OK;
9247
9248 }
9249
HAL_MVD_VariableFrameRate(MS_U8 u8Idx)9250 MS_BOOL HAL_MVD_VariableFrameRate(MS_U8 u8Idx)
9251 {
9252 MVD_CmdArg mvdcmd;
9253 SETUP_CMDARG(mvdcmd);
9254 mvdcmd.Arg0 = 1;
9255 SET_DECNUM(mvdcmd, u8Idx);
9256 if (HAL_MVD_MVDCommand(CMD_VARIABLE_FRAMERATE, &mvdcmd)== FALSE)
9257 {
9258 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VARIABLE_FRAMERATE) );
9259 return FALSE;
9260 }
9261 return TRUE;
9262 }
9263
9264 //------------------------------------------------------------------------------
9265 /// Set FRC Only Show TopField
9266 /// @return -TRUE for success; FALSE for failure.
9267 //------------------------------------------------------------------------------
HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx,MS_BOOL bEnable)9268 MS_BOOL HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx, MS_BOOL bEnable)
9269 {
9270 MVD_CmdArg mvdcmd;
9271
9272 SETUP_CMDARG(mvdcmd);
9273 mvdcmd.Arg0 = bEnable; //1 -> show Only Show TopField. 0 -> normal case.
9274 SET_DECNUM(mvdcmd, u8Idx);
9275 SET_CMD_RET_FALSE(CMD_FRC_ONLY_SHOW_TOP_FIELD, &mvdcmd);
9276 return TRUE;
9277 }
9278
HAL_MVD_DisableESFullStop(MS_U8 u8Idx,MS_BOOL bDisable)9279 MS_BOOL HAL_MVD_DisableESFullStop(MS_U8 u8Idx, MS_BOOL bDisable)
9280 {
9281 MVD_CmdArg mvdcmd;
9282 SETUP_CMDARG(mvdcmd);
9283 mvdcmd.Arg0 = bDisable;
9284 SET_DECNUM(mvdcmd, u8Idx);
9285 if (HAL_MVD_MVDCommand( CMD_ES_FULL_STOP, &mvdcmd ) == FALSE)
9286 {
9287 MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ES_FULL_STOP);
9288 return FALSE;
9289 }
9290 return TRUE;
9291 }
9292
HAL_MVD_PUSI_Control(MS_U8 u8Idx,MS_BOOL bEnable)9293 MS_BOOL HAL_MVD_PUSI_Control(MS_U8 u8Idx, MS_BOOL bEnable)
9294 {
9295 MVD_CmdArg mvdcmd;
9296 SETUP_CMDARG(mvdcmd);
9297 mvdcmd.Arg0 = bEnable;
9298 SET_DECNUM(mvdcmd, u8Idx);
9299 if (HAL_MVD_MVDCommand( CMD_PUSI_CONTROL, &mvdcmd ) == FALSE)
9300 {
9301 MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PUSI_CONTROL);
9302 return FALSE;
9303 }
9304 return TRUE;
9305 }
9306
9307
HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)9308 MS_VIRT HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)
9309 {
9310 return pMVDHalContext->stFWBuff[(u8Idx)].u32VBBUTableAdd;
9311 }
9312
HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)9313 void HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)
9314 {
9315 pMVDHalContext->u32DmxFrameRate[u8HalIdx] = u32Value;
9316 }
9317
HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)9318 void HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)
9319 {
9320 pMVDHalContext->u32DmxFrameRateBase[u8HalIdx] = u32Value;
9321 }
9322
HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)9323 void HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)
9324 {
9325 pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = bEnable;
9326 }
9327
HAL_MVD_SetAVSyncDispAutoDrop(MS_U8 u8Idx,MS_BOOL bEnable)9328 MS_BOOL HAL_MVD_SetAVSyncDispAutoDrop(MS_U8 u8Idx, MS_BOOL bEnable)
9329 {
9330 MVD_CmdArg mvdcmd;
9331
9332 SETUP_CMDARG(mvdcmd);
9333 mvdcmd.Arg0 = bEnable;
9334
9335 SET_DECNUM(mvdcmd, u8Idx);
9336
9337 MVD_DEBUGINFO(MVD_PRINT("%s CMD_AUTO_DROP_FRAME_IN_DECODE arg0=%x\n", __FUNCTION__, bEnable));
9338 if (HAL_MVD_MVDCommand(CMD_AUTO_DROP_FRAME_IN_DECODE, &mvdcmd)== FALSE)
9339 {
9340 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_AUTO_DROP_FRAME_IN_DECODE) );
9341 return FALSE;
9342 }
9343
9344 return TRUE;
9345 }
9346
HAL_MVD_SetDynmcDispPath(MS_U8 u8Idx,MS_BOOL bConnect,MVD_DISPLAY_PATH eValue,MS_BOOL bPreSet)9347 MS_BOOL HAL_MVD_SetDynmcDispPath(MS_U8 u8Idx,MS_BOOL bConnect,MVD_DISPLAY_PATH eValue,MS_BOOL bPreSet)
9348 {
9349 MS_U32 u32TimeCnt = 0;
9350 MVD_CmdArg mvdcmd;
9351
9352 HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL);
9353
9354 SETUP_CMDARG(mvdcmd);
9355 mvdcmd.Arg0 = bConnect;
9356 mvdcmd.Arg1 = eValue;
9357 mvdcmd.Arg2 = bPreSet;
9358
9359 SET_DECNUM(mvdcmd, u8Idx);
9360
9361 MVD_DEBUGINFO(MVD_PRINT("%s CMD_DYNAMIC_MVOP_CONNECT arg0=%x, arg1=%x\n", __FUNCTION__, bConnect,eValue));
9362 if (HAL_MVD_MVDCommand(CMD_DYNAMIC_MVOP_CONNECT, &mvdcmd)== FALSE)
9363 {
9364 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DYNAMIC_MVOP_CONNECT) );
9365 return FALSE;
9366 }
9367
9368 if(bConnect == FALSE) // disconnect, need to do handshake with fw
9369 {
9370 u32TimeCnt = HAL_MVD_GetTime();
9371 while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
9372 {
9373 if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL))
9374 {
9375 MVD_DEBUGINFO(MVD_PRINT("\n vsync control finished!\n"));
9376 break;
9377 }
9378 }
9379
9380 MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
9381
9382 if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_VSYNC_CONTROL))
9383 {
9384 MVD_DEBUGINFO(MVD_PRINT("\n***** vsync control timeout *****\n\n"));
9385 return FALSE;
9386 }
9387 }
9388
9389 return TRUE;
9390 }
9391
HAL_MVD_PreConnectInputTsp(MS_U8 u8Idx,MS_BOOL bEnable,MVD_INPUT_TSP eInputTsp,MVD_Original_Stream eStream)9392 MS_BOOL HAL_MVD_PreConnectInputTsp(MS_U8 u8Idx, MS_BOOL bEnable, MVD_INPUT_TSP eInputTsp, MVD_Original_Stream eStream)
9393 {
9394 #ifdef CMD_PRESET_CONNET_INPUT_TSP
9395
9396 MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
9397
9398 if (curSrcMode == E_MVD_TS_MODE)
9399 {
9400 MVD_CmdArg mvdcmd;
9401 MS_U8 u8Input = E_CTL_INPUT_TSP_NONE;
9402
9403 if (bEnable)
9404 {
9405 u8Input = (MS_U8)eInputTsp;
9406 VPRINTF("[NDec][%d] MVD preset tsp, eInputTsp %d\n", u8Idx, eInputTsp);
9407 }
9408 else
9409 {
9410 switch (eStream)
9411 {
9412 case E_MVD_ORIGINAL_MAIN_STREAM:
9413 u8Input = E_CTL_INPUT_TSP_0;
9414 break;
9415 case E_MVD_ORIGINAL_SUB_STREAM:
9416 u8Input = E_CTL_INPUT_TSP_1;
9417 break;
9418 case E_MVD_ORIGINAL_N_STREAM:
9419 default:
9420 u8Input = E_CTL_INPUT_TSP_NONE;
9421 break;
9422 }
9423 VPRINTF("[NDec][%d] MVD no preset tsp, input %d\n", u8Idx, u8Input);
9424 }
9425
9426 SETUP_CMDARG(mvdcmd);
9427 mvdcmd.Arg0 = u8Input;
9428 SET_DECNUM(mvdcmd, u8Idx);
9429
9430 MVD_DEBUGINFO(MVD_PRINT("%s CMD_PRESET_CONNET_INPUT_TSP arg0=%x\n", __FUNCTION__, u8Input));
9431 if (HAL_MVD_MVDCommand(CMD_PRESET_CONNET_INPUT_TSP, &mvdcmd)== FALSE)
9432 {
9433 MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", CMD_PRESET_CONNET_INPUT_TSP));
9434 return FALSE;
9435 }
9436 }
9437 else
9438 {
9439 VPRINTF("[NDec][%d] MVD not TSP input, ignore PRESET_CONNECT_INPUT_TSP\n", u8Idx);
9440 }
9441
9442 return TRUE;
9443
9444 #else
9445
9446 return FALSE;
9447
9448 #endif
9449 }
9450
HAL_MVD_SetCMAInformation(void * cmaInitParam)9451 void HAL_MVD_SetCMAInformation(void* cmaInitParam)
9452 {
9453 pMVDHalContext->bCMAUsed = TRUE;
9454 memcpy((void*)(&pMVDHalContext->cmaInitParam),cmaInitParam,sizeof(struct CMA_Pool_Init_Param));
9455 }
9456
HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64 * u64Addr,MS_SIZE * u64Size,MS_BOOL * bAllocDone)9457 void HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64* u64Addr,MS_SIZE* u64Size,MS_BOOL* bAllocDone)
9458 {
9459 FW_VOL_INFO gvolInfo;
9460 MS_U32 u32VolAddr;
9461
9462 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9463
9464 gvolInfo = (*(volatile FW_VOL_INFO*)(MsOS_PA2KSEG1(u32VolAddr)));
9465
9466 *u64Addr = (MS_U64)gvolInfo.CMA_FB_Address;
9467 *u64Size = (MS_SIZE)gvolInfo.CMA_FB_Size;
9468 *bAllocDone = gvolInfo.CMA_AllocDone;
9469
9470 MsOS_ReadMemory();
9471 MsOS_FlushMemory();
9472 }
9473
HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)9474 void HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)
9475 {
9476 MS_U8* temp;
9477 MS_VIRT u32VolAddr;
9478
9479 _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9480
9481 temp = (MS_U8*)(MsOS_PA2KSEG1(u32VolAddr+OFFSET_CMA_ALLOCDONE));
9482
9483 *temp = 1;
9484
9485 MsOS_ReadMemory();
9486 MsOS_FlushMemory();
9487 }
9488
HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)9489 void HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)
9490 {
9491 //to do....
9492 }
9493
9494
9495 #ifdef VDEC3
HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)9496 MS_BOOL HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)
9497 {
9498
9499 #if 1 // to do.
9500 UNUSED(u8Cmd);
9501 return TRUE;
9502 #else
9503 MS_BOOL ret;
9504 switch(u8Cmd)
9505 {
9506 case CMD_PLAY:
9507 case CMD_STOP:
9508 case CMD_DISPLAY_PAUSE:
9509 case CMD_PAUSE:
9510 case CMD_FLUSH_DISP_QUEUE:
9511 case CMD_VC1_HW_SLQ_RESET:
9512 case CMD_FAST_SLOW:
9513 case CMD_FLIP_RELEASE_FRAME:
9514 case CMD_FD_MASK_DELAY_CNT:
9515 case CMD_PVR_SEAMLESS_MODE:
9516 case CMD_SW_RESET:
9517 case CMD_CODEC_INFO:
9518 case CMD_CODE_OFFSET:
9519 case CMD_VOL_INFO_BUF:
9520 case CMD_FRAME_INFO_BUF:
9521 case CMD_HEADER_INFO_BUF:
9522 case CMD_USER_BUF_START:
9523 case CMD_USER_BUF_SIZE:
9524 case CMD_PTS_TBL_START:
9525 case CMD_DEC_FRAME_INFO_BUF:
9526 case CMD_SLQ_TBL_BUF_END:
9527 case CMD_SLQ_TBL_BUF_START:
9528 case CMD_STREAM_BUF_START:
9529 case CMD_STREAM_BUF_END:
9530 case CMD_FB_BASE:
9531 case CMD_IAP_BUF_START:
9532 case CMD_DP_BUF_START:
9533 case CMD_MV_BUF_START:
9534 case CMD_FB_NUM:
9535 case CMD_DISPLAY_CTL:
9536 case CMD_REPEAT_MODE:
9537 case CMD_DS_VIRTUAL_BOX:
9538 case CMD_ENABLE_FILE_SYNC:
9539 case CMD_RVU_EN:
9540 case CMD_START_DEC_STRICT:
9541 case CMD_SYNC_ON:
9542 case CMD_SET_MST_MODE:
9543 case CMD_SET_MCU_MODE:
9544 ret = TRUE;
9545 break;
9546 default:
9547 ret = FALSE;
9548 break;
9549 }
9550
9551 return ret;
9552 #endif
9553 }
9554
HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)9555 MS_BOOL HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)
9556 {
9557 MS_BOOL ret;
9558
9559 switch(u8Cmd)
9560 {
9561
9562 case CMD_DISP_SPEED_CTRL:
9563 case CMD_STEP_DISP_DECODE_ONE:
9564 case CMD_ENABLE_LAST_FRAME_SHOW:
9565 case CMD_STEP_TO_PTS:
9566 case CMD_SKIP_DATA:
9567 case CMD_DIU_WIDTH_ALIGN:
9568 case CMD_SCALER_INFO_BASE:
9569 case CMD_DYNAMIC_SCALE_BASE:
9570 case CMD_ENABLE_DYNAMIC_SCALE:
9571 case CMD_FORCE_BLUE_SCREEN:
9572 case CMD_FREEZE_DISP:
9573 case CMD_FIXED_FRAME_BUFFER:
9574 case CMD_SEND_UNI_PTS:
9575 case CMD_ENABLE_FREEZE_PIC:
9576 case CMD_PTS_BASE:
9577 case CMD_SINGLE_STEP:
9578 case CMD_PARSE_M4V_PACKMD:
9579 case CMD_SLQ_END:
9580 case CMD_SLQ_START:
9581 case CMD_ENABLE_INT_STAT:
9582 case CMD_SHOW_ONE_FIELD:
9583 case CMD_FRC_OUPUT:
9584 case CMD_FRC_DROP_BEHAVIOR:
9585 case CMD_FORBID_RESOLUTION_CHANGE:
9586 case CMD_DUMP_BITSTREAM_BASE:
9587 case CMD_DUMP_BITSTREAM_LENGTH:
9588 case CMD_SYNC_OFFSET:
9589 case CMD_SYN_THRESHOLD:
9590 case CMD_AVSYNC_FREERUN_THRESHOLD:
9591 case CMD_MVD_FAST_INT:
9592 case CMD_DIVX_PATCH:
9593 case CMD_IDCT_SEL:
9594 case CMD_SLQ_UPDATE_TBL_WPTR:
9595 case CMD_DMA_OVFTH:
9596 case CMD_DMA_UNFTH:
9597 case CMD_UPDATE_FRAME:
9598 case CMD_PTS_TBL_RESET:
9599 case CMD_ENABLE_AUTO_MUTE:
9600 case CMD_FORCE_ALIGN_VSIZE:
9601 case CMD_SUSPEND_DS:
9602 case CMD_PUSH_FIRST_FRAME_DISP:
9603 case CMD_XC_LOW_DELAY_PARA:
9604 case CMD_FP_FILTER:
9605 case CMD_CC_ENABLE_EXTERNAL_BUFFER:
9606 case CMD_CLOSE_CC:
9607 case CMD_PREBUFFER_SIZE:
9608 case CMD_TIME_INCR_PREDICT:
9609 case CMD_ENABLE_VLD_TIMEOUT:
9610 case CMD_SMOOTH_REWIND:
9611 case CMD_DECODE_ERROR_TOLERANCE:
9612 case CMD_MVD_IDLE:
9613 case CMD_PARSER_READ_POSITION:
9614 case CMD_SLQ_GET_TBL_RPTR:
9615 case CMD_DECODE_STATUS:
9616 case CMD_GET_AFD:
9617 case CMD_GET_SYNC_STAT:
9618 case CMD_RD_USER_WP:
9619 case CMD_ENABLE_LAST_FRAME_QUALIFIER:
9620 //case CMD_RD_IO: // no need in V3
9621 //case CMD_WR_IO: // no need in V3
9622 ret = TRUE;
9623 break;
9624 default:
9625 ret = FALSE;
9626 break;
9627 }
9628
9629 return ret;
9630 }
9631
HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)9632 MS_BOOL HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)
9633 {
9634 MS_BOOL ret;
9635
9636 switch(u8Cmd)
9637 {
9638 case CMD_GET_AFD:
9639 case CMD_GET_SYNC_STAT:
9640 case CMD_RD_USER_WP:
9641 case CMD_DECODE_STATUS:
9642 case CMD_PARSER_READ_POSITION:
9643 case CMD_MVD_IDLE:
9644 ret = TRUE;
9645 break;
9646 default:
9647 ret = FALSE;
9648 break;
9649 }
9650
9651 return ret;
9652 }
9653 #endif
9654 #endif
9655