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Searched refs:E_INT_IRQ_FIQ_NONE (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/mxlib/hal/k7u/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
457 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
472 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[2] in HAL_InitIrqTable()
508 HAL_UpdateIrqTable(E_IRQ_27, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
509 HAL_UpdateIrqTable(E_IRQ_28, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
512 HAL_UpdateIrqTable(E_IRQ_31, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
523 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_FIQ_NONE); //reg_top_gpio_in[4] in HAL_InitIrqTable()
524 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[4] in HAL_InitIrqTable()
525 HAL_UpdateIrqTable(E_IRQ_43, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
457 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
472 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[2] in HAL_InitIrqTable()
508 HAL_UpdateIrqTable(E_IRQ_27, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
509 HAL_UpdateIrqTable(E_IRQ_28, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
512 HAL_UpdateIrqTable(E_IRQ_31, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
523 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_FIQ_NONE); //reg_top_gpio_in[4] in HAL_InitIrqTable()
524 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[4] in HAL_InitIrqTable()
539 HAL_UpdateIrqTable(E_IRQ_56, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/curry/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
456 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
472 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[2] in HAL_InitIrqTable()
495 HAL_UpdateIrqTable(E_IRQ_15, E_INT_IRQ_FIQ_NONE); //Reserved. in HAL_InitIrqTable()
502 HAL_UpdateIrqTable(E_IRQ_21, E_INT_IRQ_FIQ_NONE); //Reserved. in HAL_InitIrqTable()
520 HAL_UpdateIrqTable(E_IRQ_38, E_INT_IRQ_FIQ_NONE); //Reserved. in HAL_InitIrqTable()
523 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_FIQ_NONE); //reg_top_gpio_in[4] in HAL_InitIrqTable()
524 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[4] in HAL_InitIrqTable()
535 HAL_UpdateIrqTable(E_IRQ_52, E_INT_IRQ_FIQ_NONE); //Reserved. in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/kano/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
457 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
472 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_FIQ_NONE); //ps_int in HAL_InitIrqTable()
495 HAL_UpdateIrqTable(E_IRQ_15, E_INT_IRQ_FIQ_NONE); //ldm_dma_done_int0 in HAL_InitIrqTable()
523 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_FIQ_NONE); //mspi1_int in HAL_InitIrqTable()
524 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_FIQ_NONE); //miu_security_int in HAL_InitIrqTable()
543 HAL_UpdateIrqTable(E_IRQ_60, E_INT_IRQ_FIQ_NONE); //### cmdq_int in HAL_InitIrqTable()
551 HAL_UpdateIrqTable(E_IRQ_68, E_INT_IRQ_FIQ_NONE); //cec_int_pm in HAL_InitIrqTable()
573 HAL_UpdateIrqTable(E_IRQ_90, E_INT_IRQ_FIQ_NONE); //aesdma_s_int in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6lite/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
457 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
472 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[2] in HAL_InitIrqTable()
508 HAL_UpdateIrqTable(E_IRQ_27, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
509 HAL_UpdateIrqTable(E_IRQ_28, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
512 HAL_UpdateIrqTable(E_IRQ_31, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
523 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_FIQ_NONE); //reg_top_gpio_in[4] in HAL_InitIrqTable()
524 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_FIQ_NONE); //~reg_top_gpio_in[4] in HAL_InitIrqTable()
525 HAL_UpdateIrqTable(E_IRQ_43, E_INT_IRQ_FIQ_NONE); //Reserved in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
434 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
451 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
485 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
551 HAL_UpdateIrqTable(E_IRQ_55, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
560 HAL_UpdateIrqTable(E_IRQ_64, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
571 HAL_UpdateIrqTable(E_IRQ_75, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
572 HAL_UpdateIrqTable(E_IRQ_76, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
580 HAL_UpdateIrqTable(E_IRQ_84, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
615 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
436 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
453 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
495 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
629 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
631 HAL_UpdateIrqTable(E_FIQ_27, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
633 HAL_UpdateIrqTable(E_FIQ_29, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
637 HAL_UpdateIrqTable(E_FIQ_32, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
646 HAL_UpdateIrqTable(E_FIQ_41, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
436 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
453 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
495 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
629 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
631 HAL_UpdateIrqTable(E_FIQ_27, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
633 HAL_UpdateIrqTable(E_FIQ_29, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
637 HAL_UpdateIrqTable(E_FIQ_32, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
646 HAL_UpdateIrqTable(E_FIQ_41, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
436 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
453 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
495 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
629 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
631 HAL_UpdateIrqTable(E_FIQ_27, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
633 HAL_UpdateIrqTable(E_FIQ_29, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
637 HAL_UpdateIrqTable(E_FIQ_32, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
646 HAL_UpdateIrqTable(E_FIQ_41, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
443 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
460 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
505 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
640 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
642 HAL_UpdateIrqTable(E_FIQ_27, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
644 HAL_UpdateIrqTable(E_FIQ_29, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
648 HAL_UpdateIrqTable(E_FIQ_32, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
657 HAL_UpdateIrqTable(E_FIQ_41, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
443 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
460 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
505 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
640 HAL_UpdateIrqTable(E_FIQ_25, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
642 HAL_UpdateIrqTable(E_FIQ_27, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
644 HAL_UpdateIrqTable(E_FIQ_29, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
648 HAL_UpdateIrqTable(E_FIQ_32, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
657 HAL_UpdateIrqTable(E_FIQ_41, E_INT_IRQ_FIQ_NONE); //non in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/mustang/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
349 HWIdx2IntEnum[byHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
365 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/messi/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
421 HWIdx2IntEnum[dwHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
436 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/mxlib/hal/mainz/
H A DhalIRQTBL.h87 #define E_INT_RESERVED E_INT_IRQ_FIQ_NONE
421 HWIdx2IntEnum[dwHardwareIndex] = E_INT_IRQ_FIQ_NONE; in HAL_UpdateIrqTable()
436 HWIdx2IntEnum[dwDataCounter] = E_INT_IRQ_FIQ_NONE; in HAL_InitIrqTable()
/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DMsIRQ.h447 E_INT_IRQ_FIQ_NONE = E_INT_FIQ_0xF0_START+14, enumerator
/utopia/UTPA2-700.0.x/mxlib/include/
H A DMsIRQ.h448 E_INT_IRQ_FIQ_NONE = E_INT_FIQ_0xF0_START+14, enumerator
/utopia/UTPA2-700.0.x/projects/build/
H A Dpreprocess.txt31591 E_INT_IRQ_FIQ_NONE = E_INT_FIQ_0xF0_START+14,