| /utopia/UTPA2-700.0.x/modules/mbx/hal/mooney/mbx/ |
| H A D | halMBXINT.c | 192 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
194 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
260 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
262 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/macan/mbx/ |
| H A D | halMBXINT.c | 208 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
211 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
268 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
270 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/messi/mbx/ |
| H A D | halMBXINT.c | 194 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
196 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
262 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
264 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/mainz/mbx/ |
| H A D | halMBXINT.c | 194 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
196 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
262 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
264 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/M7821/mbx/ |
| H A D | halMBXINT.c | 221 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
225 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
297 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
300 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/manhattan/mbx/ |
| H A D | halMBXINT.c | 221 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
225 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
297 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
300 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maxim/mbx/ |
| H A D | halMBXINT.c | 221 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
225 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
297 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
300 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maserati/mbx/ |
| H A D | halMBXINT.c | 221 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
225 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
297 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
300 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/M7621/mbx/ |
| H A D | halMBXINT.c | 221 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
225 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
297 MsOS_DisableInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
300 MsOS_DetachInterrupt(E_INT_FIQ_AEON_TO_BEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maldives/mbx/ |
| H A D | halMBXINT.c | 192 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON , (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
194 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/mustang/mbx/ |
| H A D | halMBXINT.c | 192 MsOS_AttachInterrupt(E_INT_FIQ_AEON_TO_BEON , (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU()
194 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); in _MHAL_MBXINT_SetHostCPU()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/ |
| H A D | halCPU.c | 556 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
565 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/ |
| H A D | halCPU.c | 556 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
565 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/ |
| H A D | halCPU.c | 563 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
572 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/ |
| H A D | halCPU.c | 563 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
572 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/ |
| H A D | halCPU.c | 563 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
572 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/ |
| H A D | halCPU.c | 563 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
572 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/ |
| H A D | halCPU.c | 564 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
573 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/ |
| H A D | halCPU.c | 621 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/ |
| H A D | halCPU.c | 619 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/ |
| H A D | halCPU.c | 619 MsOS_EnableInterrupt(E_INT_FIQ_AEON_TO_BEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/mxlib/hal/mustang/ |
| H A D | halIRQTBL.h | 488 HAL_UpdateIrqTable(E_FIQ_41, E_INT_FIQ_AEON_TO_BEON ); //reg_hst1to2_int in HAL_InitIrqTable()
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| /utopia/UTPA2-700.0.x/projects/tmplib/include/ |
| H A D | MsIRQ.h | 173 E_INT_FIQ_AEON_TO_BEON = E_INT_FIQ_0x20_START+8, enumerator
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| /utopia/UTPA2-700.0.x/mxlib/hal/messi/ |
| H A D | halIRQTBL.h | 564 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_BEON); //reg_hst3to1_int in HAL_InitIrqTable()
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| /utopia/UTPA2-700.0.x/mxlib/hal/mainz/ |
| H A D | halIRQTBL.h | 564 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_AEON_TO_BEON); //reg_hst3to1_int in HAL_InitIrqTable()
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