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Searched refs:DEF_HDCP14_RX_REG_BANK (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/hdcp/
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
328 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write ready in MHal_HDCP_HDCP14FillBksv()
329 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write read… in MHal_HDCP_HDCP14FillBksv()
333 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
[all …]
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/hdcp/
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
328 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write ready in MHal_HDCP_HDCP14FillBksv()
329 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write read… in MHal_HDCP_HDCP14FillBksv()
333 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
[all …]
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/hdcp/
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
328 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write ready in MHal_HDCP_HDCP14FillBksv()
329 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write read… in MHal_HDCP_HDCP14FillBksv()
333 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
[all …]
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdcp/
H A DhalHDCP.c432 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
470 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
471 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
473 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
474 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
478 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
479 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
481 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write ready in MHal_HDCP_HDCP14FillBksv()
482 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write read… in MHal_HDCP_HDCP14FillBksv()
486 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
[all …]
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdcp/
H A DhalHDCP.c438 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
476 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
477 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
479 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
480 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
484 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
485 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
487 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write ready in MHal_HDCP_HDCP14FillBksv()
488 …while(MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19) & BIT(7)); // wait write read… in MHal_HDCP_HDCP14FillBksv()
492 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
[all …]
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x072200U // 0x172200U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/hdcp/
H A DhalHDCP.c161 #define DEF_HDCP14_RX_REG_BANK 0x071200U //0x171200U macro
291 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdcp/
H A DregHDCP.h113 #define DEF_HDCP14_RX_REG_BANK 0x072200U // 0x172200U macro
H A DhalHDCP.c438 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/hdcp/
H A DregHDCP.h113 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/hdcp/
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdcp/
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x072200U // 0x172200U macro
H A DhalHDCP.c438 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdcp/
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
H A DhalHDCP.c432 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/hdcp/
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x071200U // 0x171200U macro
H A DhalHDCP.c279 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdcp/
H A DregHDCP.h115 #define DEF_HDCP14_RX_REG_BANK 0x000000U macro
H A DhalHDCP.c438 u16tmpData = MHalHdcpRegRead(DEF_HDCP14_RX_REG_BANK + u16BKOffset, 0x0E + cnt); in MHal_HDCP_HDCP14GetM0()