Home
last modified time | relevance | path

Searched refs:CLKGEN0_REG_BASE (Results 1 – 25 of 79) sorted by relevance

1234

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h432 #define CLKGEN0_REG_BASE (0x0B00 ) macro
458 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
472 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
483 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
497 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
507 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
518 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
532 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
542 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
552 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h433 #define CLKGEN0_REG_BASE (0x0B00 ) macro
459 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
473 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
484 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
498 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
519 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
533 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
543 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
553 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h449 #define CLKGEN0_REG_BASE (0x0B00 ) macro
475 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
489 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
500 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
514 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
524 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
535 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
549 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
559 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
569 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h433 #define CLKGEN0_REG_BASE (0x0B00 ) macro
459 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
473 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
484 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
498 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
519 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
533 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
543 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
553 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h434 #define CLKGEN0_REG_BASE (0x0B00 ) macro
460 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
474 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
485 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
499 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
509 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
520 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
534 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
544 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
554 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h432 #define CLKGEN0_REG_BASE (0x0B00 ) macro
458 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
472 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
483 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
497 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
507 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
518 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
532 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
542 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
552 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h449 #define CLKGEN0_REG_BASE (0x0B00 ) macro
475 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
489 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
500 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
514 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
524 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
535 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
549 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
559 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
569 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h433 #define CLKGEN0_REG_BASE (0x0B00 ) macro
459 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
473 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
484 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
498 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
519 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
533 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
543 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
553 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DregHVD_EX.h390 #define CLKGEN0_REG_BASE (0x0B00 ) macro
416 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
428 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
436 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_VP6 (CLKGEN0_REG_BASE+(0x0032<<1))
475 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
485 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
495 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
509 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
521 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h461 #define CLKGEN0_REG_BASE (0x0B00 ) macro
487 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
501 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
512 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
526 #define REG_TOP_VP8 (CLKGEN0_REG_BASE+(0x0031<<1))
536 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1))
547 #define REG_TOP_VP9 (CLKGEN0_REG_BASE+(0x0032<<1))
561 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
571 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
581 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h413 #define CLKGEN0_REG_BASE (0x0B00 ) macro
439 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
451 #define REG_TOP_HVD_IDB (CLKGEN0_REG_BASE+(0x0030<<1))
460 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
470 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
484 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
498 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
509 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DregHVD_EX.h401 #define CLKGEN0_REG_BASE (0x0B00 ) macro
427 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
447 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
472 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
487 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
499 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DregHVD_EX.h401 #define CLKGEN0_REG_BASE (0x0B00 ) macro
427 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
447 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
458 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
472 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
487 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
499 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DregHVD_EX.h409 #define CLKGEN0_REG_BASE (0x0B00 ) macro
435 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
455 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
466 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
480 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
494 #define REG_TOP_CKG_EVD_PPU (CLKGEN0_REG_BASE+(0x0033<<1))
505 #define REG_TOP_CKG_EVD (CLKGEN0_REG_BASE+(0x0034<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DregHVD.h319 #define CLKGEN0_REG_BASE (0x0B00 ) macro
345 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
360 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
373 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
386 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
399 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DregHVD.h319 #define CLKGEN0_REG_BASE (0x0B00 ) macro
345 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
360 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
373 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
386 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
399 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DregHVD.h319 #define CLKGEN0_REG_BASE (0x0B00 ) macro
345 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
360 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
373 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
386 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
399 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DregHVD.h319 #define CLKGEN0_REG_BASE (0x0B00 ) macro
345 #define REG_TOP_VPU (CLKGEN0_REG_BASE+(0x0030<<1))
360 #define REG_TOP_HVD (CLKGEN0_REG_BASE+(0x0031<<1))
373 #define REG_TOP_MVD (CLKGEN0_REG_BASE+(0x0039<<1))
386 #define REG_TOP_MVD2 (CLKGEN0_REG_BASE+(0x0039<<1))
399 #define REG_TOP_HVD_CLK (CLKGEN0_REG_BASE+(0x003F<<1))

1234