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Searched refs:sw55 (Results 1 – 15 of 15) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/m2vd/
H A Dhal_m2vd_vdpu2.c181 p_regs->sw55.dec_irq = 0; in hal_m2vd_vdpu2_init_hwcfg()
395 if (reg_out->sw55.dec_error_int | reg_out->sw55.dec_buffer_int) { in hal_m2vd_vdpu2_wait()
401 mpp_log("mpp_device_wait_reg return interrupt:%08x", reg_out->sw55); in hal_m2vd_vdpu2_wait()
H A Dhal_m2vd_vdpu1_reg.h204 } sw55; member
H A Dhal_m2vd_vdpu2_reg.h86 } sw55; member
H A Dhal_m2vd_vdpu1.c134 p_regs->sw55.apf_threshold = 8; in hal_m2vd_vdpu1_init_hwcfg()
/rockchip-linux_mpp/mpp/hal/vpu/vp8e/
H A Dhal_vp8e_vepu1_v2.c174 regs->sw55.rgb_coeff_f = hw_cfg->rgb_coeff_f; in vp8e_vpu_frame_start()
176 regs->sw55.r_mask_msb = hw_cfg->r_mask_msb; in vp8e_vpu_frame_start()
177 regs->sw55.g_mask_msb = hw_cfg->g_mask_msb; in vp8e_vpu_frame_start()
178 regs->sw55.b_mask_msb = hw_cfg->b_mask_msb; in vp8e_vpu_frame_start()
H A Dhal_vp8e_vepu1_reg.h280 } sw55; member
H A Dhal_vp8e_vepu2_reg.h199 RK_U32 sw55; member
/rockchip-linux_mpp/mpp/hal/rkdec/avsd/
H A Dhal_avsd_vdpu2.c49 p_regs->sw55.timeout_det_sts = 0; in set_defalut_parameters()
51 p_regs->sw55.dec_irq_dis = 0; in set_defalut_parameters()
81 p_regs->sw55.dec_irq_dis = 0; in set_regs_parameters()
645 if (!((AvsdVdpu2Regs_t *)p_hal->p_regs)->sw55.dec_rdy_sts) { in hal_avsd_vdpu2_wait()
H A Dhal_avsd_vdpu2_reg.h76 } sw55; member
H A Dhal_avsd_vdpu1_reg.h230 } sw55; member
H A Dhal_avsd_plus_reg.h267 } sw55; member
H A Dhal_avsd_vdpu1.c42 p_regs->sw55.apf_threshold = 8; in set_defalut_parameters()
H A Dhal_avsd_plus.c50 p_regs->sw55.apf_threshold = 8; in set_defalut_parameters()
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu2.c63 p_reg->sw55.dec_irq_dis = 0; in set_device_regs()
1050 param.hard_err = !p_regs->sw55.dec_rdy_sts; in vdpu2_h264d_wait()
1054 memset(&p_regs->sw55, 0, sizeof(RK_U32)); in vdpu2_h264d_wait()
H A Dhal_h264d_vdpu2_reg.h80 } sw55; member