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Searched refs:split (Results 1 – 23 of 23) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/vp8e/
H A Dhal_vp8e_putbit.c42 RK_S32 split = 1 + ((bitbuf->range - 1) * prob >> 8); in vp8e_put_bool() local
45 bitbuf->bottom += split; in vp8e_put_bool()
46 bitbuf->range -= split; in vp8e_put_bool()
48 bitbuf->range = split; in vp8e_put_bool()
/rockchip-linux_mpp/mpp/codec/enc/jpeg/
H A Djpege_api_v2.c228 MppEncSliceSplit *split = &cfg->split; in jpege_proc_hal() local
257 if (split->split_mode) { in jpege_proc_hal()
262 if (split->split_mode == MPP_ENC_SPLIT_BY_CTU) { in jpege_proc_hal()
263 RK_U32 part_mbs = split->split_arg; in jpege_proc_hal()
279 if (mpp_get_soc_type() == ROCKCHIP_SOC_RK3576 && split->split_arg <= syntax->mcu_cnt) in jpege_proc_hal()
280 syntax->restart_ri = split->split_arg; in jpege_proc_hal()
/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu_v2.c665 MppEncSliceSplit *split = &cfg->split; in h264e_vepu_slice_split_cfg() local
671 switch (split->split_mode) { in h264e_vepu_slice_split_cfg()
677 mpp_assert(split->split_arg > 0); in h264e_vepu_slice_split_cfg()
678 RK_U32 slice_num = info->bit_target / (split->split_arg * 8); in h264e_vepu_slice_split_cfg()
687 mpp_assert(split->split_arg > 0); in h264e_vepu_slice_split_cfg()
690 slice_mb_rows = (split->split_arg + mb_per_line - 1) / mb_per_line; in h264e_vepu_slice_split_cfg()
694 mpp_log_f("invalide slice split mode %d\n", split->split_mode); in h264e_vepu_slice_split_cfg()
/rockchip-linux_mpp/mpp/codec/dec/vp8/
H A Dvp8d_parser.c61 RK_U32 split; in vp8hwdDecodeBool() local
68 split = 1 + (((range - 1) * probability) >> 8); in vp8hwdDecodeBool()
69 bigsplit = (split << 24); in vp8hwdDecodeBool()
70 range = split; in vp8hwdDecodeBool()
73 range = bit_ctx->range - split; in vp8hwdDecodeBool()
113 RK_U32 split; in vp8hwdDecodeBool128() local
120 split = (range + 1) >> 1; in vp8hwdDecodeBool128()
121 bigsplit = (split << 24); in vp8hwdDecodeBool128()
122 range = split; in vp8hwdDecodeBool128()
125 range = (bit_ctx->range - split); in vp8hwdDecodeBool128()
/rockchip-linux_mpp/mpp/inc/
H A Dmpp_enc_cfg.h42 MppEncSliceSplit split; member
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu540c.c1109 switch (cfg->split.split_mode) { in setup_vepu540c_split()
1129 regs->reg_base.sli_byte.sli_splt_byte = cfg->split.split_arg; in setup_vepu540c_split()
1131 regs->reg_base.enc_pic.slen_fifo = cfg->split.split_out ? 1 : 0; in setup_vepu540c_split()
1137 RK_U32 slice_num = (mb_w * mb_h + cfg->split.split_arg - 1) / cfg->split.split_arg; in setup_vepu540c_split()
1144 regs->reg_base.sli_cnum.sli_splt_cnum_m1 = cfg->split.split_arg - 1; in setup_vepu540c_split()
1147 regs->reg_base.enc_pic.slen_fifo = cfg->split.split_out ? 1 : 0; in setup_vepu540c_split()
1148 if ((cfg->split.split_out & MPP_ENC_SPLIT_OUT_LOWDELAY) || in setup_vepu540c_split()
1153 mpp_log_f("invalide slice split mode %d\n", cfg->split.split_mode); in setup_vepu540c_split()
1671 amend->slice->is_multi_slice = (ctx->cfg->split.split_mode > 0); in hal_h264e_vepu540c_wait()
H A Dhal_h264e_vepu580.c1672 MppEncSliceSplit *cfg = &enc_cfg->split; in setup_vepu580_split()
2366 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h264e_vepu580_wait()
2441 amend->slice->is_multi_slice = (ctx->cfg->split.split_mode > 0); in hal_h264e_vepu580_wait()
H A Dhal_h264e_vepu510.c1546 MppEncSliceSplit *cfg = &enc_cfg->split; in setup_vepu510_split()
2394 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h264e_vepu510_wait()
2469 amend->slice->is_multi_slice = (ctx->cfg->split.split_mode > 0); in hal_h264e_vepu510_wait()
H A Dhal_h264e_vepu541.c1623 setup_vepu541_split(regs, &cfg->split); in hal_h264e_vepu541_gen_regs()
1789 amend->slice->is_multi_slice = (ctx->cfg->split.split_mode > 0); in hal_h264e_vepu541_wait()
H A Dhal_h264e_vepu511.c1546 MppEncSliceSplit *cfg = &enc_cfg->split; in setup_vepu511_split()
2355 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h264e_vepu511_wait()
2430 amend->slice->is_multi_slice = (ctx->cfg->split.split_mode > 0); in hal_h264e_vepu511_wait()
/rockchip-linux_mpp/mpp/base/
H A Dmpp_enc_cfg.c212 STRUCT_START(split); \
213 … u32, rk_u32, mode, FLAG_BASE(0), split, split_mode) \
214 …, u32, rk_u32, arg, FLAG_INCR, split, split_arg) \
215 …, u32, rk_u32, out, FLAG_INCR, split, split_out) \
216 STRUCT_END(split); \
/rockchip-linux_mpp/
H A DCHANGELOG.md242 - [vepu510]: Mark frame first part when split slice out
408 - [hal_vepu]: fix split regs assignment
409 - [vepu580]: poll max set to 1 on split out lowdelay mode
468 - [hal_vepu580/510]: fix split out err when pass1 frame
542 - [vepu510]: Add split low delay output mode support
689 - [h264d]: fix mpp split eos process err
/rockchip-linux_mpp/doc/
H A DRockchip_Developer_Guide_MPP_CN.md726 | split:mode | U32 | MppEncSplitMode | 表示H.264/H.265协议的slice切分模式 …
727 | split:arg | U32 | RK_U32 | Slice切分参数： 在BY_BYTE模式下，参数表…
809 配置和获取H.264/H265编码器的slice切分配置信息，己被MppEncCfg中的split:mode和split:arg取代，不要使用
H A DRockchip_Developer_Guide_MPP_EN.md645 …split:mode|U32|MppEncSplitMode|Represents the slice split mode of H.264/H.265 protocol<br>![](medi…
646 |split:arg|U32|RK_U32|Slice cutting parameters:<br>In BY_BYTE mode, the parameter indicates the max…
730 …nfigure and obtain slice split configuration information of H.264/H265 encoder, which has been rep…
993 | split_mode | RK_U32 | Encoder split mode. 0: No split. 1: divides the slice according to …
/rockchip-linux_mpp/debian/
H A Dchangelog143 * [mpg4d]: fix hiding bugs when split mode
/rockchip-linux_mpp/mpp/codec/
H A Dmpp_enc_impl.c250 if (!cfg->split.split_mode) in check_low_delay_part_mode()
265 if (!cfg->split.split_mode || !(cfg->split.split_out & MPP_ENC_SPLIT_OUT_LOWDELAY)) in check_low_delay_output()
1289 proc_split_cfg(&cfg->split, &set->split); in mpp_enc_proc_cfg()
/rockchip-linux_mpp/mpp/hal/vpu/jpege/
H A Dhal_jpege_vepu2_v2.c256 if (ctx->cfg->split.split_mode == MPP_ENC_SPLIT_BY_CTU) { in hal_jpege_vepu2_get_task()
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu580.c2613 MppEncSliceSplit *cfg = &enc_cfg->split; in vepu580_setup_split()
3184 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h265e_v580_wait()
3400 if (!ctx->cfg->split.split_out) { in hal_h265e_v580_ret_task()
H A Dhal_h265e_vepu510.c1817 MppEncSliceSplit *cfg = &enc_cfg->split; in setup_vepu510_split()
2343 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h265e_v510_wait()
H A Dhal_h265e_vepu511.c945 MppEncSliceSplit *cfg = &enc_cfg->split; in vepu511_h265_set_split()
2635 RK_U32 split_out = ctx->cfg->split.split_out; in hal_h265e_vepu511_wait()
H A Dhal_h265e_vepu540c.c1132 MppEncSliceSplit *cfg = &enc_cfg->split; in vepu540c_h265_set_split()
H A Dhal_h265e_vepu541.c1593 setup_vepu541_split(regs, &ctx->cfg->split); in hal_h265e_v541_gen_regs()
/rockchip-linux_mpp/tools/
H A Dmpp_doxyfile982 # which the alphabetical index list will be split.