1*437bfbebSnyanmisaka /* SPDX-License-Identifier: Apache-2.0 OR MIT */ 2*437bfbebSnyanmisaka /* 3*437bfbebSnyanmisaka * Copyright (c) 2015 Rockchip Electronics Co., Ltd. 4*437bfbebSnyanmisaka */ 5*437bfbebSnyanmisaka 6*437bfbebSnyanmisaka #ifndef __MPP_ENC_CFG_H__ 7*437bfbebSnyanmisaka #define __MPP_ENC_CFG_H__ 8*437bfbebSnyanmisaka 9*437bfbebSnyanmisaka #include "rk_venc_cfg.h" 10*437bfbebSnyanmisaka #include "rk_venc_cmd.h" 11*437bfbebSnyanmisaka #include "rk_venc_ref.h" 12*437bfbebSnyanmisaka #include "mpp_rc_defs.h" 13*437bfbebSnyanmisaka 14*437bfbebSnyanmisaka #include "kmpp_obj.h" 15*437bfbebSnyanmisaka 16*437bfbebSnyanmisaka /* 17*437bfbebSnyanmisaka * MppEncCfgSet shows the relationship between different configuration 18*437bfbebSnyanmisaka * Due to the huge amount of configurable parameters we need to setup 19*437bfbebSnyanmisaka * only minimum amount of necessary parameters. 20*437bfbebSnyanmisaka * 21*437bfbebSnyanmisaka * For normal user rc and prep config are enough. 22*437bfbebSnyanmisaka */ 23*437bfbebSnyanmisaka #define POS_TO_FLAG(p, pos) ((rk_u8*)(p) + ((rk_u32)(pos) & 0xffff)) 24*437bfbebSnyanmisaka #define POS_TO_ELEM(p, pos) ((rk_u8*)(p) + ((rk_u32)(pos) >> 16)) 25*437bfbebSnyanmisaka 26*437bfbebSnyanmisaka typedef struct MppEncCfgSet_t { 27*437bfbebSnyanmisaka MppEncBaseCfg base; 28*437bfbebSnyanmisaka 29*437bfbebSnyanmisaka // esential config 30*437bfbebSnyanmisaka MppEncPrepCfg prep; 31*437bfbebSnyanmisaka MppEncRcCfg rc; 32*437bfbebSnyanmisaka 33*437bfbebSnyanmisaka // hardware related config 34*437bfbebSnyanmisaka MppEncHwCfg hw; 35*437bfbebSnyanmisaka 36*437bfbebSnyanmisaka // codec detail config 37*437bfbebSnyanmisaka MppEncH264Cfg h264; 38*437bfbebSnyanmisaka MppEncH265Cfg h265; 39*437bfbebSnyanmisaka MppEncJpegCfg jpeg; 40*437bfbebSnyanmisaka MppEncVp8Cfg vp8; 41*437bfbebSnyanmisaka 42*437bfbebSnyanmisaka MppEncSliceSplit split; 43*437bfbebSnyanmisaka MppEncRefCfg ref_cfg; 44*437bfbebSnyanmisaka union { 45*437bfbebSnyanmisaka MppEncROICfg roi; 46*437bfbebSnyanmisaka /* for kmpp venc roi */ 47*437bfbebSnyanmisaka MppEncROICfgLegacy roi_legacy; 48*437bfbebSnyanmisaka }; 49*437bfbebSnyanmisaka /* for kmpp venc osd */ 50*437bfbebSnyanmisaka MppEncOSDData3 osd; 51*437bfbebSnyanmisaka MppEncOSDPltCfg plt_cfg; 52*437bfbebSnyanmisaka MppEncOSDPlt plt_data; 53*437bfbebSnyanmisaka /* for kmpp venc ref */ 54*437bfbebSnyanmisaka MppEncRefParam ref_param; 55*437bfbebSnyanmisaka 56*437bfbebSnyanmisaka // quality fine tuning config 57*437bfbebSnyanmisaka MppEncFineTuneCfg tune; 58*437bfbebSnyanmisaka } MppEncCfgSet; 59*437bfbebSnyanmisaka 60*437bfbebSnyanmisaka #ifdef __cplusplus 61*437bfbebSnyanmisaka extern "C" { 62*437bfbebSnyanmisaka #endif 63*437bfbebSnyanmisaka 64*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_prep_change(MppEncCfgSet *cfg); 65*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_rc_change(MppEncCfgSet *cfg); 66*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_hw_change(MppEncCfgSet *cfg); 67*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_tune_change(MppEncCfgSet *cfg); 68*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_h264_change(MppEncCfgSet *cfg); 69*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_h265_change(MppEncCfgSet *cfg); 70*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_jpeg_change(MppEncCfgSet *cfg); 71*437bfbebSnyanmisaka rk_u32 *mpp_enc_cfg_vp8_change(MppEncCfgSet *cfg); 72*437bfbebSnyanmisaka 73*437bfbebSnyanmisaka #define KMPP_OBJ_NAME mpp_enc_cfg 74*437bfbebSnyanmisaka #define KMPP_OBJ_INTF_TYPE MppEncCfg 75*437bfbebSnyanmisaka #include "kmpp_obj_func.h" 76*437bfbebSnyanmisaka 77*437bfbebSnyanmisaka #ifdef __cplusplus 78*437bfbebSnyanmisaka } 79*437bfbebSnyanmisaka #endif 80*437bfbebSnyanmisaka 81*437bfbebSnyanmisaka #endif /*__MPP_ENC_CFG_H__*/ 82