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Searched refs:rc_cfg (Results 1 – 21 of 21) sorted by relevance

/rockchip-linux_mpp/mpp/codec/enc/vp8/
H A Dvp8e_api_v2.c55 MppEncRcCfg *rc_cfg = &ctrl_cfg->cfg->rc; in vp8e_init() local
90 rc_cfg->rc_mode = MPP_ENC_RC_MODE_CBR; in vp8e_init()
91 rc_cfg->quality = MPP_ENC_RC_QUALITY_MEDIUM; in vp8e_init()
92 rc_cfg->bps_target = 2000 * 1000; in vp8e_init()
93 rc_cfg->bps_max = rc_cfg->bps_target * 5 / 4; in vp8e_init()
94 rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4; in vp8e_init()
95 rc_cfg->fps_in_flex = 0; in vp8e_init()
96 rc_cfg->fps_in_num = 30; in vp8e_init()
97 rc_cfg->fps_in_denom = 1; in vp8e_init()
98 rc_cfg->fps_out_flex = 0; in vp8e_init()
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/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_api.c44 MppEncRcCfg *rc_cfg = &ctrlCfg->cfg->rc; in h265e_init() local
155 rc_cfg->quality = MPP_ENC_RC_QUALITY_MEDIUM; in h265e_init()
156 rc_cfg->bps_target = 2000 * 1000; in h265e_init()
157 rc_cfg->bps_max = rc_cfg->bps_target * 5 / 4; in h265e_init()
158 rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4; in h265e_init()
159 rc_cfg->fps_in_flex = 0; in h265e_init()
160 rc_cfg->fps_in_num = 30; in h265e_init()
161 rc_cfg->fps_in_denom = 1; in h265e_init()
162 rc_cfg->fps_out_flex = 0; in h265e_init()
163 rc_cfg->fps_out_num = 30; in h265e_init()
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/rockchip-linux_mpp/mpp/codec/enc/h264/
H A Dh264e_api_v2.c94 MppEncRcCfg *rc_cfg = &cfg->rc; in init_h264e_cfg_set() local
170 rc_cfg->quality = MPP_ENC_RC_QUALITY_MEDIUM; in init_h264e_cfg_set()
171 rc_cfg->bps_target = 2000 * 1000; in init_h264e_cfg_set()
172 rc_cfg->bps_max = rc_cfg->bps_target * 5 / 4; in init_h264e_cfg_set()
173 rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4; in init_h264e_cfg_set()
174 rc_cfg->fps_in_flex = 0; in init_h264e_cfg_set()
175 rc_cfg->fps_in_num = 30; in init_h264e_cfg_set()
176 rc_cfg->fps_in_denom = 1; in init_h264e_cfg_set()
177 rc_cfg->fps_out_flex = 0; in init_h264e_cfg_set()
178 rc_cfg->fps_out_num = 30; in init_h264e_cfg_set()
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/rockchip-linux_mpp/test/
H A Dmpi_rc2_test.c67 MppEncRcCfg rc_cfg; member
405 MppEncRcCfg *rc_cfg = &ctx->rc_cfg; in mpi_rc_enc_init() local
422 rc_cfg->fps_in_denom = 1; in mpi_rc_enc_init()
423 rc_cfg->fps_out_denom = 1; in mpi_rc_enc_init()
424 rc_cfg->fps_in_num = 30; in mpi_rc_enc_init()
425 rc_cfg->fps_out_num = 30; in mpi_rc_enc_init()
426 rc_cfg->fps_in_flex = 0; in mpi_rc_enc_init()
427 rc_cfg->fps_out_flex = 0; in mpi_rc_enc_init()
428 rc_cfg->max_reenc_times = 1; in mpi_rc_enc_init()
429 rc_cfg->gop = enc_cmd->gop_len; in mpi_rc_enc_init()
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H A Dmpi_enc_mt_test.c52 MppEncRcCfg rc_cfg; member
H A Dmpi_enc_test.c83 MppEncRcCfg rc_cfg; member
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541.c975 EncRcTaskInfo *rc_cfg = &task->rc_task->info; in vepu541_h265_set_rc_regs() local
984 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu541_h265_set_rc_regs()
989 regs->enc_pic.pic_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
990 regs->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
992 regs->rc_qp.rc_max_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
993 regs->rc_qp.rc_min_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
1002 regs->enc_pic.pic_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
1003 regs->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu541_h265_set_rc_regs()
1004 regs->rc_cfg.rc_en = 1; in vepu541_h265_set_rc_regs()
1005 regs->rc_cfg.aqmode_en = 1; in vepu541_h265_set_rc_regs()
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H A Dhal_h265e_vepu540c.c709 EncRcTaskInfo *rc_cfg = &task->rc_task->info; in vepu540c_h265_set_rc_regs() local
719 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu540c_h265_set_rc_regs()
724 reg_base->reg0192_enc_pic.pic_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
725 reg_base->reg0240_synt_sli1.sli_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
727 reg_base->reg213_rc_qp.rc_max_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
728 reg_base->reg213_rc_qp.rc_min_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
737 reg_base->reg0192_enc_pic.pic_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
738 reg_base->reg0240_synt_sli1.sli_qp = rc_cfg->quality_target; in vepu540c_h265_set_rc_regs()
745 reg_base->reg213_rc_qp.rc_max_qp = rc_cfg->quality_max; in vepu540c_h265_set_rc_regs()
746 reg_base->reg213_rc_qp.rc_min_qp = rc_cfg->quality_min; in vepu540c_h265_set_rc_regs()
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H A Dhal_h265e_vepu510.c1300 EncRcTaskInfo *rc_cfg = &task->rc_task->info; in vepu510_h265_set_rc_regs() local
1310 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu510_h265_set_rc_regs()
1315 reg_frm->common.enc_pic.pic_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1316 reg_frm->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1317 reg_frm->common.rc_qp.rc_max_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1318 reg_frm->common.rc_qp.rc_min_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1327 reg_frm->common.enc_pic.pic_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1328 reg_frm->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu510_h265_set_rc_regs()
1329 reg_frm->common.rc_cfg.rc_en = 1; in vepu510_h265_set_rc_regs()
1330 reg_frm->common.rc_cfg.aq_en = 1; in vepu510_h265_set_rc_regs()
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H A Dhal_h265e_vepu511.c1260 EncRcTaskInfo *rc_cfg = &task->rc_task->info; in vepu511_h265_set_rc_regs() local
1270 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu511_h265_set_rc_regs()
1275 reg_frm->common.enc_pic.pic_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1276 reg_frm->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1277 reg_frm->common.rc_qp.rc_max_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1278 reg_frm->common.rc_qp.rc_min_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1279 reg_frm->common.rc_cfg.rc_ctu_num = 1; in vepu511_h265_set_rc_regs()
1288 reg_frm->common.enc_pic.pic_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1289 reg_frm->synt_sli1.sli_qp = rc_cfg->quality_target; in vepu511_h265_set_rc_regs()
1290 reg_frm->common.rc_cfg.rc_en = 1; in vepu511_h265_set_rc_regs()
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H A Dhal_h265e_vepu580.c1893 EncRcTaskInfo *rc_cfg = &task->rc_task->info; in vepu580_h265_set_rc_regs() local
1904 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu580_h265_set_rc_regs()
1909 reg_base->reg0192_enc_pic.pic_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1910 reg_base->reg0240_synt_sli1.sli_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1912 reg_base->reg213_rc_qp.rc_max_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1913 reg_base->reg213_rc_qp.rc_min_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1922 reg_base->reg0192_enc_pic.pic_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1923 reg_base->reg0240_synt_sli1.sli_qp = rc_cfg->quality_target; in vepu580_h265_set_rc_regs()
1930 reg_base->reg213_rc_qp.rc_max_qp = rc_cfg->quality_max; in vepu580_h265_set_rc_regs()
1931 reg_base->reg213_rc_qp.rc_min_qp = rc_cfg->quality_min; in vepu580_h265_set_rc_regs()
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H A Dhal_h265e_vepu541_reg.h413 } rc_cfg; member
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu540c.c948 regs->reg_base.rc_cfg.rc_en = 1; in setup_vepu540c_rc_base()
949 regs->reg_base.rc_cfg.aq_en = 1; in setup_vepu540c_rc_base()
950 regs->reg_base.rc_cfg.aq_mode = 0; in setup_vepu540c_rc_base()
951 regs->reg_base.rc_cfg.rc_ctu_num = mb_w; in setup_vepu540c_rc_base()
H A Dhal_h264e_vepu580.c1304 regs->reg_base.rc_cfg.rc_en = 1; in setup_vepu580_rc_base()
1305 regs->reg_base.rc_cfg.aq_en = 1; in setup_vepu580_rc_base()
1306 regs->reg_base.rc_cfg.aq_mode = 0; in setup_vepu580_rc_base()
1307 regs->reg_base.rc_cfg.rc_ctu_num = mb_w; in setup_vepu580_rc_base()
H A Dhal_h264e_vepu540c_reg.h486 } rc_cfg; member
H A Dhal_h264e_vepu510.c1220 reg_frm->common.rc_cfg.rc_en = 1; in setup_vepu510_rc_base()
1221 reg_frm->common.rc_cfg.aq_en = 1; in setup_vepu510_rc_base()
1222 reg_frm->common.rc_cfg.rc_ctu_num = mb_w; in setup_vepu510_rc_base()
H A Dhal_h264e_vepu511.c1212 reg_frm->common.rc_cfg.rc_en = 1; in setup_vepu511_rc_base()
1213 reg_frm->common.rc_cfg.aq_en = 1; in setup_vepu511_rc_base()
1214 reg_frm->common.rc_cfg.rc_ctu_num = mb_w; in setup_vepu511_rc_base()
H A Dhal_h264e_vepu580_reg.h453 } rc_cfg; member
/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu510_common.h640 } rc_cfg; member
H A Dvepu511_common.h980 } rc_cfg; member
/rockchip-linux_mpp/mpp/codec/
H A Dmpp_enc_impl.c1122 MppEncRcCfg *rc_cfg = &enc->cfg->rc; in proc_jpeg_cfg() local
1207 rc_cfg->rc_mode = rc_set->rc_mode; in proc_jpeg_cfg()